JP5828818B2 - Power converter - Google Patents

Description

  The present invention relates to a power conversion device in which a plurality of single-phase inverters each having a DC voltage detector are connected in series to constitute each phase.

  In the serial multiplex type power converter that converts AC voltage to DC voltage and converts it to AC voltage of any frequency, the DC power source of each unit inverter is obtained by rectifying from AC power source, Due to the impedance variation on the secondary side, a difference occurs in the DC voltage of the unit inverter constituting the power conversion device, and the influence causes an imbalance in the output voltage current of each phase on the device output side. In order to solve the problem of unbalance, it is conceivable to detect the DC voltage of each unit inverter and apply the detected DC voltage to feedback control for unbalance correction (see, for example, Patent Document 1).

Japanese Patent Laying-Open No. 2006-271045 (FIG. 1)

  In a serial multiplex power conversion device, since it is necessary to provide a DC voltage detection circuit for each unit inverter, there is a large number of detection circuits, and there is a high possibility that the detection circuits will fail. In the case of a failure, the imbalance cannot be corrected. There was a problem that operation could not be continued.

  The present invention has been made in view of the above, and an object of the present invention is to provide a power conversion device capable of continuing operation even when a DC voltage detection circuit in a unit inverter fails.

  In order to achieve the above object, a power conversion device of the present invention includes an input transformer having a primary side connected to an AC power source and having 3N (N is an integer of 2 or more) secondary windings, It is connected to the secondary winding and consists of a three-phase rectifier circuit, a DC smoothing capacitor, and a single-phase inverter circuit that converts DC to single-phase AC. N single-phase AC outputs are connected in series to obtain one phase. 3N unit inverters configured to form a three-phase serial multiple power converter, a DC voltage detector for detecting a DC voltage applied to each DC smoothing capacitor, and each single-phase inverter circuit Common voltage control means for controlling the output voltage, the voltage control means feedbacks the outputs of the 3N DC voltage detectors to control the operation of the three-phase serial multiple power converter, and 3N DC voltage detectors When one unit becomes abnormal, the output of the abnormal DC voltage detector is equivalent to the secondary winding of the input transformer to which the unit inverter having the abnormal DC voltage detector is connected. It is characterized in that the output is switched to the output of the DC voltage detector in the unit inverter connected to the corresponding secondary winding having a proper impedance.

  According to the present invention, it is possible to provide a power converter that can continue operation even if the DC voltage detection circuit of the unit inverter fails.

The circuit block diagram of the power converter device which concerns on Example 1 of this invention. The internal block diagram of the unit inverter which comprises a power converter device. The circuit block diagram which shows the periphery of a data switching circuit in detail. The internal block diagram of a DC voltage detector abnormality detection circuit. The internal block diagram of the phase balance correction circuit which concerns on Example 1 of this invention. The circuit block diagram of the power converter device which concerns on Example 2 of this invention. The internal block diagram of the overvoltage prevention control circuit which concerns on Example 2 of this invention.

  Embodiments of the present invention will be described below with reference to the drawings.

  Hereinafter, the power converter concerning Example 1 of the present invention is explained with reference to FIG. FIG. 1 is a circuit configuration diagram of a power conversion apparatus according to Embodiment 1 of the present invention.

  Three-phase AC power is supplied from the three-phase power source 1 to the input transformer 2 having 3N windings (N is an integer of 2 or more) on the secondary side. FIG. 1 shows a case where N = 3. Three-phase AC power from each secondary winding of the input transformer 2 is supplied to unit inverters 3 (3U1, 3U2, 3U3, 3V1, 3V2, 3V3, 3W1, 3W2, 3W3), respectively. Single-phase outputs of unit inverters 3U1, 3U2, 3U3, single-phase outputs of unit inverters 3V1, 3V2, and 3V3, and single-phase outputs of unit inverters 3W1, 3W2, and 3W3 are connected in series to form U-phase, V-phase, and W-phase, respectively. A plurality of unit inverters are formed by forming phase voltages of phases, connecting one of these series connection bodies to each other as a neutral point, and connecting the other to the three-phase input terminal of the three-phase AC motor 4 The multiple power converter supplies three-phase AC power to the AC motor 4.

  In the voltage control circuit 5, which will be described in detail later, the correction voltage commands Vu *, Vv *, Vw * are determined so that the output voltage of the power converter becomes a predetermined voltage command 58, and this is supplied to the PWM control circuit 60. Output. The PWM control circuit 60 outputs a gate signal applied to the switching elements constituting each unit inverter so as to generate output voltages Vu, Vv, and Vw corresponding to the output voltage command, and controls these switching elements on and off. Further, the voltage of the three-phase power source 1 is detected by the instrument transformer 6 and given to the voltage control circuit 5.

  FIG. 2 is an internal configuration diagram of the unit inverter 3 shown in FIG. AC power from the secondary winding of the input transformer 2 is converted to DC power by the diode rectifier circuit 31 and the DC smoothing capacitor 33, and further converted to single-phase AC having an arbitrary frequency and voltage by the single-phase inverter circuit 32. To do. The single-phase inverter circuit 32 is formed by bridge-connecting two positive side arms and two negative side arms each having a switching element. The voltage across the DC smoothing capacitor 33 is detected by the voltage detector 34 and supplied to the voltage control circuit 5 of FIG.

  Hereinafter, the internal configuration of the voltage control circuit 5 of FIG. 1 will be described.

  The DC voltage detection values VdcfU1 to VdcfU3, VdcfV1 to VdcfV3, and VdcfW1 to VdcfW3 detected by the voltage detector 34 of each unit inverter 3 are stored in the DC voltage detection buffer 51 and simultaneously in the replacement data buffer 52. The When a failure is not detected by the DC voltage detector abnormality detection circuit 54 described later in detail, the value of the DC voltage detection buffer 51 is sent to the DC voltage buffer 55 via the data switching circuit 53. When a failure is detected by the detector abnormality detection circuit 54, the failure unit number is sent to the data switching circuit 53, and another unit number corresponding to the unit number is stored in the replacement data buffer 52 according to the unit number. A value is selected and sent to the DC voltage buffer 55.

  The sum of the DC voltages of the unit inverters constituting each phase is obtained from the output of the DC voltage buffer 55 by the voltage adding circuit 56 for each phase, and is given to the phase balance correction circuit 57 as each phase DC voltage. The phase balance correction circuit 57 corrects the three-phase voltage command obtained from the voltage command 58 command via the voltage command three-phase conversion circuit based on the unbalance of each phase DC voltage. That is, as a result, the phase balance correction circuit 57 outputs unbalanced correction voltage commands Vu *, Vv *, and Vw * that balance the output voltages of the unit inverters of each phase, and transmits them to the PWM control circuit 60. To obtain the gate pulse width of the unit inverter.

  Hereinafter, an example of the data switching process when the DC voltage detector is abnormal will be described with reference to FIG. FIG. 3 is a circuit configuration diagram showing the periphery of the data switching circuit 53 in detail.

  The DC voltage of the unit inverter 3 is dropped by the impedance (% IZ) of the secondary winding of the multi-winding input transformer 2 connected to the input side and charged to the DC smoothing capacitor 33. Is determined by the strength of the magnetic coupling determined by the positional relationship between the primary and secondary windings of the input transformer 2. That is, the weaker the bond, the larger% IZ, and the stronger, the smaller% IZ. Therefore, in the secondary winding of the multi-winding input transformer 2, the% IZ is set in the windings disposed at both ends in the longitudinal direction of the iron core (the primary-secondary magnetic coupling is weak). The larger the magnetically coupled winding arranged at the center in the longitudinal direction of the iron core, the smaller the% IZ. That is, since the size of% IZ of the windings on both sides in the longitudinal direction is axisymmetric with respect to the center with respect to the central portion of the iron core, 1a, 2a,..., Na, 1b, 2b,. , 2c, ... Nc 3 x N winding transformer, the secondary impedance Iz of each winding is 1a ≒ Nc, 2a ≒ (N-1) c, 3a ≒ (N-2) c ... 1b ≒ There is a symmetry such that Nb, 2b≈ (N−1) b, and therefore the DC voltage of the unit inverter charged from each winding basically has this symmetry. In order to utilize this symmetry, the direct current voltage detection buffer 51 has 1a, 2a,... Na from one end portion in the longitudinal direction of the iron core of the input transformer 2 to which the unit inverter is connected to the other end portion. , 1b, 2b, ... Nb, 1c, 2c, ... Nc in that order, and the replacement data buffer stores Nc, (N-1) c, ... 1c, Nb, (N-1) b in the reverse direction ... 1b, Na, (N-1) a, ..., 1a are saved in this order. When normal, the value of the DC voltage detection buffer 51 is sent to the DC voltage buffer 55 as it is. However, when the DC voltage detector failure detection circuit 54 detects an abnormality in the DC voltage detection value, the DC voltage detector failure detection circuit 54 detects it. The unit abnormality unit inverter number is output to the data switching circuit 53, and the data stored in the order corresponding to the detector abnormality unit inverter number is selected from the values in the replacement data buffer 52 and sent to the DC voltage buffer 55 for control. Used for. That is, the fault signal input to the DC voltage detection buffer 51 is switched to a normal DC voltage signal of the unit inverter connected to the secondary winding having an impedance equivalent to the fault unit inverter. Also, as shown in FIG. 3, when the number of secondary windings is an odd number, the unit inverter connected to the central winding does not have a symmetrical counterpart, so it is connected to two secondary windings adjacent to the front and rear. The average value of the DC voltage detection values of the two unit inverters is calculated by the average calculation circuit 61 and replaced. In this case, if any of the detection circuits of the paired unit inverters becomes abnormal, the replacement cannot be performed, and thus the above replacement is not performed.

  Next, an example of the internal configuration of the DC voltage detector abnormality detection circuit 54 will be described with reference to FIG. The AC voltage detected by the instrument transformer 6 is supplied to the DC voltage calculation circuit 541. The DC voltage calculation circuit 541 calculates the DC voltage that the voltage detector 34 will detect by calculation. That is, the DC voltage calculation value is obtained from the input line voltage of the instrument transformer 6 × √2. The DC voltage input switching circuit 542 sequentially takes the difference between the DC voltage detection value of the unit inverter and the above-described DC voltage calculation value, converts this to an absolute value by the absolute value circuit 534, and supplies it to the comparator 544. In the comparator 544, these absolute values are successively compared with the value of the DC voltage detector failure determination standard 545, and when the absolute value of the difference exceeds a predetermined value, it is displayed on the alarm display circuit 546 and the DC voltage detection. The value is stored in the unit failure unit number memory 547 and this value is transmitted to the data switching circuit 53.

  Next, an example of the internal configuration of the phase imbalance control circuit 57 will be described with reference to FIG. The DC voltage calculation value that is the output of the DC voltage calculation circuit 541 is considered to indicate the average value of the DC voltage, and the ratio of this value and the DC voltage detection value of each phase is divided by the divider 571 for each phase, The obtained ratio is multiplied by a voltage command for each phase by a multiplier 572 for each phase. As a result, correction voltage commands Vu *, Vv *, and Vw * for each phase are obtained and supplied to the PWM control circuit 60. It is obvious that the average of the outputs of the DC voltage buffer 55 may be obtained instead of the DC voltage calculation value.

  FIG. 6 is a circuit configuration diagram of the power conversion device according to the second embodiment of the present invention. In the second embodiment, the same parts as those in the circuit configuration diagram of the power conversion apparatus according to the first embodiment of the present invention shown in FIG. The second embodiment is different from the first embodiment in that the phase balance correction circuit 57 is omitted, the respective phase outputs of the voltage addition circuit 56 are given to the average value circuit 62, and this output is given to the overvoltage prevention control circuit 63. The output of the prevention control circuit 63 is added to the output of the voltage command 58.

  FIG. 7 shows an example of an internal configuration diagram of the overvoltage prevention control circuit 63. When the AC motor 4 is in a regenerative operation, the regenerative energy charges the DC smoothing capacitor 33 of the unit inverter 3, so that the DC voltage increases. At this time, in the overvoltage prevention control circuit 63, the DC voltage detection value detected by the average value circuit 62 and the DC voltage target value are compared by the comparator 632, and when this difference takes a positive value, that is, DC voltage detection. When the value becomes larger than the DC voltage target value, the control operation of the PI control circuit 631 is started and the voltage command correction value is added to the voltage command output of the voltage command 58. As a result, the difference between the terminal voltage of the AC motor 4 and the combined output voltage of the unit inverter 3 is reduced, so that charging of the DC smoothing capacitor 33 due to regenerative energy can be suppressed and the DC voltage can be prevented from becoming an overvoltage. It becomes possible.

  Although several embodiments of the present invention have been described above, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

  Example 1 and Example 2 are taken as an example of using DC voltage feedback for control, and are not limited to balance correction control and overvoltage prevention control, but individually detect DC voltage and control operation of the power converter. The present invention is effective as long as it is used.

  Moreover, the impedance (% IZ) of the secondary winding is described so as to be determined by the positional relationship in the longitudinal direction of the iron core of the input transformer 2, but the impedance of each secondary winding of the input transformer 2 is measured in advance. You may make it ask.

DESCRIPTION OF SYMBOLS 1 AC power supply 2 Input transformer 3 Unit inverter 4 AC motor 5 Voltage control circuit 6 Instrument transformer 5 Replacement data buffer 31 Diode rectifier circuit 32 Single phase inverter circuit 33 DC smoothing capacitor 34 DC voltage detection circuit 52 Replacement data buffer 53 Data Switching circuit 54 DC voltage detector abnormality detection circuit 55 DC voltage buffer 56 Voltage addition circuit 57 Phase balance correction circuit 58 Voltage command 59 Voltage command three-phase conversion circuit 60 PWM control circuit 61 Average circuit 62 Average value circuit 63 Overvoltage prevention control circuit 541 DC voltage calculation circuit 542 DC voltage input switching circuit 543 Absolute value circuit 544 Comparator 545 DC voltage detector failure judgment criterion 546 Alarm display circuit 547 Detector failure unit number memory 571 Division circuit 572 Multiplication circuit 631 PI control circuit 632 Comparator

Claims (6)

An input transformer having a primary side connected to an AC power source and having 3N (N is an integer of 2 or more) secondary windings;
Each of the secondary windings is connected to each of the secondary windings, and includes a three-phase rectifier circuit, a DC smoothing capacitor, and a single-phase inverter circuit that converts DC to single-phase AC. N single-phase AC outputs are connected in series. 3N unit inverters that obtain a phase and constitute a three-phase series multiple power converter;
A DC voltage detector for detecting a DC voltage applied to each DC smoothing capacitor;
A common voltage control means for controlling the output voltage of each of the single-phase inverter circuits,
The voltage control means includes
The output of the 3N DC voltage detectors is fed back to control the operation of the three-phase serial multiple power converter, and when one of the 3N DC voltage detectors becomes abnormal, this abnormality is detected. The output of the DC voltage detector is connected to the corresponding secondary winding having an impedance equivalent to the secondary winding of the input transformer to which the unit inverter having the abnormal DC voltage detector is connected. A power converter that switches to an output of a DC voltage detector in a unit inverter. The corresponding secondary winding is
With respect to the winding position of the secondary winding of the input transformer to which the unit inverter having the abnormal DC voltage detector is connected, the line is symmetrical with respect to the longitudinal center of the iron core of the input transformer. The power converter according to claim 1, wherein the power converter is a wound secondary winding.   When N is an odd number and the secondary winding of the input transformer to which the unit inverter having the abnormal DC voltage detector is connected is at the center position in the longitudinal direction of the iron core of the input transformer, the correspondence 2 The secondary winding is two secondary windings adjacent to the secondary winding, and the output of the abnormal DC voltage detector is the average of the DC voltage detectors of each of these two secondary windings. The power conversion device according to claim 2, wherein the power conversion device is switched to a value. Means for obtaining an average value of the DC voltage of the unit inverter;
The average value of the DC voltage and the detection value of each of the DC voltage detectors are sequentially compared, and when the difference exceeds a predetermined value, the DC voltage detector is determined to be abnormal. Item 4. The power conversion device according to any one of Items 1 to 3. Means for obtaining an average value of the DC voltage of the unit inverter;
The ratio between the average value of the DC voltage and the added value of the DC voltage detector for each phase of the three-phase series multiplex power converter is used to specify the voltage of each phase of the three-phase series multiplex power converter. The power converter according to any one of claims 1 to 4, further comprising phase balance correction means for correcting by multiplication.   The overvoltage prevention control means for adding a correction value to the voltage command of the three-phase serial multiple power converter when the addition value of the DC voltage detector exceeds a predetermined threshold value. The power converter according to any one of claims 1 to 5.

Images