JP5825313B2 - Resin package array sheet, resin module array sheet with built-in components - Google Patents

Description

  The present invention relates to a resin package arrangement sheet in which resin packages for housing semiconductor chips and the like are arranged, and a component built-in resin module arrangement sheet in which component-incorporated resin modules containing components such as electronic parts are arranged. The present invention relates to a resin package array sheet suitable for increasing the area occupancy ratio of a housed and embedded device, and a component built-in resin module array sheet.

  Semiconductor chip packages and resin modules with built-in components using resin as an insulating layer material are cheaper than those using ceramic as an insulating layer, and tend to be used frequently. At present, the area occupancy rate of the housed and built-in devices has been further increased so that it can be adapted to the downsizing and high functionality of the equipment to be applied. Is expected to be built into higher density components.

  A resin package or a resin module with a built-in component may be manufactured on a sheet in which a large number of the same products are arranged vertically and horizontally in consideration of manufacturing efficiency. When manufactured as a sheet, it is distributed while maintaining its form, and can be supplied to the assembly of circuit boards constituting application equipment. At the time of this assembly, individual packages or modules can be picked up from the sheet by the mounter head and mounted on a substrate such as a mother board. By distributing and supplying in sheet form, it is suitable for increasing the production efficiency of applied equipment.

  The technology disclosed in the present application is similar to the content disclosed in the following patent document as one surface for dicing the sheet (wafer in this document). It cannot be said that it is in the range that can be conceived from.

JP 2000-307032 A

  The present invention has been made in consideration of the above situation, and includes a resin package array sheet in which resin packages for accommodating semiconductor chips and the like are arranged, and a component built-in resin module in which components such as electronic components are incorporated. It is an object of the present invention to provide a resin package array sheet and a component-embedded resin module array sheet that can increase the area occupancy ratio of the housed and housed devices in the arrayed component built-in resin module array sheet.

  First, a method for manufacturing a resin package, which is a reference embodiment (first reference embodiment), includes a device having an area A (area when viewed in the thickness direction, hereinafter the same) and thickness B on a resin layer. B is embedded so as to be included in the thickness of the resin layer, and the resin layer overlapping the device is provided with a longitudinal conductor connected to the device or penetrates the resin layer in the region without the device A method of manufacturing a resin package having a structure including a vertical conductor, wherein one side length j and the other side length k of the resin package are the thickness of the resin layer in a state before the device is embedded. The difference d between a certain initial thickness a0 and the thickness B of the device and the post-deformation thickness a1, which is the thickness of the resin layer in the resin package, is set, and the formula A * B / {(B + d) − 0} or numerical value having an area dimension as a result of calculating the formula A * B / (a1-a0) is obtained as Sp, and the result of calculating Sp / j is obtained as k2, and the resin packages are arranged vertically and horizontally. In the resin package array sheet, a dummy region having one side length j and the other side length k2−k is adjacent to each region occupied by the resin package having one side length j and the other side length k through the one side. In a layout in which the resin package regions and the dummy regions are alternately arranged in one direction, the resin package array sheet is manufactured, and the layout has the layout. Each of the resin packages is separated from the resin package array sheet so that the dummy regions are removed.

  In this method, a device having an area A and a thickness B is embedded in a resin layer so that the thickness B is included in the thickness of the resin layer, and a longitudinal conductor connected to the device is formed in a resin layer overlapping the device. Covers the device in a state where the device is embedded in the resin layer for a resin package having a structure in which the resin layer is provided in the resin layer in a region having no device or having a longitudinal conductor penetrating the resin layer. It is intended to manufacture a resin package by appropriately controlling the thickness of the resin layer or the thickness of the insulating layer in a region where there is no device. In such a structure, when the area occupancy of the device in the resin layer (resin package) increases, the thickness of the resin layer that overlaps the device (or the thickness of the insulating layer in the region without the device) generally increases. However, when a vertical conductor is formed there, processing troubles may occur. Therefore, in the above-described aspect, in the resin package arrangement sheet, a dummy region is provided next to a region of the resin package that is originally required according to the area occupancy of the device (as a result), and the resin is disposed in the dummy region. The extra volume of the layer is absorbed.

  More specifically, it is as follows. The area A and thickness B of the device to be embedded are numerical values given from the device. The one side length j and the other side length k of the resin package are determined as products, and the initial thickness a0 that is the thickness of the resin layer at the beginning of manufacture is determined by the selection of the insulating layer material standardized as the thickness. Further, the difference d between the thickness B1 of the device and the post-lamination thickness a1, which is the thickness of the resin layer in the resin package, is the thickness of the resin layer that overlaps the device to be controlled. Can do. It is equivalent even if the post-lamination thickness a1, which is the sum of the device thicknesses B and d, is considered as a control target.

  The value Sp obtained by the expression A * B / {(B + d) −a0} is an appropriate area value as the sum of the resin package region and the dummy region. That is, assuming that the area Sp is the area of the resin layer, the post-deformation thickness “B + d” (= a1) is B + d = (total volume related to the thickness) / (total area) = (Sp * a0 + A * B) / Sp. When this equation is solved for Sp, the above equation is obtained.

  Accordingly, a rectangle with one side being j and the other side being Sp / j (= k2) corresponding to the obtained area value Sp is considered, and j * k (one side length j, other side length k) is made of resin. If it is applied to the package area, the rest is a dummy area, and the area is j * (k2-k). By such distribution, a resin package array sheet having a layout in which resin package regions and dummy regions are alternately arranged in one direction is manufactured. Then, each resin package is separated from the array sheet so that each dummy area is removed.

  According to this manufacturing method, even if the area occupancy of the device with respect to the resin package increases, the thickness of the resin layer that overlaps the device (or the thickness of the insulating layer in the region without the device) can be controlled appropriately without any trouble in processing. can do. That is, the area occupation ratio of the device accommodated as a resin package can be increased.

  Moreover, the manufacturing method of the component built-in resin module which is another reference aspect (2nd reference aspect) includes the device which has area A and thickness B in the resin layer, and includes this thickness B in the thickness of the said resin layer. The resin layer that is embedded and overlaps with the device is provided with a longitudinal conductor connected to the device, or the resin layer in a region without the device is provided with a longitudinal conductor that penetrates the resin layer The one-side length j and the other-side length k of the component-embedded resin module, the initial thickness a0 that is the thickness of the resin layer before the device is embedded, and the device The difference d between the thickness B of the resin layer and the post-deformation thickness a1, which is the thickness of the resin layer in the component built-in resin module, is set to the formula A * B / {(B + d) −a0} As a result of calculating formula A * B / (a1-a0), a numerical value having an area dimension is obtained as Sp, and a result of calculating Sp / j is obtained as k2, and the component built-in resin modules are arranged vertically and horizontally. In the built-in resin module array sheet, a dummy region having one side length of j and the other side length of k2-k is adjacent to each region occupied by the component built-in resin module having one side length j and the other side length k through the one side. Is manufactured so that one side length j is common, and the component built-in resin module region and the dummy region are alternately arranged in one direction, the component built-in resin module array sheet is manufactured, and the layout is Each of the resin modules with built-in components is separated from the resin module array sheet with built-in components so that the dummy areas are removed. To.

  In this manufacturing method, the object is changed from the resin package described above to the resin module with a built-in component, but the gist is essentially the same. The resin package is generally a resin structure for housing a semiconductor chip and the like, and the component built-in resin module is a resin plate module incorporating components such as electronic components. Even if the names are different, the structure and structure are very similar. Therefore, the same idea holds for the resin module with a built-in component.

  Further, in the method for manufacturing a resin package which is still another reference embodiment (third reference embodiment), an area A is provided so that an opening having an area So and a depth Do is provided in the first resin layer and the opening is accommodated in the opening. , A device having a thickness B is positioned, the second resin layer is positioned by being laminated on the first resin layer, and the second resin layer fills the opening of the first resin layer, and A method of manufacturing a resin package having a structure in which a device is embedded, wherein one side length j and the other side length k of the resin package are the thickness of the second resin layer in a state before the device is embedded. An initial thickness a0 and a post-deformation thickness a1 that is the thickness of the second resin layer on the first resin layer in the resin package are set, and the formula (So * Do-A * B) / ( The result of calculating a0-a1) In the resin package arrangement sheet in which the resin packages are arranged vertically and horizontally, the one side length j and the other side length k are calculated as Sp. A dummy region having one side length j and the other side length k2-k is provided adjacent to each region occupied by each of the resin packages having the one side length j, and the resin package has The resin package array sheet is manufactured in a layout in which the areas and the dummy areas are alternately arranged in one direction, and each resin package is connected to each dummy area from the resin package array sheet having the layout. It is characterized by being separated into pieces so as to be removed.

  In this method, an opening having an area So and a depth Do is provided in a first resin layer, a device having an area A and a thickness B is positioned so as to be accommodated in the opening, and the first resin layer is laminated on the first resin layer. The present invention is intended for a resin package having a structure in which two resin layers are positioned and the second resin layer fills the opening of the first resin layer and the device is embedded. In addition, it is intended to manufacture a resin package by appropriately controlling the thickness of the second resin layer overlapping the first resin layer in a state where the device is embedded in the resin layer.

  In the case of such a device embedding structure, when the area occupancy of the device in the resin layer (resin package) increases, generally, the amount of the second resin layer used for embedding increases. The thickness of the second resin layer that overlaps the first resin layer decreases. Depending on the degree of reduction, the function as an insulating layer can be impaired. Therefore, in this aspect, in the resin package arrangement sheet, a dummy region is provided next to the originally required resin package region in accordance with the area occupancy of the device (as a result), and the resin from this dummy region is provided. A layer is also used so that a portion of the resin required for embedding is borne.

  More specifically, it is as follows. The area A and thickness B of the device to be embedded are numerical values given from the device. The area So and the depth Do of the opening of the first resin layer provided for this device are values determined in consideration of the area A and the thickness B of the device. The one side length j and the other side length k of the resin package are determined as products, and the initial thickness a0 that is the thickness of the second resin layer at the beginning of manufacture is determined by the selection of the insulating layer material standardized as the thickness. . In addition, the thickness a1 after lamination deformation, which is the thickness of the second resin layer after being laminated on the first resin layer, is the thickness of the resin layer to be controlled, and is set as a value that does not cause malfunction as an insulating layer. obtain.

  The value Sp obtained by the equation (So * Do-A * B) / (a0-a1) is an area value suitable as the sum of the resin package region and the dummy region. That is, assuming this area Sp as the areas of the first and second resin layers, the thickness a1 after deformation is: a1 = (volume related to the thickness) / (total area) = {Sp * a0− (So * Do-A * B)} / Sp. When this equation is solved for Sp, the above equation is obtained.

  Accordingly, a rectangle with one side being j and the other side being Sp / j (= k2) corresponding to the obtained area value Sp is considered, and j * k (one side length j, other side length k) is made of resin. If it is applied to the package area, the rest is a dummy area, and the area is j * (k2-k). By such distribution, a resin package array sheet having a layout in which resin package regions and dummy regions are alternately arranged in one direction is manufactured. Then, each resin package is separated from the array sheet so that each dummy area is removed.

  According to this manufacturing method, even if the area occupancy of the device with respect to the resin package increases, the thickness of the second resin layer that overlaps the first resin layer is appropriately controlled so that it does not become an insulative layer. Can do. That is, the area occupation ratio of the device accommodated as a resin package can be increased.

  In addition, in the method of manufacturing the component-embedded resin module which is still another reference mode (fourth reference mode), an opening having an area So and a depth Do is provided in the first resin layer so that the area can be accommodated in the opening. A device having A and thickness B is positioned, laminated on the first resin layer to position the second resin layer, and the second resin layer fills the opening of the first resin layer. A method of manufacturing a component built-in resin module having a structure in which the device is embedded, wherein one side length j and another side length k of the component built-in resin module, the second resin layer in a state before the device is embedded And the post-deformation thickness a1 which is the thickness of the second resin layer on the first resin layer in the component built-in resin module, and the formula (So * Do-A * B) / (a0 As a result of calculating a1), a numerical value having an area dimension is obtained as Sp, a result of calculating Sp / j is obtained as k2, and in the component-embedded resin module array sheet in which the component-embedded resin modules are arranged vertically and horizontally, One side length j is common to a dummy region having one side length j and the other side length k2−k adjacent to each other through each side of the region occupied by the component built-in resin module having length j and other side length k. The component-embedded resin module array sheet is manufactured in a layout in which the regions of the component-embedded resin modules and the dummy regions are alternately arranged in one direction, and the component-embedded resin module array sheet having the layout is manufactured. From the above, each of the resin modules with built-in components is divided into pieces so that the dummy regions are removed.

  In this manufacturing method, the object is changed from the resin package described above to the resin module with a built-in component, but the gist is essentially the same. The resin package is generally a resin structure for housing a semiconductor chip and the like, and the component built-in resin module is a resin plate module incorporating components such as electronic components. Even if the names are different, the structure and structure are very similar. Therefore, the same idea holds for the resin module with a built-in component.

  In each of the above embodiments, the size of the resin package (or component built-in resin module) array sheet is described as not specified in advance, but the sizes are set as one side length Lx and the other side length Ly in advance. If it is set, the idea of adding another element holds. First, in this case, it is assumed that flexibility is provided by setting dummy areas, and it is not hindered to provide dummy areas alternately arranged with products in the vertical direction and the horizontal direction. This is advantageous from the viewpoint of productivity if it is possible to arrange as many resin packages (or resin modules with built-in components) as possible in a sheet having a specified size by arranging such dummy areas. Because of the idea.

  The maximum number that can be arranged is the same as the maximum integer that does not exceed (Lx * Ly) / Sp in calculation. However, there is a possibility that this number is a nominal number because the resin packages (or resin modules with built-in components) as products are arranged vertically and horizontally. On the other hand, the minimum number that can be arranged is, at least, the number of products (Ly * j) / Sp in the direction of Ly that is obtained by setting no dummy area in the direction of Lx (direction of j), and the direction of Ly (k {(Lx * Ly) / Sp} * {(j * k) / Sp}, which is the product of the number of products in the Lx direction (Lx * k) / Sp obtained without setting a dummy area in the direction of And the same number.

Next, the resin package array sheet according to one aspect of the present invention is a resin package array sheet in which resin packages are arrayed vertically and horizontally, and each of the resin packages includes a resin layer and the resin layer. A device embedded and embedded within the thickness of the device, and a vertical conductor connected to the device provided through the resin layer overlapping the device, or the resin layer penetrating the resin layer in a region without the device And a wiring layer provided on the resin layer so as to be connected to the vertical conductor, and a dummy region is adjacent to each region occupied by the resin package. And the resin package region and the dummy region are alternately arranged in at least one of a horizontal direction and a vertical direction, and the resin package region and the resin package region Besides Me region, the portion of the helicopter, characterized in that the region to be the frame portion so as to surround the entire region and the dummy region of the resin package is provided.

  This resin package array sheet is an intermediate for obtaining a resin package that can be manufactured by the manufacturing method according to the first reference aspect (including the case where the size of the resin package array sheet is specified in advance). Body (array sheet). Such an array sheet may be distributed while maintaining its form, and supplied to the assembly of the circuit board constituting the application device.

Moreover, the component built-in resin module array sheet according to another (second) aspect of the present invention is a component built-in resin module array sheet in which the component built-in resin modules are arrayed vertically and horizontally. Of a resin layer, a device embedded and embedded within the thickness of the resin layer, a longitudinal conductor connected to the device provided through the resin layer overlapping the device, or a region without the device A resin module with a built-in component , comprising: a longitudinal conductor provided through the resin layer through the resin layer; and a wiring layer provided on the resin layer so as to be connected to the longitudinal conductor. A dummy region is provided next to each region occupied by the component, and the region of the component built-in resin module and the dummy region are alternately arranged in at least one of the horizontal direction and the vertical direction. In addition to the region of the resin module with a built-in component and the dummy region, a region serving as a frame is provided at the edge portion so as to surround the entire region of the resin module with a built-in component and the dummy region. It is characterized by being.

  This component-embedded resin module array sheet obtains a component-embedded resin module that can be manufactured by the manufacturing method according to the second reference embodiment (including the case where the size of the component-embedded resin module array sheet is specified in advance). Intermediate (array sheet). Such an array sheet may be distributed while maintaining its form, and supplied to the assembly of the circuit board constituting the application device.

The resin package array sheet according to yet another (third) aspect of the present invention is a resin package array sheet in which resin packages are arrayed vertically and horizontally, and each of the resin packages has an opening. A first resin layer comprising: a device positioned so as to be accommodated in the opening; and the device laminated on the first resin layer and filling the opening of the first resin layer And a wiring layer provided on the second resin layer on the side opposite to the side where the first resin layer is located, and the resin package A dummy region is provided next to each region occupied by the resin package, and the resin package region and the dummy region are alternately arranged in at least one of the horizontal direction and the vertical direction, and the resin package region And said Besides Me region, the portion of the helicopter, characterized in that the region to be the frame portion so as to surround the entire region and the dummy region of the resin package is provided.

  This resin package array sheet is an intermediate for obtaining a resin package that can be manufactured by the manufacturing method according to the third reference embodiment (including the case where the size of the resin package array sheet is specified in advance). Body (array sheet). Such an array sheet may be distributed while maintaining its form, and supplied to the assembly of the circuit board constituting the application device.

The component-embedded resin module array sheet according to yet another (fourth) aspect of the present invention is a component-embedded resin module array sheet in which the component-embedded resin modules are arranged vertically and horizontally. Each of the first resin layer provided with an opening, the device positioned so as to be accommodated in the opening, and the opening of the first resin layer laminated on the first resin layer A second resin layer filling and embedding the device, and a wiring layer provided on the second resin layer opposite to the side where the first resin layer is located , A dummy region is provided next to each region occupied by the component built-in resin module, and the region of the component built-in resin module and the dummy region are alternately arranged in at least one of the horizontal direction and the vertical direction, In addition to the component built-in resin module region and the dummy region, an edge portion is provided with a region serving as a frame so as to surround the entire component built-in resin module region and the dummy region. And

  This component-embedded resin module array sheet obtains a component-embedded resin module that can be manufactured by the manufacturing method according to the fourth reference aspect (including the case where the size of the component-embedded resin module array sheet is specified in advance). Intermediate (array sheet). Such an array sheet may be distributed while maintaining its form, and supplied to the assembly of the circuit board constituting the application device.

  According to the present invention, in a resin package arrangement sheet in which resin packages for housing semiconductor chips and the like are arranged, and in a component built-in resin module arrangement sheet in which component built-in resin modules containing components such as electronic components are arranged, It is possible to increase the area occupancy of the device that is housed and incorporated.

  In the following, although the manufacturing method is shown, the manufacturing method itself is a reference embodiment regardless of the description therein.

The principle process drawing which illustrates typically the manufacturing method of the resin package which is one Embodiment of this invention. Process drawing which compares and demonstrates the manufacturing method of the resin-made packages which are reference examples typically with the manufacturing method shown in FIG. The top view which shows the structure of the resin package arrangement | sequence sheet | seats concerning one Embodiment of this invention. The top view and sectional drawing which show an example of the preferable distribution | circulation aspect of the resin-made package arrangement | sequence sheet | seats shown in FIG. The top view which shows the structure of the resin package arrangement | positioning sheet | seats concerning another embodiment of this invention. Sectional drawing which shows the specific structural example of the resin package which is each piece of the resin package arrangement | sequence sheet | seats shown in FIG. 3, FIG. Sectional drawing which shows the specific structural example of the resin package which is each piece of the resin package arrangement | sequence sheets shown in FIG. 3, FIG. 5 different from what was shown in FIG. The principle process drawing which illustrates typically the manufacturing method of the component built-in resin module which is another embodiment of this invention. FIG. 9 is a process diagram schematically illustrating a method for manufacturing a component-embedded resin module as a reference example in comparison with the manufacturing method illustrated in FIG. 8. Sectional drawing which shows the specific structural example of the component built-in resin module which is each piece of the component built-in resin module arrangement | sequence sheet | seat by the manufacturing method shown in FIG.

  In the first and second reference aspects, there are a plurality of the devices embedded in each of the resin packages, the total area of the plurality of devices is used as the area A, and the thickness B is about the plurality of devices. The average thickness obtained by dividing the volume sum by the area sum can be used.

  This is a conversion method for a case where there are a plurality of embedded devices. In this way, the same idea can be applied to the case where there are a plurality of embedded devices. In addition, as a case where a plurality of devices are embedded, for example, a case where a semiconductor chip and a passive element component (such as a chip capacitor) are embedded can be cited. This embodiment is the same in the case of the resin module with a built-in component.

  In the third and fourth reference aspects, there are a plurality of devices embedded in each of the resin packages, and the total area of all the openings for the plurality of devices is used as the area So of the openings. , Using the average depth obtained by dividing the total volume for all the openings by the total area as the depth Do of the openings, and using the total area for the plurality of devices as the area A, As the thickness B, an average thickness obtained by dividing a volume sum for the plurality of devices by the area sum can be used.

  This is also a conversion method when there are a plurality of embedded devices. In this way, the same idea can be applied to the case where there are a plurality of embedded devices. As a case where a plurality of devices are embedded, for example, a case where a semiconductor chip and a passive element component (such as a chip capacitor) are embedded can be cited. This embodiment is the same in the case of the resin module with a built-in component.

  As an embodiment as a resin package arrangement sheet, it has an adhesive tape affixed to the entire surface of one side of the resin package arrangement sheet having the resin package area and the dummy area, on the adhesive tape The resin package and the dummy region can be separated into individual pieces.

  This is a state in which the resin package has been separated into individual pieces, but the resin package is adhered to the adhesive tape and arranged together with the dummy area. According to such an embodiment, individual packages can be easily picked up from the sheet by the mounter head and mounted on a substrate such as a mother board. That is, it can contribute to the manufacturing efficiency improvement of applied equipment. This embodiment can be similarly applied to the case of a resin module with a built-in component.

  Based on the above, embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a principle process diagram schematically illustrating a method for producing a resin package according to an embodiment of the present invention. In this embodiment, a device 12 having an area A and a thickness B is embedded in a resin layer 13A derived from the prepreg 13 so that the thickness B is included in the thickness of the resin layer 13A, and the resin layer 13A is overlapped with the device 12. Is intended for a method of manufacturing a resin package including a via (vertical conductor) 16 connected to the device 12. Hereinafter, it demonstrates according to drawing.

  As shown in FIG. 1A, a device 12 such as a semiconductor chip is placed and fixed on a substrate 11 face up. Then, as shown in the figure, a prepreg 13 having an initial thickness of a0 and an area of Sp is laminated on the substrate 11 under pressure and heating. A metal foil (copper foil) 14 is provided in advance on the surface of the prepreg 13 opposite to the laminated surface. The metal foil 14 is later patterned into a wiring layer 14A.

  When the prepreg 13 is laminated on the base material 11, the prepreg 13 is deformed by pressurization and heating so as to obtain fluidity and is integrated on the base material 11 so as to be in close contact with the side surface and the upper surface of the device 12. (FIG. 1 (b)). Thereby, the prepreg 13 is cured to become the resin layer 13A, but the thickness increases from the initial thickness a0 to a1. This is because the prepreg 13 flows from the prepreg 13 overlapping the device 12 to a region where the device 12 is not present.

  The thickness a1 of the resin layer 13A can be expressed by (total volume related to the thickness) / (total area) = (Sp * a0 + A * B) / Sp. The thickness a1 is a1 = B + d, where d is the thickness of the resin layer 13A on the device 12. Solving for Sp from these equations yields Sp = A * B / {(B + d) -a0}. The formula for Sp should be controlled as A and B that define the size of the device 12, a0 that is the initial thickness of the prepreg 13 that is standardized as an insulating layer material, and a resin layer 13A that overlaps the device 12. Given that d is the thickness, it indicates that an appropriate area of the prepreg 13 (resin layer 13A) can be determined.

  The thickness d of the resin layer 13A overlapping the device 12 is controlled by, for example, laser processing a via hole 15 for a via (vertical conductor) 16 connected to the device 12 in this portion, as will be described below. This is because if the thickness is excessively thick, the processing becomes insufficient, or a special measure is required only for the thick thickness, resulting in difficulty in manufacturing efficiency.

  When Sp is immediately set as the product size as a resin package, the equation: Sp = A * B / {(B + d) -a0} is solved for a0, and a0 = f (Sp, A, B , D), the value of a0 can be obtained by giving d which should be the thickness of the resin layer 13A overlapping the device 12. If the prepreg 13 having such a thickness a0 is selected, it is considered that the thickness of the resin layer 13A overlapping the device 12 can be set to a desired value d. However, in general, the thickness of the prepreg is standardized, and the jump value There is only the thing of thickness. Thicknesses that deviate from it become custom-made and become expensive.

  Returning to the description with reference to FIG. 1, when lamination is performed as shown in FIG. 1B, next, via holes 15 that penetrate to the device 12 are formed in the resin layer 13 </ b> A and the metal foil 14 by, for example, laser processing. To do. Then, for example, electroless plating and electrolytic plating processes are performed to form plating vias (vertical conductors) 16 so as to fill the via holes 15 as shown in FIG.

  Further, as shown in FIG. 1E, the metal foil 14 on the surface layer is patterned into a wiring pattern 14A by predetermined patterning, for example, by a well-known photolithography process. Thus, the main process for forming the resin package is completed.

  As for the laminate having the area Sp formed as shown in FIG. 1E, a region (region of one side j and a region k of other side) as a resin package as a product and a region other than that (dummy region) It is treated as consisting of In other words, a dummy region is provided next to the region of the resin package that is originally required, and the excess volume of the resin layer 13A is absorbed in this dummy region, and the thickness thereof is reduced as desired. The area of the dummy region is Sp-j * k. By providing the dummy area in this way, the thickness d of the resin layer 13A overlapping the device 12 can be controlled as desired. The dummy area is separated from the resin package area as a product by the dicing line 17.

  In practice, the area of the dummy region may be a value finely adjusted from the value obtained by the above calculation. One of the factors that make fine adjustments is that, when actually manufactured, a plurality of products are often arranged side by side on an array sheet or a large panel (described later). This is because a frame region, a margin for cutting, and the like are prepared between the two, and the portion also actually functions as a region where the excess volume of the resin layer 13A is absorbed. Furthermore, as factors, it may be necessary to allow for a safe side in consideration of expansion or contraction when the prepreg 13 is modified to the resin layer 13A, or local thickness variation factors.

  In the dummy area, the same condition as that of the resin package area as a product may be set in relation to the state on the substrate 11 in contact with the prepreg 13 and the prepreg 13. For example, when the wiring pattern is provided on the base material 11 in the resin package region, the dummy wiring can be provided on the base material 11 at the same density in the dummy region. By aligning the conditions in this manner, it is possible to stack the prepregs 13 with no bias averaged between the resin package region and the dummy region as products. The formation density due to the presence of such a wiring pattern is one of the factors for finely adjusting the dummy area.

  Next, for comparison, a case where no dummy region is provided in the case of the resin package having the configuration shown in FIG. 1 will be described with reference to FIG. FIG. 2 is a process diagram schematically illustrating a resin package manufacturing method as a reference example in comparison with the manufacturing method shown in FIG. 2, the same or equivalent components as those shown in FIG. 1 are denoted by the same reference numerals.

  When the dummy area is not provided, the stacking as shown in FIG. As a result, the thickness a11 of the resin layer 13A in the state after lamination as shown in FIG. 2B is (j * k * a0 + A) in accordance with (total volume related to the thickness) / (total area). * B) / (j * k). The thickness a11 is a11 = B + dd where the thickness of the resin layer 13A on the device 12 is dd. When dd is solved from these equations, dd = A * B / (j * k) + a0−B. Naturally, this value is larger than A * B / Sp + a0−B which is d in FIG. 1 (because j * k <Sp).

  dd (= A * B / (j * k) + a0−B) typically has a large A / (j * k) [= area occupancy of the device 12 with respect to the resin package]. It has been shown. That is, when the area occupancy of the device 12 accommodated in the resin package as a product increases, the thickness of the resin layer 13A on the device 12 generally increases, and there is a problem in forming a via hole therein. Can occur.

  In this regard, when a dummy region is provided as shown in FIG. 1, the thickness of the resin layer 13A on the device 12 can be controlled as desired even if the area occupancy of the device 12 increases. Yes. Therefore, the configuration shown in FIG. 1 can also be said to be a configuration that can increase the area occupancy rate of the device 12 accommodated in a resin package as a product. In general, it can be said that the thickness B of the device 12 is as small and constant as the area A, and therefore the importance of the numerical value B / (j * k) as much as the numerical value A / (j * k). Is not expensive.

  Incidentally, the assumed area of the resin layer 13A including the dummy region when compared with the area of the resin package as the product is as follows. In general, since A <j * k, in the formula: Sp = A * B / {(B + d) −a0}, j * k is substituted for A and Sp <j * k * B / {(B + d) −a0 }. Since j * k is the area of the resin package that is the product, the assumed area Sp of the resin layer 13A including the dummy region is B / {(B + d) −a0} times the area of the resin package that is the product. Will be less than.

  Next, based on the size of the dummy area obtained as described above, a case where it is configured as a resin package array sheet will be described with reference to FIG. FIG. 3 is a plan view showing the configuration of a resin package array sheet according to an embodiment of the present invention.

  The resin package array sheet is a thin plate-like structure in which resin packages as products are arranged vertically and horizontally. Once manufactured in the form of a sheet, the sheet can then be circulated while being diced, and supplied to the assembly of a circuit board for use in application equipment (described later with reference to FIG. 4). To do). At the time of assembly, individual packages can be picked up from the sheet by a mounter head and mounted on a substrate such as a mother board. It is suitable for increasing the production efficiency of applied equipment by being distributed and supplied in sheet form.

  As shown in FIG. 3, in this arrangement sheet 1, one side length is j and the other side length is k 2 -k adjacent to each other through one side of each region occupied by the resin package 10 having one side length j and the other side length k. Adopting a layout in which dummy pieces 20 (= Sp / j−k) are provided so that one side length j is common, and regions of the resin package 20 and the dummy pieces 20 are alternately arranged in the vertical direction in the figure. Yes. This corresponds to the obtained area value Sp, and considers a rectangle with one side j and the other side Sp / j (= k2), and j * k (one side length j, other side length k) of the rectangle is resin. This is because it is applied to the area of the package 10 and the rest is set as a dummy area (area of the dummy piece 20).

  In addition, the area | region of the frame part 30 provided in the edge of this arrangement | sequence sheet | seat 1 can be given the following functions. That is, a pattern such as a mark for designating a dicing position (not shown) is written on the frame portion 30. When the sheet is diced, the dicer reads the mark, positions the dicing blade, and dices so as to follow the broken line shown in the figure.

  Since such a frame portion 30 is provided, this portion also actually functions as a region where the excess volume of the resin layer 13A is absorbed. Therefore, a layout in which the one row of dummy pieces 20a provided on the edge side of the array sheet 1 of the resin package 10 in FIG. 3 is not provided may be employed.

  A plurality of the array sheets 1 can be manufactured side by side on a large panel (not shown). If manufactured in this way, more efficient manufacturing can be performed. The arrangement sheet 1 can be cut out from the large panel using a known router, for example. Considering such a large panel, manufacturing a resin package with a configuration having a dummy area such as the array sheet 1 means that even if the array sheet 1 has a dummy area, there is no dummy area. Compared to the case where individual resin packages are arranged side by side, the number is not necessarily reduced.

  That is, when resin packages are individually arranged in a panel without a dummy area, for example, a router is used to cut out individual resin packages that are products from the panel. It is necessary to provide around each product. The product and the product are not separated by the groove formed by the router. That is, it is necessary to secure a waste area that does not become a product area, including a margin, in the panel.

  In the case of manufacturing a resin package with a configuration of an array sheet on a panel, since the products are arranged in an array and are adjacent to each other, such a waste area can be greatly reduced. Therefore, even if a dummy area is provided in the array sheet 1, the number of picks is not necessarily reduced as compared with the case where resin packages that are individually cut out and separated by a router are arranged in the panel. Rather, it is likely to increase.

  Next, FIG. 4 is a plan view (FIG. 4A) and a cross-sectional view (FIG. 4B) showing an example of a preferable distribution mode of the resin package arrangement sheet shown in FIG. 3. In FIG. 4, the same reference numerals are given to the same components as those shown in the already described drawings.

  As shown in FIG. 4, the arrangement sheet configured as shown in FIG. 3 can be circulated in a form with a dicing tape (adhesive tape) 31 having adhesiveness on the upper surface and a dicing frame 32 that frames this. it can. As described above, in the form with the dicing tape 31 and the dicing frame 32, the diced array sheet 1D is supplied to the assembly process of the circuit board used for the application equipment without the resin packages 10 being separated. can do.

  As shown in FIG. 4B, the dicing tape 31 is fixed to the lower surface of the dicing frame 32 with an adhesive, and the array sheet 1D is positioned on the adhesive surface of the dicing tape 31 inside the dicing frame 32. Yes. The array sheet 1D is diced by a dicer with a register up to the middle thickness of the dicing tape 31, and the resin packages 10 and the dummy pieces 20 are separated. The dicing tape 31 and the dicing frame 32 are originally configured for dicing the wafer or sheet before dicing.

  When each resin package 10 is picked up by the mounter, the round protrusion is pressed against the position corresponding to the package 10 to be picked up on the lower surface of the dicing tape 31 to release the package 10 from the adhesiveness of the dicing tape 31. In this state, the upper surface of the package 10 is vacuum-adsorbed by the mounter head.

  It supplements that the dicing tape 31 and the dicing frame 32 are the structures for dicing the arrangement | sequence sheet | seat 1. FIG. The dicing tape 31 is initially in the form of a tape and is drawn from the roll by a dedicated machine. At this time, the adhesive surface (lower surface) side that is drawn out and is flat is opposed to the dicing frame 32 made of, for example, aluminum. Then, the array sheet 1 before dicing is pressed together with the dicing frame 32 (or in the order of the array sheet 1 and the dicing frame 32) toward the dicing tape 31 in the region inside the dicing frame 32, and the array sheet 1 and the dicing frame 32 are pressed. Is adhered to the dicing tape 31.

  After the arrangement sheet 1 and the dicing frame 32 are adhered to the dicing tape 31, unnecessary areas of the dicing tape 31 spreading outside the dicing frame 32 are cut off. In this state, it is applied to the dicer, and the arrangement sheet 1 is diced by the dicer up to the middle thickness of the dicing tape 31 and separated into pieces (however, the arrangement sheet 1 is not separated but kept in the arrangement).

  Next, FIG. 5 is a plan view showing a configuration of a resin package array sheet according to another embodiment of the present invention. In this embodiment, it is assumed that the size of the effective area excluding the frame portion 30A in the array sheet 1A is specified in advance. As shown in FIG. 5, as such an effective region, its one side length is Lx and the other side length is Ly. In such a case, if it is a condition that the dummy regions are alternately provided with the product pieces only in one of the horizontal direction and the vertical direction, the production of the area of the area Sp within the effective region is wasted. May deteriorate.

  Therefore, as shown in FIG. 5, the dummy regions 20d are arranged in the horizontal direction and the vertical direction alternately with respect to the arrangement of the resin packages 10 which are product pieces as shown in FIG. The layout is such that 20e is provided. A dummy piece 20f is also provided in the intersecting region between the dummy piece 20d in the vertical row and the dummy piece 20e in the horizontal row. As described with reference to FIG. 1, the area of the resin package 10 and the area of each one of the dummy pieces 20d, 20e, and 20f is Sp (the area is Sp).

  The maximum number of resin packages 10 that can be arranged is the same as the maximum integer that does not exceed (Lx * Ly) / Sp in the calculation. However, this number may be a nominal number because the resin packages 10 are arranged vertically and horizontally. On the other hand, the minimum number that can be arranged is, at least, the number of products (Ly * j) / Sp in the direction of Ly that is obtained by setting no dummy area in the direction of Lx (direction of j), and the direction of Ly (k {(Lx * Ly) / Sp} * {(j * k) / Sp}, which is the product of the number of products in the Lx direction (Lx * k) / Sp obtained without setting a dummy area in the direction of And the same number.

  What is necessary in this embodiment is that the area Sp including the dummy area, which is obtained as described with reference to FIG. 1, within the effective area Lx * Ly of the arrangement sheet 1A, is reduced to a small area. How many can be secured. Considering a rectangle with an area Sp (one side length is j or more and the other side length is k or more), the length of the side is changed and applied to the effective area Lx * Ly, so that the number of rectangles is maximized. You can ask if.

  As a general precaution, if a short length such as less than 0.2 mm is appropriately determined as the short side of each dummy piece 20d, 20e, it is better not to adopt it. This is because such a dummy piece makes it difficult to secure adhesion to the dicing tape, and may be unintentionally dropped from the dicing tape due to vibration or the like.

  In this embodiment, the number of times of dicing for the array sheet 1A is increased because the number of dicing lines is increased as compared with the case shown in FIG. The production cost is affected accordingly, but there is also an effect of increasing the number of the resin packages 10 that can be taken in the array sheet 1A. Therefore, the cost is not necessarily increased as a whole.

  Next, FIG. 6 is a cross-sectional view showing a specific configuration example of the resin package 10 which is each piece of the resin package arrangement sheet shown in FIGS. 3 and 5. This resin package includes a copper plate (stiffener) 51, an insulating layer 52, an insulating layer 53, a solder resist 54, a semiconductor chip (device) 55, a plating via (vertical conductor) 56, a wiring pattern 57, a plating via 58, and wiring. A pattern 59 is provided.

  The structure will be briefly described as follows. A semiconductor chip 55 is mounted and fixed face-up on a copper plate 51 that functions as a stiffener, and the semiconductor chip 55 is embedded in close contact with an insulating layer 52. The semiconductor chip 55 corresponds to the device 12 described in FIG. 1, and the insulating layer 52 corresponds to the resin layer 13A in FIG.

  The wiring layer 57 provided on the insulating layer 52 and the semiconductor chip 55 are electrically connected by a plating via 56 provided through the insulating layer 52 located on the semiconductor chip 55. Then, another insulating layer 53 is laminated so as to cover the wiring layer 57, and another wiring layer 59 is provided on the insulating layer 53. The wiring layer 59 and the wiring layer 57 are electrically connected by a plating via 58 provided through the insulating layer 53. Further, a solder resist 54 is formed on the upper surface of the insulating layer 53 in a region other than a region where solder is provided.

  In the case of such a configuration, the embodiment shown in FIG. 4 can be applied with the upper side in the drawing as the dicing tape side and the lower side as the pickup side. In addition, although it can also be set as the structure which provides a solder ball (not shown) on the pattern which the wiring layer 59 contains, in this case, an adhesion area on a dicing tape reduces a substantial adhesion area, and it is a little difficult. There seems to be. That is not to say impossible.

  Next, FIG. 7 is a cross-sectional view showing a specific configuration example of the resin package 10 which is each piece of the resin package arrangement sheet shown in FIGS. 3 and 5, which is different from that shown in FIG. 6. . This resin package includes an insulating layer 61, an insulating layer 62, an insulating layer 63, a solder resist 64, a solder resist 65, a wiring pattern 66, a plating via 67, a wiring pattern 68, a plating via 69, an underfill resin 70, a semiconductor chip ( Device) 71, plating via 72, wiring pattern 73, plating via 74, wiring pattern 75, surface mount passive element component 76, solder 77, and possibly mold resin 78.

  The structure will be briefly described as follows. Initially, the semiconductor chip 71 is mounted and fixed face-down on the wiring pattern 68, which is a metal layer on one side, via an underfill resin 70. On the back surface (the lower surface in the figure) of this metal foil, a mark corresponding to the terminal pad of the semiconductor chip 71 may be marked. On this metal foil, the semiconductor chip 71 is embedded in close contact with the insulating layer 62. The semiconductor chip 71 corresponds to the device 12 described in FIG. 1, and the insulating layer 62 corresponds to the resin layer 13A in FIG.

  The wiring pattern 73 provided on the insulating layer 62 and the wiring pattern 68 are electrically connected by a plating via 72 provided through the insulating layer 62. The semiconductor chip 71 and the wiring pattern 68 are electrically connected by a plating via 69 provided through the underfill resin 70. Since the position of the plating via 69 is specified and formed, a mark attached to the metal foil can be used. The wiring pattern 68 and the wiring pattern 73 are obtained by patterning a metal foil after the formation of the plating vias 69 and 72.

  Then, another insulating layer 61 is laminated so as to cover the wiring pattern 68, and another wiring pattern 66 is provided on the insulating layer 61. The wiring pattern 68 and the wiring pattern 66 are electrically connected by a plating via 67 provided through the insulating layer 61. Further, a solder resist 65 is formed on the upper surface of the insulating layer 61 in a region other than a region where solder is provided.

  Further, another insulating layer 63 is laminated so as to cover the wiring pattern 73, and another wiring pattern 75 is provided on the insulating layer 63. The wiring pattern 75 and the wiring pattern 73 are electrically connected by a plating via 74 provided through the insulating layer 63. Further, a solder resist 64 is formed on the upper surface of the insulating layer 63 in a region that is not a region where the solder and the surface-mounted passive element component 76 are provided. On the lands included in the wiring pattern 75, the surface mount type passive element component 76 is mounted with solder 77.

  In addition, as a possibility, a mold resin 78 is provided over the entire surface of the insulating layer 63 so as to seal the surface-mounted passive element component 76. The mold resin 78 can be formed on one side at the stage of the arrangement sheet shown in FIG.

  In the case of such a configuration, the embodiment shown in FIG. 4 can be applied with the lower side in the figure as the dicing tape side and the upper side as the pickup side. A configuration in which solder balls (not shown) are provided on the pattern included in the wiring pattern 66 can also be adopted. This is the same as described with reference to FIG.

  This example is a resin package having a structure in which a resin via 62 (longitudinal conductor) 72 penetrating the resin layer 62 is provided in the resin layer 62 in a region without the semiconductor chip (device) 71. The situation is different from the form described up to 6. However, in the case shown in FIG. 7, when the area occupation ratio of the semiconductor chip (device) 71 occupying in the resin layer 62 increases, the thickness of the insulating layer 62 in the region without the semiconductor chip 71 increases, A similar problem arises in that processing difficulties can occur when forming a directional conductor (plating via 72).

  That is, in the formula for determining the area Sp: Sp = A * B / {(B + d) −a0}, B + d is equal to the thickness of the resin layer 62, and therefore, the insulation between A and B defining the size of the semiconductor chip 71 is isolated. When a0 which is the initial thickness of the insulating layer 62 standardized as a layer material and a1 (= B + d) to be controlled as the thickness of the insulating layer 62 in the region where the semiconductor chip 71 is not provided are given. This is common in that an appropriate area Sp including the dummy can be determined. Thereby, in the arrangement sheet as shown in FIG. 3, an appropriate size relationship between the resin package 10 and the dummy piece 20 can be derived.

  As described above, the resin package has been described as an example as an embodiment, but the case of a resin module with a built-in component can be similarly considered. The resin package is generally a resin structure for housing a semiconductor chip and the like, and the component built-in resin module is a resin plate module incorporating components such as electronic components. Therefore, a device having an area A and a thickness B is embedded in the resin layer so that the thickness B is included in the thickness of the resin layer, and a longitudinal conductor connected to the device is provided in the resin layer overlapping the device, or The same idea holds true as long as the resin layer in a region where no device is provided has a longitudinal conductor passing through the resin layer.

  Further, in the case where there are a plurality of devices embedded in each of the resin packages, if converted as follows, the equation: Sp = A * B / {(B + d) −a0} is similarly used. A resin package having a desired thickness d on the device 12 as the layer 13A (or a resin package having the desired thickness a1 (= B + d) as the resin layer 13A in the region without the device 12) can be obtained.

  That is, the total area for the plurality of devices is used as the area A, and the average thickness obtained by dividing the total volume for the plurality of devices by the total area is used as the thickness B. d means the thickness of the insulating layer on a virtual device having an average thickness, but the actual thickness can be obtained by using the difference between the actual device thickness and the average value. The actual thickness should just be settled in desired thickness (range). In recent years, there is an increasing demand for such a configuration in which a plurality of devices are accommodated and incorporated in resin packages and resin modules with built-in components.

  Next, another embodiment of the present invention will be described with reference to FIG. FIG. 8 is a principle process diagram schematically illustrating a method of manufacturing a component built-in resin module according to another embodiment of the present invention. In this embodiment, an opening having an area So and a depth Do is provided in the core resin layer 115, and a device 112 having an area A and a thickness B is positioned so as to be accommodated in the opening. The case of the method of manufacturing a resin package in which the layer 113A is positioned and the resin layer 113A fills the opening of the core resin layer 115 and embeds the device 112 is targeted. Hereinafter, it demonstrates according to drawing.

  As shown in FIG. 8A, the core resin layer 115 is laminated on the base material 111. The core resin layer 115 is provided with an opening having an area So and a depth Do, and a device 112 having an area A and a thickness B is provided face-down or face-up so as to be accommodated in the opening. A wiring layer 116 is provided on the core resin layer 115 on the side opposite to the substrate 111 side.

  Then, on the core resin layer 115 including the device 112 including the opening and the wiring layer 116, a prepreg 113 having an initial thickness of a0 and an area of Sp is laminated under pressure and heat as shown in the figure. Is done. A metal foil (copper foil) 114 is provided in advance on the surface of the prepreg 113 opposite to the laminated surface. The metal foil 114 is later patterned to become the wiring layer 114A.

  When the prepreg 113 is laminated on the core resin layer 115, the core resin is so formed that the prepreg 113 is deformed by applying pressure and heat so as to obtain fluidity, fill the opening of the core resin layer 115, and embed and adhere to the device 112. It is integrated on the layer 115 (FIG. 8B). As a result, the prepreg 113 is cured to become the resin layer 113A, but its thickness is reduced from the initial thickness a0 to a1. This is because the prepreg 13 flows toward the opening of the core resin layer 115.

  The thickness a1 of the resin layer 113A can be represented by (volume volume related to the thickness) / (total area) = {Sp * a0− (So * Do−A * B)} / Sp. When this equation is solved for Sp, Sp = (So * Do-A * B) / (a0-a1). The formula for Sp is as follows: A and B that define the size of the device 112; the area So and the depth Do of the opening of the core resin layer 113A that houses the device 112; and the prepreg 113 that is standardized as the insulating layer material. When the initial thickness a0 and the thickness a1 to be controlled as the thickness of the resin layer 113A are given, it is indicated that an appropriate area of the prepreg 113 (resin layer 113A) can be determined.

  The reason why the thickness a1 of the resin layer 113A is controlled is to maintain the function as an insulating layer. That is, since the thickness a1 of the resin layer 113A is reduced from the initial thickness a0, if the predetermined thickness cannot be secured, the wiring layer 116 and the wiring layer 114A formed from the metal foil 114 This is because the reliability of electrical insulation is reduced. On the other hand, if the initial thickness a0 is excessively increased in order to maintain the predetermined thickness, there may be a problem when a via hole is formed in the resin layer 113A by laser processing, for example. That is, when the thickness is excessively large, the processing may be insufficient, or special measures may be required only for the thick thickness, which may cause difficulty in manufacturing efficiency.

  When Sp is immediately set as the product size as a resin package, the formula: Sp = (So * Do−A * B) / (a0−a1) is solved for a0, and a0 = f (Sp, A , B, So, Do, a1), a1 can be obtained by giving a1 that should be the thickness of the resin layer 113A. It is considered that the thickness of the resin layer 113A can be set to a desired a1 by selecting the prepreg 113 having such a thickness a0. However, in general, the thickness of the prepreg is standardized and the thickness of the skipped value is There is only. Thicknesses that deviate from it become custom-made and become expensive.

  Returning to the description with reference to FIG. 8, when lamination is performed as shown in FIG. 8B, next, via holes penetrating to the wiring layer 116 are formed in the resin layer 113 </ b> A and the metal foil 114 by, for example, laser processing. To do. Then, for example, electroless plating and electrolytic plating processes are performed to form plating vias (longitudinal conductors) 117 so as to fill the via holes as shown in FIG. 8C. When the device 112 is face up, a via hole penetrating to the device 112 can be formed in the resin layer 113A and the metal foil 114 by, for example, laser processing, and a plating via (not shown) can be formed in the same manner. .

  Further, as shown in FIG. 8D, the metal foil 114 on the surface layer is processed into a wiring layer 114A by predetermined patterning, for example, by a well-known photolithography process. Thus, the main process for forming the resin package is completed.

  As for the laminated body having the area Sp formed as shown in FIG. 8D, a region (one side j, another side k region) as a resin package as a product and the other region (dummy region). It is treated as consisting of In other words, a dummy region is provided next to the originally required resin package region, and a part of the volume for forming the resin layer 113A with a predetermined thickness is borne from this dummy region, and the thickness reduction is desired. The configuration is reduced to a very low level. The area of the dummy region is Sp-j * k. By providing the dummy region in this way, the thickness a1 of the resin layer 113A can be controlled as desired. The dummy region is separated from the region of the resin package which is a product by the dicing line 118.

  For comparison, a case where no dummy region is provided in the case of the resin package having the configuration shown in FIG. 8 will be described with reference to FIG. FIG. 9 is a process diagram schematically illustrating a method for manufacturing a resin package as a reference example in comparison with the manufacturing method illustrated in FIG. 8. 9, components that are the same as or equivalent to the components shown in FIG.

  When the dummy area is not provided, the stacking as shown in FIG. As a result, the thickness a11 of the resin layer 113A in the state after lamination as shown in FIG. 9B is (j * k * a0) according to (volume volume related to the thickness) / (total area). − (So * Do−A * B)} / (j * k) = a0− (So * Do−A * B) / (j * k). Of course, a11 is smaller than a0.

  a11 typically has a large A / (j * k) [= area occupancy ratio of the device 112 with respect to the resin-made package]. When A / (j * k) is large, So / (j * k) must also be large, and this numerical value is considered even when considered as numerical value (So−A) / (j * k). This is because it is considered to be large. That is, when the area occupancy of the device 112 accommodated in the resin package as a product increases, the thickness of the resin layer 113A laminated on the upper side of the opening generally decreases, and the reliability as the insulating layer is increased. Decrease may be a concern.

  In this regard, when a dummy region is provided as shown in FIG. 8, even if the area occupancy of the device 112 increases, the thickness of the resin layer 113A positioned on the opening can be controlled as desired. ing. Therefore, the configuration shown in FIG. 8 can also be said to be a configuration that can increase the area occupancy of the device 112 accommodated in the resin package as the product. In general, it can be said that the thickness B of the device 112 is as small and constant as the area A, so the importance of the numerical value B / (j * k) is as high as the numerical value A / (j * k). Is not expensive.

  Incidentally, the assumed area of the resin layer 113A including the dummy region when compared with the area of the resin package as the product is as follows. Since So <j * k in general, in the formula: Sp = (So * Do-A * B) / (a0-a1), j * k is substituted for So, and Sp <(j * k * Do-A * B) / (a0-a1). Here, in general, it can be assumed that j * k * Do >> A * B. Therefore, Sp <j * k * Do / (a0−a1) is obtained by ignoring the A * B term. Since j * k is the area of the resin package that is the product, the assumed area Sp of the resin layer 113A including the dummy region is less than Do / (a0-a1) times the area of the resin package that is the product. It will be.

  The resin package described with reference to FIG. 8 can also be configured as a disposition sheet as shown in FIG. 3 in the same manner as the resin package with reference to FIG. Moreover, it can be set as the form of the state diced on the dicing tape 31 with the dicing tape 31 and the dicing frame 32 as shown in FIG. Moreover, although FIG. 8 demonstrated the resin-made package as an example as embodiment, the case of the resin module with a built-in component can be considered similarly.

  Further, in the case where there are a plurality of devices embedded in each of the resin packages, if converted as follows, the formula: Sp = (So * Do-A * B) / (a0-a1) is similarly obtained. By using this, a resin package having a desired thickness a1 can be obtained as the resin layer 113A.

  That is, the average depth obtained by dividing the total volume for all openings by the total area as the opening depth Do, using the total area for all openings for a plurality of devices as the opening area So. , And the area A is the total area for the plurality of devices, and the thickness B is the average thickness obtained by dividing the volume total for the plurality of devices by the area total. In recent years, there is an increasing demand for such a configuration in which a plurality of devices are accommodated and incorporated in resin packages and resin modules with built-in components.

  Next, FIG. 10 is a cross-sectional view showing a specific configuration example of the component built-in resin module that is each piece of the component built-in resin module array sheet by the manufacturing method shown in FIG. This component built-in resin module includes insulating layers 211, 212, 213, 214, 215, 216, and 217, wiring layers (wiring patterns) 221, 222, 223, 224, 225, 226, 227, and 228, an interlayer connector (conductive). Conductive bumps 231, 232, 233, 234, 235, 236, 237, surface mounted passive element parts (devices) 241, solder 251, solder resists 261 and 262.

  The structure will be briefly described as follows. The surface mounted passive element component 241 is a chip component for surface mounting, and is, for example, a chip capacitor or a chip resistor. The planar size is, for example, 0.6 mm × 0.3 mm. Terminals are provided at both ends, and the lower side thereof is opposed to the mounting land formed by the wiring layer 222. The terminals of the surface mount type passive element component 241 and the mounting lands are electrically and mechanically connected by solder 251. The passive element component 241 corresponds to the device 112 described in FIG.

  The wiring layers 221 and 228 are wiring layers on both main surfaces as wiring boards and include lands. The land by the wiring layer 221 is, for example, a land as an external connection terminal, and the land by the wiring layer 228 is a land on which another device can be mounted. Solder resists 261 and 262 are formed on both main surfaces except for the land portion where the solder is located, so that the solder melted at the time of solder connection is fixed to the land portion and then functions as a protective layer. A Ni / Au plating layer (not shown) having high corrosion resistance may be formed on the surface layer of the land portion.

  Each of the wiring layers 222 to 227 is an inner wiring layer. In order, the insulating layer 211 is between the wiring layer 221 and the wiring layer 222, and the insulating layer 212 is between the wiring layer 222 and the wiring layer 223. 223 and the wiring layer 224, the insulating layer 214 between the wiring layer 224 and the wiring layer 225, the insulating layer 215 between the wiring layer 225 and the wiring layer 226, and the wiring layer 226. An insulating layer 216 is located between the wiring layer 227 and an insulating layer 217 is located between the wiring layer 227 and the wiring layer 228, respectively, and separates these wiring layers 221 to 228. Each of the wiring layers 221 to 228 is obtained, for example, by pattern formation on a metal (copper) foil.

  Each of the insulating layers 211 to 217 is a rigid material made of, for example, a glass epoxy resin. In particular, the insulating layers 213, 214, and 215 have openings corresponding to the built-in surface-mounted passive element components 241, and provide a space for embedding the passive element components 241. The insulating layers 212 and 216 are deformed so as to fill the openings of the insulating layers 213 to 215 for the built-in passive element component 241, and there is no space serving as a gap inside.

  The insulating layers 213 to 215 correspond to the core resin layer 113A described with reference to FIG. However, in this example, since the opening for the passive element component 241 is also initially provided in the insulating layer 211, the insulating layer 211 can be considered to be included in the core resin layer 113A. Since the insulating layer 211 is initially a prepreg like the insulating layer 216, it contributes to fill the opening, but it may be considered that the degree is smaller than that of the insulating layer 216. The insulating layer 216 corresponds to the resin layer 113A in FIG.

  The wiring layer 221 and the wiring layer 222 can be electrically connected by an interlayer connector 231 that is sandwiched between the surfaces of these patterns and penetrates the insulating layer 211. Similarly, the wiring layer 222 and the wiring layer 223 can be conducted by an interlayer connector 232 that is sandwiched between the surfaces of these patterns and penetrates the insulating layer 212. The wiring layer 223 and the wiring layer 224 can be electrically connected by an interlayer connector 233 provided through the insulating layer 213. The wiring layer 224 and the wiring layer 225 can be conducted by an interlayer connector 234 that is sandwiched between the surfaces of these patterns and penetrates the insulating layer 214.

  Further, similarly, the wiring layer 225 and the wiring layer 226 can be conducted by an interlayer connector 235 that is sandwiched between the surfaces of these patterns and penetrates the insulating layer 215. The wiring layer 226 and the wiring layer 227 can be conducted by an interlayer connector 236 that is sandwiched between the surfaces of the patterns and penetrates the insulating layer 216. The wiring layer 227 and the wiring layer 228 can be conducted by an interlayer connector 237 that is sandwiched between the surfaces of the patterns and penetrates the insulating layer 217.

  The interlayer connectors 231 to 237 are derived from conductive bumps formed by screen printing of a conductive composition, and depend on the manufacturing process in the axial direction (upper and lower laminations in the illustration of FIG. 1). Direction).

  In the case of the component built-in resin module having such a configuration, either the lower side or the upper side in the figure can be the dicing tape side, and the opposite side can be the pickup side. In addition, it can also be set as the structure which provides a solder ball (not shown) on the pattern which the wiring pattern 221 contains. This is the same as described with reference to FIG.

  DESCRIPTION OF SYMBOLS 1,1A ... Resin package arrangement sheet, 1D ... Resin package arrangement sheet (diced), 10 ... Resin package, 11 ... Base material, 12 ... Device, 13 ... Prepreg, 13A ... Resin layer, 14 ... Metal foil (Copper foil), 14A ... wiring layer (wiring pattern), 15 ... via hole, 16 ... plated via (vertical conductor), 17 ... dicing line, 20 ... dummy piece, 20a ... dummy piece, 20d, 20e, 20f ... Dummy piece 30, 30A ... Frame portion, 31 ... Dicing tape, 32 ... Dicing frame, 51 ... Copper plate (stiffener), 52 ... Insulating layer, 53 ... Insulating layer, 54 ... Solder resist, 55 ... Semiconductor chip (device), 56 ... Plating via (vertical conductor), 57 ... wiring pattern, 58 ... plating via, 59 ... wiring pattern, 61 ... insulating layer, 62 Insulating layer, 63 ... Insulating layer, 64 ... Solder resist, 65 ... Solder resist, 66 ... Wiring pattern, 67 ... Plating via, 68 ... Wiring pattern, 69 ... Plating via, 70 ... Underfill resin, 71 ... Semiconductor chip (device) , 72... Plated via, 73 .. wiring pattern, 74 .. plated via, 75 .. wiring pattern, 76 .. surface mount passive element component, 77 .. solder, 78 .. mold resin, 111. Prepreg, 113A resin layer, 114 metal foil (copper foil), 114A wiring layer (wiring pattern), 115 core resin layer, 116 wiring layer (wiring pattern), 117 via (vertical conductor) 118, dicing lines 211, 212, 213, 214, 215, 216, 217 ... insulating layers 221, 222, 2 3, 224, 225, 226, 227, 228... Wiring layer (wiring pattern), 231, 232, 233, 234, 235, 236, 237... Interlayer connection body (conductive bump by conductive composition printing), 241. Surface mount type passive element parts (devices), 251... Solder, 261, 262... Solder resist.

Claims (4)

A resin package arrangement sheet in which resin packages are arranged vertically and horizontally,
Each of the resin packages includes a resin layer, a device embedded and embedded within the thickness of the resin layer, and a longitudinal conductor connected to the device provided through the resin layer overlapping the device, or A longitudinal conductor provided through the resin layer in the resin layer in a region without the device, and a wiring layer provided on the resin layer so as to be connected to the longitudinal conductor. ,
A dummy region is provided next to each region occupied by the resin package, and the region of the resin package and the dummy region are alternately arranged in at least one of the horizontal direction and the vertical direction,
In addition to the resin package region and the dummy region, an edge portion is provided with a region serving as a frame so as to surround the entire resin package region and the dummy region. Resin package array sheet. A resin module arrangement sheet with built-in parts in which resin modules with built-in parts are arranged vertically and horizontally,
Each of the component-embedded resin modules includes a resin layer, a device embedded and embedded within the thickness of the resin layer, and a longitudinal conductor connected to the device provided through the resin layer overlapping the device Alternatively, a vertical conductor provided through the resin layer in the resin layer in a region without the device and a wiring layer provided on the resin layer so as to be connected to the vertical conductor are provided. And
A dummy region is provided next to each region occupied by the component built-in resin module, and the region of the component built-in resin module and the dummy region are alternately arranged in at least one of the horizontal direction and the vertical direction,
In addition to the component-embedded resin module region and the dummy region, an edge portion is provided with a region serving as a frame so as to surround the entire component-embedded resin module region and the dummy region. Component built-in resin module array sheet. A resin package arrangement sheet in which resin packages are arranged vertically and horizontally,
Each of the resin packages has a first resin layer having an opening, a device positioned so as to be accommodated in the opening, and the first resin layered on the first resin layer. A second resin layer filling the opening of the layer and embedding the device, and a wiring layer provided on the second resin layer opposite to the side where the first resin layer is located, , has a,
A dummy region is provided next to each region occupied by the resin package, and the region of the resin package and the dummy region are alternately arranged in at least one of the horizontal direction and the vertical direction,
In addition to the resin package region and the dummy region, an edge portion is provided with a region serving as a frame so as to surround the entire resin package region and the dummy region. Resin package array sheet. A resin module arrangement sheet with built-in parts in which resin modules with built-in parts are arranged vertically and horizontally,
Each of the component-embedded resin modules includes a first resin layer having an opening, a device positioned so as to be accommodated in the opening, the first resin layer stacked on the first resin layer, and the first resin layer A second resin layer filling the opening of the resin layer and embedding the device, and a wiring layer provided on the second resin layer on the side opposite to the side where the first resin layer is located And having
A dummy region is provided next to each region occupied by the component built-in resin module, and the region of the component built-in resin module and the dummy region are alternately arranged in at least one of the horizontal direction and the vertical direction,
In addition to the component-embedded resin module region and the dummy region, an edge portion is provided with a region serving as a frame so as to surround the entire component-embedded resin module region and the dummy region. Component built-in resin module array sheet.

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