JP5799704B2 - Signal transmission circuit and signal transmission method - Google Patents

Description

  The present invention relates to an output circuit, a signal transmission circuit, and a signal transmission method.

  A signal transmission circuit that controls signal transmission between a transmission circuit that transmits a signal and a reception circuit that receives a signal from the transmission circuit via a transmission path is known. Patent Document 1 discloses an LVDS (Low Voltage Differential Signaling) circuit that outputs a signal at high speed in signal transmission between LSIs. The LVDS circuit performs a logic output and a high impedance output. The power consumption is reduced by changing the current value between the logic output and the high impedance output.

  Patent Document 2 discloses an LVDS signal transmission system. In this signal transmission / reception system, input of transmission data and a test signal to the variable output unit at the time of data transmission is selectively switched. The output level of the variable output unit is determined based on the result of transmitting / receiving the test signal via the transmission line.

JP 2005-109897 A JP 2006-148389 A

  In general, a CMOS circuit is used as an output circuit that outputs a signal in a transmission circuit. The CMOS circuit has a configuration in which a P-channel MOS transistor and an N-channel MOS transistor are connected in series between a power supply terminal and a ground terminal. In order to prevent signal reflection and waveform distortion when transmitting a high-speed signal, the transmission path is terminated by a terminating resistor or the like.

  In such a signal transmission circuit, a current flows from the power source when the signal is “1”, and no current flows from the power source when the signal is “0”. For this reason, when the multi-bit signal changes from “0” to “1” or from “0” to “1”, there is a problem that power supply noise increases.

  The present invention has been made against the background of the above problems, and has as its main object to provide a signal transmission circuit and a signal transmission method capable of reducing power supply noise.

  An output circuit according to one embodiment of the present invention is input with a signal output circuit that outputs a logic signal, a current constant circuit that is provided in parallel with the signal output circuit, and that outputs the same logic signal as the signal output circuit. And a selection circuit that inputs data to either the signal output circuit or the constant current circuit and outputs a logic signal corresponding to the data.

  A signal transmission circuit according to an aspect of the present invention includes the output circuit described above and an input circuit connected to the output circuit via a terminated transmission line.

  According to another aspect of the present invention, there is provided a signal transmission method according to any one of a signal output circuit that outputs a logic signal according to an input selection signal and a current constant circuit that outputs the same logic signal as the signal output circuit. Is selected and data is input, and a logic signal corresponding to the data is output from either the signal output circuit to which the data is input or the current constant circuit.

  The present invention can provide a signal transmission circuit and a signal transmission method capable of reducing power supply noise.

It is a figure which shows the structure of the output circuit which concerns on embodiment. It is a figure which shows the structure of a signal transmission circuit provided with the output circuit which concerns on embodiment. It is a figure which shows the circuit structure of a signal transmission circuit provided with the output circuit which concerns on embodiment. It is a figure which shows the structure of the general CMOS circuit which is an example of an output circuit. It is a figure which shows the structure of the general CMOS circuit which is another example of an output circuit. In a signal transmission circuit concerning an embodiment, it is a figure showing a connection state of an output circuit and an input circuit when a CMOS circuit is selected. In a signal transmission circuit concerning an embodiment, it is a figure showing a connection state of an output circuit and an input circuit when a constant current circuit is selected. It is a figure which shows the waveform of the input data to the output circuit of the signal transmission circuit which concerns on embodiment. It is a figure which shows the waveform of the logic signal from the output circuit of the signal transmission circuit which concerns on embodiment. It is a figure which shows the power supply noise of the signal transmission circuit which concerns on embodiment.

  The present invention relates to a technique for transmitting a signal at high speed between a transmission circuit and a reception circuit via a transmission line. The signal transmission circuit according to the present invention includes a signal output circuit that outputs a logic signal, and a current constant circuit that is provided in parallel with the signal output circuit and outputs the same logic signal as the signal output circuit. Either one is selected. Thereby, power supply noise in the signal transmission circuit is reduced.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. The following description explains the embodiment of the present invention, and the present invention is not limited to the following embodiment. For clarity of explanation, the following description is omitted and simplified as appropriate. Moreover, those skilled in the art can easily change, add, and convert each element of the following embodiments within the scope of the present invention.

Embodiment.
A signal transmission circuit according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a diagram illustrating a configuration of an output circuit O according to the embodiment. As shown in FIG. 1, the output circuit O according to the embodiment includes a CMOS circuit OA, a constant current circuit OB, and a selection circuit SL. The CMOS circuit OA and the constant current circuit OB are circuits having the same logic, and output the same logic signal when the same data is input.

  The CMOS circuit OA is a signal output circuit that outputs a logic signal corresponding to input data. The constant current circuit OB outputs the same logic signal when the same data as the CMOS circuit OA is input. The constant current circuit OB keeps the current from the power source constant. The constant current circuit OB is provided in parallel with the CMOS circuit OA.

  The selection circuit SL inputs the input data D to either the CMOS circuit OA or the constant current circuit OB in accordance with the input selection signal S, and outputs a logic signal corresponding to the input data D.

  Here, the configuration of a signal transmission circuit using the output circuit O will be described with reference to FIG. As shown in FIG. 2, the signal transmission circuit according to the embodiment includes a transmission circuit 1 on the transmission side that transmits a high-speed signal and a reception circuit 2 that receives an output signal from the transmission circuit 10.

  The transmission circuit 1 is provided with a plurality of output circuits O1, O2,. The output circuits O1, O2,... On have CMOS circuits OA1, OA2,..., OAn, and constant current circuits OB1, OB2,.

  The receiving circuit 2 is provided with a plurality of input circuits L1, L2,. .., On of the transmission circuit 1 and input circuits L1, L2,..., Ln of the reception circuit 2 are connected to each other via the transmission path 3. Each transmission line 3 is connected to one end of termination resistors R1, R2,. A termination voltage Vtt is supplied to the other ends of the termination resistors R1, R2,.

  Selection signals S1, S2,..., Sn are input to the output circuits O1, O2,. The output circuits O1, O2,..., On correspond to the input data D1, D2,..., Dn and the CMOS circuits OA1, OA2,. , OA or current constant circuits OB1, OB2,..., OBn are input and output.

  FIG. 3 is a diagram illustrating a circuit configuration of the signal transmission circuit according to the present embodiment. Each output circuit O1, O2,..., On has the same configuration. In FIG. 3, only the output circuit O1 is illustrated.

  As shown in FIG. 3, the CMOS circuit OA includes a PMOS transistor Tp11 and an NMOS transistor Tn11. The PMOS transistor Tp11 and the NMOS transistor Tn11 are connected in series between the power supply terminal and the ground terminal. The gates of the PMOS transistor Tp11 and the NMOS transistor Tn11 are connected, and the input data D1 is input to this connection point n1. A connection point n2 between the PMOS transistor Tp11 and the NMOS transistor Tn11 serves as an output terminal of the CMOS circuit OA1.

  The constant current circuit OB includes a PMOS transistor Tp21 and NMOS transistors Tn21, Tn22, Tn23. A PMOS transistor Tp21 and an NMOS transistor Tn22 are connected in series between the power supply terminal and the ground terminal. Further, NMOS transistors Tn21 and Tn23 are connected in series between the power supply terminal and the ground terminal. The NMOS transistors Tn21, Tn23, the PMOS transistor Tp21, and the NMOS transistor Tn22 are connected in parallel.

  The gates of the PMOS transistor Tp21 and the NMOS transistors Tn21, Tn22, Tn23 are connected, and the input data D1 is input to the connection point n3. Further, the connection point between the NMOS transistors Tn21 and Tn23 and the connection point between the PMOS transistor Tp21 and the NMOS transistor Tn22 are connected, and this connection point n4 becomes an output terminal of the current constant circuit OB1.

  A switch Tsw11 is connected to the connection point n1 of the CMOS circuit OA1. A switch Tsw12 is connected to the connection point n2 of the CMOS circuit OA1. A switch Tsw21 is connected to the connection point n3 of the constant current circuit OB1. A switch Tsw22 is connected to the connection point n4 of the constant current circuit OB1.

  All of the switches Tsw11, Tsw12, Tsw21, and Tsw22 are NMOS transistors. An output signal from the selection circuit SL1 is input to each gate of the switches Tsw11 and Tsw12. An inverted signal of the output signal is input from the selection circuit SL1 to each gate of the switches Tsw21 and Tsw22.

  The selection circuit SL1 selects either the CMOS circuit OA1 or the constant current circuit OB1 according to the input selection signal S1. Input data D1 is input to either the CMOS circuit OA1 or the constant current circuit OB1 selected by the selection circuit SL1, and a logic signal corresponding to this is output. The signal output from the output circuit O1 is sent to the input circuit L1, and is connected to the termination voltage Vtt by the termination resistor R1.

  FIG. 4 is a diagram illustrating a configuration of a general CMOS circuit which is an example of an output circuit. As shown in FIG. 4, a P channel MOS transistor and an N channel MOS transistor are connected in series between a power supply terminal and a ground terminal. A connection point between the P channel MOS transistor and the N channel MOS transistor is connected to the input circuit via a transmission line.

  FIG. 5 is a diagram illustrating a configuration of a general CMOS circuit, which is an example of an output circuit when high-speed signal transmission is performed. As shown in FIG. 5, a termination voltage Vtt is supplied to the transmission line via a termination resistor R. As described above, in the general output circuits shown in FIGS. 4 and 5, input data is input to the CMOS circuit, and a logic signal corresponding to the input data is output by the CMOS circuit.

  In the signal transmission circuit according to the present embodiment, in each output circuit O, either the CMOS circuit OA or the constant current circuit OB is selected. That is, input data is input to either the CMOS circuit OA or the constant current circuit OB.

  Here, an example of the operation of the signal transmission circuit will be described with reference to FIG. When the selection signal S1 is “0”, the switches Tsw11 and Tsw12 are turned on, and the switches Tsw21 and Tsw22 are turned off. Thereby, the CMOS circuit OA1 is selected.

  On the other hand, when the selection signal S1 is “1”, the switches Tsw11 and Tsw12 are turned off and the switches Tsw21 and Tsw22 are turned on. As a result, the constant current circuit OB1 is selected.

  FIG. 6 shows the connection between the transmission circuit 1 and the reception circuit 2 when the CMOS circuit OA1 is selected in the output circuit O1. When the CMOS circuit OA1 is selected, the connection point n2 and the input circuit L1 are connected as shown in FIG.

  In FIG. 6, the logic signal from the CMOS circuit OA1 input to the input circuit L1 is Vin (A). Further, the current flowing from the power supply in the CMOS circuit OA1 is Idd (A), and the power supply noise in the CMOS circuit OA1 is Vdd2 (A).

  FIG. 7 shows the connection between the transmission circuit 1 and the reception circuit 2 when the constant current circuit OB1 is selected in the output circuit O1. When the constant current circuit OB1 is selected, the connection point n3 and the input circuit L1 are connected as shown in FIG.

  In FIG. 7, the logic signal from the constant current circuit OB1 input to the input circuit L1 is Vin (B). Further, the current flowing from the power supply in the constant current circuit OB1 is Idd (B), and the power supply noise in the constant current circuit OB1 is Vdd2 (B).

  FIG. 8 is a graph showing the waveforms of the logic signals Vin (A) and Vin (B) input to the input circuit L1 in the cases shown in FIGS. In FIG. 8, the logic signal Vin (A) is indicated by a solid line, and the logic signal Vin (B) is indicated by a broken line. As shown in FIG. 8, the logic signals Vin (A) and Vin (B) have the same waveform.

  FIG. 9 is a graph showing waveforms of currents Idd (A) and Idd (B) flowing from the power supply in the CMOS circuit OA1 and the constant current circuit OB1 in the cases shown in FIGS. In FIG. 9, the current Idd (A) is indicated by a solid line, and the current Idd (B) is indicated by a broken line.

  As shown in FIG. 9, when the CMOS circuit OA1 is selected, no current flows when the logic signal is “0”, but a current Idd (A) flows from the power source when the logic signal is “1”. On the other hand, when the constant current circuit OB1 is selected, the constant current Idd (B) flows in both cases where the logic signal is “0” or “1”.

  FIG. 10 is a graph showing power supply noises Vdd2 (A) and Vdd2 (B) flowing from the power supply in the CMOS circuit OA1 and the constant current circuit OB1 in the cases shown in FIGS. In FIG. 10, the power supply noise Vdd2 (A) is indicated by a solid line, and Vdd2 (B) is indicated by a broken line.

  As described above, when the CMOS circuit OA1 is selected, the amount of current differs depending on whether the logic signal is “0” or “1”. On the other hand, when the current constant circuit OB is selected, the current amount is constant regardless of whether the logic signal is “0” or “1”. For this reason, Vdd2 (B) is smaller than power supply noise Vdd2 (A).

  Thus, when the constant current circuit OB is selected as the output circuit O, the power supply noise can be made smaller than when the CMOS circuit OA is selected. If the power supply noise exceeds the allowable value of the circuit, it causes a malfunction of the circuit.

  On the other hand, the CMOS circuit OA consumes less power than the constant current circuit OB. Therefore, it is desirable to optimize the number of selections of the CMOS circuit OA and the constant current circuit OB so as to reduce the power consumption while suppressing the power supply noise below an allowable value. Thereby, power supply noise can be reduced and power consumption can be suppressed.

  As described above, in the present embodiment, in the output circuit O, the CMOS circuit OA and the constant current circuit OB are provided so as to be selectable. By selecting the constant current circuit OB, the change current in the output circuit O can be controlled. Thereby, compared with the signal transmission circuit which receives the signal output from the CMOS circuit OA by the input circuit L, the power supply noise can be reduced.

  Further, by optimizing the number of the constant current circuits OB that make the current flowing from the power source constant among the multi-bit output circuits O, power noise can be reduced and power consumption can be suppressed.

  A part or all of the above-described embodiment can be described as in the following supplementary notes, but is not limited thereto.

(Appendix 1)
A signal output circuit for outputting a logic signal;
A current constant circuit provided in parallel with the signal output circuit for outputting the same logic signal as the signal output circuit;
A selection circuit that inputs data to one of the signal output circuit and the current constant circuit according to an input selection signal, and outputs a logic signal corresponding to the data;
An output circuit comprising:
(Appendix 2)
The output circuit according to claim 1, wherein the selection circuit selects the constant current circuit when power supply noise is suppressed to an allowable value or less.
(Appendix 3)
3. The output circuit according to claim 1, wherein the transmission line from which the logic signal is output is terminated.
(Appendix 4)
The output circuit according to claim 1, wherein the signal output circuit is a CMOS circuit connected to a power source.
(Appendix 5)
The output circuit according to claim 4, wherein the constant current circuit constants a current flowing from the power source.
(Appendix 6)
The output circuit according to any one of claims 1 to 5,
An input circuit connected to the output circuit via a terminated transmission line;
A signal transmission circuit comprising:
(Appendix 7)
A plurality of the output circuits;
A plurality of input circuits connected to each of the plurality of output circuits via transmission lines;
The signal transmission circuit according to claim 6, wherein the signal output circuit is selected in a part of the plurality of output circuits, and the constant current circuit is selected in the remaining output circuits.
(Appendix 8)
In accordance with an input selection signal, data is input to one of a signal output circuit that outputs a logic signal and a current constant circuit that outputs the same logic signal as the signal output circuit,
A logic signal corresponding to the data is output from either the signal output circuit to which the data is input or the current constant circuit.
Signal transmission method.
(Appendix 9)
The signal transmission method according to claim 8, wherein the constant current circuit is selected when power supply noise is suppressed to an allowable value or less.
(Appendix 10)
In some of the plurality of output circuits, the signal output circuit is selected,
In the remaining output circuits, the constant current circuit is selected.
The signal transmission method according to claim 8 or 9.

DESCRIPTION OF SYMBOLS 1 Transmission circuit 2 Reception circuit 3 Transmission path O Output circuit OA CMOS circuit OB Current constant circuit S Selection signal D Input data L Input circuit R Termination resistance SL Selection circuit Tsw Switch Tp PMOS transistor Tn NMOS transistor

Claims (7)

A signal output circuit for outputting a logic signal;
A current constant circuit provided in parallel with the signal output circuit for outputting the same logic signal as the signal output circuit;
A selection circuit that selects one of the signal output circuit and the constant current circuit according to an input selection signal, inputs data, and outputs a logic signal corresponding to the data;
A plurality of output circuits having:
A plurality of input circuits connected to each of the plurality of output circuits via transmission lines;
With
In consideration of power supply noise, the number of the signal output circuits selected from the plurality of output circuits and the number of the constant current circuits selected are optimized. The current constant circuit is selected in a part of the plurality of output circuits so that the power supply noise is less than or equal to an allowable value,
  In the remaining output circuits, the signal output circuit is selected.
  The signal transmission circuit according to claim 1. The signal transmission circuit according to claim 1, wherein each of the transmission lines is terminated. The signal transmission circuit according to claim 1, wherein the signal output circuit is a CMOS circuit connected to a power source. The signal transmission circuit according to claim 4, wherein the constant current circuit constants a current flowing from the power source. Among a plurality of output circuits having a signal output circuit that outputs a logic signal and a constant current circuit that outputs the same logic signal as the signal output circuit, the number of the signal output circuits selected in consideration of power supply noise Optimize the number of the constant current circuit selected, and according to a selection signal input to each of the plurality of output circuits, select one of the signal output circuit and the constant current circuit, and input data,
A logic signal corresponding to the data is output from either the signal output circuit to which the data is input or the current constant circuit.
Signal transmission method. Select the current constant circuit in a part of the plurality of output circuits so that the power supply noise is less than or equal to an allowable value,
  In the remaining output circuits, the signal output circuit is selected.
  The signal transmission method according to claim 6.

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