JP5746199B2 - バイポーラトランジスタ - Google Patents

バイポーラトランジスタ Download PDF

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Publication number
JP5746199B2
JP5746199B2 JP2012537174A JP2012537174A JP5746199B2 JP 5746199 B2 JP5746199 B2 JP 5746199B2 JP 2012537174 A JP2012537174 A JP 2012537174A JP 2012537174 A JP2012537174 A JP 2012537174A JP 5746199 B2 JP5746199 B2 JP 5746199B2
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JP
Japan
Prior art keywords
region
base
collector
transistor
bipolar transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2012537174A
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English (en)
Japanese (ja)
Other versions
JP2013509730A5 (OSRAM
JP2013509730A (ja
Inventor
ウィリアム アレン レーン，
ウィリアム アレン レーン，
アンドゥルー デイビッド ベイン，
アンドゥルー デイビッド ベイン，
デレック フレデリック バウワーズ，
デレック フレデリック バウワーズ，
ポール マラキー デイリー，
ポール マラキー デイリー，
アン マリア デイニヤン，
アン マリア デイニヤン，
マイケル トーマス ダンバー，
マイケル トーマス ダンバー，
パトリック マーティン マゲネス，
パトリック マーティン マゲネス，
バーナード パトリック ステンソン，
バーナード パトリック ステンソン，
Original Assignee
アナログ デバイシス， インコーポレイテッド
アナログ デバイシス， インコーポレイテッド
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Application filed by アナログ デバイシス， インコーポレイテッド, アナログ デバイシス， インコーポレイテッド filed Critical アナログ デバイシス， インコーポレイテッド
Publication of JP2013509730A publication Critical patent/JP2013509730A/ja
Publication of JP2013509730A5 publication Critical patent/JP2013509730A5/ja
Application granted granted Critical
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Expired - Fee Related legal-status Critical Current
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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/40—Vertical BJTs
    • H10D10/421—Vertical BJTs having both emitter-base and base-collector junctions ending at the same surface of the body
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00—Bipolar junction transistors [BJT]
    • H10D10/01—Manufacture or treatment
    • H10D10/051—Manufacture or treatment of vertical BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/106—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]  having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/111—Field plates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/014—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/061—Manufacture or treatment using SOI processes together with lateral isolation, e.g. combinations of SOI and shallow trench isolations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/17—Isolation regions comprising dielectric materials formed using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers

Landscapes

  • Bipolar Transistors (AREA)
JP2012537174A 2009-11-02 2010-11-01 バイポーラトランジスタ Expired - Fee Related JP5746199B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/611,074 2009-11-02
US12/611,074 US8350352B2 (en) 2009-11-02 2009-11-02 Bipolar transistor
PCT/US2010/055000 WO2011053927A1 (en) 2009-11-02 2010-11-01 Bipolar transistor

Publications (3)

Publication Number Publication Date
JP2013509730A JP2013509730A (ja) 2013-03-14
JP2013509730A5 JP2013509730A5 (OSRAM) 2013-10-24
JP5746199B2 true JP5746199B2 (ja) 2015-07-08

Family

ID=43618000

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2012537174A Expired - Fee Related JP5746199B2 (ja) 2009-11-02 2010-11-01 バイポーラトランジスタ

Country Status (5)

Country Link
US (2) US8350352B2 (OSRAM)
EP (1) EP2497113A1 (OSRAM)
JP (1) JP5746199B2 (OSRAM)
CN (1) CN102668087B (OSRAM)
WO (1) WO2011053927A1 (OSRAM)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9653455B1 (en) * 2015-11-10 2017-05-16 Analog Devices Global FET—bipolar transistor combination
JP7386123B2 (ja) * 2020-04-28 2023-11-24 株式会社東海理化電機製作所 半導体装置

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1614749U (de) * 1949-12-05 1950-10-19 Patra Patent Treuhand Doppelfassung zur aufnahme von zwei parallel nebeneinander angeordneten rohrenden von leuchtroehren.
DE1614749A1 (de) 1967-01-07 1970-12-10 Telefunken Patent Integrierte Halbleiteranordnung
US3772577A (en) * 1972-02-10 1973-11-13 Texas Instruments Inc Guard ring mesa construction for low and high voltage npn and pnp transistors and diodes and method of making same
JPS4991776A (OSRAM) * 1973-01-05 1974-09-02
JPS61278161A (ja) 1985-06-04 1986-12-09 Tdk Corp 高耐圧半導体装置
JPS61285764A (ja) * 1985-06-12 1986-12-16 Tdk Corp 高耐圧半導体装置
JP2979554B2 (ja) 1989-09-26 1999-11-15 株式会社デンソー 半導体装置の製造方法
DE58908843D1 (de) * 1989-10-30 1995-02-09 Siemens Ag Eingangsschutzstruktur für integrierte Schaltungen.
DE69033619T2 (de) * 1990-01-08 2001-04-26 Harris Corp Verfahren zur Verwendung einer Halbleiteranordnung mit einem Substrat, das eine dielektrisch isolierte Halbleiterinsel aufweist
US5247201A (en) * 1990-02-15 1993-09-21 Siemens Aktiengesellschaft Input protection structure for integrated circuits
EP0605634A1 (en) * 1991-09-27 1994-07-13 Harris Corporation Complementary bipolar transistors having high early voltage, high frequency performance and high breakdown voltage characteristics and method of making same
US5274267A (en) 1992-01-31 1993-12-28 International Business Machines Corporation Bipolar transistor with low extrinsic base resistance and low noise
JP3110852B2 (ja) 1992-04-08 2000-11-20 株式会社ブリヂストン 空気入りタイヤ
JPH05291270A (ja) * 1992-04-13 1993-11-05 Sharp Corp 半導体装置
JP2812093B2 (ja) * 1992-09-17 1998-10-15 株式会社日立製作所 プレーナ接合を有する半導体装置
US5629552A (en) * 1995-01-17 1997-05-13 Ixys Corporation Stable high voltage semiconductor device structure
SE513512C2 (sv) * 1994-10-31 2000-09-25 Ericsson Telefon Ab L M Halvledaranordning med ett flytande kollektorområde
JPH10172980A (ja) * 1996-12-13 1998-06-26 Sanken Electric Co Ltd 半導体装置及びその製造方法
JP3906181B2 (ja) * 2003-05-26 2007-04-18 株式会社東芝 電力用半導体装置
US7737469B2 (en) * 2006-05-16 2010-06-15 Kabushiki Kaisha Toshiba Semiconductor device having superjunction structure formed of p-type and n-type pillar regions
EP1936390A1 (en) * 2006-12-20 2008-06-25 Ecole Polytechnique Federale De Lausanne Epfl - Sti - Imm - Lmis3 Semiconductor device for measuring ultra small electrical currents and small voltages
JP5205856B2 (ja) * 2007-01-11 2013-06-05 富士電機株式会社 電力用半導体素子
US8008734B2 (en) * 2007-01-11 2011-08-30 Fuji Electric Co., Ltd. Power semiconductor device

Also Published As

Publication number Publication date
WO2011053927A1 (en) 2011-05-05
US20120112307A1 (en) 2012-05-10
EP2497113A1 (en) 2012-09-12
US8350352B2 (en) 2013-01-08
US8357985B2 (en) 2013-01-22
JP2013509730A (ja) 2013-03-14
CN102668087A (zh) 2012-09-12
CN102668087B (zh) 2016-08-24
US20110101486A1 (en) 2011-05-05

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