JP5742681B2 - Semiconductor device test apparatus and test method thereof - Google Patents

Description

  The present invention relates to a test apparatus capable of applying a load that causes an avalanche state to a semiconductor element, and a test method therefor.

  For example, a test apparatus disclosed in Patent Document 1 is known as a test apparatus capable of performing a screening test (avalanche load test) in which a load that causes an avalanche state is applied to a semiconductor element. In this test apparatus, when a semiconductor element breaks an avalanche, the semiconductor element is in an avalanche state in order to reduce the progress of destruction of the semiconductor element from the point of destruction until the current flowing through the semiconductor element is cut off. By separating the semiconductor element and the power supply immediately before becoming, the energy supply source in the avalanche state is limited to the coil. As a result, an increase in the current flowing through the semiconductor element after the occurrence of the breakdown of the semiconductor element is suppressed, so that the progress of the breakdown of the semiconductor element due to an overcurrent can be suppressed.

JP 2009-145302 A

  FIG. 1 is a schematic configuration diagram of a test circuit disclosed in Patent Document 1. In FIG. FIG. 2 is an example of a time chart showing operation waveforms of the test circuit of FIG. When the avalanche of the semiconductor element is destroyed, it is preferable to move the test circuit in a sequence in which the relay 2 is turned on and then the relay 3 is turned off (see the period from timing t3 to t4 in FIG. 2). This is because if the relay 3 is turned off first, the current source from the coil 14 disappears, so that the voltage at the contact point between the coil 14 and the relay 3 suddenly rises and exceeds the withstand voltage of the relays 2 and 3. , 3 may be destroyed.

  In the technique disclosed in Patent Document 1, an increase in the current flowing through the semiconductor element can be suppressed during the time from when the avalanche breakdown of the semiconductor element is detected until the relay 3 is turned off, but the current at the time of avalanche breakdown is too large in the first place In such a case, the time may affect the progress of destruction of the semiconductor element.

  Accordingly, an object of the present invention is to provide a semiconductor device test apparatus and a test method thereof that can suppress a current from continuing to flow through an avalanche-destructed semiconductor device.

In order to achieve the above object, a semiconductor device testing apparatus according to the present invention comprises:
An inductor;
A reflux circuit that circulates a current flowing through the inductor after a semiconductor element connected to the inductor is avalanche destroyed ;
A blocking means provided between the inductor and the semiconductor element ,
The return circuit, have a lower impedance than the inductor and the semiconductor element and the closed circuit wherein the blocking means is configured,
The interruption means cuts off the electric conduction between the inductor and the semiconductor element after the current has flowed back through the return circuit .

In order to achieve the above object, a test method for a semiconductor device according to the present invention includes:
After the semiconductor element connected to the inductor via the cutoff means is avalanche broken, the current flowing through the inductor is returned to the reflux circuit having a lower impedance than the closed circuit in which the inductor, the semiconductor element, and the cutoff means are configured. then,
The electric current between the inductor and the semiconductor element is interrupted by the interrupting means after the current is caused to return to the reflux circuit .

  According to the present invention, it is possible to suppress current from continuing to flow through a semiconductor element that has undergone avalanche breakdown.

2 is a schematic configuration diagram of a test circuit disclosed in Patent Document 1. FIG. It is an example of the time chart which showed the operation | movement waveform of the test circuit of FIG. 1 is a schematic configuration diagram of a test circuit that is a first embodiment of a semiconductor device test apparatus according to the present invention; FIG. 4 is an example of a time chart showing operation waveforms of the test circuit of FIG. 3 according to a first test method of the semiconductor element 10. It is a schematic block diagram of the test circuit which is 2nd Embodiment of the testing apparatus of the semiconductor element concerning this invention. 6 is an example of a time chart showing operation waveforms of the test circuit of FIG. 5 according to a second test method of the semiconductor element 10;

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 3 is a schematic configuration diagram of a test circuit which is the first embodiment of the semiconductor device test apparatus according to the present invention. This test circuit is a circuit for performing an avalanche destructive test of the semiconductor element 10 that is an element to be inspected.

  The semiconductor element 10 is, for example, a switching element that performs an on / off operation according to a drive signal input to a control electrode of the semiconductor element 10. Specific examples of the semiconductor element 10 include voltage-driven transistors such as IGBTs and MOSFETs. The semiconductor element 10 may be a bipolar transistor. In FIG. 3, the semiconductor element 10 has N terminals having three terminals of a collector (C) as a first main electrode, an emitter (E) as a second main electrode, and a gate (G) as a control electrode. It is the figure which showed the case of channel IGBT. Of course, the semiconductor element 10 is formed into a power MOSFET having three terminals of the drain (D) as the first main electrode, the source (S) as the second main electrode, and the gate (G) as the control electrode. It may be replaced.

  The power supply 12 is a power supply device that applies a power supply voltage (for example, 650 V) between the collector and the emitter (between CE) of the semiconductor element 10 via a coil 14 (for example, a 30 μH coil). The power source 12 may be a power storage device such as a battery, a battery, or a capacitor. A capacitor 17 may be provided between the positive electrode and the negative electrode of the power supply 12. By providing the capacitor 17 between both electrodes, the power supply voltage of the power supply 12 can be smoothed. Further, a charge consuming circuit in which a diode 19 having a positive electrode side of the power supply 12 as an anode and a resistor 18 are connected in series may be provided between both electrodes of the power supply 12 (that is, in parallel with the capacitor 17). By providing this charge consuming circuit, overcharging of the capacitor 17 can be prevented.

  A discharge circuit 30 in which a backflow preventing diode 16 and a power consuming resistor 15 are connected in series is provided in parallel to a coil 14 which is an example of an inductor. By providing the discharge circuit 30, the energy accumulated in the coil 14 can be discharged and an overcurrent can be prevented from flowing through the semiconductor element 10. The discharge circuit 30 includes a relay 2 and a relay 4, which will be described in detail later.

  The relay 1 is a blocking unit that blocks voltage application to the semiconductor element 10 by the power supply 12. The relay 1 is provided, for example, so as to be able to cut off the energization between the positive electrode of the power source 12 and the coil 14. Diodes 13 and 21 having the same forward direction are connected in series between the intermediate point between the relay 1 and the coil 14 and the negative electrode of the power supply 12. The diodes 13 and 21 have a cathode arranged on the intermediate point side between the relay 1 and the coil 14 and an anode arranged on the negative electrode side of the power supply 12. When voltage application to the semiconductor element 10 by the power source 12 is interrupted by the relay 1, a reflux current flows through the coil 13 and the semiconductor element 10 via the diodes 13 and 21.

  The relay 2 is a short-circuit unit that short-circuits both ends of the coil 14 with the discharge circuit 30. When the relay 2 is turned on, both ends of the coil 14 are short-circuited by the discharge circuit 30. When the relay 2 is turned off, the current flowing through the resistor 15 is interrupted.

  The relay 3 is a blocking unit that blocks current flowing between the CEs of the semiconductor element 10. The relay 3 is provided, for example, so as to cut off the energization between the coil 14 and the collector of the semiconductor element 10. When the relay 3 is turned off, the current flowing between the CEs of the semiconductor element 10 is interrupted.

  The relay 4 is a blocking means that blocks the inflow of current to the collector of the destroyed semiconductor element 10 before the relay 3 is turned off. When the relay 4 is turned on, the inflow of current to the collector of the destroyed semiconductor element 10 is interrupted before the relay 3 is turned off.

  The relays 1, 2, 3, and 4 are preferably composed of semiconductor switching elements such as IGBTs and power MOSFETs, for example. Moreover, you may replace with another interruption | blocking means.

  The drive unit 11 outputs a drive signal for turning on / off the semiconductor element 10 to the gate of the semiconductor element 10. The drive signal output from the drive unit 11 may be a pulse signal. A specific example of the drive unit 11 is a pulse generator. For example, the semiconductor element 10 is turned on when the level of the pulse signal is switched from the Lo level to the Hi level, and is turned off when the level of the pulse signal is switched from the Hi level to the Lo level. The drive unit 11 outputs an off drive signal for turning off the semiconductor element 10 based on a detection signal from a current detection unit such as a current sensor 20 that detects an inter-CE current flowing between the CEs of the semiconductor element 10. Further, the drive unit 11 sends a relay operation signal for turning on / off the relays 1, 2, 3, 4 based on the current state of the CE current of the semiconductor element 10 and the voltage state of the CE voltage. Output to 2, 3, and 4.

  The drive unit 11 may include a control unit such as a microcomputer. For example, the control unit is configured based on the current state of the CE current of the semiconductor element 10, the voltage state of the CE voltage, and an input signal (for example, an operation signal from the user) from another input device (not illustrated). An output command signal for commanding output of the drive signal of the element 10 and the relay operation signal is output to the drive unit 11.

  The test circuit shown in FIG. 3 has a relay 4 in parallel with a series circuit of the relay 2 and the resistor 15. Two feedback diodes are connected in series (diodes 13 and 21). By configuring in this way, the current path of “coil 14 → relay 3 → semiconductor element 10 (substantially 0Ω due to breakdown) → diodes 13, 21 → coil 14” becomes “coil 14 → relay 4 → diode 16 → It is possible to make the current of the coil 14 easily flow in the current path of the coil 14 ”.

  Next, the operation of the test circuit of FIG. 3 will be described with reference to FIG. FIG. 4 is a time chart showing operation waveforms of the test circuit of FIG. 3 according to the first test method of the semiconductor element 10.

  As the first step of the avalanche destructive test, the drive unit 11 turns on the relay 1, turns off the relay 2, turns on the relay 3, and turns off the relay 4. At this stage, since the semiconductor element 10 is not turned on, only the power source voltage of the power source 12 is applied via the coil 14 between the CEs, and no current between the CEs flows.

  The drive unit 11 turns on the semiconductor element 10 by switching the level of the drive signal of the semiconductor element 10 from the low level to the high level at the timing t0. When the semiconductor element 10 is turned on, the CE voltage becomes almost 0 V and the CE current starts to flow.

  The drive unit 11 turns off the relay 1 at timing t1. When the relay 1 is turned off, the power supply 12 and the semiconductor element 10 are disconnected, and a return current flows through the coil 14 and the semiconductor element 10 via the diodes 13 and 21. The drive unit 11 monitors the current between the CEs using the current sensor 20. The drive unit 11 is, for example, an off operation for turning off the relay 1 in accordance with a reference current value detection trigger signal from the current sensor 20 indicating that a current value equal to or greater than a predetermined reference current value (for example, 200 A) has been detected. Output a signal. The reference current value is set to a current value at which the semiconductor element 10 does not break based on the specifications of the semiconductor element 10.

  The drive unit 11 turns off the semiconductor element 10 at timing t2. By turning off the semiconductor element 10 immediately after the relay 1 is turned off, the value of the current flowing through the coil 14 when the relay 1 is turned off is prevented from falling too much. Due to the turn-off of the semiconductor element 10, the CE voltage rises to the breakdown voltage of the semiconductor element 10 due to the energy due to the inductance component of the coil 14, and the semiconductor element 10 enters an avalanche state.

  Here, when the avalanche breakdown occurs in the semiconductor element 10, a short circuit failure occurs between the CEs. Therefore, the CE voltage becomes about 0 V earlier than the normal semiconductor element 10 when no avalanche breakdown occurs.

  Therefore, the drive unit 11 monitors the CE voltage within a predetermined voltage monitoring period after the semiconductor element 10 is turned off by the output of the off drive signal by a voltage monitoring unit (for example, a comparator) such as a voltage sensor. The voltage monitoring period may be measured by a timing device such as a timer. Therefore, when it is detected that the CE voltage drops below a predetermined reference voltage value within the voltage monitoring period, the drive unit 11 can determine that the semiconductor element 10 has undergone avalanche breakdown, and the CE voltage is maintained within the voltage monitoring period. If it is not detected that the voltage falls below a predetermined reference voltage value, it can be determined that the semiconductor element 10 has not undergone avalanche breakdown.

  The reference voltage value for determining whether or not the avalanche breakdown of the semiconductor element 10 has occurred may be set to a value larger than 0V and smaller than a breakdown voltage (for example, 1100V). Further, in order to prevent malfunction, the value is set to a value larger than the CE voltage (for example, 1.5 V) when the semiconductor element 10 is turned on and smaller than the power supply voltage (for example, 650 V) of the power source 12. It is desirable (for example, 10V).

  The drive unit 11 detects the occurrence of avalanche breakdown of the semiconductor element 10 by detecting a decrease in the CE voltage at timing t3, and outputs an ON operation signal for turning on the relay 4. When the relay 4 is turned on, the current flowing through the coil 14 flows into the relay 4 and returns to the coil 14 via the diode 16. Thereby, the current flowing into the semiconductor element 10 is suppressed. This is because the coil 14, the relay 4, and the diode 16 have a higher impedance than the impedance of the first closed circuit in which the coil 14, the relay 3, the semiconductor element 10 (approximately 0Ω due to breakdown), and the diodes 13 and 21 are configured. This is because the impedance of the configured second closed circuit is low.

  The drive unit 11 turns off the relay 3 at a timing t41 when a predetermined time has elapsed since the relay 4 was turned on. Thereby, the semiconductor element 10 and the coil 14 can be separated.

  The drive unit 11 turns on the relay 2 at a timing t42 when a predetermined time elapses after the relay 3 is turned off. When the relay 2 is turned on, the resistor 15 for consuming the energy of the coil 14 is connected.

  The drive unit 11 turns off the relay 4 at a timing t43 when a predetermined time elapses after the relay 2 is turned on. When the relay 4 is turned off, the energy of the coil 14 can be consumed by the resistor 15. Thereafter, energy consumption by the resistor 15 is completed at timing t5.

  Thus, the current that flows through the coil 14 after the relay 4 flows not to the semiconductor element 10 side but to the relay 4 side. In the subsequent sequence, the energy of the coil 14 is consumed by the resistor 15 after the relay 4 is turned off. Accordingly, when the relay 4 is turned on before the relay 3 is turned off, the current flowing into the semiconductor element 10 during the period from the time when the avalanche breakdown of the semiconductor element 10 to the time when the relay 3 is turned off (period from timing t3 to t41). Can be suppressed.

  FIG. 5 is a schematic configuration diagram of a test circuit which is a second embodiment of the semiconductor device test apparatus according to the present invention. A description of the same configuration as that described above is omitted.

  The test circuit of FIG. 5 includes a resistor 22 as an example of an element having a resistance value larger than that of the resistor 15 in order to suppress a current from continuing to flow through the avalanche-destructed semiconductor element 10. The resistor 22 is inserted on a closed circuit including the semiconductor element 10 and the coil 14 so as to be connected to the diode 13 in series.

  Since the resistor 22 serves as a current path during normal testing, the resistor 15 may be selected so that the resistance value of the resistor 15 is smaller than that of the resistor 22 when a large resistor cannot be selected. The resistor 22 is schematically represented as a high impedance object, and may be replaced with a diode, wiring resistance, wiring inductance, or the like.

  FIG. 6 is a time chart showing operation waveforms of the test circuit of FIG. 5 according to the second test method of the semiconductor element 10. The description of the operation from timing t0 to t2 is the same as in FIG.

  The driving unit 11 detects the occurrence of the avalanche breakdown of the semiconductor element 10 by detecting a decrease in the CE voltage at timing t3, and outputs an on operation signal for turning on the relay 2. When the relay 2 is turned on, the current flowing through the coil 14 flows into the resistor 15 and the relay 2 and returns to the coil 14 via the diode 16. Thereby, the current flowing into the semiconductor element 10 is suppressed. This is because the coil 14, the resistor 15, the relay 2, and the impedance of the first closed circuit in which the coil 14, the relay 3, the semiconductor element 10 (approximately 0Ω due to destruction), the diode 13, and the resistor 22 are configured. This is because the impedance of the second closed circuit in which the diode 16 is configured is lower.

  Further, when the relay 2 is turned on, the consumption of energy of the coil 14 by the resistor 15 starts.

  The drive unit 11 turns off the relay 3 at a timing t4 when a predetermined time elapses after the relay 2 is turned on. Thereby, the semiconductor element 10 and the coil 14 can be separated. Thereafter, energy consumption by the resistor 15 is completed at timing t5.

  Thus, when the relay 2 is turned on, the current flowing through the coil 14 flows not to the semiconductor element 10 side but to the relay 2 side. Accordingly, when the relay 2 is turned on before the relay 3 is turned off, the current flowing into the semiconductor element 10 during the period from the time of the avalanche breakdown of the semiconductor element 10 to the time when the relay 3 is turned off (period from timing t3 to t4). Can be suppressed.

  The preferred embodiments of the present invention have been described in detail above. However, the present invention is not limited to the above-described embodiments, and the above-described embodiments can be combined with some or all of the other embodiments. Various modifications such as substitution can be added.

1, 2, 3, 4 Relay 10 Semiconductor element 11 Drive unit 12 Power supply 13, 21 Diode 14 Coil 15, 22 Resistance 20 Current sensor 30 Discharge circuit

Claims (6)

An inductor;
A reflux circuit that circulates a current flowing through the inductor after a semiconductor element connected to the inductor is avalanche destroyed ;
A blocking means provided between the inductor and the semiconductor element ,
The return circuit, have a lower impedance than the inductor and the semiconductor element and the closed circuit wherein the blocking means is configured,
The semiconductor device test apparatus , wherein after the current has flowed back through the return circuit, the shut-off means cuts off the energization between the inductor and the semiconductor device. The reflux circuit includes a series circuit in which a first relay and a resistor are connected in series, a second relay connected in parallel to the series circuit, and a backflow prevention diode connected in series to the series circuit. Have
  2. The semiconductor device testing apparatus according to claim 1, wherein after the second relay is turned on, the shut-off unit cuts off the energization between the inductor and the semiconductor device. 3.   3. The semiconductor device test apparatus according to claim 2, wherein the first relay is turned on after the interruption means cuts off the electric current between the inductor and the semiconductor element. 4.   The semiconductor device test apparatus according to claim 3, wherein the second relay is turned off after the first relay is turned on.   The reflux circuit has a series circuit in which a backflow prevention diode, a relay, and a first resistor are connected in series;
  The closed circuit includes a second resistor having a resistance value larger than that of the first resistor, and a feedback diode connected in series to the second resistor;
  The semiconductor device test apparatus according to claim 1, wherein after the relay is turned on, the shut-off unit cuts off the energization between the inductor and the semiconductor device. After the semiconductor element connected to the inductor via the cutoff means is avalanche broken, the current flowing through the inductor is returned to the reflux circuit having a lower impedance than the closed circuit in which the inductor, the semiconductor element, and the cutoff means are configured. then,
A method for testing a semiconductor device, wherein the current is caused to flow back to the return circuit, and then the conduction between the inductor and the semiconductor device is cut off by the cut-off means .

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