JP2014048223A - Semiconductor element testing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor element testing device configured to prevent burnout of a semiconductor element due to overcurrent during avalanche breakdown test.SOLUTION: A semiconductor element testing device of the present invention includes a coil, a power source for applying a voltage to a semiconductor element via the coil, a current sensor for measuring the amount of current flowing in the semiconductor element and outputting a measurement result, cut-off means for cutting-off the voltage to be applied to the semiconductor element, a drive part for turning on and off the semiconductor element, and a delay time setting part that sets a delay time in accordance with a measurement result output from the current sensor. The drive part turns off the semiconductor element in response to the measurement result output from the current sensor. The cut-off means cuts off the voltage to be applied to the semiconductor element with the delay time set in the delay time setting part.

Description

  The present invention relates to a semiconductor element testing apparatus.

  In recent years, semiconductor devices such as a power MOS FET (Metal-Oxide-Semiconductor Field-Effect Transistor) (hereinafter abbreviated as “FET”) have been widely used for high current and high-speed switching applications. In particular, an IGBT (Insulated Gate Bipolar Transistor), which is a power transistor having a MOS structure in the input portion and a bipolar structure in the output portion, is increasingly used in an electric vehicle (EV) and a hybrid vehicle (HEV).

  One of the withstand voltage performances of semiconductor elements such as FETs is avalanche resistance, and an avalanche breakdown test may be performed as a test for guaranteeing this avalanche resistance. In the avalanche breakdown test, the energy stored in the coil is added to the semiconductor element to be measured, and the presence or absence of avalanche breakdown is inspected to guarantee the performance related to the avalanche resistance. The avalanche withstand capability guarantees that the FET can operate safely up to a predetermined condition even when the surge voltage generated when the semiconductor element is turned off exceeds the withstand voltage rating of the FET.

  In the avalanche breakdown test, a measurement current determined by the magnitude of the power supply voltage and the coil capacitance (electric energy storage amount) flows through a semiconductor element to be measured such as an FET.

  However, if more current than necessary is applied to the semiconductor element to be measured after avalanche breakdown, the FET element will burn out due to heat generation, causing trouble in the analysis of the breakdown location, causing poor transport due to cracking of the element, or contacting the element In some cases, the test apparatus was damaged due to breakage of the needle electrode.

  In order to solve this problem, for example, Patent Document 1 (Japanese Patent Laid-Open No. 2007-33042) or Patent Document 2 (Japanese Patent Laid-Open No. 2009-145302) describes an avalanche state in order to prevent burning of the element to be measured. And a semiconductor element testing apparatus that interrupts the current flowing into the element to be measured based on the detection result.

JP 2007-33042 A JP 2009-145302 A

  However, in the conventional semiconductor element test apparatus described in Patent Documents 1 and 2, if the current at the time of avalanche breakdown is large, it is necessary for the element to be detected after the avalanche state is detected and before the current is cut off. The above current may flow, resulting in insufficient protection.

  Accordingly, the present invention has been made in view of the problems in the above-described semiconductor element test apparatus, and an object thereof is to provide a semiconductor test apparatus that prevents the FET from being burned by an overcurrent during an avalanche breakdown test.

  In view of the above problems, a semiconductor test apparatus according to the present invention includes a coil, a power source that applies a voltage to the semiconductor element via the coil, a current sensor that measures the amount of current flowing through the semiconductor element and outputs a measurement result, A blocking means for blocking voltage application to the semiconductor element; a drive unit for turning on and off the semiconductor element; and a delay time setting unit for setting a delay time corresponding to the output of the measurement result from the current sensor; And the drive unit turns off the semiconductor element in response to an output of a measurement result from the current sensor, and the blocking unit is configured to delay the semiconductor at a delay time set by the delay time setting unit. Blocks voltage application to the element.

  According to the embodiment of the present invention, it is possible to provide a semiconductor element testing apparatus that prevents a semiconductor element from being burned out by an overcurrent during an avalanche breakdown test.

It is a schematic block diagram of a semiconductor element testing apparatus. 2 is a flowchart for explaining the operation of the semiconductor element testing apparatus shown in FIG. It is a time chart explaining operation | movement of the semiconductor element test apparatus shown by FIG.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is an example of a schematic configuration diagram of a semiconductor element testing apparatus 100. The device has an electrical circuit for avalanche destructive testing. Hereinafter, this electric circuit will be described.

  The semiconductor element to be inspected by this apparatus is the semiconductor element 10. The semiconductor element 10 to be tested by this apparatus is a switching element that performs an on / off operation in accordance with a drive signal, and the type thereof is not limited as long as it is an element that is in an avalanche state as an inspection target of an avalanche breakdown test. For example, there are voltage-driven power semiconductors composed of semiconductors such as IGBTs, power MOSFETs, and diodes. FIG. 1 shows an N-channel IGBT having three terminals of a collector (C), an emitter (E), and a gate (G) as an example.

  In FIG. 1, a semiconductor device test apparatus 100 includes relays 1, 2 and 3, a drive unit 11, a power supply 12, diodes 13, 16 and 19, a coil 14, resistors 15 and 18, a capacitor 17, a current sensor 20, and a discharge circuit 30. , And Delay 40.

  The power supply 12 is a power supply device that applies a power supply voltage (for example, 650 V) between the collector and the emitter (between CE) of the semiconductor element 10 via a coil 14 (for example, a 30 μH coil). A capacitor 17 is provided between the positive electrode and the negative electrode of the power supply 12. By providing the capacitor 17 between both electrodes, the power supply voltage can be smoothed. In addition, a charge consuming circuit is provided between the two poles of the power supply 12 (that is, in parallel with the capacitor 17), and a diode 19 having a positive electrode side of the power supply 12 as an anode and a resistor 18 are connected in series. By providing this charge consuming circuit, overcharging of the capacitor 17 can be prevented.

  A discharge circuit 30 in which a backflow preventing diode 16 and a power consuming resistor 15 are connected in series is provided in parallel with the coil 14. By providing the discharge circuit 30, the energy accumulated in the coil 14 can be discharged and an overcurrent can be prevented from flowing through the semiconductor element 10.

  The relay 1 is a blocking unit that blocks voltage application to the semiconductor element 10 by the power supply 12. The relay 1 is provided so that the energization between the positive electrode of the power source 12 and the coil 14 can be cut off. A diode 13 having a cathode connected to an intermediate point between the relay 1 and the coil 14 and an anode connected to the negative side of the power source 12 is provided. When the voltage applied to the semiconductor element 10 by the power supply 12 is interrupted by the relay 1, the diode 13 causes a through current to flow through the diode 14 and the energy stored in the coil 14 in the semiconductor element 10.

  The relay 2 is a short-circuit unit that short-circuits both ends of the coil 14 with the discharge circuit 30. When the relay 2 is turned on, both ends of the coil 14 are short-circuited by the discharge circuit 30. The relay 2 is turned on / off by an instruction input from the Delay 40.

  The relay 3 is a blocking unit that blocks current flowing between the CEs of the semiconductor element 10. The relay 3 is provided, for example, so as to cut off the energization between the coil 14 and the collector of the semiconductor element 10. Similarly to the relay 2, the relay 3 is also turned on / off by an instruction input from the Delay 40.

  The relays 1, 2, and 3 may be replaced with other cutoff means such as semiconductor switching elements such as IGBTs and power MOSFETs and switches.

  The drive unit 11 outputs a drive signal for switching to the gate of the semiconductor element 10. The drive signal output from the drive unit 11 is a Hi / Lo pulse signal. For example, a pulse generator whose output frequency and output voltage are variable is used for the drive unit 11. However, in this embodiment, it is only necessary to output at least Hi / Lo. The semiconductor element 10 is turned on when the level of the pulse signal output from the driving unit 11 is switched from the Lo level to the Hi level, and is turned off when the level is switched from the Hi level to the Lo level. Further, the drive unit 11 outputs to the relay 1 a relay operation signal for turning on / off the relay 1 based on the current state of the CE current of the semiconductor element 10 and the voltage state of the CE voltage. The drive unit 11 may include a control unit such as a microcomputer. For example, the control unit is configured based on the current state of the CE current of the semiconductor element 10, the voltage state of the CE voltage, and an input signal (for example, an operation signal from the user) from another input device (not illustrated). You may make it output the output command signal which instruct | indicates the output of the drive signal of the element 10, and the relay operation signal with respect to the drive part 11. FIG.

  The current sensor 20 detects an inter-CE current that flows between the CEs of the semiconductor element 10. The current sensor 20 outputs a detection signal when the detected current value is equal to or greater than a predetermined reference value. This reference value confirms that the current amount is sufficient to test the avalanche resistance against the semiconductor element to be inspected. The current sensor 20 may be configured so that the reference value can be set in advance corresponding to the semiconductor element to be inspected. The current sensor 20 outputs a detection signal to the drive unit 11 and the Delay 40 when detecting a current exceeding the reference value. The current sensor 20 may only measure the current value, and the reference value may be set by the drive unit 11.

  Delay 40 is a delay time setting unit that sets a delay time for the detection signal from the current sensor 20. Here, the delay time is an ON-OFF delay time for the detection signal from the current sensor 20. Delay 40 outputs a control signal for turning ON / OFF OFF relay 2 and relay 3 when current sensor 20 detects a current value equal to or higher than a reference value. Delay 40 has a delay time setting function therein, delay time Ta from detection signal input to output of the control signal to relay 2, and delay time Tb from detection signal input to output of the control signal to relay 3 Can be set respectively. The delay times Ta and Tb can be set by a time necessary for guaranteeing the avalanche resistance after the gate of the semiconductor element 10 is turned off by the driving unit 11. If Ta or Tb is short, pressurization by the accumulated energy of the coil 14 described in FIG. 1 between CE of the semiconductor element 10 cannot be performed sufficiently, and the load of the avalanche test on the semiconductor element 10 becomes insufficient. If Tb or Tb is long, a current more than necessary flows through the semiconductor element 10 after the width Lanche breakage, resulting in damage to the semiconductor element 10. Therefore, Ta and Tb can be individually set according to the standard of the semiconductor element 10 to be inspected, etc., so that the optimum delay time can be set for the semiconductor element.

  Next, the operation of the test apparatus shown in FIG. 1 will be described with reference to FIGS. FIG. 2 is a flowchart for explaining the operation of the semiconductor element testing apparatus shown in FIG. FIG. 3 is a time chart for explaining the operation of the semiconductor element testing apparatus shown in FIG.

  In FIG. 2, as the first step of the avalanche destructive test, the drive unit 11 turns on the relay 1, and the Delay 40 turns off the relay 2 and turns on the relay 3 (S10). In step 10, since the semiconductor element 10 is not turned on, only the power source voltage of the power source 12 is applied via the coil 14 between the CEs, and no current between the CEs flows. Therefore, energy corresponding to the voltage generated by the power supply 12 and the resistor 18 is stored in the capacitor 17.

  At time t0, the drive unit 11 turns on the semiconductor element 10 by switching the level of the drive signal from the Lo level to the Hi level (step 20). When the semiconductor element 10 is turned on, the CE voltage becomes approximately 0 V, and a current starts to flow between the CEs according to the reactance corresponding to the coil 14.

  The current sensor 20 measures the CE current and outputs a measurement result. It is determined whether or not the current value is equal to or greater than the reference current value (S30). This determination may be performed by the current sensor 20 or may be performed by the drive unit 11.

  At time t1, when a current value equal to or higher than the reference current value is detected by the current sensor 20 (Yes in S30), the drive unit 11 outputs an off operation signal for turning off the relay 1 (S40). When the relay 1 is turned off, the power source 12 and the semiconductor element 10 are disconnected, and a current flows through the coil 14 via the diode 13.

  At time t2, the drive unit 11 further outputs an off drive signal for turning off the semiconductor element 10 (S40). When the semiconductor element 10 is turned off, the CE voltage increases due to the inductance energy accumulated in the coil 14, and the semiconductor element 10 enters the avalanche mode. For monitoring the CE voltage, a comparator or the like (not shown) is used.

  In the present embodiment, the drive unit 11 turns off the semiconductor element 10 after turning off the relay 1 (t1) (t2). If the interval from t1 to t2 is long, the power source 12 Since the voltage between the CEs is lowered before the semiconductor element 10 is turned off along with the separation, t1 and t2 may be substantially simultaneous. This timing is appropriately selected in consideration of the turn-off operation time of the semiconductor element 10.

  Delay 40 determines whether a current value equal to or higher than the reference current value is detected by current sensor 20 and a set delay time has elapsed (S50). The delay time set in Delay 40 is the delay time Ta until the control signal is output to the relay 2 and the delay time Tb until the control signal is output to the relay 3 as described above. In the flowchart shown in FIG. 2, the description about two delay times is omitted.

  If the delay time Ta has elapsed at t3 (Yes in S50), the Delay 40 turns on the relay 2 (S60). When the relay 2 is turned on, a circuit in which the energy of the coil 14 is consumed by the resistor 15 is formed.

  When the delay time Tb has elapsed at t4 (Yes in S50), the Delay 40 turns off the relay 3 (S60). Even when the current between the coils CE is interrupted by the ON operation of the relay 3 and the semiconductor element 10 is avalanche collapsed, the amount of current can be suppressed and damage to the semiconductor element can be prevented.

  Next, setting of the delay times Ta and Tb will be described.

  When the semiconductor element 10 does not have the predetermined avalanche resistance and causes avalanche breakdown, the CEs are short-circuited due to the failure, so the CE voltage becomes about 0V at t4 in FIG. With this voltage drop, the semiconductor element test apparatus 100 can detect that the semiconductor element 10 has undergone avalanche breakdown.

  On the other hand, when the semiconductor element 10 has a predetermined avalanche resistance and no avalanche breakdown occurs, the CE current gradually decreases as shown by the dotted line in FIG. It becomes later than t4 that it becomes 0V.

  Therefore, in order to reduce the damage even when the semiconductor element 10 has undergone avalanche breakdown, the delay time settings of Ta and Tb are set slightly later than t4, which is the timing at which the semiconductor element 10 breaks avalanche. It is good to set. In the semiconductor element test apparatus 100 according to the present embodiment, the delay time can be set as appropriate according to the specifications of the semiconductor element 10, so that even if the semiconductor element 10 is avalanche broken, damage to the semiconductor element 10 can be prevented. Damage to the element test apparatus 100 can be prevented. Moreover, it is desirable to set Ta and Tb earlier than the time until the voltage between the CEs in a normal product is 0 V when no avalanche breakdown occurs.

  At t5, the consumption of energy stored in the coil 14 by the resistor 15 is completed.

  As described above, in the present embodiment, it is possible to suppress the current flowing into the breakdown portion of the semiconductor element 10 between the element breakdown and the current interruption.

  As mentioned above, although the form for implementing this invention was explained in full detail, this invention is not limited to such specific embodiment, In the range of the summary of this invention described in the claim, Various modifications and changes are possible.

1, 2, 3 Relay 10 Semiconductor element 11 Drive unit 12 Power supply 13, 16, 19 Diode 14 Coil 15, 18 Resistor 17 Capacitor 20 Current sensor 30 Discharge circuit 100 Semiconductor element test apparatus

Claims (1)

Coils,
A power source for applying a voltage to the semiconductor element via the coil;
A current sensor that measures the amount of current flowing through the semiconductor element and outputs a measurement result; and
Blocking means for blocking voltage application to the semiconductor element;
A driving unit for turning on and off the semiconductor element;
A delay time setting unit for setting a delay time corresponding to the output of the measurement result from the current sensor,
The drive unit turns off the semiconductor element corresponding to the output of the measurement result from the current sensor,
The semiconductor device testing apparatus, wherein the blocking means blocks voltage application to the semiconductor device for a delay time set by the delay time setting unit.

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