JP5725749B2 - Manufacturing method of semiconductor device - Google Patents

Description

The present invention relates to a method of manufacturing a semiconductor device, more particularly, to a method of manufacturing a semiconductor device having a nitride semiconductor.

  For example, a field effect transistor (FET) such as a high electron mobility transistor (HEMT) using a nitride semiconductor such as gallium nitride (GaN) is used as a power element that operates at high frequency and high output. It is known that a phenomenon called drain current collapse occurs in an FET using a nitride semiconductor (Patent Document 1).

JP-A-2005-286135

  In FETs using nitride semiconductors, it is required to suppress drain current collapse. An object of the present invention is to suppress drain current collapse.

The present invention includes a step of forming a source electrode, a gate electrode and a drain electrode on a nitride semiconductor layer, a step of forming a silicon nitride film in contact with the nitride semiconductor layer, the source electrode and the drain, respectively. In a state where the nitride semiconductor layer between the electrodes is not exposed from the silicon nitride film and an upper surface of the silicon nitride film between the source electrode and the drain electrode is exposed, heat treatment at 300 ° C. or higher is performed. And a step of forming an organic insulating film in contact with an upper surface of the silicon nitride film between the gate electrode and the drain electrode after the heat treatment step. Is the method. According to the present invention, drain current collapse can be suppressed.

  In the above structure, the organic insulating film may not be provided between the source electrode and the gate electrode.

  In the above configuration, the method includes a step of forming wirings on the source electrode and the drain electrode, respectively, and the organic insulating film is disposed between the source electrode and the drain electrode and between the source electrode and the drain electrode. Furthermore, it can be set as the structure which is not provided in the upper surface of the said wiring.

  In the above configuration, the method includes a step of forming wirings on the source electrode and the drain electrode, respectively, and the organic insulating film is disposed between the source electrode and the drain electrode and between the source electrode and the drain electrode. It is possible to adopt a configuration provided in a part of the wiring and not provided on the upper surface of the wiring.

  The said structure WHEREIN: The said organic insulating film can be set as the structure which is a polyimide, a benzodic clobutene, or a photosensitive organic insulating film.

  According to the present invention, drain current collapse can be suppressed.

FIG. 1A to FIG. 1C are cross-sectional views (part 1) illustrating the method for manufacturing the semiconductor device according to the first embodiment. 2A and 2B are cross-sectional views (part 2) illustrating the method for manufacturing the semiconductor device according to the first embodiment. FIG. 3A to FIG. 3C are diagrams showing drain voltage-current characteristics. FIG. 4A and FIG. 4B are cross-sectional views illustrating a method for manufacturing a semiconductor device according to the second embodiment. FIG. 5A to FIG. 5C are cross-sectional views illustrating the method for manufacturing the semiconductor device according to the third embodiment. FIG. 6A and FIG. 6B are diagrams showing drain voltage-current characteristics. FIG. 7A to FIG. 7C are cross-sectional views illustrating the method for manufacturing the semiconductor device according to the fourth embodiment. 8A and 8C are cross-sectional views illustrating the method for manufacturing the semiconductor device according to the fifth embodiment.

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1A to FIG. 2B are cross-sectional views illustrating a method for manufacturing a semiconductor device according to the first embodiment. As shown in FIG. 1A, the buffer layer 12, the channel layer 14, the electron supply layer 16, and the cap layer 18 are sequentially formed as the semiconductor layer 19 on the substrate 10. The substrate 10 is SiC. The buffer layer 12 is an AlN layer having a thickness of 300 nm. The channel layer 14 is a GaN layer having a thickness of 1 μm. The electron supply layer 16 is an n-type AlGaN layer having a thickness of 20 nm and an Al composition ratio of 0.2. The cap layer 18 is an n-type GaN layer having a thickness of 5 nm. A 2DEG (two-dimensional electron gas) 15 is formed at the interface of the electron supply layer 16 of the channel layer 14.

  As shown in FIG. 1B, the source electrode 20, the gate electrode 24 and the drain electrode 22 are formed on the semiconductor layer 19. The source electrode 20 and the drain electrode 22 are composed of a Ta layer and an Al layer from the semiconductor layer 19 side, and are formed by a vapor deposition method and a lift-off method. The gate electrode 24 includes a Ni layer and an Au layer from the semiconductor layer 19 side, and is formed by a vapor deposition method and a lift-off method. As shown in FIG. 1C, a silicon nitride film 26 having a film thickness of 40 nm is formed by CVD (Chemical Vapor Deposition) so as to be in contact with the semiconductor layer 19 and cover the source electrode 20, the gate electrode 24, and the drain electrode 22. Form using the method.

As shown in FIG. 2A, the silicon nitride film 26 on the source electrode 20 and the drain electrode 22 is removed, and a wiring 30 in contact with the source electrode 20 and the drain electrode 22 is formed on the source electrode 20 and the drain electrode 22. The wiring 30 is formed by Au plating. Heat treatment is performed at 350 ° C. for 30 minutes as a plating sinter. As shown in FIG. 2B, a photosensitive photoresist 32 is applied and exposed and developed. As a result, a photoresist 32 having a thickness of 1 μm is formed on the silicon nitride film 26 between the source electrode 20 and the drain electrode 22. The photoresist 32 is not provided between the source electrode 20 and the drain electrode 22 and on the upper surface of the source electrode 20 and the drain electrode 22 and further on the upper surface of the wiring 30.

  FIG. 3A to FIG. 3C are diagrams showing drain voltage-current characteristics. The HEMT whose drain voltage-current characteristics were measured has a gate length of 1 μm, a gate width of 80 μm, and a gate-drain distance of 5 μm. The drain voltage / current characteristics were measured using a curve tracer. In FIG. 3A to FIG. 3C, the broken line indicates the drain voltage-current characteristics when the drain voltage is applied up to 10V and the gate voltage is applied in the minus direction from 2V in the minus direction. The solid line shows the drain voltage-current characteristics when the drain voltage is applied up to 50 V and the gate voltage is applied from 2 V in the minus direction in −1 V step.

  FIG. 3 (a) shows the results measured before the heat treatment of FIG. 2 (a). As shown in FIG. 3A, the drain voltage-current characteristics are not changed before and after the drain voltage of 50 V is applied. FIG. 3B shows the measurement result after heat treatment at 350 ° C. for 30 minutes. As shown in FIG. 3B, the drain current decreases. This phenomenon is a drain current collapse phenomenon. FIG.3 (c) shows the result measured after the process of FIG.2 (b) after that. As shown in FIG. 3C, the drain current collapse phenomenon is hardly observed even when a drain voltage of 50 V is applied. As described above, when the heat treatment at 350 ° C. is performed after the silicon nitride film 26 is formed, the drain current collapse phenomenon is observed. However, it was found that the drain current collapse phenomenon can be suppressed by forming an organic insulating film on the silicon nitride film 26.

  The drain current collapse is considered to be a phenomenon that occurs because electrons in the channel (for example, 2DEG) become high energy and are trapped by the surface of the semiconductor layer 19 or traps in the silicon nitride film 26. If there are many Si dangling bonds on the surface of the silicon nitride film 26, it is considered that electrons are easily trapped in the trap due to the influence of the dangling bonds. When the silicon nitride film 28 is heat-treated, Si—H bonds are released and a large number of Si dangling bonds are formed on the surface of the silicon nitride film 28. For this reason, the drain current collapse increases. In particular, between the gate electrode 24 and the drain electrode 22, the electric field is large and 2DEG electrons are easily trapped in the trap. When the organic insulating film is formed in contact with the upper surface of the silicon nitride film 26 as shown in FIG. 3C, it is considered that the dangling bonds of Si on the surface of the silicon nitride film 26 are terminated and the drain current collapse is suppressed.

  According to the first embodiment, the organic insulating film is formed in contact with the upper surface of the silicon nitride film 26 between the gate electrode 24 and the drain electrode 22. Thereby, drain current collapse can be suppressed. Si dangling bonds on the surface of the silicon nitride film 26 are likely to occur by heat treatment at 300 ° C. or higher, and more likely to occur at 350 ° C. or higher. Therefore, it is preferable to form an organic insulating film on the upper surface of the silicon nitride film 26 after performing a heat treatment at 300 ° C. or higher with the upper surface of the silicon nitride film 26 between the gate electrode 24 and the drain electrode 22 exposed. .

  In Example 1, in order to investigate the effect of suppressing the drain current collapse caused by the organic insulating film, a photoresist 32 was used as the organic insulating film. As the organic insulating film (photosensitive organic insulating film), polyimide, BCB (benzodiclobutene), a photosensitive organic insulating film, or the like can be used.

  Example 2 is an example using an organic insulating film that is not photosensitive. FIG. 4A and FIG. 4B are cross-sectional views illustrating a method for manufacturing a semiconductor device according to the second embodiment. As shown in FIG. 4A, an organic insulating film 34 is applied to the entire surface after FIG. The film thickness of the organic insulating film 34 is 2 μm, for example. As shown in FIG. 4B, the entire surface of the organic insulating film 34 is etched by oxygen plasma. For example, the film thickness of the organic insulating film 34 is etched by 1 μm. As a result, the pad made of the wiring 30 is exposed. The organic insulating film 34 of Example 2 is provided on a part of the upper surface of the source electrode 20 and the drain electrode 22 between the source electrode 20 and the drain electrode 22 and is not provided on the upper surface of the wiring.

  As in Example 1, a photosensitive organic insulating film can be used as the organic insulating film. Further, as in Example 2, an organic insulating film that is not photosensitive can be used as the organic insulating film.

  Example 3 is an example in which polyimide is used as the organic insulating film. FIG. 5A to FIG. 5C are cross-sectional views illustrating a method of manufacturing a semiconductor device according to the third embodiment. As shown in FIG. 5A, after FIG. 2 of the first embodiment, a silicon nitride film 28 having a thickness of 800 nm is formed on the silicon nitride film 26 by plasma CVD. A silicon nitride film 36 having a thickness of 600 nm is formed using plasma CVD so as to cover the wiring 30.

  As shown in FIG. 5B, a photosensitive polyimide film 38 is applied as an organic insulating film on the silicon nitride film 36. By opening and developing, an opening 37 is formed in the photosensitive polyimide film 38 on the pad made of the wiring 30. As shown in FIG. 5C, the silicon nitride film 36 is etched using the photosensitive polyimide film 38 as a mask. Thereby, the pad surface is exposed. Since the photosensitive polyimide film 38 is not directly formed on the pad, the contact failure of the pad due to the polyimide residue is suppressed.

  FIG. 6A and FIG. 6B are diagrams showing drain voltage-current characteristics. The HEMT whose drain voltage-current characteristics were measured has a gate length of 1 μm, a gate width of 1 mm, and a gate-drain distance of 5 μm. A result of measuring drain voltage current characteristics by applying a drain voltage and a gate voltage using a pulse of 4 μs based on a drain voltage of 0 V and a gate voltage of 0 V is shown by a broken line. On the other hand, the result of measuring the drain voltage current characteristics by applying the drain voltage and the gate voltage using a pulse of 4 μs based on the drain voltage of 50 V and the gate voltage of −3 V is shown by a solid line. The pulse duty was 1%. The gate voltage was applied in a 0.4V step from -2V to 2V. The ratio of the drain current value of the solid line to the broken line when the drain voltage is 5 V and the gate voltage is 2 V is defined as the collapse rate.

  FIG. 6A shows drain voltage-current characteristics in the process of FIG. That is, the drain characteristics before forming the photosensitive polyimide film 38 are shown. At this time, the collapse rate was 76%. FIG. 6B shows drain voltage-current characteristics in the process of FIG. That is, the drain characteristics after forming the photosensitive polyimide film 38 are shown. At this time, the collapse rate was 84%.

  As described above, when the total thickness of the silicon nitride films 26, 28, and 36 from the semiconductor layer 19 to the photosensitive polyimide film 38 is 1440 nm, an organic insulating film is formed in contact with the silicon nitride film, thereby drain current collapse. The phenomenon could be suppressed. As described above, when the suppression of the drain current collapse phenomenon and the number of steps for forming the silicon nitride film are taken into consideration, the total thickness of the silicon nitride film from the semiconductor layer 19 to the organic insulating film is preferably 1.5 μm or less. Furthermore, 1.0 micrometer or less is preferable. Furthermore, as in Example 1, 100 nm or less is more preferable.

  Example 4 is an example of a semiconductor device having a field plate. FIG. 7A to FIG. 7C are cross-sectional views illustrating the method for manufacturing the semiconductor device according to the fourth embodiment. As shown in FIG. 7A, after FIG. 5A, the silicon nitride film 36 on the pad made of the wiring 30 is removed. A field plate 40 is formed on the silicon nitride film 36 between the gate electrode 24 and the drain electrode 22. The field plate 40 is made of, for example, Au. As shown in FIG. 7B, a non-photosensitive polyimide film 42 having a thickness of 2 μm is applied to the entire surface. As shown in FIG. 7C, the entire surface of the non-photosensitive polyimide film 42 is etched by 1 μm. Thereby, the surface of the pad is exposed.

  When the field plate 40 is formed on the silicon nitride film 36 as in the fourth embodiment, an organic insulating film may be formed on the silicon nitride film 36. When the field plate 40 is formed between the gate electrode 24 and the drain electrode 22, it is preferable to form an organic insulating film on at least the upper surface of the silicon nitride film between the field plate 40 and the drain electrode 22. .

  Example 5 is an example in which the organic insulating film between the source electrode 20 and the gate electrode 24 is removed. 8A and 8C are cross-sectional views illustrating the method for manufacturing the semiconductor device according to the fifth embodiment. As shown in FIG. 8A, after FIG. 2A of Example 1, a photosensitive organic insulating film 44 is applied. By exposing and developing, the organic insulating film 44 on the pad made of the wiring 30 is removed. As shown in FIG. 8B, a photoresist 50 having an opening is formed. As shown in FIG. 8C, the organic insulating film 44 is removed using the photoresist 50 as a mask. That is, the organic insulating film 44 is formed only between the gate electrode 24 and the drain electrode 22. Thereby, the organic insulating film 44 between the source electrode 20 and the gate electrode 24 is removed. By removing the organic insulating film 44 between the source electrode 20 and the gate electrode 24, the source-gate capacitance can be reduced.

  As in the fifth embodiment, an organic insulating film 44 is formed between the gate electrode 24 and the drain electrode 22 which is effective in suppressing the drain current collapse phenomenon, and an organic material other than between the gate electrode 24 and the drain electrode 22 is formed. The insulating film 44 is not formed. For example, the organic insulating film 44 is not formed between the source electrode 20 and the gate electrode 24. As a result, the deposit capacity can be suppressed. The organic insulating film only needs to be formed in at least part of the region between the gate electrode 24 and the drain electrode 22. Further, it may be formed in the entire region between the gate electrode 24 and the drain electrode 22. The region where the organic insulating film is formed preferably includes a region having the strongest electric field in the semiconductor layer 19.

  In the first to fifth embodiments, the HEMT using the AlGaN as the electron supply layer 16 and GaN as the channel layer 14 has been described as an example. However, as the semiconductor layer 19, other nitride semiconductors can be used. The nitride semiconductor is a semiconductor containing nitrogen, such as InN, AlN, InGaN, InAlN, or AlInGaN.

  Further, in Examples 1 to 5, the example in which the cap layer 18 is provided has been described. However, the gate electrode 24 may be formed directly on the electron supply layer 16 without providing the cap layer 18. Moreover, although the example of SiC was demonstrated as the board | substrate 10, the board | substrate 10 may be a sapphire or a Si substrate.

  Although the embodiments of the present invention have been described in detail above, the present invention is not limited to such specific embodiments, and various modifications and changes can be made within the scope of the gist of the present invention described in the claims. It can be changed.

19 Semiconductor layer 20 Source electrode 22 Drain electrode 24 Gate electrode 26, 28, 36 Silicon nitride film 32 Photo resist 34, 44 Organic insulating film 38 Photosensitive polyimide film 42 Non-photosensitive polyimide film

Claims (6)

Forming a source electrode, a gate electrode, and a drain electrode on the nitride semiconductor layer; and
Forming a silicon nitride film in contact with the nitride semiconductor layer;
In a state where the nitride semiconductor layer between the source electrode and the drain electrode is not exposed from the silicon nitride film and an upper surface of the silicon nitride film between the source electrode and the drain electrode is exposed, Performing a heat treatment at 300 ° C. or higher;
Forming an organic insulating film in contact with the upper surface of the silicon nitride film between the gate electrode and the drain electrode after the heat treatment step ;
A method for manufacturing a semiconductor device, comprising: The organic insulating film, a method of manufacturing a semiconductor device according to claim 1, wherein it is not provided between the source electrode and the gate electrode. Forming a wiring on each of the source electrode and the drain electrode,
The organic insulating film, in between the source electrode and the drain electrode, the upper surface of the source electrode and the drain electrode, a semiconductor according to claim 1, wherein the not provided further on the upper surface of said wiring Device manufacturing method. Forming a wiring on each of the source electrode and the drain electrode,
The organic insulating film is provided on a part of the upper surface of the source electrode and the drain electrode between the source electrode and the drain electrode, and is not provided on the upper surface of the wiring. A method for manufacturing a semiconductor device according to claim 1 . The organic insulating film of polyimide, a method of manufacturing a semiconductor device according to claim 1, wherein the benzo dichloride butene or photosensitive organic insulating film. Forming a wiring on each of the source electrode and the drain electrode by plating,
6. The method of manufacturing a semiconductor device according to claim 1, wherein the heat treatment is a plating sinter of the wiring.

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