JP5711572B2 - Circuit board for isolator, isolator and manufacturing method thereof - Google Patents

Description

  The present invention relates to an isolator circuit board, an isolator, a method for manufacturing an isolator circuit board, and a method for manufacturing an isolator.

  Conventionally, an isolator is used to separate an input signal and an output signal (see, for example, Patent Documents 1 and 2). In the isolators described in Patent Documents 1 and 2, a plurality of coils are formed on the circuit board for isolator, and a receiving chip and a transmitting chip are mounted on a region different from the plurality of coils on the circuit board for isolator. The plurality of coils of the circuit board for isolator are connected to the receiving chip and the transmitting chip using a plurality of wires.

  In recent years, an isolator using MEMS (Micro Electro Mechanical Systems) technology has been developed. In this isolator, a plurality of coils are finely formed on a chip (hereinafter referred to as a coil chip) by MEMS technology. The coil chip is disposed on the lead frame together with the receiving chip and the transmitting chip. The coil chip is connected to the receiving chip and the transmitting chip by wires.

JP 2008-61236 A JP 2010-74621 A

  There is no limitation on the dimensions of the coil formed on the conventional circuit board for isolator. However, since the receiving chip and the transmitting chip are mounted in a region different from the coil of the isolator circuit board, the area of the isolator circuit board increases. This increases the overall size of the isolator.

  On the other hand, according to the MEMS technology, the coil chip can be reduced in size. Thereby, the isolator can be reduced in size. However, the coil chip formed by the MEMS technology has dimensional restrictions. For example, it is difficult to increase the line width and line interval of a coil formed on a coil chip. Therefore, it is difficult to sufficiently reduce the resistance of the coil.

  Also, in an isolator using a conventional isolator circuit board and an isolator using MEMS technology, wire bonding is required to connect the coil to the receiving chip and the transmitting chip. Therefore, the manufacturing process becomes complicated.

  An object of the present invention is to provide a circuit board for an isolator and an isolator which can improve the degree of freedom of design of a coil and can be miniaturized, and can be easily manufactured, and a manufacturing method thereof.

(1) An isolator circuit board according to a first invention is an isolator circuit board used in an isolator having first and second electronic components and a lead frame , the first circuit board, The first circuit board includes a first coil, a first solder bump electrically connected to the first coil, a first wiring pattern, and a first wiring pattern. and a third solder bump that is electrically connected to the second circuit board, and the second coil, and a second solder bump that is electrically connected to the second coil, the second wiring And a fourth solder bump electrically connected to the second wiring pattern . The first and second solder bumps are arranged so that the first coil and the second coil overlap each other. And the first and second circuit boards are arranged When the first and second electronic components are arranged so as to overlap the first and second coils, provided in each contactable position to the terminal of the first and second electronic components, the third and fourth solder bumps, when the first and second electronic components are arranged on a lead frame, a shall provided contactable position to the lead frame.

When the isolator circuit board is used as an isolator, the first and second circuit boards are arranged so that the first coil and the second coil of the isolator circuit board overlap with each other. By arranging the first and second electronic components so as to overlap the coil, the first solder bumps of the first circuit board are connected to the terminals of the first electronic component, and the second circuit board of the second circuit board is connected. Two solder bumps can be connected to the terminals of the second electronic component. In addition, by arranging the first and second electronic components on the lead frame, the third and fourth solder bumps can be connected to the lead frame.

Thus, since the first and second electronic components can be arranged so as to overlap the first and second coils, the first and second circuit boards can be formed without increasing the area of the first and second circuit boards. The area where the second coil is formed can be secured sufficiently wide. Thereby, the freedom degree of design of a coil can be improved. As a result, the inductance or resistance of the first and second coils can be increased. In addition, since the area of the circuit board for isolator can be reduced, the isolator can be downsized. Furthermore, the first and second solder bumps of the first and second circuit boards can be connected to the terminals of the first and second electronic components, respectively, without using wire bonding. Further, the first wiring pattern of the first circuit board and the second wiring pattern of the second circuit board can be electrically connected to the lead frame without using wire bonding. As a result, a small isolator having a lead frame can be easily manufactured.

( 2 ) The third solder bump has a height higher than that of the first solder bump in the thickness direction of the first electronic component, and the fourth solder bump has a height in the thickness direction of the second electronic component. It may have a height greater than two solder bumps .

In this case, the first and second solder bumps of the first and second circuit boards are mounted with the first and second electronic components disposed between the first and second circuit boards and the lead frame. The third and fourth solder bumps of the first and second circuit boards can be easily connected to the lead frame while being easily connected to the terminals of the first and second electronic components.

( 3 ) The first circuit board is provided on a first insulating layer having one main surface and another main surface and on the other main surface of the first insulating layer, and constitutes at least a part of the first coil. 1 conductor layer and a first covering layer formed on the other principal surface of the first insulating layer so as to cover the first conductor layer, and the second circuit board includes one principal surface and the other A second insulating layer having a main surface, a second conductive layer provided on one main surface of the second insulating layer, and constituting at least a part of the second coil, and so as to cover the second conductive layer And a second covering layer formed on one main surface of the second insulating layer.

  In this case, the first coil of the first circuit board is covered with the first coating layer, and the second coil of the second circuit board is covered with the second coating layer. Thereby, sufficient insulation between the first coil and the second coil is ensured.

( 4 ) The first and second circuit boards are stacked such that the other main surface of the first insulating layer faces one main surface of the second insulating layer, and the first and third solder bumps are The first insulating layer may be provided on the first cover layer on the other main surface, and the second and fourth solder bumps may be provided on the other main surface of the second insulating layer.

  In this case, the first coil of the first circuit board and the second coil of the second circuit board can be opposed to each other with the first and second coating layers interposed therebetween. Thereby, the space | interval of a 1st coil and a 2nd coil can be made small. As a result, the inductances of the first and second coils can be increased without increasing the area of the circuit board for isolator.

( 5 ) The first circuit board is provided on one main surface of the first insulating layer so as to cover the third conductor layer and the third conductor layer constituting the other part of the first coil. And a third covering layer formed on one main surface of the first insulating layer, wherein the second circuit board is provided on the other main surface of the second insulating layer and the second coil. A fourth conductor layer that constitutes a portion of the second insulating layer, and a fourth covering layer formed on the other main surface of the second insulating layer so as to cover the fourth conductor layer.

  In this case, the first coil is formed on both surfaces of the first circuit board, and the second coil is formed on both surfaces of the second circuit board. Thereby, the number of turns of the first and second coils can be increased without increasing the areas of the first and second circuit boards. As a result, the inductances of the first and second coils can be increased without increasing the area of the circuit board for isolator.

( 6 ) An isolator according to a second invention includes an isolator circuit board, first and second electronic components, and a lead frame . The isolator circuit board includes the first circuit board, the second circuit board, and the second circuit board. The first circuit board includes a first coil, a first solder bump electrically connected to the first coil, a first wiring pattern, and a first wiring pattern. and a third solder bump that is electrically connected to the second circuit board, and the second coil, and a second solder bump that is electrically connected to the second coil, the second wiring And a fourth solder bump electrically connected to the second wiring pattern, and the first and second coils of the isolator circuit board are overlapped with each other. A circuit board is disposed and the first and second cores are arranged. First and second electronic components are arranged to overlap in Le, a first solder bump of the first circuit board is connected to the terminal of the first electronic component, a second solder of the second circuit board bumps is connected to the terminal of the second electronic component, the first and second electronic components are arranged on a lead frame, the third and fourth solder bump is shall be connected to the lead frame.

In the isolator, since the first and second electronic components are arranged so as to overlap the first and second coils, the first and second circuits are not increased without increasing the areas of the first and second circuit boards. It is possible to secure a sufficiently wide region where the coil is formed. Thereby, the freedom degree of design of a coil can be improved. As a result, the inductance or resistance of the first and second coils can be increased. In addition, since the area of the circuit board for isolator can be reduced, the isolator can be downsized. Furthermore, the first and second solder bumps of the first and second circuit boards can be connected to the terminals of the first and second electronic components, respectively, without using wire bonding. In addition, the first and second electronic components are disposed on the lead frame, and the third and fourth solder bumps are connected to the lead frame. Therefore, the first wiring pattern of the first circuit board and the second wiring pattern of the second circuit board can be electrically connected to the lead frame without using wire bonding. As a result, a small isolator having a lead frame can be easily manufactured.

( 7 ) A method for manufacturing an isolator circuit board according to a third aspect of the present invention is a method for manufacturing an isolator circuit board used in an isolator having first and second electronic components and a lead frame , wherein the first coil A first circuit having a first solder bump electrically connected to the first coil, a first wiring pattern, and a third solder bump electrically connected to the first wiring pattern A step of manufacturing a substrate; a second coil ; a second solder bump electrically connected to the second coil ; a second wiring pattern; and the second wiring pattern. Forming a second circuit board having a fourth solder bump , wherein the first and second solder bumps are arranged such that the first coil and the second coil overlap each other. Times When the first and second electronic components are arranged so as to overlap the first and second coils while the substrate is arranged, they are provided at positions where they can contact the terminals of the first and second electronic components, respectively. is, the third and fourth solder bump, when the first and second electronic components are arranged on a lead frame, a shall provided contactable position to the lead frame.

When the circuit board for an isolator manufactured by the method is used for manufacturing the isolator, the first and second circuit boards are arranged so that the first coil and the second coil of the circuit board for the isolator overlap each other. The first and second electronic components are arranged so as to overlap the first and second coils. Thereby, the first solder bump of the first circuit board is connected to the terminal of the first electronic component, and the second solder bump of the second circuit board is connected to the terminal of the second electronic component. it can. In addition, by arranging the first and second electronic components on the lead frame, the third and fourth solder bumps can be connected to the lead frame.

Thus, since the first and second electronic components can be arranged so as to overlap the first and second coils, the first and second circuit boards can be formed without increasing the area of the first and second circuit boards. The area where the second coil is formed can be secured sufficiently wide. Thereby, the freedom degree of design of a coil can be improved. As a result, the inductance or resistance of the first and second coils can be increased. In addition, since the area of the circuit board for isolator can be reduced, the isolator can be downsized. Furthermore, the first and second solder bumps of the first and second circuit boards can be connected to the terminals of the first and second electronic components, respectively, without using wire bonding. Further, the first wiring pattern of the first circuit board and the second wiring pattern of the second circuit board can be electrically connected to the lead frame without using wire bonding. As a result, a small isolator having a lead frame can be easily manufactured.

( 8 ) A method for manufacturing an isolator according to a fourth aspect of the present invention includes a first coil , a first solder bump electrically connected to the first coil, a first wiring pattern, and the first wiring. Forming a first circuit board having a third solder bump electrically connected to the pattern ; a second coil ; a second solder bump electrically connected to the second coil ; The second circuit board having the second wiring pattern and the fourth solder bump electrically connected to the second wiring pattern, and the first coil and the second coil overlap each other. The first and second circuit boards are arranged, the first and second electronic components are arranged on the lead frame so as to overlap the first and second coils, and the first and second solder bumps are arranged. The first and second power respectively Connected to parts of the terminal, it is intended to include a step of connecting the third and fourth solder bump on the lead frame.

According to the method for manufacturing the isolator, the first and second electronic components are arranged so as to overlap the first and second coils, so that the first and second circuit boards can be manufactured without increasing the area. A region where the first and second coils are formed can be secured sufficiently wide. Thereby, the freedom degree of design of a coil can be improved. As a result, the inductance or resistance of the first and second coils can be increased. In addition, since the area of the circuit board for isolator can be reduced, the isolator can be downsized. Furthermore, the first and second solder bumps of the first and second circuit boards can be connected to the terminals of the first and second electronic components, respectively, without using wire bonding. In addition, the first and second electronic components are disposed on the lead frame, and the third and fourth solder bumps are connected to the lead frame. Therefore, the first wiring pattern of the first circuit board and the second wiring pattern of the second circuit board can be electrically connected to the lead frame without using wire bonding. As a result, a small isolator having a lead frame can be easily manufactured.

  According to the present invention, the degree of freedom in coil design is improved, the isolator can be reduced in size, and the isolator can be easily manufactured.

It is sectional drawing of the isolator which concerns on one embodiment of this invention. It is a top view of the circuit board for isolators used for the isolator of FIG. It is a top view of one circuit board which comprises the circuit board for isolators. FIG. 4 is a bottom view of the circuit board of FIG. 3. It is a top view of the other circuit board which comprises the circuit board for isolators. It is a bottom view of the circuit board of FIG. It is a top view of the lead frame used for the isolator of FIG. It is sectional drawing which shows the manufacturing process of the circuit board which comprises the circuit board for isolators. It is sectional drawing which shows the manufacturing method of the isolator using the circuit board for isolators. It is sectional drawing of the isolator which concerns on other embodiment of this invention. It is sectional drawing of the isolator which concerns on other embodiment of this invention. It is a top view of the isolator of a comparative example.

  Hereinafter, an isolator circuit board, an isolator, and a manufacturing method thereof according to embodiments of the present invention will be described with reference to the drawings.

(1) Configuration FIG. 1 is a cross-sectional view of an isolator according to an embodiment of the present invention, and FIG. 2 is a plan view of an isolator circuit board used in the isolator of FIG.

  As shown in FIG. 1, the isolator 1 includes an isolator circuit board 100, a lead frame 30, a transmission chip 40, a reception chip 50, and a package 60. The circuit board 100 for an isolator includes flexible wiring circuit boards (hereinafter referred to as circuit boards) 10 and 20.

  The circuit board 10 includes a base insulating layer 11 made of polyimide, for example. A conductor layer 12 having a predetermined pattern is formed on the upper surface of the base insulating layer 11. The conductor layer 12 constitutes a coil CA. A conductor layer 13 having a predetermined pattern is formed on the lower surface of the base insulating layer 11. The conductor layer 13 constitutes the coil CB and the wiring pattern PB (see FIG. 2). The conductor layers 12 and 13 are made of, for example, copper. The coils CA and CB are formed at positions that overlap each other. A cover insulating layer 14 made of polyimide, for example, is formed on the upper surface of the base insulating layer 11 so as to cover the conductor layer 12. A cover insulating layer 15 made of polyimide, for example, is formed on the lower surface of the base insulating layer 11 so as to cover the conductor layer 13.

  The circuit board 20 has a base insulating layer 21 made of polyimide, for example. A conductor layer 22 having a predetermined pattern is formed on the upper surface of the base insulating layer 21. A coil CC is constituted by the conductor layer 22. A conductor layer 23 having a predetermined pattern is formed on the lower surface of the base insulating layer 21. The conductor layer 23 constitutes a coil CD and a wiring pattern PD (see FIG. 2). The conductor layers 22 and 23 are made of copper, for example. The coils CC and CD are formed at positions that overlap each other. A cover insulating layer 24 made of polyimide, for example, is formed on the upper surface of the base insulating layer 21 so as to cover the conductor layer 22. A cover insulating layer 25 made of polyimide, for example, is formed on the lower surface of the base insulating layer 21 so as to cover the conductor layer 23.

  A plurality of solder bumps 16 and 17 are provided on the lower surface of the insulating cover layer 15 of the circuit board 10. A plurality of solder bumps 26 and 27 are provided on the lower surface of the insulating cover layer 25 of the circuit board 20. The height of the solder bumps 17 and 27 is smaller than the height of the solder bumps 16 and 26 by the thickness of the transmission chip 40 and the reception chip 50.

  A transmission chip 40 and a reception chip 50 are disposed on the lead frame 30. The lead frame 30 includes a plurality of external terminals 31 as well as a plurality of parts to be described later. Circuit boards 10 and 20 are arranged so that a plurality of coils CA, CB, CC, and CD overlap each other. The circuit boards 10 and 20 are arranged on the transmission chip 40, the reception chip 50, and the lead frame 30 so that the coils CA, CB, CC, and CD overlap the transmission chip 40 and the reception chip 50. The solder bumps 16 are bonded to the terminals on the upper surface of the transmission chip 40, and the solder bumps 26 are bonded to the terminals on the upper surface of the reception chip 50. The solder bumps 17 and 27 are bonded to the upper surface of the lead frame 30. In this state, the portion excluding the external terminal 31 of the lead frame 30, the transmitting chip 40, the receiving chip 50, and the isolator circuit board 100 are accommodated in a package 60 made of a sealing resin.

  FIG. 3 is a top view of one circuit board 10 constituting the circuit board 100 for an isolator. 4 is a bottom view of the circuit board 10 of FIG. In FIGS. 3 and 4, the insulating cover layers 14 and 15 are not shown.

  As shown in FIG. 3, a plurality (two in this example) of coils CA are provided on the upper surface of the base insulating layer 11 (see FIG. 1) of the circuit board 10. As shown in FIG. 4, a plurality (two in this example) of coils CB and a plurality of wiring patterns PB are provided on the lower surface of the base insulating layer 11 (see FIG. 1) of the circuit board 10. Coil CA and coil CB are arranged to overlap each other.

  The center end of the upper coil CA is connected to the center end of the lower coil CB through the connection layer 18. Thereby, the coil CA and the coil CB are connected in series. Further, the coil CA and the coil CB extend in a spiral shape in the opposite direction when viewed from the upper surface side. Thereby, current flows in the same direction through the coil CA and the coil CB.

  Terminal portions TA are respectively provided at outer ends of the plurality of coils CA on the upper surface. A terminal portion TB is provided on the lower surface of the base insulating layer 11 so as to overlap the terminal portion TA on the upper surface. The terminal portion TA on the upper surface and the terminal portion TB on the lower surface are connected through the connection layer 18 (FIG. 3). Terminal portions TB are respectively formed at the ends of the plurality of coils CB on the lower surface.

  Solder bumps 16 are respectively formed at one end portions of the plurality of terminal portions TB and the wiring pattern PB. The plurality of solder bumps 16 are provided at positions where they can contact the plurality of terminals on the upper surface of the transmission chip 40. Rectangular pads are formed on the other ends of the plurality of wiring patterns PB, and solder bumps 17 are formed on the pads. The plurality of solder bumps 17 are provided at positions where they can contact each part of a lead frame 30 described later.

  FIG. 5 is a top view of the other circuit board 20 constituting the circuit board 100 for an isolator. FIG. 6 is a bottom view of the circuit board 20 of FIG. In FIGS. 5 and 6, the insulating cover layers 24 and 25 are not shown.

  As shown in FIG. 5, a plurality (two in this example) of coils CC are provided on the upper surface of the base insulating layer 21 (see FIG. 1) of the circuit board 20. As shown in FIG. 6, a plurality of (two in this example) coils CD and a plurality of wiring patterns PD are provided on the lower surface of the base insulating layer 21 (see FIG. 1) of the circuit board 20. The coil CC and the coil CD are arranged so as to overlap each other.

  The center end of the upper coil CC is connected to the center end of the lower coil CD through the connection layer 28. The center end of the upper coil CC is connected to the center end of the lower coil CD through the connection layer 28. Thereby, the coil CC and the coil CD are connected in series. Further, the coil CC and the coil CD extend in a spiral shape in the opposite direction when viewed from the upper surface side. Thereby, current flows in the same direction through the coil CC and the coil CD.

  Terminal portions TC are respectively provided at the outer ends of the plurality of coils CC on the upper surface. A terminal portion TD is provided on the lower surface of the base insulating layer 21 so as to overlap the terminal portion TC on the upper surface. The terminal portion TC on the upper surface and the terminal portion TD on the lower surface are connected through the connection layer 28 (FIG. 5). Terminal portions TD are respectively formed at the ends of the plurality of coils CD on the lower surface.

  Solder bumps 26 are respectively formed at one end portions of the plurality of terminal portions TD and the wiring pattern PD. The plurality of solder bumps 26 are provided at positions where they can contact a plurality of terminals on the upper surface of the receiving chip 50. Rectangular pads are formed on the other end portions of the plurality of wiring patterns PD, and solder bumps 27 are formed on the pads. The plurality of solder bumps 27 are provided at positions where they can contact each part of the lead frame 30 described later.

  The coils CA and CB of the circuit board 10 constitute a first coil, and the coils CC and CD of the circuit board 20 constitute a second coil. The first coil and the second coil constitute a transformer.

  FIG. 7 is a plan view of a lead frame 30 used in the isolator 1 of FIG. In FIG. 7, the external terminals 31 of the lead frame 30 are not shown.

  The lead frame 30 is made of a metal material such as copper, aluminum, or stainless steel, and includes a plurality of lead portions 32 and support portions 34 and 35. The solder bumps 17 of the circuit board 10 or the solder bumps 27 of the circuit board 20 are joined to each lead portion 32. A transmission chip 40 is attached to the support portion 34. A receiving chip 50 is attached to the support portion 35.

  The plurality of terminals of the transmission chip 40 shown in FIGS. 3 and 4 are connected to the plurality of lead portions 32 of the lead frame 30 of FIG. 7 through the solder bumps 16, the wiring patterns PB, and the solder bumps 17 of the circuit board 10. Further, the plurality of terminals of the receiving chip 50 shown in FIGS. 5 and 6 are connected to the plurality of lead portions 32 of the lead frame 30 of FIG. 7 through the solder bumps 26, the wiring patterns PD, and the solder bumps 27 of the circuit board 20, respectively. The

  The thickness of the lines constituting the coils CA, CB, CC, CD (the thickness of the conductor layers 12, 13, 22, 23) is, for example, 5 μm or more and 35 μm or less, and preferably 9 μm or more and 18 μm or less. The width of the lines constituting the coils CA, CB, CC, CD is, for example, 30 μm or more and 150 μm or less, and preferably 50 μm or more and 100 μm or less. In addition, coils CA, CB, CC. The interval between the lines constituting the CD is, for example, 30 μm or more and 150 μm or less, and preferably 50 μm or more and 100 μm or less.

  The thickness of the base insulating layers 11 and 21 is, for example, 5 μm or more and 150 μm or less, and preferably 25 μm or more and 100 μm or less. The insulating cover layers 14, 15, 24, and 25 have a thickness of, for example, 5 μm or more and 150 μm or less, and preferably 25 μm or more and 100 μm or less.

  The diameter of the solder bumps 16 and 26 is, for example, 30 μm or more and 100 μm or less, and preferably 50 μm or more and 75 μm or less. The diameter of the solder bumps 17 and 27 is, for example, 100 μm or more and 500 μm or less, and preferably 150 μm or more and 350 μm or less.

  As materials for the base insulating layers 11 and 21 and the cover insulating layers 14, 15, 24, and 25, a liquid crystal polymer, polyester, or the like can be used instead of polyimide. Moreover, as a material of the conductor layers 12, 13, 22, and 23, other metals such as gold (Au) and aluminum, or alloys such as a copper alloy and an aluminum alloy can be used instead of copper.

(2) Manufacturing Method Next, an example of the manufacturing method of the isolator circuit board 100 and the isolator 1 using the same according to the present embodiment will be described.

  FIG. 8 is a cross-sectional view showing a manufacturing process of the circuit board 10 constituting the circuit board 100 for an isolator. FIG. 9 is a cross-sectional view showing a method of manufacturing the isolator 1 using the circuit board for isolator 100.

  First, as shown in FIG. 8A, a three-layer base material is prepared in which conductor layers 12 and 13 made of copper are laminated on the upper and lower surfaces of a base insulating layer 11 made of polyimide.

  Next, as shown in FIG. 8B, the coil CA and the terminal portion TA (see FIG. 3) are formed on the upper surface of the base insulating layer 11 by etching the conductor layer 12 by the subtractive method. Further, the conductor layer 13 is etched to form the coil CB, the wiring pattern PB, and the terminal portion TB (see FIG. 4) on the lower surface of the base insulating layer 11 by the subtractive method.

  Next, as shown in FIG. 8C, through holes TH are formed in the conductor layer 12, the base insulating layer 11, and the conductor layer 13 by laser processing. The through hole TH may be formed by other methods such as drilling instead of laser processing. The through hole TH is formed at the center end of the coils CA and CB in FIGS. 3 and 4 and the outer end of the coils CA and CB.

  Further, as shown in FIG. 8D, a connection layer 18 is formed on the conductor layer 12, the inner surface of the through hole TH, and the conductor layer 13 by metal plating. In this example, the connection layer 18 is formed by copper plating.

  Next, as shown in FIG. 8E, the insulating cover layer 14 is formed on the upper surface of the insulating base layer 11 so as to cover the coil CA. Further, the insulating cover layer 15 is formed on the lower surface of the insulating base layer 11 so as to cover the coil CB and the wiring pattern PB.

  Thereafter, as shown in FIG. 8F, a through hole VH is formed by laser processing at the position of the cover insulating layer 15 where the solder bumps 16 and 17 of FIG. 4 are to be formed. Next, the smear (residue) generated when the through hole VH is formed is removed.

  Next, as shown in FIG. 8G, solder bumps 16 and 17 are formed at a position of the through hole VH of the cover insulating layer 15 of the circuit board 10 by a printing method using a solder paste.

  The circuit board 20 is manufactured by the same method as in FIG. In this manner, the isolator circuit board 100 including the circuit board 10 and the circuit board 20 is manufactured.

  Next, as shown in FIG. 9, the transmission chip 40 and the reception chip 50 are arranged on the lead frame 30. Further, the cover insulating layer 15 of the circuit board 10 and the cover insulating layer 24 of the circuit board 20 are bonded with an adhesive so that the coils CA and CB and the coils CC and CD overlap. The bonded circuit boards 10 and 20 are arranged on the transmission chip 40 and the reception chip 50. Thereafter, as shown in FIG. 1, the area of the lead frame 30 excluding the external terminals 31, the transmission chip 40, the reception chip 50 and the isolator circuit board 100 are accommodated in a package 60 made of a sealing resin.

(3) Effect According to the circuit board for isolator 100 according to the present embodiment, the transmitting chip 40 and the receiving chip 50 can be arranged so as to overlap the coils CA, CB, CC, CD. The area where the coils CA, CB, CC, and CD are formed can be secured sufficiently large without increasing the area of 20. Thereby, the freedom degree of design of coil CA, CB, CC, CD can be improved. As a result, it is possible to increase the inductance or decrease the resistance of the coils CA, CB, CC, and CD. In addition, since the area of the circuit board for isolator 100 can be reduced, the isolator 1 can be reduced in size. Furthermore, the solder bumps 16 and 26 of the circuit boards 10 and 20 can be bonded to the terminals of the transmission chip 40 and the reception chip 50 without using wire bonding. Moreover, it is not necessary to use the MEMS technology to produce the coils CA, CB, CC, and CD. Thereby, the isolator 1 can be easily manufactured.

  Further, by arranging the transmitting chip 40 and the receiving chip 50 on the lead frame 30, the solder bumps 17.27 can be joined to the lead frame 30. Therefore, the wiring pattern PB of the circuit board 10 and the wiring pattern PD of the circuit board 20 can be electrically connected to the lead frame 30 without using wire bonding. As a result, the small isolator 1 having the external terminal 31 can be easily manufactured.

  Furthermore, since the solder bumps 17 and 27 have a height higher than that of the solder bumps 16 and 26 in the thickness direction of the transmission chip 40 and the reception chip 50, the transmission chip 40 and the lead chip 30 are arranged between the circuit boards 10 and 20 and the lead frame 30. With the receiving chip 50 disposed, the solder bumps 16 and 26 of the circuit boards 10 and 20 are easily joined to the terminals of the transmitting chip 40 and the receiving chip 50, and the solder bumps 17 and 27 of the circuit boards 10 and 20 are connected to the lead frame. 30 can be easily joined.

  Further, since the coils CA and CB are formed on both surfaces of the circuit board 10 and the coils CC and CD are formed on both surfaces of the circuit board 20, the coils CA and CB can be formed without increasing the area of the circuit boards 10 and 20. The number of turns of the first coil and the number of turns of the second coil consisting of the coils CC and CD can be increased. As a result, the inductances of the first and second coils can be increased without increasing the area of the isolator circuit board 100.

(4) Other Embodiments FIG. 10 is a cross-sectional view of an isolator 1 according to another embodiment of the present invention. The isolator 1 of FIG. 10 is different from the isolator 1 of FIG. 1 in the following points.

  The coil CA and the cover insulating layer 14 are not provided on the upper surface of the base insulating layer 11 of the circuit board 10 constituting the isolator circuit board 100, and the coil CB, the wiring pattern PB, and the cover insulating layer 15 are formed on the lower surface of the base insulating layer 11. Provided. Further, the coil CC and the cover insulating layer 24 are provided on the upper surface of the base insulating layer 21 of the circuit board 20, the coil CD is not provided on the lower surface of the base insulating layer 21, and the wiring pattern PB and the lower surface of the base insulating layer 21 are provided. Only the insulating cover layer 15 is provided.

  In the isolator 1 according to the present embodiment, the first coil includes the coil CB, and the second coil includes the coil CC. In this case, a two-layer substrate can be used for manufacturing the circuit board 10.

  FIG. 11 is a sectional view of an isolator 1 according to still another embodiment of the present invention. The isolator 1 of FIG. 11 differs from the isolator 1 of FIG. 1 in the following points.

  The coil CA and the cover insulating layer 14 are not provided on the upper surface of the base insulating layer 11 of the circuit board 10 constituting the isolator circuit board 100, and the coil CB, the wiring pattern PB, and the cover insulating layer 15 are formed on the lower surface of the base insulating layer 11. Provided. The configuration of the circuit board 20 is the same as the configuration of the circuit board 20 of FIG.

  In the isolator 1 according to the present embodiment, the first coil includes the coil CB, and the second coil includes the coils CC and CD. In this case, a two-layer substrate can be used for manufacturing the circuit board 10. Further, the number of turns of the first coil made of the coil CB can be reduced to about half of the number of turns of the second coil made of the coils CC and CD. Thereby, voltage transformation can be easily performed in the isolator 1.

(5) Example In this example, the isolator 1 of FIG. 1 was manufactured by the manufacturing method of FIGS. 8 and 9, and the characteristics of the isolator of the comparative example manufactured by the MEMS technology were compared.

  FIG. 12 is a plan view of an isolator of a comparative example. In the isolator 1 </ b> A of FIG. 12, the lead frame 300 includes a plurality of lead portions 310 and a support portion 320. The coil chip 100, the transmission chip 400, and the reception chip 500 are attached to the support unit 320. The coil chip 100 has an insulating layer 110. Coils C1, C2, C3, and C4 are formed on the insulating layer 100 by MEMS technology. The plurality of terminals of the coil chip 100 are connected to the terminals of the transmission chip 400 and the reception chip 500 by wires WL. Further, the terminals of the transmission chip 400 and the terminals of the reception chip 500 are connected to the lead part 310 and the support part 320 by wires WL.

  In the isolator 1A of the comparative example, the width of the lines constituting the coils C1, C2, C3, C4 is 2 μm, the interval between the lines constituting the coils C1, C2, C3, C4 is 5 μm, and the coils C1, C2 , C3, and C4 have a thickness (height) of 9 μm, and the insulating layer 110 has a thickness of 16 μm. Each coil C1, C2, C3, C4 has 14 turns. The outer diameter of each coil C1, C2, C3, C4 is 0.24 mm, and the inner diameter of each coil C1, C2, C3, C4 is 0.14 mm. The length of the line of each coil C1, C2, C3, C4 is 20 mm. The resistance value of each coil C1, C2, C3, C4 is 19.11Ω. The inductance of each coil C1, C2, C3, C4 is 105.5 nH.

  Moreover, the dimension L1 of the short side excluding the external terminal of the isolator 1A of the comparative example is 12.0 mm, and the dimension L2 of the long side is 11.0 mm.

  For the isolator 1 of the embodiment, the coils CA, CB, CC, CD, the base insulating layers 11 and 21, and the cover insulating layer 14 are set so that the inductances of the coils CA, CB, CC, and CD are substantially the same as those of the comparative example. , 15, 24, 25 dimensions were designed.

  In the isolator 1 of the embodiment, the width of the lines constituting the coils CA, CB, CC, CD is 67 μm, the interval between the lines constituting the coils CA, CB, CC, CD is 67 μm, and the coils CA, CB , CC, CD has a thickness of 12 μm, and each of the base insulating layers 11, 21 and the cover insulating layers 14, 15, 24, 25 has a thickness of 25 μm. The number of turns of each coil CA, CB, CC, CD is 5.8. The outer diameter of each coil CA, CB, CC, CD is 2.0 mm, and the inner diameter of each coil CA, CB, CC, CD is 0.8 mm. Each coil CA, CB, CC, CD has a line length of 50 mm. Each coil CA, CB, CC, CD has a resistance value of 1.07Ω. The inductance of each coil CA, CB, CC, CD is 105.6 nH.

  In addition, the short side dimension LA (see FIG. 2) excluding the external terminal 31 of the isolator 1 of the embodiment is 11.0 mm, and the long side dimension LB (see FIG. 2) is 10.0 mm.

  Table 1 shows dimensions and characteristics of each part of the isolator 1 of the example and the isolator 1A of the comparative example.

  Thus, in the isolator 1 of the embodiment, when the inductances of the coils CA, CB, CC, and CD are the same as the inductances of the coils C1, C2, C3, and C4 of the comparative example, the coils CA, CB, CC, and CD are used. Is significantly reduced to about 1/18 compared with the resistance values of the coils C1, C2, C3, and C4 of the comparative example.

  Therefore, in the isolator 1 according to the above embodiment, the inductance of the coils CA, CB, CC, CD is increased by the design of the dimensions of the coils CA, CB, CC, CD, and the resistance values of the coils CA, CB, CC, CD. Can be reduced.

(6) Correspondence between each component of claim and each part of embodiment The following describes an example of a correspondence between each component of the claim and each part of the embodiment. It is not limited.

  In the above embodiment, the circuit board 10 is an example of the first circuit board, the circuit board 20 is an example of the second circuit board, the coils CA and CB are examples of the first coil, and the coil CC , CD are examples of the second coil, the wiring pattern PB is an example of the first wiring pattern, the wiring pattern PD is an example of the second wiring pattern, and the solder bumps 16 are the first connection portions. For example, the solder bump 26 is an example of the second connection portion, the solder bump 17 is an example of the third connection portion, the solder bump 27 is an example of the fourth connection portion, and the lead frame 30 is It is an example of a lead frame, the transmitting chip 40 is an example of a first electronic component, and the receiving chip 50 is an example of a second electronic component.

  The coil CB is an example of a part of the first coil, the coil CA is an example of another part of the first coil, the coil CC is an example of a part of the second coil, and the coil CD is the first part. 2 is another example of the coil, the base insulating layer 11 is an example of the first insulating layer, the conductor layer 13 is an example of the first conductor layer, and the insulating cover layer 15 is the first covering. The base insulating layer 21 is an example of a second insulating layer, the conductor layer 22 is an example of a second conductor layer, the cover insulating layer 24 is an example of a second covering layer, The conductor layer 12 is an example of a third conductor layer, and the conductor layer 23 is an example of a fourth conductor layer.

  Further, the upper surface of the base insulating layer 11 is an example of one main surface of the first insulating layer, the lower surface of the base insulating layer 11 is an example of the other main surface of the first insulating layer, and the upper surface of the base insulating layer 21 Is one main surface of the second insulating layer, and the lower surface of the base insulating layer 21 is an example of the other main surface of the second insulating layer.

  As each constituent element in the claims, various other elements having configurations or functions described in the claims can be used.

  The present invention can be effectively used for various electric devices or electronic devices.

DESCRIPTION OF SYMBOLS 1 Isolator 10,20 Circuit board 11,21 Base insulating layer 12,13,22,23 Conductor layer 14,15,24,25 Cover insulating layer 16,17,26,27 Solder bump 18,28 Connection layer 30 Lead frame 31 External terminal 32 Lead part 34, 35 Support part 40 Transmitting chip 50 Receiving chip 60 Package 100 Circuit board for isolator PB, PD Wiring pattern CA, CB, CC, CD coil TA, TB, TC Terminal part TH, VH Through hole

Claims (8)

A circuit board for an isolator used for an isolator having first and second electronic components and a lead frame ,
A first circuit board;
A second circuit board,
The first circuit board is:
A first coil;
A first solder bump electrically connected to the first coil ;
A first wiring pattern;
A third solder bump electrically connected to the first wiring pattern ,
The second circuit board is:
A second coil;
A second solder bump electrically connected to the second coil ;
A second wiring pattern;
A fourth solder bump electrically connected to the second wiring pattern ;
In the first and second solder bumps , the first and second circuit boards are disposed so that the first coil and the second coil overlap with each other, and the first and second coils When the first and second electronic components are arranged so as to overlap with each other, provided at positions where they can contact the terminals of the first and second electronic components ,
It said third and fourth solder bumps, when the first and second electronic component on the lead frame is disposed, the isolator characterized by Rukoto provided contactable position to the lead frame Circuit board. The third solder bump has a height higher than the first solder bump in the thickness direction of the first electronic component, and the fourth solder bump has a thickness direction of the second electronic component. isolator circuit board according to claim 1, characterized in that it has a height greater than said second solder bump in. The first circuit board is:
A first insulating layer having one main surface and another main surface;
A first conductor layer provided on the other principal surface of the first insulating layer and constituting at least a part of the first coil;
A first covering layer formed on the other main surface of the first insulating layer so as to cover the first conductor layer,
The second circuit board is:
A second insulating layer having one main surface and another main surface;
A second conductor layer provided on the one principal surface of the second insulating layer and constituting at least a part of the second coil;
3. The circuit board for an isolator according to claim 2 , further comprising: a second covering layer formed on the one main surface of the second insulating layer so as to cover the second conductor layer. The first and second circuit boards are stacked such that the other main surface of the first insulating layer faces the one main surface of the second insulating layer,
The first and third solder bumps are provided on the first covering layer on the other main surface of the first insulating layer,
4. The circuit board for an isolator according to claim 3, wherein the second and fourth solder bumps are provided on the other main surface of the second insulating layer. The first circuit board is:
A third conductor layer provided on the one principal surface of the first insulating layer and constituting another part of the first coil;
A third covering layer formed on the one main surface of the first insulating layer so as to cover the third conductor layer;
The second circuit board is:
A fourth conductor layer provided on the other main surface of the second insulating layer and constituting another part of the second coil;
5. The circuit board for an isolator according to claim 4 , further comprising: a fourth covering layer formed on the other main surface of the second insulating layer so as to cover the fourth conductor layer. A circuit board for an isolator;
First and second electronic components ;
With a lead frame ,
The circuit board for the isolator is
A first circuit board;
A second circuit board,
The first circuit board is:
A first coil;
A first solder bump electrically connected to the first coil ;
A first wiring pattern;
A third solder bump electrically connected to the first wiring pattern ,
The second circuit board is:
A second coil;
A second solder bump electrically connected to the second coil ;
A second wiring pattern;
A fourth solder bump electrically connected to the second wiring pattern ;
The first and second circuit boards are arranged so that the first coil and the second coil of the circuit board for isolator overlap each other, and so as to overlap the first and second coils. The first and second electronic components are disposed, the first solder bump of the first circuit board is connected to a terminal of the first electronic component, and the second of the second circuit board Solder bumps are connected to the terminals of the second electronic component ,
Wherein said first and second electronic components are disposed on the lead frame, isolator said third and fourth solder bump and said Rukoto connected to the lead frame. A method for manufacturing a circuit board for an isolator used in an isolator having first and second electronic components and a lead frame ,
A first coil ; a first solder bump electrically connected to the first coil ; a first wiring pattern; and a third solder bump electrically connected to the first wiring pattern. Producing a first circuit board;
A second coil ; a second solder bump electrically connected to the second coil ; a second wiring pattern; and a fourth solder bump electrically connected to the second wiring pattern. A step of producing a second circuit board,
In the first and second solder bumps , the first and second circuit boards are disposed so that the first coil and the second coil overlap with each other, and the first and second coils When the first and second electronic components are arranged so as to overlap with each other, provided at positions where they can contact the terminals of the first and second electronic components ,
It said third and fourth solder bumps, when the first and second electronic component on the lead frame is disposed, the isolator characterized by Rukoto provided contactable position to the lead frame Circuit board manufacturing method. A first coil ; a first solder bump electrically connected to the first coil ; a first wiring pattern; and a third solder bump electrically connected to the first wiring pattern. Producing a first circuit board;
A second coil ; a second solder bump electrically connected to the second coil ; a second wiring pattern; and a fourth solder bump electrically connected to the second wiring pattern. Producing a second circuit board;
The first and second circuits are disposed so that the first coil and the second coil overlap with each other, and the first and second electrons are overlapped with the first and second coils. A component is disposed on the lead frame , the first and second solder bumps are connected to terminals of the first and second electronic components, respectively, and the third and fourth solder bumps are connected to the lead frame. The manufacturing method of the isolator characterized by including the process to perform.

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