JP5708883B2 - Electronic component built-in substrate and method for manufacturing electronic component built-in substrate - Google Patents

Description

  The present invention relates to an electronic component built-in substrate in which an electronic component mounted on a first main surface of a substrate is covered and sealed with an insulating sealing layer, and a method for manufacturing the electronic component built-in substrate.

  Conventionally, in order to achieve high-density mounting, an electronic component-embedded substrate seals a semiconductor element mounted on the main surface of the substrate, an electronic component such as a capacitor with a resin, and is opposite to the surface in contact with the resin substrate. A circuit pattern is also formed on the surface. The circuit pattern formed on the substrate and the circuit pattern formed on the surface opposite to the surface contacting the main surface of the resin substrate are electrically connected by forming vias or the like.

  In the electronic component built-in substrate, electrodes used for electrical connection with an external circuit are formed on the side surface of the substrate located between the main surface of the substrate and the surface facing the main surface. Here, the electrode formed on the side surface of the substrate is referred to as a side electrode. For example, the through hole formed in the substrate is filled with a metal material having solder wettability, and the side electrode is formed on the side surface of the substrate by cutting along a virtual line passing through the axial center of the through hole. There is a component-embedded substrate (see Patent Document 1).

  In addition, there is an electronic component built-in substrate in which circuit patterns formed in different layers in a multilayer substrate are electrically connected by conductive pins (see Patent Document 2). Patent Document 2 proposes a configuration in which conductive pins are used as vias for electrically connecting circuit patterns formed in different layers.

Japanese Patent No. 3541491 Special table 2009-528707 gazette

  However, since Patent Document 1 has a configuration in which the side electrode is formed on the side surface of the substrate, the height of the side electrode is limited by the thickness of the substrate. That is, the maximum height of the side electrode that can be formed was the thickness of the substrate. If the height of the side electrode is low, a solder fillet cannot be formed satisfactorily in soldering for electrical connection with an external circuit, and connection failure and insufficient bonding strength are likely to occur.

  If the thickness of the substrate is increased, the height of the side electrode can be increased, but the size of the electronic component built-in substrate is increased.

  Patent Document 2 is a configuration in which circuit patterns formed in different layers are electrically connected by conductive pins. Similarly to Patent Document 1, the above-described connection failure caused by the height of the side electrode Insufficient bonding strength cannot be suppressed.

  SUMMARY OF THE INVENTION An object of the present invention is to provide an electronic component built-in substrate capable of suppressing the occurrence of poor connection and insufficient bonding strength in electrical connection with an external circuit without enlarging the electronic component built-in substrate, and the electronic component built-in substrate. It is in providing the manufacturing method of.

  The electronic component built-in substrate of the present invention is configured as follows in order to solve the above-described problems and achieve the object.

  In the electronic component built-in substrate according to the present invention, the electronic component mounted on the first main surface of the substrate is covered and sealed with an insulating sealing layer. Further, the electronic component built-in substrate is erected by penetrating conductive pins longer than the thickness of the substrate. In the electronic component built-in substrate, the side surface located between the second main surface opposite to the first main surface of the substrate and the surface opposite to the surface in contact with the first main surface of the sealing layer The pin is exposed.

  Therefore, by using this pin as an electrode used for electrical connection with an external circuit (herein, this electrode is referred to as a side electrode), the height of the side electrode is not limited by the thickness of the substrate. Can be higher than the thickness of the substrate. Thereby, in the soldering which electrically connects with an external circuit, a solder fillet can be formed satisfactorily and it is possible to suppress the occurrence of poor connection and insufficient bonding strength.

  Moreover, you may provide the conductive layer which forms a circuit pattern in the surface opposite to the surface contact | abutted to the 1st main surface of a sealing layer. In this case, the circuit pattern formed on the substrate and the circuit pattern of the conductive layer are preferably electrically connected with pins.

  Thereby, the pin can be used as a via for electrically connecting the circuit pattern formed on the substrate and the circuit pattern of the conductive layer. Therefore, the step of forming a via can be eliminated.

  In addition, the circuit patterns formed on the first main surface and the second main surface of the substrate may be electrically connected with pins. Thereby, the process of forming the through hole for electrically connecting the circuit patterns formed on the first main surface and the second main surface of the substrate can be eliminated.

  Moreover, it is preferable to arrange | position a pin around the land which solders the electrode of the electronic component mounted in the 1st main surface of a board | substrate. In this way, the solder fillet can be satisfactorily formed also in the soldering for connecting the electrode of the electronic component to the land of the substrate.

  Further, the pin protrudes to the first main surface side where the electronic component is mounted on the first main surface of the substrate, and does not protrude to the second main surface side which is the opposite surface of the first main surface. It is preferable to stand upright. Thereby, the enlargement of the electronic component built-in substrate can also be suppressed.

Furthermore, the electronic component built-in substrate described above is
The electronic component is mounted on the first main surface of the substrate, and conductive pins longer than the thickness of the substrate are erected through the substrate, and then mounted on the first main surface of the substrate. an electronic component that abolish sealing covered with insulating sealing layer.

Then, the pin is cut in the axial direction, and the cut surface of the pin is opposite to the second main surface that is the opposite surface of the first main surface of the substrate and the surface that is in contact with the first main surface of the sealing layer. and the surface may be prepared by Rukoto exposed on the side surface located between the.

  According to the present invention, it is possible to suppress the occurrence of poor connection or insufficient bonding strength in electrical connection with an external circuit without increasing the size of the electronic component built-in substrate.

It is sectional drawing of an electronic component built-in board | substrate. It is a top view of an electronic component built-in substrate. It is a top view by the side of the 1st main surface which shows a part of board | substrate. It is a figure which shows the state which soldered the electronic component and the pin to the board | substrate. It is a figure which shows the state which mounted the mounted electronic component and the pin with the thermosetting resin. It is a figure which shows the state which affixed copper foil on the surface opposite to the surface contact | abutted to the 1st main surface of a thermosetting resin. It is a figure which shows the state which formed the copper foil affixed on the surface opposite to the surface contact | abutted to the 1st main surface of a thermosetting resin in the circuit pattern. It is a top view by the side of the mounting surface which shows a part of board | substrate concerning another example.

  Hereinafter, an electronic component built-in substrate according to an embodiment of the present invention will be described.

  FIG. 1 is a cross-sectional view of an electronic component built-in substrate. FIG. 2 is a plan view of the electronic component built-in substrate. The electronic component built-in substrate 1 has a configuration in which a substrate 2, a sealing layer 3, and a conductive layer 4 are laminated. In FIG. 2, illustration of the sealing layer 3 and the conductive layer 4 is omitted.

  The substrate 2 has a circuit pattern (not shown) formed on each of the first main surface and the second main surface opposite to the first main surface. In this embodiment, the first main surface is a mounting surface on which the electronic component 21 is mounted. The circuit pattern may be formed only on the first main surface of the substrate 2. In addition, the substrate 2 has lands 22 formed on the first main surface for connecting semiconductor elements and electrodes of electronic components 21 such as capacitors. In addition, the substrate 2 forms a through hole 23.

  The sealing layer 3 is made of an insulating resin and covers and seals the electronic component 21 mounted on the first main surface of the substrate 2. The electronic component 21 mounted on the first main surface of the substrate 2 is embedded with the sealing layer 3.

  The conductive layer 4 is a circuit pattern formed on the surface opposite to the surface in contact with the first main surface of the sealing layer 3. The conductive layer 4 is a circuit pattern formed of, for example, copper foil.

  The pins 5 (5a, 5b) electrically connect the circuit pattern formed on the substrate 2 and the conductive layer 4 (circuit pattern formed by the conductive layer 4). As shown in the figure, the pin 5 is longer than the thickness of the substrate 2, one end reaches the circuit pattern of the conductive layer 4, and the other end reaches the through hole 23 of the substrate 2. That is, the pin 5 has a length that passes through the substrate 2 and extends from the through hole 23 to the conductive layer 4. Note that the other end of the pin 5 is substantially the same height as the surface of the land 22 formed on the second main surface on the second main surface side of the substrate 2.

  Moreover, in this embodiment, the pin 5a is the electronic component built-in substrate 1 positioned between the second main surface of the substrate 2 and the surface opposite to the surface in contact with the first main surface of the sealing layer 3. It is exposed on the side. The pin 5b is not exposed on the side surface of the electronic component built-in substrate 1 located between the second main surface of the substrate 2 and the surface opposite to the surface in contact with the first main surface of the sealing layer 3. . The pin 5a is an electrode used for electrical connection with an external circuit (herein, this electrode is referred to as a side electrode). As will be described later, the pin 5 a is opposite to the surface in which the cut surface cut in the axial direction at substantially the center of the shaft core is in contact with the second main surface of the substrate 2 and the first main surface of the sealing layer 3. It is exposed to the side surface of the electronic component built-in substrate 1 located between the two surfaces.

  The pin 5 is a conductive metal having good solder wettability. For example, Cu, Ag, Ni—Cr plated Cu, and solder having a melting point higher than the reflow temperature (solder having a melting point (about 245 ° C.) that can withstand reflow of a general Pb-free solder). Moreover, the shape should just be a cylinder, a prism, T shape, etc. Furthermore, the pin 5 has a roughened outer surface in order to ensure sufficient adhesion strength with the resin.

  In the electronic component built-in substrate 1, as described above, the metal pins 5 a used for electrical connection with the external circuit as the side electrodes extend from the substrate 2 to the conductive layer 4. Further, the other end of the pin 5a is substantially the same height as the surface of the land 22 formed on the second main surface on the second main surface side of the substrate 2, and hardly protrudes. . Therefore, the electronic component built-in substrate 1 can increase the height of the side electrode without increasing the thickness of the substrate 2. As a result, the electronic component built-in substrate 1 can satisfactorily form a solder fillet in soldering for electrically connecting the side electrode (pin 5a) and the external circuit without increasing the size, resulting in poor connection and insufficient bonding strength. Can be suppressed.

  Since the pin 5a extends from the substrate 2 to the conductive layer 4 as described above, the pin 5a can be connected to an external circuit on the conductive layer 4 side as well as on the substrate 2 side. It is possible to improve versatility.

  The electronic component built-in substrate 1 passes through the pin 5 through a through hole 23 formed in the vicinity of the land 22 to which the terminal of the electronic component 21 mounted on the first main surface of the substrate 2 is connected. The land 22 and the through hole 23 are electrically connected by a circuit pattern. Therefore, when the terminals of the electronic component 21 are soldered to the lands 22, the solder fillet can be satisfactorily formed by the pins 5. That is, even when soldering the electronic component 21 mounted on the first main surface of the substrate 2, it is possible to suppress the occurrence of poor connection or insufficient bonding strength.

  Next, a process for manufacturing the electronic component built-in substrate 1 will be described. This step is a step of manufacturing a plurality of electronic component built-in substrates 1.

  FIG. 3 is a plan view of the first main surface side showing a part of the substrate. A region (individual region) is assigned to each substrate 2 for each individual electronic component built-in substrate 1. A rectangular area surrounded by a broken line shown in FIG. 3 is one piece area.

  The substrate 2 forms a circuit pattern (not shown) for each individual region. Further, the substrate 2 has a land 22 formed on the first main surface and a through hole 23. Some of the through holes 23 are formed over adjacent individual side regions, and some of the through holes 23 are formed in one individual side region. The through hole 23 is formed near the land 22 and is electrically connected to the land 22 by a circuit pattern.

  First, solder is applied to the first main surface of the substrate 2 shown in FIG. Thereafter, the electronic component 21 is placed at the mounting position on the first main surface of the substrate 2, and the pin 5 is passed through the through hole 23 and placed in a furnace for reflow. The pin 5 has the other end located on the second main surface side of the substrate 2 substantially the same height as the land 22 formed on the second main surface. By this reflow, the electronic component 21 and the pin 5 are soldered to the substrate 2, and the state shown in FIG. 4 is obtained. FIG. 4 is a cross-sectional view, and broken lines indicate division lines of the individual regions.

  As described above, since the through hole 23 is formed near the land 22, the solder fillet can be satisfactorily formed by the pins 5 when soldering the electronic component 21 and the land 22. Therefore, in the electrical connection between the electronic component 21 and the land 22, it is possible to suppress the occurrence of poor connection or insufficient connection strength.

  Next, the soldered electronic component 21 is molded with an insulating thermosetting resin on the first main surface of the substrate 2 (see FIG. 5). This thermosetting resin forms the sealing layer 3. The height at which the thermosetting resin is molded is a height that reaches one end of the pin 5 protruding to the first main surface side of the electronic component 21. The height at which one end of the pin 5 protrudes on the first main surface side of the electronic component 21 is a height at which the electronic component 21 mounted on the first main surface of the substrate 2 protrudes with respect to the first main surface. Higher than that.

Furthermore, the surface opposite to the surface that contacts the first main surface of the molded thermosetting resin is polished to remove excess thermosetting resin, and one end of the pin 5 is connected to the first main surface of the thermosetting resin. It is exposed on the surface opposite to the surface that contacts the surface.

  Copper foil is affixed on the surface opposite to the surface that contacts the first main surface of the thermosetting resin (see FIG. 6). At this time, the copper foil is attached so that the tip of the pin 5 exposed on the surface opposite to the surface contacting the first main surface of the thermosetting resin is in close contact, and the pin 5 and the copper foil are electrically connected. Connect to. This copper foil forms the conductive layer 4. Then, it is placed on a hot plate and the thermosetting resin is completely cured.

  Next, photolithography and etching are performed on the copper foil pasted on the surface that is in contact with the first main surface of the thermosetting resin that forms the sealing layer 3 to form a desired circuit pattern. (See FIG. 7).

  Since the circuit pattern formed on the substrate 2 and the circuit pattern of the conductive layer 4 are electrically connected by the pin 5, it is not necessary to form a via for electrically connecting these circuit patterns. That is, a step of forming a via for electrically connecting the circuit pattern formed on the substrate 2 and the circuit pattern of the conductive layer 4 is unnecessary.

  Finally, a cutting machine such as a diamond cutter cuts along the dividing line to obtain the electronic component built-in substrate 1 shown in FIG. At this time, about the pin 5 located on a division line, it cuts to an axial direction with the axial center. Therefore, the electronic component built-in substrate 1 cut into individual sides is on the side surface located between the second main surface of the substrate 2 and the surface opposite to the surface in contact with the first main surface of the sealing layer 3. The cut surface of the pin 5a is exposed. This exposed pin 5a can be used as a side electrode.

  In the above description, the through hole 23 is formed in the substrate 2. However, as shown in FIG. 8, the substrate 2 in which the through hole 23 is not formed may be used. Similarly to the substrate 2 shown in FIG. 3, the substrate 2 shown in FIG. 8 forms lands 22 and circuit patterns.

  When manufacturing the above-described electronic component built-in substrate 1 using the substrate 2 shown in FIG. 8, first, solder is applied to the first main surface of the substrate 2 shown in FIG. Then, pins 5 are driven into the substrate 2. The position where the pin 5 is driven is a position corresponding to the through hole 23 in the above-described example.

  Thereafter, the electronic component 21 is placed at the mounting position on the first main surface of the substrate 2 and placed in a furnace for reflow. Thereby, the electronic component 21 and the pin 5 are soldered to the board 2. And the process after the process which molds the thermosetting resin mentioned above is performed.

  In this manufacturing method, the process of forming the through hole 23 in the substrate 2 is not required, and the manufacturing cost of the electronic component built-in substrate 1 can be further reduced.

DESCRIPTION OF SYMBOLS 1 ... Electronic component built-in board 2 ... Board | substrate 3 ... Sealing layer 4 ... Conductive layer 5 (5a, 5b) ... Pin 21 ... Electronic component 22 ... Land 23 ... Through hole

Claims (7)

A substrate having a first main surface and a second main surface opposite to the first main surface, and a circuit pattern provided on the second main surface ;
An electronic component mounted on the first main surface of the substrate ;
Conductive pins standing through the substrate;
An insulating sealing layer in which the electronic component and the pin are molded and sealed with a resin ;
A conductive layer formed on a surface opposite to the surface contacting the first main surface of the sealing layer and electrically connected to the circuit pattern by the pins;
To have a, electronic component built-in substrate.   The pin has a cut surface exposed on a side surface located between the second main surface of the substrate and a surface opposite to the surface in contact with the first main surface of the sealing layer. The electronic component built-in substrate according to claim 1, comprising: The substrate has a circuit pattern formed on the first main surface and the second main surface,
The said pin electrically connects the circuit pattern formed in the said 1st main surface of the said board | substrate, and the circuit pattern formed in the said 2nd main surface. The electronic component built-in substrate described in 1.   4. The electronic component built-in substrate according to claim 1, wherein the pin is disposed around a land to which an electrode of the electronic component to be mounted on the first main surface of the substrate is soldered. 5.   5. The electronic component built-in substrate according to claim 1, wherein the pin protrudes toward the first main surface of the substrate. A substrate having a first main surface and a second main surface opposite to the first main surface and having a circuit pattern provided on the second main surface is prepared, and an electronic component is disposed on the first main surface. Mounting on the surface,
A step of standing a conductive pin through the substrate;
The electronic component mounted on the first main surface of the substrate and the pin erected on the substrate are molded and sealed with resin to form an insulating sealing layer, and one end of the pin is sealed Exposing the surface opposite to the surface that contacts the first main surface of the stop layer ;
Forming a conductive layer on a surface opposite to the surface that contacts the first main surface of the sealing layer,
The method for manufacturing an electronic component built-in substrate, wherein the conductive layer and a circuit pattern formed on the second main surface of the substrate are connected by the pin.   The laminate of the substrate and the sealing layer is cut, and a cut surface extending in the axial direction of the pin is brought into contact with the second main surface of the substrate and the first main surface of the sealing layer. The manufacturing method of the electronic component built-in substrate according to claim 6, further comprising a step of exposing a side surface located between the surface opposite to the surface.