JP5708190B2 - High frequency amplifier circuit, wireless device - Google Patents

Description

  The present invention relates to a high frequency amplifier circuit that amplifies a high frequency signal.

  Conventionally, a wireless communication terminal such as a mobile phone is provided with a power amplifier that amplifies a high-frequency transmission signal. Such portable wireless communication terminals are required to operate with low current consumption in order to save power in a power amplifier, that is, a high-frequency amplifier circuit. However, operation with low current consumption tends to cause distortion.

  For this reason, a low-output mode (low-current-consumption mode) and a high-output mode (normal current-consumption mode) are provided in a high-frequency amplifier circuit and are switched depending on the situation.

  As one of them, Non-Patent Document 1 describes a high-frequency amplifier circuit as shown in FIG. FIG. 1 is a circuit diagram of a conventional high-frequency amplifier circuit 100P.

  The conventional high frequency amplifier circuit 100P includes an amplifying transistor 10. The base of the amplifying transistor 10 is connected to the high frequency signal input terminal 101 via the input matching circuit 30. The collector of the amplifying transistor 10 is connected to the high frequency signal output terminal 102 via the output matching circuit 40.

  A drive voltage Vcc is applied to the collector of the amplifying transistor 10 via the choke coil 60.

  The base of the amplifying transistor 10 is connected to the emitter of the emitter follower transistor 20 through a ballast resistor element 52 for preventing thermal resistance. The same drive voltage Vcc as that of the collector of the amplifying transistor 10 is applied to the collector of the emitter follower transistor 20, and the mode control voltage Vmode is applied to the base of the emitter follower transistor 20 via the resistance element 51. By changing the mode control voltage Vmode, the collector current Icc of the amplifying transistor 10 is controlled to switch between the low output mode and the high output mode.

Daehyun Kang, Daekyu Yu, Kyoungjoon Min, Kichon Han, Jinsung Choi, IEEE TRANSACIOTNS ONMICROWAVE THEORY AND TECHNIQUES, VOL.56, NO.1, JANUARY 2008, Page77-87

  The carrier signal amplified by the high-frequency amplifier circuit used for wireless communication includes Error Vector Magnitude (EVM) as an index for maintaining the communication quality of the carrier signal. In order to keep the communication quality good, in the high frequency amplifier circuit, the carrier signal amplified by the high frequency amplifier circuit is required to satisfy a certain standard of EVM characteristics.

  On the other hand, in a high-frequency amplifier circuit used in wireless communication, it is required to reduce the power consumption of the circuit and lengthen the driving time of the wireless communication device on which the high-frequency amplifier circuit is mounted. However, if the current consumption is suppressed in the high-frequency amplifier circuit that switches between the high output mode and the low output mode, the gain at the time of low output decreases and the gain increases as the output power increases (as the output increases). So-called gain expansion is likely to occur, and the EVM characteristics are likely to deteriorate. In general, it is known that in order to realize a good EVM characteristic, it is necessary to reduce the gain change amount when the output power is changed, that is, the distortion of the AM-AM characteristic.

  2 is a graph showing the output characteristics of the conventional high-frequency amplifier circuit 100P. FIG. 2A shows the relationship between the collector current Icc of the amplifying transistor and the output power Pout, and FIG. 2B shows the high-frequency amplifier circuit 100P. The relationship between the gain and the output power Pout is shown.

  As shown in FIG. 2B, even in the output power range where the gain hardly changes even if the output power Pout changes in the high output mode, in the low output mode, a nonlinear region in the static characteristics of the transistor is obtained. Since this is used, so-called gain expansion occurs in which the gain increases as the output power Pout increases. Specifically, in the example of FIG. 2B, a gain difference of about 0.9 [dB] occurs between 10 [dBm] and 25 [dBm]. When such a gain difference occurs, communication quality deteriorates.

  An object of the present invention is to realize a high-frequency amplifier circuit that hardly causes a gain difference even when the output power is changed in the low output mode.

The present invention relates to a high frequency amplifier circuit that amplifies a high frequency signal. This high-frequency amplifier circuit includes an amplifying transistor, an emitter-follower transistor, and collector voltage varying means. The amplifying transistor amplifies the high-frequency signal input from the base and outputs it from the collector. The emitter follower transistor has an emitter connected to the base of the amplifying transistor, and constitutes an emitter follower circuit. The collector voltage varying means changes the collector voltage of the emitter follower transistor between the low output mode and the high output mode.
The collector voltage varying means includes a plurality of voltage application circuits that apply different voltages to the collectors of the emitter follower transistors.
The plurality of voltage application circuits have the following configuration. A collector of the emitter follower transistor is provided with a voltage variable type mode control power source connected via a first diode. Connected to the collector of the emitter follower transistor via a second diode, lower than the voltage in the high output mode of the voltage variable mode control power supply, and lower than the voltage in the low output mode of the voltage variable mode control power supply A reference power supply that outputs high DC voltage is provided.

In this configuration, by controlling the collector voltage of the emitter follower transistor for each mode, the occurrence of gain expansion in the low output mode is suppressed without substantially changing the output characteristics in the high output mode. For example, as shown in FIG. 4 and the like described later, the gain flatness in the low output mode is improved.
In this configuration, the collector voltage varying means is realized by a plurality of voltage application circuits, which makes it possible to control the collector voltage to a desired value.
This configuration shows a specific example of a plurality of voltage application circuits in the collector voltage varying means. By adopting such a configuration, the voltage supply circuit on the first diode side and the voltage supply circuit on the second diode side are formed separately, so that the voltage application in the high output mode and the voltage supply circuit in the low output mode respectively. In the case of assigning the voltage application, it is possible to design the circuit individually. As a result, the degree of freedom in designing the voltage supply circuit to the mode-specific emitter follower transistor is improved. This makes it possible to control the collector voltage to a more desired value for each mode.

  In the high frequency amplifier circuit of the present invention, the collector voltage varying means is preferably a voltage variable mode control power supply connected to the collector of the emitter follower transistor via a constant resistance element.

  In this configuration, the collector voltage varying means is composed only of a voltage variable mode control power supply and a constant resistance element. With this configuration, the collector voltage varying means can be configured simply.

  In the high-frequency amplifier circuit according to the present invention, the collector voltage varying means is a fixed voltage mode control power source or a variable voltage mode control power source connected to the collector of the emitter follower transistor via a variable resistance element. Is preferable as an example.

  In this configuration, the collector voltage varying means is composed of a variable resistance element and a fixed voltage mode control power supply or a combination of a variable resistance element and a voltage variable mode control power supply. Even in this configuration, the collector voltage varying means can be configured simply.

  In the high-frequency amplifier circuit of the present invention, the collector voltage varying means preferably includes a plurality of voltage application circuits that apply different voltages to the collectors of the emitter follower transistors.

  In this configuration, the collector voltage varying means is realized by a plurality of voltage application circuits, which makes it possible to control the collector voltage to a desired value.

  Moreover, in the high frequency amplifier circuit of this invention, it is preferable as an example that the plurality of voltage application circuits have the following configuration. A collector of the emitter follower transistor is provided with a voltage variable type mode control power source connected via a first diode. Connected to the collector of the emitter follower transistor via a second diode, lower than the voltage in the high output mode of the voltage variable mode control power supply, and lower than the voltage in the low output mode of the voltage variable mode control power supply A reference power supply that outputs high DC voltage is provided.

  This configuration shows a specific example of a plurality of voltage application circuits in the collector voltage varying means. By adopting such a configuration, the voltage supply circuit on the first diode side and the voltage supply circuit on the second diode side are formed separately, so that the voltage application in the high output mode and the voltage supply circuit in the low output mode respectively. In the case of assigning the voltage application, it is possible to design the circuit individually. As a result, the degree of freedom in designing the voltage supply circuit to the mode-specific emitter follower transistor is improved. This makes it possible to control the collector voltage to a more desired value for each mode.

  Moreover, in the high frequency amplifier circuit of this invention, it is preferable as an example that the plurality of voltage application circuits have the following configuration. A first switch element and a second switch element are connected in parallel between the collector of the emitter follower transistor and the drive voltage application terminal of the amplifying transistor. A voltage variable mode control power supply connected to the control terminal of the first switch element is provided. Connected to the control terminal of the second switch element, and outputs a DC voltage lower than the voltage in the high output mode of the voltage variable mode control power supply and higher than the voltage in the low output mode of the voltage variable mode control power supply. A reference power supply is provided.

  In this configuration, a circuit configuration is shown in the case where the supply voltage source to the collector of the emitter follower transistor is common to both modes and is also used as the drive voltage of the amplifying transistor. In this case, the circuit configuration between the drive voltage source and the collector of the emitter follower transistor is switched between the high output mode and the low output mode using the first and second switches. Even if the drive power supply for the emitter follower transistor and the amplifying transistor is shared as in this configuration, the collector voltage can be controlled to a desired value for each mode.

  In the high frequency amplifier circuit of the present invention, the following configuration is more preferable. A bias control circuit is connected to the base of the emitter follower transistor and determines the base bias of the emitter follower transistor. The variable voltage mode control power supply is also connected to the bias control circuit. The bias control circuit determines a voltage to be applied to the base of the emitter follower transistor from the voltage of the bias power source, which is a constant voltage, and the voltage of the voltage control mode control power source.

  In this configuration, the bias voltage of the emitter follower transistor can be made variable for each mode. This makes it possible to set more detailed characteristics including the amount of current consumption in each mode, making it easier to realize desired characteristics.

  Moreover, in the high frequency amplifier circuit of this invention, it is preferable as an example that the plurality of voltage application circuits have the following configuration. A first resistance element connected between the collector of the emitter follower transistor and the drive voltage application terminal of the amplifying transistor; A switch element connected in parallel to the first resistance element is provided. A voltage variable mode control power supply connected to the control terminal of the switch element is provided.

  In this configuration, a circuit configuration is shown in the case where the supply voltage source to the collector of the emitter follower transistor is common to both modes and is also used as the drive voltage of the amplifying transistor. The first switch is used to switch the circuit configuration between the drive voltage source and the collector of the emitter follower transistor between the high output mode and the low output mode. In this configuration, gain compression occurs in which the gain decreases as the output power increases. Therefore, conventional gain expansion can be prevented.

  Moreover, in the high frequency amplifier circuit of this invention, it is preferable as an example that the plurality of voltage application circuits have the following configuration. A first resistance element connected between the collector of the emitter follower transistor and the drive voltage application terminal of the amplifying transistor; A voltage variable mode control power supply connected to the collector of the emitter follower transistor via a first diode is provided.

  In this configuration, the driving voltage of one mode of the emitter follower transistor is supplied from the driving voltage source of the amplifying transistor, and the driving voltage of the other mode is configured by another circuit. Even in this configuration, gain compression occurs. Therefore, conventional gain expansion can be prevented.

  The high frequency amplifier circuit of the present invention preferably has the following configuration as an example. A first high-frequency amplification element including the above-described gain compression type high-frequency amplification circuit is provided. A second amplifying transistor for amplifying a high-frequency signal input from the base and outputting from the collector; a second emitter-follower transistor having an emitter connected to the base of the amplifying transistor; and a collector of the second emitter-follower transistor And a drive voltage application terminal connected to the collector of the second amplification transistor. A first high frequency amplifier circuit and a second high frequency amplifier circuit are connected in series.

  In this configuration, a high-frequency amplifier circuit that generates gain compression and a high-frequency amplifier circuit that generates gain expansion are connected in series, so that the overall high-frequency amplifier circuit has a substantially constant gain regardless of changes in output voltage. become.

  Moreover, in this invention, it is preferable to provide the following structure as a radio | wireless apparatus. A high-frequency amplifier circuit having almost no gain change is provided. The high frequency amplifier circuit is used as a power amplifier for a high frequency transmission signal.

  In this configuration, a radio apparatus having excellent communication characteristics can be realized by using a high-frequency amplifier circuit having a substantially constant gain without being affected by the output voltage as described above.

  According to the present invention, in a high-frequency amplifier circuit having a high output mode and a low output mode, even when the output power is changed in the low output mode, a difference in gain hardly occurs and an excellent amplification characteristic can be realized. As a result, a wireless communication device with excellent communication quality can be realized.

It is a circuit diagram of the conventional high frequency amplifier circuit 100P. It is a graph which shows the output characteristic of the conventional high frequency amplifier circuit 100P. 1 is a circuit diagram of a high-frequency amplifier circuit 100A according to a first embodiment. It is a graph which shows the output characteristic of 100 A of high frequency amplifier circuits which concern on 1st Embodiment. It is a circuit diagram of the high frequency amplifier circuit 100B which concerns on 2nd Embodiment. It is a graph which shows the output characteristic of the high frequency amplifier circuit 100B which concerns on 2nd Embodiment. It is a circuit diagram of high frequency amplifier circuit 100C concerning a 3rd embodiment. It is a graph which shows the output characteristic of the high frequency amplifier circuit 100C which concerns on 4th Embodiment. It is a circuit diagram of high frequency amplifier circuit 100D concerning a 4th embodiment. It is a graph which shows the output characteristic of high frequency amplifier circuit 100D concerning a 4th embodiment. It is a circuit diagram of the high frequency amplifier circuit 100E which concerns on 4th Embodiment. It is a graph which shows the output characteristic of the high frequency amplifier circuit 100E which concerns on 4th Embodiment. It is a circuit diagram of power amplifier 110 concerning a 4th embodiment. FIG. 10 is a circuit diagram of a high frequency amplifier circuit 100F according to a fifth embodiment. It is a graph which shows the output characteristic of the high frequency amplifier circuit 100F which concerns on 5th Embodiment. It is a circuit diagram of the high frequency amplifier circuit 100G which concerns on 6th Embodiment. It is a graph which shows the output characteristic of the high frequency amplifier circuit 100G which concerns on 6th Embodiment.

  A high-frequency amplifier circuit according to a first embodiment of the present invention will be described with reference to the drawings. FIG. 3 is a circuit diagram of the high-frequency amplifier circuit 100A according to the present embodiment. 4 is a graph showing the output characteristics of the high-frequency amplifier circuit 100A. FIG. 4A shows the relationship between the collector current Icc of the amplifying transistor and the output power Pout, and FIG. 4B shows the gain of the high-frequency amplifier circuit 100A. And the output power Pout.

(Circuit configuration)
The high frequency amplifier circuit 100A includes an amplifying transistor 10 of npn type. The base of the amplifying transistor 10 is connected to the high frequency signal input terminal 101 via the input matching circuit 30. The collector of the amplifying transistor 10 is connected to the high frequency signal output terminal 102 via the output matching circuit 40. The collector of the amplifying transistor 10 is connected to a driving power source via a choke coil 60 and is applied with a driving voltage Vcc. The connection point between the drive power supply and the choke coil 60 is the “drive voltage application terminal” of the present invention.

  The base of the amplifying transistor 10 is connected to the emitter of the emitter follower transistor 20 through a ballast resistor element 52 for preventing thermal resistance. A bias power source is connected to the base of the emitter follower transistor 20 via a resistance element 51. With this configuration, the bias voltage Vctr is applied to the base of the emitter follower transistor 20. The bias voltage Vctr is, for example, 2.610 [V].

  A mode control power supply is connected to the collector of the emitter follower transistor 20 via a resistance element 53. The resistance element 53 is a resistance element having a fixed resistance value, and has a resistance value of, for example, about 50Ω. The mode control power source is a variable voltage type and generates a DC mode control voltage Vmode. The mode control power supply generates a relatively low voltage (for example, 1.3 [V]) in the low output mode, and generates a relatively high voltage (for example, 3.3 [V]) in the high output mode. .

(Operation)
In the high output mode, a high mode control voltage Vmode (H) is applied from the mode control power supply to the collector of the emitter follower transistor 20 via the resistance element 53. Thereby, in the high output mode, the collector voltage of the emitter follower transistor 20 is increased.

  In the low output mode, a mode control voltage Vmode (L), which is a low voltage, is applied from the mode control power supply to the collector of the emitter follower transistor 20 via the resistance element 53. Thereby, in the low output mode, the collector voltage of the emitter follower transistor 20 is lowered.

  By performing such voltage control of the mode control voltage Vmode, as shown in FIG. 4, the gain expansion in the low output mode without impairing the gain flatness (flatness) in the high output mode. Can be suppressed and the flatness of the gain can be improved. Specifically, in the case of FIG. 4, it can be suppressed to a gain difference of about 0.4 [dB] between 10 [dBm] and 25 [dBm].

  This is because, in the circuit of this embodiment, the collector voltage of the emitter follower is kept low in the low output mode, so the base bias at the time of high output in the low output mode of the amplifying transistor is suppressed, and at the time of the high output This is because an increase in the collector current of the amplifying transistor is suppressed.

  As described above, by using the configuration of the present embodiment, AM-AM distortion can be suppressed even in the low output mode similarly to the high output mode, and excellent for high frequency signals for wireless communication. A high-frequency amplifier circuit having amplification characteristics can be realized.

  By using this high-frequency amplifier circuit as a power amplifier for transmission signals, a wireless device having excellent communication characteristics can be realized.

  In the above description, an example in which a resistance element having a fixed resistance value and a variable voltage type mode control power supply are combined has been shown, but a combination of a variable resistance element and a fixed voltage type mode control power supply may be used, A variable resistance element and a variable voltage type mode control power supply may be used in combination.

  Next, a high frequency amplifier circuit according to a second embodiment will be described with reference to the drawings. FIG. 5 is a circuit diagram of the high-frequency amplifier circuit 100B according to this embodiment. 6 is a graph showing the output characteristics of the high frequency amplifier circuit 100B. FIG. 6A shows the relationship between the collector current Icc of the amplifying transistor and the output power Pout, and FIG. 6B shows the gain of the high frequency amplifier circuit 100B. And the output power Pout.

(Circuit configuration)
The high-frequency amplifier circuit 100B of this embodiment is different from the high-frequency amplifier circuit 100A shown in the first embodiment in the circuit configuration for supplying voltage to the collector of the emitter follower transistor 20, and the other configurations are the same as those in the first embodiment. This is the same as the high-frequency amplifier circuit 100A of the embodiment. Therefore, only different parts will be described.

  The collector of the emitter follower transistor 20 is grounded via a bypass capacitor 70.

  The collector of the emitter follower transistor 20 is connected to the cathode of the first diode 21A. The anode of the first diode 21A is connected to the mode control power supply. As the first diode 21A, a diode element may be used. However, as shown in FIG. 5, an npn transistor whose collector and base are short-circuited may be used. In this case, the base corresponds to the anode and the emitter corresponds to the cathode.

  The mode control power source is a variable voltage type and generates a DC mode control voltage Vmode. The mode voltage Vmode is a relatively low voltage (for example, 0.0 [V]) in the low output mode (no voltage applied), and a relatively high voltage (for example, 3.3 [V] in the high output mode). ).

  The cathode of the second diode 21 </ b> B is connected to the collector of the emitter follower transistor 20 via the resistance element 54. The resistance element 54 can be omitted. The anode of the second diode 21B is connected to the reference power supply. Note that the second diode 21B may also be formed of an npn-type transistor, like the first diode 21A.

  The reference power supply generates a reference voltage Vref having a constant value. The reference voltage Vref is, for example, 2.7 [V].

(Operation)
In the high output mode, the high voltage mode control voltage Vmode (H) is higher than the reference voltage Vref. Therefore, based transistors comprising configuring the first diode 21A from the mode control voltage Vmode (H) - voltage drops by emitter voltage is applied to the collector of the emitter follower transistor 20. As a result, in the high output mode, the collector voltage of the emitter follower transistor 20 becomes high, and the collector side becomes low impedance because the resistance element 54 is not connected.

In the low output mode, the low-voltage mode control voltage Vmode (L) is lower than the reference voltage Vref. Thus, mode control voltage Vmode (H) based transistors comprising configuring the second diode 21B from the reference voltage Vref of a voltage lower than the high-power mode - through a voltage drops by emitter voltage resistive element 54, The voltage is applied to the collector of the emitter follower transistor 20. Thereby, in the low output mode, the collector voltage of the emitter follower transistor 20 becomes low, and the collector side becomes high impedance by the resistance value of the resistance element 54.

  With such a configuration, characteristics as shown in FIG. 6 can be obtained. That is, the gain flatness in the low output mode can be further improved. For example, specifically, as shown in FIG. 6B, it can be suppressed to a gain difference of about 0.3 [dB] between 10 [dBm] and 20 [dBm].

  This is because the circuit of this embodiment not only suppresses the collector voltage of the emitter follower in the low output mode, but also increases the resistance value of the path for supplying the current at the collector terminal of the emitter follower, thereby reducing the voltage in the low output mode. This is because an increase in current at high output can be further suppressed.

  Furthermore, in this embodiment, the voltage supply circuit to the collector of the emitter follower transistor 20 is a separate circuit in the low output mode and the high output mode. Therefore, the supply voltage in each mode can be set individually, and the design for applying a desired collector voltage to the emitter follower transistor 20 can be facilitated. Thereby, AM-AM distortion can be suppressed more easily.

  Next, a high frequency amplifier circuit according to a third embodiment will be described with reference to the drawings. FIG. 7 is a circuit diagram of the high-frequency amplifier circuit 100C according to the present embodiment. FIG. 8 is a graph showing the output characteristics of the high-frequency amplifier circuit 100C. FIG. 8A shows the relationship between the collector current Icc of the amplifying transistor and the output power Pout, and FIG. 8B shows the gain of the high-frequency amplifier circuit 100C. And the output power Pout.

(Circuit configuration)
The high-frequency amplifier circuit 100C of this embodiment differs from the high-frequency amplifier circuit 100A shown in the first embodiment in the circuit configuration for supplying voltage to the collector of the emitter follower transistor 20, and the other configurations are the same as those in the first embodiment. This is the same as the high-frequency amplifier circuit 100A of the embodiment. Therefore, only different parts will be described.

  The collector of the emitter follower transistor 20 is grounded via a bypass capacitor 70.

  The emitter of the emitter-follower transistor 20 is connected to the emitter of an npn-type transistor 22A that is a first switch element.

  The collector of the transistor 22A is connected to the drive power supply and applied with the drive voltage Vcc. The base of the transistor 22A is connected to a mode control power supply via a resistance element 55A.

  The mode control power source is a variable voltage type and generates a DC mode control voltage Vmode. The mode voltage Vmode is a relatively low voltage (for example, 0.0 [V]) in the low output mode (no voltage applied), and a relatively high voltage (for example, 3.3 [V] in the high output mode). ).

  The emitter of the emitter follower transistor 20 is connected to the emitter of an npn-type transistor 22B, which is a second switch element, via a resistance element.

  The collector of the transistor 22B is connected to the drive power supply and applied with the drive voltage Vcc. The base of the transistor 22B is connected to a reference power supply via a resistance element 55B.

  The reference power supply generates a reference voltage Vref having a constant value. The reference voltage Vref is, for example, 2.7 [V].

(Operation)
In the high output mode, the transistor 22A is turned on by the high mode control voltage Vmode (H). Therefore, the drive voltage Vcc is applied to the collector of the emitter follower transistor 20 via the transistor 22A. As a result, in the high output mode, the collector voltage of the emitter follower transistor 20 is relatively higher than in the low output mode, and the collector side has a low impedance because the resistance element 54 is not connected.

  In the low output mode, the transistor 22A is turned off by the low-voltage mode control voltage Vmode (L). Therefore, the drive voltage Vcc is applied to the collector of the emitter follower transistor 20 via the transistor 22B and the resistance element 54.

  Here, in the low output mode, the reference voltage Vref serving as the base voltage of the transistor 22A is lower than the mode control voltage Vmode (H) in the high output mode, and the collector of the emitter follower transistor 20 is connected via the resistance element 54. The drive voltage Vcc is applied to Therefore, in the low output mode, the collector voltage of the emitter follower transistor 20 is relatively lower than in the high output mode, and the collector side has a high impedance corresponding to the resistance value of the resistance element 54.

  By adopting such a configuration, as shown in FIG. 8, the same characteristics as in FIG. 6 of the second embodiment described above can be obtained. That is, as in the second embodiment described above, a high-frequency amplifier circuit with excellent amplification characteristics can be realized.

  Next, a high frequency amplifier circuit according to a fourth embodiment will be described with reference to the drawings. FIG. 9 is a circuit diagram of the high-frequency amplifier circuit 100D according to the present embodiment. FIG. 10 is a graph showing the output characteristics of the high-frequency amplifier circuit 100D. FIG. 10A shows the relationship between the collector current Icc of the amplifying transistor and the output power Pout, and FIG. 10B shows the high-frequency amplifier circuit 100C. The relationship between gain and output power Pout is shown.

(Circuit configuration)
The high-frequency amplifier circuit 100D of this embodiment is different from the high-frequency amplifier circuit 100C shown in the third embodiment in the circuit configuration for supplying the base bias of the emitter follower transistor 20, and the other configurations are the same as those in the third embodiment. This is the same as the high-frequency amplifier circuit 100C of the embodiment. Therefore, only different parts will be described.

  The base of the emitter follower transistor 20 is connected to the bias control circuit 200 via the resistance element 51. A mode control power source and a bias power source are connected to the bias control circuit 200.

  The bias control circuit 200 outputs a mode variable bias voltage Va using the mode control voltage Vmode from the mode control power supply and the bias voltage Vctr from the bias power supply, and the emitter follower transistor 20 via the resistance element 51. Apply to base.

  For example, specifically, in the high output mode, the bias control circuit 200 uses a mode control voltage Vmode (H) of 3.3 [V] and a bias voltage of 2.610 [V] to 2.610 [V]. Mode variable bias voltage Va (H) is generated and output. In the low output mode, the bias control circuit 200 has a mode variable bias voltage Va (2.525 [V]) from a mode control voltage Vmode (L) of 0.0 [V] and a bias voltage of 2.610 [V]. L) is generated and output.

  Thus, a bias voltage Va (H) having a relatively high voltage value is applied to the base of the emitter follower transistor 20 in the high output mode, and a bias voltage Va (L) having a relatively low voltage value in the low output mode. ) Is applied.

(Operation)
In the high output mode, the transistor 22A is turned on by the high mode control voltage Vmode (H). Therefore, the drive voltage Vcc is applied to the collector of the emitter follower transistor 20 via the transistor 22A. As a result, in the high output mode, the collector voltage of the emitter follower transistor 20 is relatively higher than in the low output mode, and the collector side has a low impedance because the resistance element 54 is not connected.

  Further, the base bias of the emitter follower transistor 20 is increased, and more base current can flow to the emitter follower transistor 20. For this reason, the effect of increasing the base bias of the amplifying transistor 10 becomes higher.

  In the low output mode, the transistor 22A is turned off by the low-voltage mode control voltage Vmode (L). Therefore, the drive voltage Vcc is applied to the collector of the emitter follower transistor 20 via the transistor 22B and the resistance element 54.

  Here, in the low output mode, the reference voltage Vref serving as the base voltage of the transistor 22B is lower than the mode control voltage Vmode (H) in the high output mode, and the collector of the emitter follower transistor 20 is connected via the resistance element 54. The drive voltage Vcc is applied to Therefore, in the low output mode, the collector voltage of the emitter follower transistor 20 is relatively lower than in the high output mode, and the collector side has a high impedance corresponding to the resistance value of the resistance element 54.

  Further, the base bias of the emitter follower transistor 20 is lowered, and accordingly, the base bias of the amplifying transistor 10 is also lowered. For this reason, the collector current Icc of the amplifying transistor 10 can be reduced.

  That is, as shown in FIG. 10, it is possible to suppress current consumption in the low output mode and improve gain flatness in the low output mode. As a result, it is possible to realize a high-frequency amplifier circuit having an amplification characteristic that consumes less power than the above-described embodiments and has excellent characteristics.

  Further, since the collector voltage and the base voltage of the emitter follower transistor 20 can be adjusted, the effect of the emitter follower on the amplification transistor 10 can be set in more detail. As a result, a high-frequency amplifier circuit with more desired characteristics can be realized.

  Next, a high frequency amplifier circuit according to a fifth embodiment will be described with reference to the drawings. FIG. 11 is a circuit diagram of a high-frequency amplifier circuit 100E according to this embodiment. 12 is a graph showing the output characteristics of the high-frequency amplifier circuit 100E. FIG. 12A shows the relationship between the collector current Icc of the amplifying transistor and the output power Pout, and FIG. 12B shows the gain of the high-frequency amplifier circuit 100E. And the output power Pout.

(Circuit configuration)
The high-frequency amplifier circuit 100E of this embodiment differs from the high-frequency amplifier circuit 100A shown in the first embodiment in the circuit configuration for supplying voltage to the collector of the emitter follower transistor 20, and the other configurations are the same as those in the first embodiment. This is the same as the high-frequency amplifier circuit 100A of the embodiment. Therefore, only different parts will be described.

  The collector of the emitter follower transistor 20 is grounded via a bypass capacitor 70.

  The collector of the emitter follower transistor 20 is connected to a drive power supply via a resistance element 56A. A series circuit of an FET 80 serving as a switch element and a resistance element 56B is connected in parallel to the resistance element 56A. The resistance value of the resistance element 56A is set larger than the resistance value of the resistance element 56B. For example, the resistance element 56A is set to 10 k [Ω], and the resistance element 56B is set to 10 [Ω].

  The gate of the FET 80 is connected to the mode control power supply via the resistance element 56C. The mode control power source is a variable voltage type and generates a DC mode control voltage Vmode. The mode voltage Vmode is a relatively low voltage (for example, 0.0 [V]) in the low output mode (no voltage application), and a relatively high voltage (for example, 2.0 [V] in the high output mode). ).

(Operation)
In the high output mode, a high voltage mode control voltage Vmode (H) is applied to the gate of the FET 80, and the FET 80 is turned on. Here, the resistance value of the resistance element 56B connected in series to the FET 80 is sufficiently smaller than that of the resistance element 56A. Therefore, in the high output mode, the drive voltage Vcc is applied to the collector of the emitter follower transistor 20 via the resistance element 56B and the source and drain of the FET 80. Since the resistance value of the resistance element 56B is small and the resistance value between the source and the drain of the FET 80 is also low, the collector voltage becomes a high voltage value close to the drive voltage Vcc. As a result, the collector voltage of the emitter follower transistor 20 becomes high, and the resistance value of the resistance element 56B is smaller than the resistance value of the resistance element 56A, so that the collector side becomes low impedance.

  In the low output mode, a low voltage mode control voltage Vmode (L) is applied to the gate of the FET 80, and the FET 80 is turned off. For this reason, the series circuit of the FET 80 and the resistance element 56B is disconnected from the circuit connecting the drive power supply and the collector of the emitter follower transistor 20 (infinite impedance state).

  Therefore, the drive voltage Vcc is applied to the collector of the emitter follower transistor 20 via the resistance element 56A. Since the resistance value of the resistance element 56A is as high as kilo order, the collector voltage is significantly lower than the drive voltage Vcc. As a result, in the low output mode, the collector voltage of the emitter follower transistor 20 becomes low, and the resistance value of the resistance element 56A is larger than the resistance value of the resistance element 56B, so that the collector side becomes high impedance.

  With such a configuration, output characteristics as shown in FIG. 12 are obtained. That is, there is no gain expansion in the low output mode, and gain compression occurs in which the gain decreases as the output power increases.

  Therefore, the gain flatness can be improved by combining such a gain compression type high frequency amplifier circuit 100E with a conventional gain expansion type high frequency amplifier circuit.

  FIG. 13 is a circuit diagram of the power amplifier 110 of this embodiment. In the power amplifier 110, a gain expansion type high frequency amplifier circuit 100P having a structure similar to that of the conventional one and a gain compression type high frequency amplifier circuit 100E of the present embodiment are connected in series. That is, the high frequency signal input terminal 101 is connected to the input terminal of the gain expansion type high frequency amplifier circuit 100P, and the gain compression type high frequency signal of the present embodiment is connected to the output terminal of the gain expansion type high frequency amplifier circuit 100P. The input terminal of the amplifier circuit 100E is connected, and the high frequency signal output terminal 102 is connected to the output terminal of the gain compression type high frequency amplifier circuit 100E.

  With such a configuration, the gain-output power Pout characteristic of FIG. 2B and the gain-output power Pout characteristic of FIG. 12B are added, and the output power increases in the low output mode. Accordingly, the gain increased by the high-frequency amplifier circuit 100P can be decreased by the high-frequency amplifier circuit 100E, and gain flatness can be obtained.

  Next, a high frequency amplifier circuit according to a sixth embodiment will be described with reference to the drawings. FIG. 14 is a circuit diagram of the high-frequency amplifier circuit 100F according to the present embodiment. 15 is a graph showing the output characteristics of the high-frequency amplifier circuit 100F. FIG. 15A shows the relationship between the collector current Icc of the amplifying transistor and the output power Pout, and FIG. 15B shows the gain of the high-frequency amplifier circuit 100F. And the output power Pout.

(Circuit configuration)
The high-frequency amplifier circuit 100F of this embodiment differs from the high-frequency amplifier circuit 100A shown in the first embodiment in a circuit configuration for supplying a voltage to the collector of the emitter follower transistor 20, and the other configurations are the same as those in the first embodiment. This is the same as the high-frequency amplifier circuit 100A of the embodiment. Therefore, only different parts will be described.

  The collector of the emitter follower transistor 20 is grounded via a bypass capacitor 70.

  The collector of the emitter follower transistor 20 is connected to a drive power supply via a resistance element 57. The resistance element 57 has a high resistance value of about 10 k [Ω].

  The collector of the emitter follower transistor 20 is connected to the cathode of the third diode 23. The anode of the third diode 23 is connected to the mode control power supply. The third diode 23 may be a diode element, or may be a short-circuited collector and base of an npn transistor as shown in FIG. In this case, the base corresponds to the anode and the emitter corresponds to the cathode.

  The mode control power source is a variable voltage type and generates a DC mode control voltage Vmode. The mode voltage Vmode is a relatively low voltage (for example, 0.0 [V]) in the low output mode (no voltage applied), and a relatively high voltage (for example, 3.3 [V] in the high output mode). ).

(Operation)
In the high output mode, since the mode control voltage Vmode (H) becomes a high voltage, the third diode 23 is forward-biased, and the mode control voltage Vmode (H) is applied to the collector of the emitter follower transistor 20. Since there is no voltage drop due to the resistance element 57, in the high output mode, the collector voltage of the emitter follower transistor 20 becomes high, and the collector side has a low impedance corresponding to the resistance value of the resistance element 57.

  In the low output mode, since the mode control voltage Vmode (L) is low, the third diode 23 is reverse-biased, and the third diode 23 and the mode control power supply are disconnected from the collector of the emitter follower transistor 20. It will be in the state.

  Therefore, the drive voltage Vcc is applied to the collector of the emitter follower transistor 20 via the resistance element 57. Since the resistance value of the resistance element 57 is as high as kilo order, the collector voltage is significantly lower than the drive voltage Vcc. Thereby, in the low output mode, the collector voltage of the emitter follower transistor 20 becomes low, and the collector side becomes high impedance by the resistance value of the resistance element 57.

  As a result, a gain compression type high frequency amplifier circuit can be realized as in the fifth embodiment. Therefore, as shown in FIG. 13, gain flatness can be improved by connecting in series with a gain expansion type high frequency amplifier circuit. Further, by using the configuration of the high-frequency amplifier circuit 100F of the present embodiment, there is no current flowing to the third diode 23 side in the low output mode, and unnecessary current does not flow. As a result, a high-frequency amplifier circuit with less current consumption can be realized.

  Next, a high frequency amplifier circuit according to a seventh embodiment will be described with reference to the drawings. FIG. 16 is a circuit diagram of the high-frequency amplifier circuit 100G according to this embodiment. 17 is a graph showing the output characteristics of the high-frequency amplifier circuit 100G. FIG. 17A shows the relationship between the collector current Icc of the amplifying transistor and the output power Pout, and FIG. 17B shows the gain of the high-frequency amplifier circuit 100G. And the output power Pout.

(Circuit configuration)
The high frequency amplifier circuit 100G of this embodiment is obtained by replacing the FET 80 of the high frequency amplifier circuit 100E shown in the fifth embodiment with an npn transistor 24. Thus, even if the switching element connected to the collector of the emitter follower transistor 20 is not a FET but a transistor, as shown in FIG. 17, the gain compression type high-frequency amplifier circuit similar to that of the fifth embodiment is used. Can be realized. Therefore, as shown in FIG. 13, gain flatness can be improved by connecting in series with a gain expansion type high frequency amplifier circuit.

  Note that the voltages and element values described in each of the above-described embodiments are examples, and can be appropriately set to different values according to desired specifications.

  In addition, each of the above-described embodiments is a part of examples in which the effects of the present application can be obtained. An emitter follower circuit is connected to the base of the amplifying transistor, and the transistor of the emitter follower circuit is operated in a low output mode. As long as the collector voltage is set to be lower than the collector voltage in the high output mode, the same effect can be obtained even if the circuit elements have different configurations.

100A, 100B, 100C, 100D, 100E, 100F, 100G, 100P: high frequency amplifier circuit, 101: high frequency signal input terminal, 102: high frequency signal output terminal, 110: power amplifier, 10: amplifying transistor, 20: emitter follower Transistor, 21A: first diode, 21B: second diode, 22A, 22B, 24: transistor, 23: third diode,
30: input matching circuit, 40: output matching circuit, 51, 53, 54, 55A, 55B, 56A, 56B, 56C, 57: resistance element, 52: ballast resistance element, 60: choke coil, 70: bypass capacitor, 80 : FET
200: Bias control circuit

Claims (2)

An amplifying transistor that amplifies a high-frequency signal input from the base and outputs the amplified signal from the collector;
An emitter follower transistor having an emitter connected to the base of the amplifying transistor;
Collector voltage variable means for changing the collector voltage of the emitter follower transistor between the low output mode and the high output mode;
Equipped with a,
The collector voltage varying means is
A plurality of voltage application circuits for applying different voltages to the collector of the emitter follower transistor,
The plurality of voltage application circuits include:
A variable-voltage mode control power supply connected to the collector of the emitter-follower transistor via a first diode;
Connected to the collector of the emitter-follower transistor via a second diode, lower than the voltage in the high-output mode of the voltage-variable mode control power supply, and in the low-output mode of the voltage-variable mode control power supply A reference power supply that outputs a DC voltage higher than the voltage at
A high frequency amplifier circuit comprising: A high-frequency amplifier circuit according to claim 1 ,
A radio apparatus using the high-frequency amplifier circuit for a power amplifier for a high-frequency transmission signal.

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