JP2006067379A - High frequency power amplifier - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a high frequency power amplifier including an idling current control circuit, which reduces the operation current of a high frequency amplifier transistor more minutely for reducing power consumption furthermore at the time of low transmission power in a portable communication terminal. <P>SOLUTION: An idling current control circuit 102 is connected to the output terminal of a bias circuit 101 for a high frequency transistor, has a constitution that the bias current may be changed to three or more steps for switching the bias current flowing in a high frequency amplifier transistor 12. Then, the bias current control can be carried out more minutely at the time of low output, and the operation current of the high frequency amplifier transistor can be reduced effectively. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a high-frequency power amplifier, and more particularly to a high-frequency power amplifier including an idle current control circuit that can reduce excess power consumption by reducing the operating current of a high-frequency amplifier used in a mobile phone terminal according to the output power level. The present invention relates to a power amplifier.

  In mobile phones that use digital modulation, high-frequency power amplifiers must ensure linearity in the range of all output power used. To ensure linearity at high output, The operating current becomes larger than necessary. However, in CDMA mobile phone terminals, the percentage of time to operate at the maximum output power is small, and the majority of the time to operate at the low output level occupies the power saving and high efficiency of the low output level operation. This is the key to long-time calls.

  FIG. 6 is an equivalent circuit diagram of a conventional high-frequency power amplifier. In this high frequency power amplifier, an input coupling capacitor 11 is connected to a base terminal of a high frequency amplification transistor 12 that amplifies high frequency power, and an input side RF terminal 10 is connected to the other end of the input coupling capacitor 11. ing. The output point A of the bias circuit 101 and the output point B of the idle current control circuit 105 are connected to the base terminal of the high frequency amplifying transistor 12 via the bias circuit choke inductor 9.

  In the high frequency amplification transistor 12, the emitter is grounded, and the collector is connected to the Vcc terminal 15 via the choke inductor 16. The collector of the high frequency amplification transistor 12 is connected to the output side RF terminal 14 via the output coupling capacitor 13.

  The bias circuit 101 includes three transistors: a first current mirror transistor 4, a second current mirror transistor 5, an auxiliary transistor 6, a first resistor 7, a second resistor 8, and a Vref terminal resistor 1. The current mirror structure is composed of a first current mirror transistor 4 and a second current mirror transistor 5.

  The base of the first current mirror transistor 4 and the base of the second current mirror transistor 5 are connected, and the Vref terminal 1 is connected to the node between the two bases via the Vref terminal resistor 2 for control. A voltage Vref is supplied.

  Further, the Vref terminal resistor 2 is connected to the collector of the auxiliary transistor 6. The emitter terminal of the first current mirror transistor 4 is connected to one end of the first resistor 7 and the base of the auxiliary transistor 6, and the other end of the first resistor 7 is grounded. The Vdc terminal 3 is connected to the collectors of the first and second current mirror transistors 4 and 5 to supply the Vdc voltage. The emitter of the auxiliary transistor 6 is grounded. The emitter of the second current mirror transistor 5 is connected to one end of the second resistor 8, and the other end of the second resistor 8 is grounded. The output point A of the bias circuit is a node between the emitter of the second current mirror transistor 5 and the second resistor 8.

  In the idle current control circuit 105, the output terminal of the circuit is a point B, and the collector of the current control switch transistor 45 is connected to the point B via a bypass adjustment resistor 44. The emitter of the current control switch transistor 45 is grounded. The base of the current control switch transistor 45 is connected to a Vmode terminal (voltage input terminal) 42 via a Vmode terminal resistor 43, and a Vmode voltage is supplied. By controlling the Vmode voltage, the bias current supplied to the base of the high frequency amplification transistor 12 is controlled. Thereby, the idle current of the high frequency amplification transistor 12 is controlled.

  When the Vmode voltage is set to be equal to or higher than the threshold voltage of the current control switch transistor 45 and the bypass circuit (comprising the bypass adjustment resistor 44 and the current control switch transistor 45) is turned on, the second current mirror transistor 5 Collector current increases, and the base current of the second current mirror transistor 5 increases. At this time, as the current flowing through the Vref terminal resistor 2 increases, the voltage drop due to the Vref terminal resistor 2 increases, and the base voltage and the emitter voltage of the second current mirror transistor 5 decrease, respectively. The bias voltage of the high frequency amplification transistor 12 drops and the bias current of the high frequency amplification transistor 12 decreases. As a result, the idle current of the high frequency amplification transistor 12 also decreases.

  FIG. 7 is a graph showing the relationship between the idle current and the Vmode voltage of the high frequency power amplifier of FIG. FIG. 8 is a graph showing the relationship between the operating current Icc and the output power Pout during the high output operation (High) and the low output operation (Low) in the high frequency power amplifier of FIG.

  When the high-frequency power amplifier is operated at a high output level, for example, 16 dBm or more, the Vmode voltage is set to around 0 V to shut off the bypass circuit, and the idle current of the high-frequency amplification transistor 12 becomes 64 mA without being reduced. On the other hand, when operating at a low output level, for example, less than 16 dBm, the Vmode voltage is set near 2.85 V, the bypass circuit is turned on, and the idle current of the high frequency amplification transistor 12 is reduced to 40 mA.

When operating at a high output level, it is necessary to increase the idle current because a high output and low distortion characteristic is required. However, at a low output operation, sufficient low distortion characteristics can be obtained even if the idle current is reduced to 40 mA. be able to. As a result, it has the function of reducing the operating current and power consumption at the time of low power output and increasing the power efficiency.
JP 2004-40769 A

  In the conventional bias circuit, there are a circuit that always supplies a constant bias current regardless of output power and a circuit that switches the bias current in two stages according to the output power, but at extremely low output (for example, less than 0 dBm) However, it cannot be said that the power efficiency can be sufficiently improved, and it is necessary to improve the power efficiency by controlling the bias current more finely at the time of low power.

  Accordingly, an object of the present invention is to provide a high-frequency power amplifier that can further improve power efficiency.

  In order to solve the above problems, in the high-frequency power amplifier of the present invention, for example, the power amplifier for portable terminals, a plurality of bypass paths are provided in the idle current control circuit, and a multi-stage control signal based on the output power level is provided. In response to this, each bypass path is individually cut off and conducted, and the amount of current flowing through the idle current control circuit is controlled in multiple stages, thereby finely controlling the bias current of the high frequency amplification transistor at low output power. To do. Thereby, the idle current of the high frequency amplification transistor is controlled more finely.

  This will be specifically described below.

  A high frequency power amplifier according to a first aspect of the invention includes a first transistor that amplifies high frequency power, a bias circuit connected to a base terminal of the first transistor, and a first terminal connected to the base terminal of the first transistor. An idle current control circuit that controls the idle current of the transistor, and the idle current control circuit includes a second transistor, a third transistor, a fourth transistor, and a voltage input terminal, and an emitter of the third transistor. Are connected to the base of the fourth transistor, the third and fourth transistors are cascode-connected, the voltage input terminal is connected to the base of the second and third transistors, and the second and fourth transistors The collector is electrically connected to the base of the first transistor.

  According to this configuration, the bias current of the first transistor can be switched in three stages by switching the voltage applied to the voltage input terminal, and therefore the idle current of the first transistor can be switched in three stages. .

  In the above configuration, the idle current control circuit includes, for example, a connection between the voltage input terminal and the base of the second transistor via the first resistor, and a connection between the voltage input terminal and the base of the third transistor. Are connected via a second resistor, the collector of the second transistor and the base of the first transistor are connected via a third resistor, and the collector of the fourth transistor The base of one transistor is connected via a fourth resistor.

  In the idle current control circuit, the relationship that the resistance value of the first resistor is larger than that of the second resistor is established between the first resistor and the second resistor.

  A high frequency power amplifier according to a second aspect of the invention includes a first transistor that amplifies high frequency power, a bias circuit connected to a base terminal of the first transistor, and a first terminal connected to the base terminal of the first transistor. An idle current control circuit for controlling an idle current of the transistor, and the idle current control circuit includes a second transistor, a third transistor, a fourth transistor, a voltage input terminal, and a voltage input terminal. The third and fourth transistors are cascode-connected in a state where the collector of the first transistor is connected to the base of the third transistor, and the emitter of the third transistor is connected to the base of the fourth transistor. The voltage input terminal is connected to the base of the third transistor, and the collectors of the second and fourth transistors It is electrically connected to the base of the first transistor.

  According to this configuration, the bias current of the first transistor can be switched in three stages by switching the voltage applied to the voltage input terminal, and therefore the idle current of the first transistor can be switched in three stages. .

  In the above configuration, the idle current control circuit includes, for example, a connection between the voltage input terminal and the base of the second transistor via the first resistor, and a connection between the voltage input terminal and the base of the third transistor. Are connected via a second resistor, the collector of the second transistor and the base of the first transistor are connected via a third resistor, and the collector of the fourth transistor The base of one transistor is connected via a fourth resistor.

  In the idle current control circuit, the relationship that the resistance value of the first resistor is larger than that of the second resistor is established between the first resistor and the second resistor.

  A high frequency power amplifier according to a third aspect of the invention includes a first transistor for amplifying high frequency power, a bias circuit connected to the base terminal of the first transistor, and a first terminal connected to the base terminal of the first transistor. An idle current control circuit that controls an idle current of the transistor, and the idle current control circuit includes a second transistor, a third transistor, a first diode, a second diode, and a voltage input terminal. The first and second diodes and the third transistor are connected with the cathode of one diode connected to the anode of the second diode and the cathode of the second diode connected to the base of the third transistor. The voltage input terminal is connected to the base of the second transistor and the anode of the first diode. The collector of the second and third transistor is electrically connected to the base of the first transistor.

  According to this configuration, the bias current of the first transistor can be switched in three stages by switching the voltage applied to the voltage input terminal, and therefore the idle current of the first transistor can be switched in three stages. .

  In the above configuration, the idle current control circuit includes, for example, a connection between the voltage input terminal and the base of the second transistor via the first resistor, and between the voltage input terminal and the anode of the first diode. Are connected via a second resistor, and the collector of the second transistor and the base of the first transistor are connected via a third resistor, and the collector of the third transistor The base of one transistor is connected via a fourth resistor.

  In the idle current control circuit, the relationship that the resistance value of the first resistor is larger than that of the second resistor is established between the first resistor and the second resistor.

  By using the high-frequency power amplifier according to the present invention in, for example, a mobile phone terminal, the power consumption of the entire electronic device incorporating the high-frequency power amplifier such as the above mobile phone terminal can be further reduced.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(Embodiment 1)
Hereinafter, the configuration of the high-frequency power amplifier according to Embodiment 1 of the present invention will be described with reference to the drawings. Parts having the same configuration as the circuit described in the background art are assigned the same reference numerals and description thereof is omitted.

  FIG. 1 shows an equivalent circuit diagram of a high-frequency power amplifier according to Embodiment 1 of the present invention. The difference from the conventional high-frequency power amplifier shown in FIG. 6 is that an idle current control circuit 102 is provided as an idle current control circuit in place of the idle current control circuit 105.

  The idle current control circuit 102 includes three transistors and four resistors. One end of the first bypass adjustment resistor 23 is connected to the point B, and the second bypass adjustment resistor 24 and the second resistor are connected to the other end. 3, the collector of the current control switch transistor 22 is connected. The other end of the second bypass adjustment resistor 24 is connected to the collector of the first current control switch transistor 20, and the emitter of the first current control switch transistor 20 is grounded. A Vmode terminal (voltage input terminal) 17 is connected to the base of the first current control switch transistor 20 via a first Vmode terminal resistor 18 to supply a Vmode voltage. The emitter of the third current control switch transistor 22 is grounded, and the base of the third current control switch transistor 22 is connected to the emitter of the second current control switch transistor 21. The Vdc terminal 3 is connected to the collector of the second current control switch transistor 21, and the Vmode terminal 17 is connected to the base of the second current control switch transistor 21 via the second Vmode terminal resistor 19. , Vmode voltage is supplied. The value of the resistor 19 is smaller than the value of the resistor 18. For example, when the resistor 18 is 4 kΩ, the resistor 19 is about 2.5 kΩ.

  If the resistors 18 and 19 have the same value, even if the voltage at the Vmode terminal 17 is 2.4 V or more, which is twice the threshold voltage of the GaAs HBT, the base of the second current control switch transistor 21 is Compared with the base of the first current control switch transistor 20 connected in parallel (because of the cascode connection), the current hardly flows, and therefore the current flows only to the base of the first current control switch transistor 20. Therefore, the first current control switch transistor 20 is not turned on. Therefore, the amount of current flowing through point B of the idle current control circuit 102 does not change in three stages (when the Vmode voltage is less than 1.2 V, 1.2 V or more, less than 2.4 V, 2.4 V or more) The current control cannot be controlled in three stages. The same applies when the magnitude relationship of the resistance values is opposite to the above.

  In the idle current control circuit 102, the first Vmode terminal resistor 18 corresponds to the first resistor in claim 2, the second Vmode terminal resistor 19 also corresponds to the second resistor, The series circuit of the bypass adjusting resistor 23 and the second bypass adjusting resistor 24 corresponds to the third resistor, and the first bypass adjusting resistor 23 also corresponds to the fourth resistor. The first current control switch transistor 20 also corresponds to the second transistor, the second current control switch transistor 21 also corresponds to the third transistor, and the third current control switch transistor 22 corresponds to the third transistor. Similarly, this corresponds to the fourth transistor.

A GaAs HBT is used for the transistor used for the bias circuit and the transistor for high frequency amplification, and the V _be threshold voltage in this GaAs HBT is about 1.2V. Here, the range of output power and the value of the voltage applied to the Vmode terminal are set as follows.

Output mode Output power Vmode voltage Extremely low output Less than 0 dBm 2.8 to 3.4 V
Low output 0 dBm or more and less than 16 dBm 1.6 to 2.2 V
High output 16dBm or more 0-0.5V
When the high-frequency power amplifier is operated at a high output, 0 to 0.5 V is applied to the Vmode terminal 17, so that the current control switch transistors 20, 21 and 22 are turned off, and the bypass circuit for reducing the bias current is cut off. Is done. In this case, no current flows from the bias circuit 101 to the idle current control circuit 102.

  When the high frequency power amplifier operates at a low output, 1.6 to 2.2 V is applied to the Vmode terminal 17, so that the current control switch transistor 20 is turned on, and the cascode-connected current control switch transistor 21 and 22 does not turn on. At this time, a current flows through the idle current control circuit 102 from the point A through the bypass adjusting resistors 23 and 24 and the first current control switch transistor 20 in the idle current control circuit 102. As a result, as described in the background art, the bias current of the high frequency amplifying transistor 12 is reduced.

  Further, when the high-frequency power amplifier operates at an extremely low output, 2.8 to 3.4 V is applied to the Vmode terminal 17, so that the first current control switch transistor 20 is turned on and the cascode-connected first The second and third current control switch transistors 21 and 22 are also turned on. At this time, the idle current control circuit 102 passes through the first and second bypass adjustment resistors 23 and 24 and the first current control switch transistor 20, and further the first bypass adjustment resistor A current flows through the transistor 23 and the third current control switch transistor 22. Therefore, the current flowing from the point A to the idle current control circuit 102 becomes larger than that at the time of low output, and the bias voltage of the high frequency amplification transistor 12 further decreases. As a result, the bias current and the operating current of the high frequency amplification transistor 12 are further reduced as compared with the low output.

  FIG. 2 is a graph showing the relationship between the idle current and the Vmode voltage of the high frequency power amplifier of FIG. FIG. 3 is a graph showing the relationship between the operating current Icc and the output power Pout during the high output operation (High), the low output operation (Low), and the very low output operation (Very Low) in the high frequency power amplifier of FIG. It is.

  As shown in FIG. 2, when the high-frequency power amplifier is operated at a high output level, for example, 16 dBm or more, the Vmode voltage is set to 0 to 0.5 V to shut off the bypass circuit, and the idle current of the high-frequency amplification transistor 12 Becomes 64 mA without reduction. In addition, when operating at a low output level, for example, 0 dBm or more and less than 16 dBm, the Vmode voltage is set to 1.6 to 2.2 V to make the bypass circuit conductive, and the idle current of the high frequency amplifying transistor 12 is reduced to about 40 mA. To do. Further, when operating at an extremely low output level, for example, less than 0 dBm, the Vmode voltage is set to 2.8 to 3.4 V, the current of the bypass circuit is further increased, and the idle current of the high frequency amplification transistor 12 is set to 20 mA. Reduce to a degree.

  In FIG. 3, the leftmost end of the graph is a state in which the high-frequency power amplifier is hardly operating, and the operating current at this time is almost equal to the idle current. The operating current at high output is the same (almost constant) value regardless of the idle current value (the transistor is close to saturation). On the other hand, the operating current of the high frequency amplifying transistor 12 at low output is highly dependent on the idle current, and the operating current can be greatly reduced by reducing the idle current.

  As described above, the present invention provides a high frequency power amplifier including an idle current control circuit, and the idle current control circuit reduces the bias current and operating current of the high frequency amplifying transistor when the output power level is low. In particular, the power efficiency can be improved, and at the time of extremely low output, the bias current and operating current of the high frequency amplification transistor can be further reduced.

  The amount of bias current controlled by the idle current control circuit can be easily adjusted by adjusting the resistance values of the resistors 23 and 24 in the idle current control circuit 102, respectively. By increasing the resistance value, the amount of current that flows when the bypass path is formed is reduced, and the amount of reduction in the operating current of the high-frequency amplification transistor is reduced.

(Embodiment 2)
FIG. 4 shows an equivalent circuit diagram of the high-frequency power amplifier according to the second embodiment of the present invention. In the second embodiment, an idle current control circuit 103 is added instead of the idle current control circuit 102 in the high frequency power amplifier of FIG.

  Instead of connecting the collector of the second current control switch transistor 21 in the idle current control circuit 102 to the Vdc terminal 3, the idle current control circuit 103 has a second current control switch corresponding to the current control switch transistor 21. The collector of the transistor for transistor 29 is connected to the base of the second current control switch transistor 29 itself. Other configurations are the same as those in FIG.

  In FIG. 4, reference numeral 25 denotes a Vmode voltage terminal, reference numeral 26 denotes a first Vmode terminal resistor, reference numeral 27 denotes a second Vmode terminal resistor, and reference numeral 28 denotes a first current control switch. The reference numeral 30 represents a third current control switch transistor, the reference numeral 31 represents a first bypass adjustment resistor, and the reference numeral 32 represents a second bypass adjustment resistor.

  In this circuit, the ON / OFF conditions for the Vmode voltage of the cascode-connected current control switch transistors 29 and 30 are the same as in the first embodiment, and the control voltage is applied to the Vmode terminal 25 according to the output power level. Thus, similarly to the first embodiment, it is possible to reduce power consumption at the time of low output.

(Embodiment 3)
FIG. 5 shows an equivalent circuit diagram of the high-frequency power amplifier according to the third embodiment of the present invention. In this embodiment, an idle current control circuit 104 is added instead of the idle current control circuit 103 in the high frequency power amplifier of FIG.

  In the idle current control circuit 104, in place of the second current control switch transistor 29 in the idle current control circuit 103, two diodes 37 and 38 such as Schottky diodes connected in series are used. Specifically, the anode of the first diode 37 is connected to the second Vmode terminal resistor 35, and the cathode of the second diode 38 is connected to the second current control switch transistor 39.

  5, reference numeral 33 denotes a Vmode voltage terminal (voltage input terminal), reference numeral 34 denotes a first Vmode terminal resistor, reference numeral 36 denotes a first current control switch transistor, and reference numeral 40 denotes A first bypass adjusting resistor is shown, and reference numeral 41 denotes a second bypass adjusting resistor.

  Also in this circuit, the on / off condition of the second current control switch transistor 39 with respect to the Vmode voltage is almost the same as in the first and second embodiments, and the power consumption at the time of low output is reduced by the same control method. be able to.

  In the first to third embodiments, the high-frequency power amplifier using the idle current control circuit for the current mirror type bias circuit has been described. However, the idle current control circuit is also used for a bias circuit having another structure. It is easy to imagine what you can do.

  Further, although the present invention uses GaAs as a semiconductor material, it can be easily applied to other materials such as Si and SiGe.

  In the above embodiment, the bias current of the high-frequency amplification transistor is switched to three stages by switching the bypass current to three stages. However, the high-frequency amplification transistor is switched to four stages or more by switching the bypass current to four or more stages. Switching the bias current to four or more levels can be easily realized.

  As described above, the present invention is useful for reducing the power consumption of the power amplifier for a mobile phone terminal and increasing the talk time of the terminal.

1 is an equivalent circuit diagram showing a high-frequency power amplifier including a bias circuit 101 and an idle current control circuit 102 according to Embodiment 1 of the present invention. 2 is a graph showing a relationship between a Vmode voltage and an operating current of a high frequency amplification transistor in the high frequency power amplifier of FIG. 1. 2 is a graph showing the relationship between operating current and output power in the high frequency power amplifier of FIG. 1. It is an equivalent circuit diagram which shows the high frequency power amplifier containing the bias circuit 101 and the idle current control circuit 103 based on Embodiment 2 of this invention. It is an equivalent circuit diagram which shows the high frequency power amplifier containing the bias circuit 101 and the idle current control circuit 104 based on Embodiment 3 of this invention. 1 is an equivalent circuit diagram showing a conventional high-frequency power amplifier including a bias circuit 101 and an idle current control circuit 105. FIG. 7 is a graph showing the relationship between the Vmode voltage and the operating current of the high frequency amplification transistor in the high frequency power amplifier of FIG. 6. 7 is a graph showing the relationship between operating current and output power in the high-frequency power amplifier of FIG. 6.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Vref terminal 2 Vref terminal resistance 3 Vdc terminal 4 1st current mirror transistor 5 2nd current mirror transistor 6 Auxiliary transistor 7 1st resistance 8 2nd resistance 9 Choke inductor 10 for bias circuits 10 Input side RF terminal 11 Input coupling capacitor 12 High frequency amplification transistor 13 Output coupling capacitor 14 Output side RF terminal 15 Vcc terminal 16 Choke inductor for Vcc terminal 17 Vmode terminal 18 First Vmode terminal resistor 19 Second Vmode terminal Resistor 20 First current control switch transistor 21 Second current control switch transistor 22 Third current control switch transistor 23 First bypass adjustment resistor 24 Second bypass adjustment resistor 25 Vmode end Child 26 First Vmode terminal resistance 27 Second Vmode terminal resistance 28 First current control switch transistor 29 Second current control switch transistor 30 Third current control switch transistor 31 First bypass adjustment Resistor 32 Second bypass adjustment resistor 33 Vmode terminal 34 First Vmode terminal resistor 35 Second Vmode terminal resistor 36 First current control switch transistor 37 First diode 38 Second diode 39 Second diode 39 2 Current control switch transistor 40 First bypass adjustment resistor 41 Second bypass adjustment resistor 101 Bias circuit 102 Idle current control circuit 103 Idle current control circuit 104 Idle current control circuit 105 Idle current control circuit

Claims (9)

A first transistor for amplifying high frequency power;
A bias circuit connected to a base terminal of the first transistor;
An idle current control circuit connected to a base terminal of the first transistor and controlling an idle current of the first transistor;
The idle current control circuit includes a second transistor, a third transistor, a fourth transistor, and a voltage input terminal.
The third and fourth transistors are cascode-connected with the emitter of the third transistor connected to the base of the fourth transistor;
The voltage input terminal is connected to bases of the second and third transistors;
A high frequency power amplifier in which collectors of the second and fourth transistors are electrically connected to a base of the first transistor. In the idle current control circuit, the voltage input terminal and the base of the second transistor are connected via a first resistor,
The voltage input terminal and the base of the third transistor are connected via a second resistor,
The collector of the second transistor and the base of the first transistor are connected via a third resistor,
The high-frequency power amplifier according to claim 1, wherein a collector of the fourth transistor and a base of the first transistor are connected via a fourth resistor.   2. The idle current control circuit according to claim 1, wherein a relationship that the first resistor has a larger resistance value than the second resistor is established between the first resistor and the second resistor. The described high-frequency power amplifier. A first transistor for amplifying high frequency power;
A bias circuit connected to a base terminal of the first transistor;
An idle current control circuit connected to a base terminal of the first transistor to control an idle current of the first transistor;
The idle current control circuit includes a second transistor, a third transistor, a fourth transistor, a voltage input terminal, and a voltage input terminal.
The third and fourth transistors are cascode in a state where the collector of the third transistor is connected to the base of the third transistor, and the emitter of the third transistor is connected to the base of the fourth transistor. Connected,
The voltage input terminal is connected to bases of the second and third transistors;
A high frequency power amplifier in which collectors of the second and fourth transistors are electrically connected to a base of the first transistor. In the idle current control circuit, the voltage input terminal and the base of the second transistor are connected via a first resistor,
The voltage input terminal and the base of the third transistor are connected via a second resistor,
The collector of the second transistor and the base of the first transistor are connected via a third resistor,
The high-frequency power amplifier according to claim 4, wherein a collector of the fourth transistor and a base of the first transistor are connected via a fourth resistor.   5. The idle current control circuit according to claim 4, wherein a relationship is established between the first resistor and the second resistor that the first resistor has a larger resistance value than the second resistor. The described high-frequency power amplifier. A first transistor for amplifying high frequency power;
A bias circuit connected to a base terminal of the first transistor;
An idle current control circuit connected to the base terminal of the first transistor to control the idle current of the first transistor;
The idle current control circuit includes a second transistor, a third transistor, a first diode, a second diode, and a voltage input terminal.
The first and second diodes are connected with the cathode of the first diode connected to the anode of the second diode and the cathode of the second diode connected to the base of the third transistor. The third transistor is cascode-connected,
The voltage input terminal is connected to a base of the second transistor and an anode of the first diode;
A high frequency power amplifier in which collectors of the second and third transistors are electrically connected to a base of the first transistor. In the idle current control circuit, the voltage input terminal and the base of the second transistor are connected via a first resistor,
The voltage input terminal and the anode of the first diode are connected via a second resistor,
The collector of the second transistor and the base of the first transistor are connected via a third resistor,
The high-frequency power amplifier according to claim 7, wherein a collector of the third transistor and a base of the first transistor are connected via a fourth resistor. 8. The idle current control circuit according to claim 7, wherein a relationship is established between the first resistor and the second resistor that the first resistor has a resistance value larger than that of the second resistor. The described high-frequency power amplifier.

Images