JP2007243872A - Transistor circuit and high-frequency amplifier using the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To compensate for gain discontinuity due to a power control of a high-frequency amplifier. <P>SOLUTION: A high-frequency signal is inputted from a high-frequency power input terminal 1, to be outputted from a high-frequency power output terminal 2 via a DC cut capacity 10, a high-frequency amplifying transistor TRB1, and the DC cut capacity 10. Bias supply is performed to a base of the high-frequency amplifying transistor TRB1, from the first power source 3 via a bias division circuit 9 constituted of a λ/4 line or an LC resonating circuit, and a resistor R1. The bias supply is performed to a collector of the high-frequency amplifying transistor TRB1, from the second power source 4 via the bias division circuit 9 and a resistor R2. An emitter of the high-frequency amplifying transistor TRB1 is connected to the collector of a switch transistor TRB2, and the emitter of the switch transistor TRB2 is connected to the ground. The bias supply is performed to the base of the switch transistor TRB2 from the second power source 4 via the bias division circuit 9 and a resistor R3. Each of the resistors R1, R2, and R3 can be omitted. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a transistor circuit suitable for a high-frequency power amplifier used in a mobile terminal such as a mobile phone.

  In an amplifier used for wireless communication such as a cellular phone, a configuration in which two to three compound semiconductor transistors for high-frequency amplification are usually connected in multiple stages is used. In view of the above, heterobipolar transistors are mainly used.

  When such a high-frequency amplifier is used for a wireless communication system, particularly a system in which the terminal output is frequently switched by the distance between the base stations and the user like the CDMA system, the high-frequency amplifier must be used at the maximum design power. The frequency of use at low output power with low power added efficiency is high. For this reason, in such a system, the high frequency amplifier is used so as to reduce the current at the time of low power by adjusting the bias current of the transistor according to the output power.

  As described in Patent Document 1, Patent Document 2, Patent Document 3, etc., the output power control of such a high frequency amplifier is performed by changing the bias state of the high frequency amplification transistor in accordance with the output power and consuming it in each power region. The current is controlled to be minimum. The contents will be described with reference to FIG. FIG. 10A shows an example of a conventional high-frequency amplifier. A high-frequency signal is input from the high-frequency power input terminal 1, amplified at each stage of the high-frequency amplification bipolar transistors TR 1 and TR 2, and output from the high-frequency power output terminal 2. The The input matching circuit 6 impedance matches the 50 ohm high frequency input terminal 1 and the high frequency amplification bipolar transistor TR1, and the output matching circuit 8 outputs desired power from the high frequency amplification bipolar transistor TR2 to the 50 ohm high frequency output terminal 2. So that the impedance is matched. The interstage matching circuit 7 is used for impedance matching between the high frequency amplification bipolar transistor TR1 and the high frequency amplification bipolar transistor TR2. The control power supply 17 sets the base bias and collector bias of the high frequency amplification bipolar transistors TR1 and TR2. In wireless communication systems such as the CDMA system, reduction of modulation wave distortion due to amplifier nonlinearity is required, and from the viewpoint of linearity, the bipolar transistor TR2 for high-frequency amplification in the output stage must be a class A bias. desirable. However, since the class A bias has a large idle current (bias current when there is no input signal), the operating current of the amplifier becomes large in a region where the high-frequency input signal level is low.

For this reason, as shown in FIG. 10 (b), when the output power is higher than a certain value based on a certain output power, the control power supply 17 sets the idle of the high frequency amplification bipolar transistor TR2 to be large, and the output power is the reference value. The control power supply 17 controls the idling current of the high-frequency amplification bipolar transistor TR2 to be low when it becomes below.
Japanese Patent Laid-Open No. 2003-51720 JP 2004-134823 A JP 2005-244862 A

  However, in the conventional high-frequency amplifier of FIG. 10, as shown in FIG. 10 (c), a gain discontinuity occurs by switching the bias state before and after the reference output power. No specific embodiment is disclosed in Patent Document 1 or Patent Document 2 as a compensation method for this discontinuity, and the input level of the high-frequency amplifier is actually controlled in each power region on the mobile phone set side. It is used by.

  An object of the present invention is to provide a technique for suppressing gain fluctuations associated with power switching with a simple configuration in a high-frequency amplifier that performs power control for reducing current consumption at low power.

  In order to solve the above problems, in the transistor circuit of the present invention, in the first transistor for high-frequency amplification, the base of the first transistor serving as the high-frequency input terminal is biased by the first power supply, and the high-frequency output The collector of the first transistor serving as the terminal is biased by the second power supply, the emitter of the first transistor is connected to the collector of the second transistor serving as the switch element, and the emitter of the second transistor is grounded The base of the second transistor is biased by the second power supply. Since the amplification state and the through operation state (gain 0) can be switched by turning on and off the second power source, the transistor circuit of the present invention is used in the input portion of the amplifier. It is possible to compensate for gain discontinuities associated with power control conditions.

  By using the transistor circuit of the present invention, it is possible to compensate for the gain discontinuity associated with the power control of the high-frequency amplifier.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(First embodiment)
FIG. 1 shows a transistor circuit representing a first embodiment of the present invention.

  First, the configuration of the transistor circuit of FIG. A high frequency signal is input from the high frequency power input terminal 1 and is output from the high frequency power output terminal 2 through the DC cut capacitor 10, the high frequency amplification transistor TRB 1, and the DC cut capacitor 10. The base of the high frequency amplifying transistor TRB1 is supplied with a bias from the first power source 3 via a bias separation circuit 9 composed of a λ / 4 line or an LC resonance circuit and a resistor R1, and the collector of the high frequency amplifying transistor TRB1 is the second collector A bias is supplied from a power source 4 through a λ / 4 line or a bias separation circuit 9 constituted by an LC resonance circuit and a resistor R2. The emitter of the high frequency amplification transistor TRB1 is connected to the collector of the switch transistor TRB2, and the emitter of the switch transistor TRB2 is grounded. The base of the switch transistor TRB2 is supplied with a bias from a third power source 5 through a λ / 4 line or a bias separation circuit 9 composed of an LC resonance circuit and a resistor R3. The resistors R1, R2, and R3 can be omitted.

  Next, the configuration of the transistor circuit in FIG. A high frequency signal is input from the high frequency power input terminal 1 and is output from the high frequency power output terminal 2 through the DC cut capacitor 10, the high frequency amplification transistor TRB 1, and the DC cut capacitor 10. The base of the high frequency amplifying transistor TRB1 is supplied with a bias from the first power source 3 via a bias separation circuit 9 composed of a λ / 4 line or an LC resonance circuit and a resistor R1, and the collector of the high frequency amplifying transistor TRB1 is the second collector A bias is supplied from a power source 4 through a λ / 4 line or a bias separation circuit 9 constituted by an LC resonance circuit and a resistor R2. The emitter of the high frequency amplification transistor TRB1 is connected to the collector of the switch transistor TRB2, and the emitter of the switch transistor TRB2 is grounded. The base of the switch transistor TRB2 is supplied with a bias from the second power source 4 via a λ / 4 line or a bias separation circuit 9 composed of an LC resonance circuit and a resistor R3. The resistors R1, R2, and R3 can be omitted.

  Next, the operation of the transistor circuit of the present invention will be described with reference to FIG. FIG. 2 (a) is an equivalent circuit during the amplifier operation of the transistor circuit of the present invention. In the transistor circuit of FIG. 1B, the high frequency amplification transistor TRB1 is biased by the first power supply 3 so that the base-emitter diode is turned on. When the second power supply 4 is biased so that the base-emitter diode of the switch transistor TRB2 is turned on, the switch transistor TRB2 is turned on and can be regarded as the on-resistance 11 of the transistor in the equivalent circuit. Operates as a grounded emitter amplifier. This state is defined as the first power supply 3: on and the second power supply 4: on.

  FIG. 2B is an equivalent circuit during the through operation of the transistor circuit of the present invention. In the transistor circuit of FIG. 1B, the high frequency amplification transistor TRB1 is biased by the first power supply 3 so that the base-emitter diode is turned on. When the second power supply 4 is biased so that the base-emitter diode of the switch transistor TRB2 is turned off and the high-frequency amplification transistor TRB1 is turned on, the switch transistor TRB2 is turned off, and the equivalent circuit is shown. Is open. Further, since the high frequency amplification transistor TRB1 can be regarded as the internal resistance 12 of the diode, the high frequency input terminal 1 and the high frequency output terminal 2 are in a through state. This state is defined as a first power supply 3: on and a second power supply 4: off.

  FIG. 2 (c) is an equivalent circuit during the isolation operation of the transistor circuit of the present invention. In the transistor circuit of FIG. 1B, the high-frequency amplification transistor TRB1 is biased by the first power supply 3 so that the base-emitter diode is turned off. In this case, on / off of the second power supply 4 does not affect the switch transistor TRB2, but affects the depletion layer capacitance 13 of the base-collector diode of the high frequency amplification transistor TRB1. The isolation characteristic is determined according to the polarity of the second power supply 4, and if the depletion layer capacitance increases, the isolation characteristic deteriorates. This state is referred to as the first power supply 3: off, the second power supply 4: off, or the power supply 3: off, and the second power supply 4: on.

  In the above, the operation was explained using the transistor circuit of FIG. 1 (b). However, in the transistor circuit of FIG. 1 (a), the second power supply 4 and the third power supply 5 are simultaneously used so as to satisfy the above operation. It goes without saying that the same operation can be achieved if controlled.

(Second Embodiment)
FIG. 3 is a transistor circuit showing a second embodiment of the present invention.

  A high frequency signal is input from the high frequency power input terminal 1 and is output from the high frequency power output terminal 2 through the DC cut capacitor 10, the high frequency amplification transistor TRB 1, and the DC cut capacitor 10. The base of the high frequency amplifying transistor TRB1 is supplied with a bias from the first power source 3 via a bias separation circuit 9 composed of a λ / 4 line or an LC resonance circuit and a resistor R1, and the collector of the high frequency amplifying transistor TRB1 is the second collector A bias is supplied from a power source 4 through a λ / 4 line or a bias separation circuit 9 constituted by an LC resonance circuit and a resistor R2. The emitter of the high frequency amplification transistor TRB1 is connected to the drain of the switch transistor TRF1, and the source of the switch transistor TRF1 is grounded. The gate of the switch transistor TRB2 is supplied with a bias from the second power source 4 through a bias separation circuit 9 constituted by a λ / 4 line or an LC resonance circuit and a resistor R3. The resistors R1, R2, and R3 can be omitted. Needless to say, the transistor circuit operates in the same manner as in the first embodiment.

(Third embodiment)
FIG. 4 is a transistor circuit showing a third embodiment of the present invention.

  The three-terminal switch element 14 is an element that can be switched between short-circuit and open-circuit between the other two terminals by turning the terminal 100 on and off using the terminal 100 as a control terminal.

  A high frequency signal is input from the high frequency power input terminal 1 and is output from the high frequency power output terminal 2 through the DC cut capacitor 10, the high frequency amplification transistor TRB 1, and the DC cut capacitor 10. The base of the high frequency amplifying transistor TRB1 is supplied with a bias from the first power source 3 via a bias separation circuit 9 composed of a λ / 4 line or an LC resonance circuit and a resistor R1, and the collector of the high frequency amplifying transistor TRB1 is the second collector A bias is supplied from a power source 4 through a λ / 4 line or a bias separation circuit 9 constituted by an LC resonance circuit and a resistor R2. The emitter of the high frequency amplification transistor TRB1 is connected to a terminal other than the terminal 100 of the three-terminal switch element 14, and the other terminal 100 of the three-terminal switch element 14 is grounded. The terminal 100 of the three-terminal switch element 14 is supplied with a bias from the second power source 4 through a bias separation circuit 9 constituted by a λ / 4 line or an LC resonance circuit and a resistor R3. The resistors R1, R2, and R3 can be omitted. Needless to say, the transistor circuit operates in the same manner as in the first embodiment. Examples of the three-terminal switch element include a switch using MEMS technology and a switch constituted by a PIN diode.

(Fourth embodiment)
FIG. 5 (a) is a circuit diagram of a transistor circuit representing a fourth embodiment of the present invention. This transistor circuit is designed for a frequency of 3.5 GHz band, and a high frequency signal is input from the high frequency power input terminal 1, and from the high frequency power output terminal 2 through the DC cut capacitor 10, the high frequency amplification transistor TRB 3, and the DC cut capacitor 10. Is output.

The base of the high frequency amplifying transistor TRB3 is bias-supplied from the first power source 3 via a bias separation circuit composed of L1 = 1nH and C1 = 2pF, and the resistor R4 = 10 ohm, and the collector of the high frequency amplifying transistor TRB3 is the second Bias is supplied from a power source 4 through a bias separation circuit composed of L2 = 1 nH and C2 = 2 pF, and a resistor R5 = 30 ohm. The emitter of the high frequency amplification transistor TRB3 is connected to the collector of the switch transistor TRB4, and the emitter of the switch transistor TRB4 is grounded. The base of the switch transistor TRB4 is supplied with a bias from the second power source 4 through the above-described bias separation circuit constituted by L2 = 1nH and C2 = 2pF, and the resistor R6 = 250ohm. The on state of the first power supply 3 is 1.35V, the off state is 0V, the on state of the second power supply 4 is 1.8V, and the off state is 0V. The high frequency amplification transistor TRB3 and the switch transistor TRB4 use InGaP HBT with an emitter area of 120 um ^ ² , respectively.

  FIG. 5 (b) shows the high frequency characteristics of the fourth embodiment of the present invention. The pass characteristic at a frequency of 3.5 GHz is 9.5 when the amplifier is operating (first power supply 3: on, second power supply 4: on). dB, -1.5 dB during through operation (first power supply 3: on, second power supply 4: off), 1 operation during isolation operation (first power supply 3: off, second power supply 4: off) -15 dB is obtained at the time of isolation operation 2 (first power supply 3: off, second power supply 4: on). The reason why the isolation characteristic during the isolation operation 2 is improved is that the depletion layer capacitance between the base and the collector of the high frequency amplifying transistor TRB3 decreases when the second power supply 4 is turned on.

  As described above, by using the present invention, it is possible to realize a transistor circuit that can switch an amplifier operation, a through operation, and an isolation operation with a very simple configuration and control.

(Fifth embodiment)
FIG. 6A is an explanation of abbreviated symbols used for explanation of the high-frequency amplifier representing the fifth embodiment of the present invention. First Embodiment The first power supply connection terminal 15 and the second power supply connection terminal 16 are connected to the transistor circuit described in FIG. 1B except for the first power supply 3 and the second power supply 4. The circuit diagram is represented by the abbreviation 22 of the transistor circuit.

  FIG. 6B is a high-frequency amplifier that represents the fifth embodiment of the present invention. A high frequency signal is input from the high frequency power input terminal 1, passes through the attenuator 18, the transistor circuit 22 of the present invention, and the attenuator 18, and is amplified at each stage of the high frequency amplification bipolar transistors TR 1 and TR 2. Is output. The input matching circuit 6 impedance-matches the transistor circuit 22 and the high frequency amplification bipolar transistor TR1, and the output matching circuit 8 outputs desired power from the high frequency amplification bipolar transistor TR2 to the 50 ohm high frequency output terminal 2. Impedance matched. The control power supply 17 sets the base bias and collector bias of the high frequency amplification bipolar transistors TR1 and TR2, and controls the operation state of the transistor circuit 22 described above. The attenuator 18 adjusts the gain distribution of the high frequency amplifier and improves the stability of the high frequency amplifier, but may be omitted.

  FIG. 6C shows the gain characteristic of the high frequency amplifier representing the fifth embodiment of the present invention. When the output power is higher than 10 dBm which is the switching point, the control power supply 17 sets the transistor circuit 22 to the through operation. When the output power is lower than the switching point of 10 dBm, the control power supply 17 lowers the idle current of the high-frequency amplification bipolar transistor TR2, and at the same time switches the transistor circuit 22 to the amplifier operation to compensate for the gain reduction due to the idle current reduction. ing. When the high-frequency amplifier is turned off, the isolation characteristic of the entire high-frequency amplifier can be improved by switching the transistor circuit 22 to the isolation operation by the control power supply 17.

  As described above, by using this embodiment, it is possible to compensate for the gain discontinuity associated with the power control of the high-frequency amplifier with a very simple configuration.

(Sixth embodiment)
FIG. 7A shows a high-frequency amplifier that represents a sixth embodiment of the present invention. A transistor circuit 23 is used as the final stage of the amplifier. A high frequency signal is input from the high frequency power input terminal 1, amplified at each stage of the high frequency amplification bipolar transistor TR 1 and the transistor circuit 23, and output from the high frequency power output terminal 2. The input matching circuit 6 impedance-matches the 50-ohm high-frequency input terminal 1 and the high-frequency amplification bipolar transistor TR1, and the output matching circuit 8 outputs desired power from the transistor circuit 23 to the 50-ohm high-frequency output terminal 2. Impedance matched. The control power supply 17 sets the base bias and collector bias of the high frequency amplification bipolar transistors TR1 and TR2, and controls the operation state of the transistor circuit 23 described above.

  FIG. 7B is an equivalent circuit diagram when the transistor circuit 23 is controlled to be in an amplifier state in the sixth embodiment of the present invention, and is a circuit suitable for high output operation. As described above, when the transistor circuit 23 is in an amplifier state, the high-frequency amplification transistor TR3 is an amplifier whose emitter is grounded via the on-resistance 11 of the switch transistor. The on-resistance of this switch element, when included in the emitter of the final stage transistor, greatly affects the power characteristics of the amplifier due to the voltage drop, but it can be reduced by technological improvements such as field effect transistors and MEMS switches. is there.

  FIG. 7C is an equivalent circuit diagram in the case where the transistor circuit 23 is controlled to the through state in the sixth embodiment of the present invention, and is a circuit suitable for low output operation. As described above, when the transistor circuit 23 is in the through state, this is equivalent to the on-resistance 12 of the base-collector diode of the high-frequency amplifier transistor. This value is about several hundred mohm in the case of the output transistor of the 1 W class amplifier. It becomes. In the high-frequency amplifier in this state, the high-frequency transistor TR1 having a smaller transistor size than the high-frequency amplification transistor TR3 in FIG. The load impedance is determined by the interstage matching circuit 7, the on-resistance 12 of the diode, and the output matching circuit 8. If the load impedance can be made larger than the load impedance of the output matching circuit 8, the output is lower than that of the high-frequency amplifier of FIG. Thus, a high-frequency amplifier with good characteristics can be realized.

  Hereinafter, a change in the load impedance of the high frequency amplification transistor TR1 in the states of FIGS. 7B and 7C will be described. FIG. 8A is a circuit diagram of a 3.5 GHz band interstage matching circuit 7 having L3 = 0.46 nH and C3 = 4.7 pF. In the case of FIG. 7B, the input impedance of the high frequency amplification transistor TR3 is 2 ohms. Then, the load impedance of the high frequency amplifying transistor TR1 is designed to be about 50 ohms as shown in the state 1 of FIG. Assuming that the impedance of the output matching circuit 8 viewed from the high frequency amplification transistor TR3 in FIG. 7B is 5 ohms, the load impedance of the high frequency amplification transistor TR1 in FIG. 7C is as shown in state 2 in FIG. 8B. Is converted to approximately 20 ohms. The load impedances viewed from the final stage transistors in the circuits of FIGS. 7B and 7C are 5 ohms and 20 ohms, respectively. For ease of understanding, assuming that the transistor size ratio of the high-frequency transistor TR3 and the high-frequency transistor TR1 is 4: 1, switching from the amplifier operation in FIG. 7B to the through operation in FIG. 4 (6dB) output can be reduced. In this case, since the final high frequency amplification transistor is TR1 having a smaller emitter size than TR3, the bias current is also reduced to about 1/4.

  As described above, if this embodiment is used, it is possible to reduce current consumption at low power with a very simple configuration.

(Seventh embodiment)
FIG. 9 shows a high-frequency amplifier representing the seventh embodiment of the present invention. A high frequency signal is input from the high frequency power input terminal 1, passes through the attenuator 18, the gain compensation transistor circuit 22, and the attenuator 18, and is amplified at each stage of the high frequency amplification bipolar transistor TR 1 and the output switching transistor circuit 23. Output from the high-frequency power output terminal 2. The transistor circuit 22 and the high frequency amplification bipolar transistor TR1 are impedance matched by the input matching circuit 6, and the impedance matching is performed by the output matching circuit 8 so that a desired power is output from the transistor circuit 22 to the 50ohm high frequency output terminal 2. The The control power supply 17 sets the base bias and collector bias of the high-frequency amplification bipolar transistors TR1 and TR2, and controls the operation states of the transistor circuit 22 and the transistor circuit 23 described above. The attenuator 18 adjusts the gain distribution of the high frequency amplifier and improves the stability of the high frequency amplifier, but may be omitted.

  As in the fifth embodiment, when the transistor circuit 23 is in the amplifier operation state (high output state), the control power supply 17 is controlled through the transistor circuit 22 and the transistor circuit 23 is in the through operation state (low output). State), gain compensation is performed by causing the transistor circuit 22 to perform an amplifier operation.

  As described above, by using this embodiment, it is possible to compensate for the gain discontinuity associated with the power control of the high-frequency amplifier and reduce the current consumption at low power with a very simple configuration.

  The transistor circuit of the present invention can be used for a high frequency power amplifier or the like.

The figure which shows the transistor circuit in the 1st Embodiment of this invention Operational principle diagram of transistor circuit in the first embodiment of the present invention The figure which shows the transistor circuit in the 2nd Embodiment of this invention The figure which shows the transistor circuit in the 3rd Embodiment of this invention Transistor circuit and characteristic diagram thereof in the fourth embodiment of the present invention High-frequency amplifier and characteristic diagram thereof in the fifth embodiment of the present invention High-frequency amplifier and its operation principle diagram in the sixth embodiment of the present invention High-frequency amplifier and its operation principle diagram in the sixth embodiment of the present invention The figure which shows the high frequency amplifier in the 7th Embodiment of this invention Conventional amplifier and its characteristic diagram

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 High frequency power input terminal 2 High frequency power output terminal 3 1st power supply 4 2nd power supply 5 3rd power supply 6 Input matching circuit 7 Interstage matching circuit 8 Output matching circuit 9 Bias separation circuit 10 DC cut capacity 11 Transistor ON Resistance 12 Internal resistance of the diode 13 Depletion layer capacitance of the diode 14 Three-terminal switch element 15 First power connection terminal 16 Second power connection terminal 17 Control power supply 18 Attenuator 19 Terminal 22 Transistor circuit 23 Transistor circuit 100 Terminal
C1, C2, C3 capacitors
R1, R2, R3, R4, R5, R6 resistors
L1, L2, L3 inductor
TR1, TR2, TR3 transistors
TRB1, TRB2, TRB3 Bipolar transistors
TRF1 Field Effect Transistor

Claims (13)

In the first transistor for high frequency amplification, the base of the first transistor serving as the high frequency input terminal is biased by the first power source, and the collector of the first transistor serving as the high frequency output terminal is coupled to the second power source. Biased, the emitter of the first transistor is connected to the collector of the second transistor serving as a switch element, the emitter of the second transistor is grounded, and the base of the second transistor is biased by the third power supply In the structure, the second and third power supplies are simultaneously turned on / off. In the first transistor for high frequency amplification, the base of the first transistor serving as the high frequency input terminal is biased by the first power source, and the collector of the first transistor serving as the high frequency output terminal is coupled to the second power source. Biased, the emitter of the first transistor is connected to the collector of the second transistor serving as a switch element, the emitter of the second transistor is grounded, and the base of the second transistor is biased by the second power supply A transistor circuit characterized by comprising: 3. A high-frequency amplifier, wherein the gain of the amplifier is changed by turning on and off the second power supply of the transistor circuit according to claim 1 or 2. 3. A high-frequency amplifier characterized in that isolation of an amplifier is ensured by turning off the first power supply when the second power supply of the transistor circuit according to claim 1 is turned off. 3. A high-frequency amplifier characterized in that isolation of the amplifier is ensured by turning off the first power supply while the second power supply of the transistor circuit according to claim 1 is turned on. 6. A high-frequency amplifier comprising a plurality of transistor circuits according to claim 1 connected in series, wherein the gain of the amplifier is changed by turning on and off each power supply. 7. A high-frequency amplifier, wherein the transistor circuit according to claim 1 is connected to a front stage of a multistage amplifier to compensate for a gain variation of the amplifier accompanying power control. 7. The transistor circuit according to claim 1 is used as a final stage of a multi-stage amplifier, and is used as an amplification stage when the second power supply is on, and in the off state, the load of the transistor immediately before the final stage via a through state A high frequency amplifier characterized by changing impedance. 9. The high-frequency amplifier according to claim 1, wherein at least one of the first transistor and the second transistor is a bipolar transistor. 9. The high-frequency amplifier according to claim 1, wherein at least one of the first transistor and the second transistor is a field effect transistor. 9. The high-frequency amplifier according to claim 1, wherein at least one of the first transistor and the second transistor is a three-terminal switch. The high frequency amplifier according to claim 11, wherein the three-terminal switch in the transistor circuit is a switch using MEMS technology. 9. The high-frequency amplifier according to claim 1, wherein the first transistor and the second transistor use three-terminal elements having different operating principles.

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