JP5706118B2 - Heat treatment apparatus and heat treatment method - Google Patents

Description

  The present invention relates to a heat treatment apparatus and a heat treatment for heating a thin plate-shaped precision electronic substrate (hereinafter simply referred to as “substrate”) such as a semiconductor wafer or a glass substrate for a liquid crystal display device by irradiating flash light. Regarding the method.

  In recent years, in an impurity (ion) activation process of a semiconductor wafer after ion implantation, it is required to suppress the diffusion of impurities and make the junction depth shallower as the pattern of a semiconductor device becomes finer. As a technology that satisfies these requirements, flash lamp annealing is used to irradiate the surface of a semiconductor wafer with flash light (flash) using a xenon flash lamp (hereinafter, simply referred to as “flash lamp” means xenon flash lamp). (FLA) is drawing attention.

  The radiation spectral distribution of a xenon flash lamp ranges from the ultraviolet region to the near infrared region, has a shorter wavelength than the conventional halogen lamp, and almost coincides with the fundamental absorption band of a silicon semiconductor wafer. Therefore, when the semiconductor wafer is irradiated with flash light from the xenon flash lamp, the semiconductor wafer can be rapidly heated with little transmitted light. Further, it has been found that if the flash light irradiation is performed for a very short time of several milliseconds or less, only the vicinity of the surface of the semiconductor wafer can be selectively heated. Therefore, in flash lamp annealing, the surface of a semiconductor wafer into which ions are implanted is irradiated with flash light, and only the surface of the semiconductor wafer is heated to 1000 ° C. or higher in a very short time (several milliseconds or less). it can. As a result, only impurity activation can be performed without deeply diffusing the impurities.

  In addition, the current flowing through the flash lamp is chopper-controlled using an insulated gate bipolar transistor (IGBT), and the flash lamp is turned on for a longer time (approximately 10 milliseconds or more) than simply causing the flash lamp to emit light. Techniques for causing light emission are proposed in Patent Documents 1 and 2. By using such a technique, the surface temperature of the semiconductor wafer can be raised and lowered moderately, and better impurity activation and recovery of defects introduced into layers deeper than the impurity implanted layer during ion implantation. Can be realized. It should be noted that even if the temperature rises and falls slowly, it is just a comparison with ultra-high speed heating and cooling that simply causes the flash lamp to emit light, and in a very short time compared to conventional halogen lamp annealing. It is raising and lowering temperature.

JP 2009-070948 A JP 2009-099758 A

  In the techniques disclosed in Patent Documents 1 and 2, when a capacitor connected to each of a plurality of flash lamps is charged, and the accumulated charges are discharged by the flash lamps, the insulation is performed. A gate bipolar transistor chopper-controls the current flowing from the capacitor to the flash lamp. At this time, not all the electric charges accumulated in the capacitor are consumed for discharging. That is, as a result of chopper control by the insulated gate bipolar transistor, only a part of the electric charge accumulated in the capacitor may be discharged by the flash lamp. Rather, there are more cases where only a part of the stored charge is consumed rather than being consumed for flash emission. A portion of the stored charge is typically discharged when the semiconductor wafer to be annealed does not require as much energy.

  However, in the case where only a part of the electric charge accumulated in the capacitor is consumed for flash light emission, all of the plurality of flash lamps may not be discharged in the same manner. The chopper control of the current is realized by applying a pulse signal to the gate of the insulated gate bipolar transistor and turning on and off the current flowing through the flash lamp by the insulated gate bipolar transistor according to the pulse signal. If the waveform of this pulse signal differs for each insulated gate bipolar transistor for some reason, the state of charge consumption of the capacitor differs for each flash lamp, and all of the plurality of flash lamps may not be discharged in the same way. .

  Further, when the insulated gate bipolar transistor is short-circuited due to a failure, the charge of the capacitor corresponding to the insulated gate bipolar transistor is all discharged. On the contrary, when the insulated gate bipolar transistor is not conductive, the charge of the corresponding capacitor is not consumed at all. In addition, even if the flash lamp itself is defective, the capacitor does not consume any charge because it does not emit light. Even in these cases, all of the plurality of flash lamps are not discharged in the same manner.

  If the discharge status of some flash lamps is different, the intensity of the flash emission of some flash lamps will be different from that of other flash lamps, so the in-plane temperature distribution of the semiconductor wafer during flash lamp annealing will be uneven. Problem arises. For example, when all the charges of the corresponding capacitor are discharged only in a specific flash lamp of a plurality, the emission intensity of the flash lamp becomes stronger than that of other flash lamps, so that the semiconductor facing the flash lamp The area of the wafer is hotter than the other areas. Such non-uniform temperature distribution in the surface also causes processing failure.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide a heat treatment apparatus and a heat treatment method capable of preventing the flash lamp from emitting light with an inappropriate intensity.

In order to solve the above-mentioned problems, a first aspect of the present invention provides a heat treatment apparatus for heating a substrate by irradiating the substrate with flash light, a holding means for holding the substrate, and a substrate held by the holding means. A plurality of flash lamps that irradiate the flash light, a plurality of capacitors that are provided corresponding to the plurality of flash lamps in a one-to-one correspondence, and store charges for discharging the plurality of flash lamps to emit light; An insulated gate bipolar transistor that intermittently connects each of the plurality of flash lamps with a corresponding capacitor, and a plurality of power storages that are provided in one-to-one correspondence with the plurality of capacitors and that measure a storage voltage of the corresponding capacitor. Based on the measurement results by the voltage measuring means and the plurality of stored voltage measuring means, Detecting means for detecting an electric state, wherein the detecting means has a predetermined range of residual voltages of the plurality of capacitors measured by the plurality of storage voltage measuring means after the light emission of the plurality of flash lamps is completed. And the detection means determines that the residual voltage of any of the plurality of capacitors measured by the plurality of storage voltage measurement means is higher than an upper limit value of the predetermined range. Is larger than the lower limit of the predetermined range, it is determined that the insulated gate bipolar transistor is short-circuited. Features.

  According to a second aspect of the present invention, in the heat treatment apparatus according to the first aspect of the present invention, the detecting means is a period from when the charging of the plurality of capacitors is completed to when discharging of the plurality of flash lamps is started. In addition, the storage abnormality of the plurality of capacitors is detected based on the measurement result by the plurality of storage voltage measuring means.

According to a third aspect of the present invention, in the heat treatment apparatus according to the first or second aspect of the invention, the detection means is based on measurement results obtained by the plurality of storage voltage measurement means when the apparatus has stopped abnormally. The presence or absence of electric charge remaining in the plurality of capacitors is detected.

According to a fourth aspect of the present invention, in a heat treatment method for heating a substrate by irradiating the substrate with flash light, a plurality of capacitors provided in a one-to-one correspondence with the plurality of flash lamps are charged. A charging step; a discharging step of discharging the charges accumulated in the plurality of capacitors by the plurality of flash lamps to emit flash light; and a power storage for detecting a storage state by measuring a storage voltage of the plurality of capacitors. A step of detecting, wherein the discharge step intermittently connects each of the plurality of flash lamps to a corresponding capacitor by an insulated gate bipolar transistor, and charges accumulated in the plurality of capacitors are stored in the plurality of flash lamps. In the power storage detection step, the flash lamps are turned off. Later, the residual voltage of the plurality of capacitors as energy storage abnormality of the plurality of capacitors when not within the predetermined range, the power storage detection step, the upper limit of any of the residual voltage said predetermined range of said plurality of capacitors If the value is larger than the value, it is determined that the flash lamp corresponding to the capacitor has not emitted light, and if the residual voltage is smaller than the lower limit value of the predetermined range, it is determined that the insulated gate bipolar transistor is short-circuited. It is characterized by that.

According to a fifth aspect of the present invention, in the heat treatment method according to the fourth aspect of the present invention, the power storage detecting step is from the completion of charging the plurality of capacitors until the discharge of the plurality of flash lamps is started. In the meantime, the storage voltage of the plurality of capacitors is measured to detect storage abnormality.

According to the first to third aspects of the present invention, the plurality of storage voltage measuring means for measuring the storage voltage corresponding to the plurality of capacitors on a one-to-one basis is provided, and the measurement results obtained by the plurality of storage voltage measuring means are provided. Based on this, since the storage states of the plurality of capacitors are detected, it is possible to individually check for abnormalities in the drive circuits of the plurality of flash lamps and to prevent the flash lamps from emitting light with an inappropriate intensity.
In addition, according to the first to third aspects of the present invention, after the light emission of the plurality of flash lamps is completed, in order to detect the storage abnormality of the plurality of capacitors, the charges accumulated in the capacitors are appropriately supplied to the flash lamp. It can be checked whether or not it has been discharged.

In particular, according to the second aspect of the present invention, in order to detect the storage abnormality of the plurality of capacitors between the completion of charging of the plurality of capacitors and the start of discharge of the plurality of flash lamps, the plurality of capacitors It can be checked whether the battery is properly charged.

In particular, according to the third aspect of the present invention, when the apparatus abnormally stops, the presence or absence of electric charge remaining in the plurality of capacitors is detected, so that a reliable safety check can be performed.

Further, according to the inventions of claim 4 and claim 5 , since the storage voltage is detected by measuring the storage voltage of the plurality of capacitors, the abnormalities in the drive circuits of the plurality of flash lamps are individually checked and inappropriate. It is possible to prevent the flash lamp from emitting light due to the intensity.
According to the invention of claim 4 and claim 5 , after the light emission of the plurality of flash lamps ends, the charge accumulated in the capacitor is detected in order to detect the storage error by measuring the storage voltage of the plurality of capacitors. It is possible to check whether or not the battery is properly discharged by the flash lamp.

In particular, according to the invention of claim 5, the storage voltage abnormality is detected by measuring the storage voltage of the plurality of capacitors after the charging of the plurality of capacitors is completed and before the discharge of the plurality of flash lamps is started. Therefore, it can be checked whether or not a plurality of capacitors are properly charged.

It is a longitudinal cross-sectional view which shows the structure of the heat processing apparatus which concerns on this invention. It is sectional drawing which shows the gas path of the heat processing apparatus of FIG. It is sectional drawing which shows the structure of a holding | maintenance part. It is a top view which shows a hot plate. It is a longitudinal cross-sectional view which shows the structure of the heat processing apparatus of FIG. It is a figure which shows the drive circuit of a flash lamp. It is a flowchart which shows the process sequence regarding the voltage monitor of a capacitor | condenser in the heat processing apparatus of FIG. It is a flowchart which shows the process sequence regarding the voltage monitor of a capacitor | condenser in the heat processing apparatus of FIG. It is a figure which shows an example of the waveform of a pulse signal. It is a figure which shows an example of the light emission waveform at the time of carrying out chopper control of the electric current which flows into a flash lamp. It is a figure which shows an example of the light emission waveform at the time of making a flash lamp light-emit simply. It is a figure for demonstrating determination of the residual voltage of a some capacitor | condenser.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  First, the overall configuration of the heat treatment apparatus according to the present invention will be outlined. FIG. 1 is a longitudinal sectional view showing a configuration of a heat treatment apparatus 1 according to the present invention. The heat treatment apparatus 1 is a flash lamp annealing apparatus that irradiates a substantially circular semiconductor wafer W as a substrate with flash light and heats the semiconductor wafer W.

  The heat treatment apparatus 1 includes a substantially cylindrical chamber 6 that accommodates a semiconductor wafer W, and a lamp house 5 that houses a plurality of flash lamps FL. Further, the heat treatment apparatus 1 includes a control unit 3 that controls each operation mechanism provided in the chamber 6 and the lamp house 5 to execute the heat treatment of the semiconductor wafer W.

  The chamber 6 is provided below the lamp house 5 and includes a chamber side 63 having a substantially cylindrical inner wall and a chamber bottom 62 covering the lower part of the chamber side 63. A space surrounded by the chamber side 63 and the chamber bottom 62 is defined as a heat treatment space 65. An upper opening 60 is formed above the heat treatment space 65, and a chamber window 61 is attached to the upper opening 60 to be closed.

  The chamber window 61 constituting the ceiling portion of the chamber 6 is a disk-shaped member made of quartz and functions as a quartz window that transmits the light emitted from the lamp house 5 to the heat treatment space 65. The chamber bottom 62 and the chamber side 63 constituting the main body of the chamber 6 are formed of, for example, a metal material having excellent strength and heat resistance such as stainless steel, and a ring on the upper side of the inner side surface of the chamber side 63. 631 is formed of an aluminum (Al) alloy or the like having durability superior to stainless steel against deterioration due to light irradiation.

  Further, in order to maintain the airtightness of the heat treatment space 65, the chamber window 61 and the chamber side portion 63 are sealed by an O-ring. That is, the O-ring is sandwiched between the lower surface peripheral portion of the chamber window 61 and the chamber side portion 63, the clamp ring 90 is brought into contact with the upper peripheral portion of the chamber window 61, and the clamp ring 90 is attached to the chamber side portion 63. The chamber window 61 is pressed against the O-ring by screwing.

  The chamber bottom 62 has a plurality (in this embodiment) for supporting the semiconductor wafer W from the lower surface (surface opposite to the side irradiated with light from the lamp house 5) through the holding portion 7. 3) support pins 70 are provided upright. The support pin 70 is made of, for example, quartz and is fixed from the outside of the chamber 6 and can be easily replaced.

The chamber side 63 has a transfer opening 66 for carrying in and out the semiconductor wafer W, and the transfer opening 66 can be opened and closed by a gate valve 185 that rotates about a shaft 662. In a portion of the chamber side 63 opposite to the transfer opening 66, an inert gas such as nitrogen (N ₂ ) gas, helium (He) gas, argon (Ar) gas, etc. Alternatively, an introduction path 81 for introducing oxygen (O ₂ ) gas or the like is formed, one end of which is connected to an air supply mechanism (not shown) via a valve 82, and the other end is formed inside the chamber side portion 63. Connected to the gas introduction buffer 83. A discharge passage 86 for discharging the gas in the heat treatment space 65 is formed in the transfer opening 66 and is connected to an exhaust mechanism (not shown) through a valve 87.

  FIG. 2 is a cross-sectional view of the chamber 6 cut along a horizontal plane at the position of the gas introduction buffer 83. As shown in FIG. 2, the gas introduction buffer 83 is formed over about ３ of the inner periphery of the chamber side 63 on the opposite side of the transfer opening 66 shown in FIG. Then, the processing gas guided to the gas introduction buffer 83 is supplied into the heat treatment space 65 from the plurality of gas supply holes 84.

  The heat treatment apparatus 1 also includes a substantially disc-shaped holding unit 7 that holds the semiconductor wafer W in a horizontal position inside the chamber 6 and performs preheating of the held semiconductor wafer W before irradiation with flash light. And a holding unit elevating mechanism 4 that elevates the unit 7 with respect to the chamber bottom 62 which is the bottom surface of the chamber 6. 1 includes a substantially cylindrical shaft 41, a moving plate 42, guide members 43 (three arranged around the shaft 41 in the present embodiment), a fixed plate 44, a ball screw 45, It has a nut 46 and a motor 40. A substantially circular lower opening 64 having a smaller diameter than the holding portion 7 is formed in the chamber bottom 62 which is the lower portion of the chamber 6, and the stainless steel shaft 41 is inserted through the lower opening 64 to hold the holding portion. 7 (strictly speaking, the hot plate 71 of the holding unit 7) is connected to the lower surface of the holding unit 7 to support it.

  A nut 46 that is screwed into the ball screw 45 is fixed to the moving plate 42. The moving plate 42 is slidably guided by a guide member 43 that is fixed to the chamber bottom 62 and extends downward, and is movable in the vertical direction. Further, the moving plate 42 is connected to the holding unit 7 via the shaft 41.

  The motor 40 is installed on a fixed plate 44 attached to the lower end of the guide member 43, and is connected to the ball screw 45 via the timing belt 401. When the holding part 7 is raised and lowered by the holding part raising / lowering mechanism 4, the motor 40 as the driving part rotates the ball screw 45 under the control of the control part 3, and the moving plate 42 to which the nut 46 is fixed follows the guide member 43. Move vertically. As a result, the shaft 41 fixed to the moving plate 42 moves along the vertical direction, and the holding unit 7 connected to the shaft 41 moves between the delivery position of the semiconductor wafer W shown in FIG. 1 and the semiconductor wafer W shown in FIG. Move up and down smoothly between the processing positions.

  On the upper surface of the moving plate 42, a mechanical stopper 451 having a substantially semi-cylindrical shape (a shape obtained by cutting the cylinder in half along the longitudinal direction) is provided so as to extend along the ball screw 45. If the upper limit of the mechanical stopper 451 is struck against the end plate 452 provided at the end of the ball screw 45, the moving plate 42 is prevented from rising abnormally. Thereby, the holding part 7 does not rise above a predetermined position below the chamber window 61, and the collision between the holding part 7 and the chamber window 61 is prevented.

  The holding unit lifting mechanism 4 has a manual lifting unit 49 that manually lifts and lowers the holding unit 7 when performing maintenance inside the chamber 6. The manual elevating part 49 has a handle 491 and a rotating shaft 492. By rotating the rotating shaft 492 via the handle 491, the ball screw 45 connected to the rotating shaft 492 is rotated via the timing belt 495 to hold the holding part. 7 can be moved up and down.

  A telescopic bellows 47 that surrounds the shaft 41 and extends downward is provided below the chamber bottom 62, and its upper end is connected to the lower surface of the chamber bottom 62. On the other hand, the lower end of the bellows 47 is attached to the bellows lower end plate 471. The bellows lower end plate 471 is attached by being screwed to the shaft 41 by a flange-shaped member 411. The bellows 47 is contracted when the holding portion 7 is raised with respect to the chamber bottom 62 by the holding portion lifting mechanism 4, and the bellows 47 is expanded when the holding portion 7 is lowered. When the holding unit 7 moves up and down, the airtight state in the heat treatment space 65 is maintained by the expansion and contraction of the bellows 47.

  FIG. 3 is a cross-sectional view showing the configuration of the holding unit 7. The holding unit 7 is installed on a hot plate (heating plate) 71 that preheats the semiconductor wafer W (so-called assist heating), and an upper surface of the hot plate 71 (a surface on the side where the holding unit 7 holds the semiconductor wafer W). The susceptor 72 is provided. As described above, the shaft 41 that moves up and down the holding unit 7 is connected to the lower surface of the holding unit 7. The susceptor 72 is made of quartz (or may be aluminum nitride (AIN) or the like), and a pin 75 for preventing displacement of the semiconductor wafer W is provided on the upper surface thereof. The susceptor 72 is installed on the hot plate 71 with its lower surface in surface contact with the upper surface of the hot plate 71. Thus, the susceptor 72 diffuses the thermal energy from the hot plate 71 and transmits it to the semiconductor wafer W placed on the upper surface of the susceptor 72, and can be removed from the hot plate 71 and cleaned during maintenance.

  The hot plate 71 includes an upper plate 73 and a lower plate 74 made of stainless steel. A resistance heating wire 76 such as a nichrome wire for heating the hot plate 71 is disposed between the upper plate 73 and the lower plate 74, and is filled with a conductive nickel (Ni) solder and sealed. The end portions of the upper plate 73 and the lower plate 74 are bonded by brazing.

  FIG. 4 is a plan view showing the hot plate 71. As shown in FIG. 4, the hot plate 71 includes a disc-shaped zone 711 and an annular zone 712 that are concentrically arranged in a central portion of a region facing the held semiconductor wafer W, and a zone 712. There are four zones 713 to 716 obtained by equally dividing a peripheral substantially annular region into four equal parts in the circumferential direction, and a slight gap is formed between the zones. The hot plate 71 is provided with three through holes 77 through which the support pins 70 are inserted, every 120 ° on the circumference of the gap between the zone 711 and the zone 712.

  In each of the six zones 711 to 716, heaters are individually formed so that mutually independent resistance heating wires 76 circulate, and each zone is individually formed by a heater built in each zone. Heated. The semiconductor wafer W held by the holding unit 7 is heated by heaters built in the six zones 711 to 716. Each of the zones 711 to 716 is provided with a sensor 710 that measures the temperature of each zone using a thermocouple. Each sensor 710 passes through the inside of a substantially cylindrical shaft 41 and is connected to the control unit 3.

  When the hot plate 71 is heated, the resistance heating wire disposed in each zone is set so that the temperature of each of the six zones 711 to 716 measured by the sensor 710 becomes a predetermined temperature. The amount of power supplied to 76 is controlled by the control unit 3. The temperature control of each zone by the control unit 3 is performed by PID (Proportional, Integral, Derivative) control. In the hot plate 71, the temperature of each of the zones 711 to 716 is continuously measured until the heat treatment of the semiconductor wafer W (when plural semiconductor wafers W are continuously processed, the heat treatment of all the semiconductor wafers W) is completed. Then, the power supply amount to the resistance heating wire 76 disposed in each zone is individually controlled, that is, the temperature of the heater built in each zone is individually controlled, and the temperature of each zone becomes the set temperature. Maintained. The set temperature of each zone can be changed by an offset value set individually from the reference temperature.

  The resistance heating wires 76 respectively disposed in the six zones 711 to 716 are connected to a power supply source (not shown) via a power line passing through the inside of the shaft 41. On the way from the power supply source to each zone, the power lines from the power supply source are arranged so as to be electrically insulated from each other inside a stainless tube filled with an insulator such as magnesia (magnesium oxide). The The interior of the shaft 41 is open to the atmosphere.

  Next, the lamp house 5 includes a light source composed of a plurality of (30 in this embodiment) xenon flash lamps FL inside the housing 51, and a reflector 52 provided so as to cover the light source, It is configured with. A lamp light emission window 53 is attached to the bottom of the casing 51 of the lamp house 5. The lamp light radiation window 53 constituting the floor of the lamp house 5 is a plate-like member made of quartz. By installing the lamp house 5 above the chamber 6, the lamp light emission window 53 faces the chamber window 61. The lamp house 5 heats the semiconductor wafer W by irradiating the semiconductor wafer W held by the holding unit 7 in the chamber 6 with flash light from the flash lamp FL via the lamp light emission window 53 and the chamber window 61. .

  Each of the plurality of flash lamps FL is a rod-shaped lamp having a long cylindrical shape, and the longitudinal direction of each of the flash lamps FL is along the main surface of the semiconductor wafer W held by the holding unit 7 (that is, along the horizontal direction). They are arranged in a plane so as to be parallel to each other. Therefore, the plane formed by the arrangement of the flash lamps FL is also a horizontal plane.

  FIG. 6 is a diagram showing a driving circuit for the flash lamp FL. As shown in the figure, a capacitor 93, a coil 94, a flash lamp FL, and an IGBT (insulated gate bipolar transistor) 96 are connected in series. The flash lamp FL includes a rod-shaped glass tube (discharge tube) 92 in which xenon gas is sealed and an anode and a cathode are disposed at both ends thereof, and a trigger electrode provided on the outer peripheral surface of the glass tube 92. 91. A predetermined voltage is applied to the capacitor 93 by the power supply unit 95, and a charge corresponding to the applied voltage is charged. A high voltage can be applied to the trigger electrode 91 from the trigger circuit 97. The timing at which the trigger circuit 97 applies a voltage to the trigger electrode 91 is controlled by the control unit 3.

  The IGBT 96 is a bipolar transistor in which a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) is incorporated in a gate portion, and is a switching element suitable for handling high power. An IGBT control unit 98 is connected to the gate of the IGBT 96. The IGBT control unit 98 is a circuit that drives the IGBT 96 by applying a pulse signal to the gate of the IGBT 96. Specifically, the IGBT 96 is turned on when the IGBT control unit 98 applies a voltage higher than a predetermined value (Hi voltage) to the gate of the IGBT 96, and the IGBT 96 is turned off when a voltage lower than the predetermined value (Low voltage) is applied. It becomes. In this way, the drive circuit including the flash lamp FL is turned on / off by the IGBT 96. When the IGBT 96 is turned on / off, the connection between the flash lamp FL and the corresponding capacitor 93 is interrupted.

  The waveform of the pulse signal applied to the gate of the IGBT 96 by the IGBT control unit 98 is set by the waveform setting unit 31 of the control unit 3. The waveform setting unit 31 sets the waveform of the pulse signal based on the input content from the input unit 33 and outputs it to the IGBT control unit 98. In the IGBT control unit 98, the waveform setting unit 31 outputs a pulse signal to the gate of the IGBT 96 according to the waveform to turn on and off the IGBT 96.

  Even if the IGBT 96 is turned on while the capacitor 93 is charged and a high voltage is applied to both end electrodes of the glass tube 92, the xenon gas is electrically an insulator, so that the glass is normal in the state. No electricity flows in the tube 92. However, when the trigger circuit 97 applies a voltage to the trigger electrode 91 to break the insulation, an electric current instantaneously flows in the glass tube 92 due to the discharge between the two end electrodes, and the excitation of the xenon atoms or molecules at that time Light is emitted.

  Further, as shown in FIG. 6, the drive circuit for the flash lamp FL is provided with a voltage monitor 21 that measures the voltage across the capacitor 93. The voltage monitor 21 is a kind of A / D converter, converts the voltage across the capacitor 93 that is an analog signal into a digital signal, and transmits the digital signal to the control unit 3.

  The voltage monitor 21 measures the voltage across the capacitor 93 via a voltage dividing circuit including two resistors 22 and 23. That is, the two electrodes 22 and 23 connected in series are connected between the two electrodes of the capacitor 93, and the voltage monitor 21 is connected between the resistor 22 and the resistor 23. The resistance value of the resistor 22 is significantly larger than the resistance value of the resistor 23 whose one end is grounded (for example, the resistance value of the resistor 23 is 10 kΩ while the resistance value of the resistor 23 is 10 kΩ). ). Normally, the voltage across the capacitor 93 immediately after charging is very large (in this embodiment, about 4000 V), but by providing such a voltage dividing circuit, the load on the voltage monitor 21 can be reduced ( In the above example, about 4V). A capacitor 24 for removing noise is connected to both ends of the resistor 23.

  The drive circuit as shown in FIG. 6 is provided corresponding to a plurality of flash lamps FL on a one-to-one basis, and in this embodiment, 30 flash lamps FL are provided, so 30 drive circuits are also provided. Is provided. That is, 30 capacitors 93 that store electric charges for causing the flash lamps FL to emit light are provided in one-to-one correspondence with the 30 flash lamps FL. Further, 30 voltage monitors 21 for measuring the storage voltage of each capacitor 93 are provided corresponding to the 30 capacitors 93 on a one-to-one basis.

  The reflector 52 in FIG. 1 is provided above the plurality of flash lamps FL so as to cover the entirety thereof. The basic function of the reflector 52 is to reflect the light emitted from the plurality of flash lamps FL toward the holding unit 7. The reflector 52 is formed of an aluminum alloy plate, and the surface (the surface facing the flash lamp FL) is roughened by blasting to exhibit a satin pattern. The roughening process is performed when the surface of the reflector 52 is a perfect mirror surface, and a regular pattern is generated in the intensity of the reflected light from the plurality of flash lamps FL, so that the surface temperature distribution of the semiconductor wafer W is obtained. This is because the uniformity of the is reduced.

  The control unit 3 controls the various operation mechanisms provided in the heat treatment apparatus 1. The configuration of the control unit 3 as hardware is the same as that of a general computer. That is, the control unit 3 stores a CPU that performs various arithmetic processes, a ROM that is a read-only memory that stores basic programs, a RAM that is a readable and writable memory that stores various information, control software, data, and the like. It is configured with a magnetic disk. The control unit 3 includes a waveform setting unit 31 and a detection unit 32 and is connected to the input unit 33. The waveform setting unit 31 and the detection unit 32 are function processing units realized by the CPU of the control unit 3 executing a predetermined processing program. As the input unit 33, various known input devices such as a keyboard, a mouse, and a touch panel can be employed. As described above, the waveform setting unit 31 sets the waveform of the pulse signal based on the input content from the input unit 33, and outputs it to the IGBT control unit 98. The detection unit 32 detects the storage state of the plurality of capacitors 93 based on the measurement results obtained by the plurality of voltage monitors 21, details of which will be described later.

  In addition to the above configuration, the heat treatment apparatus 1 is used for various cooling purposes in order to prevent excessive temperature rise of the chamber 6 and the lamp house 5 due to the heat energy generated from the flash lamp FL and the hot plate 71 during the heat treatment of the semiconductor wafer W. It has the structure of For example, water-cooled tubes (not shown) are provided on the chamber side 63 and the chamber bottom 62 of the chamber 6. The lamp house 5 has an air cooling structure provided with a gas supply pipe 55 and an exhaust pipe 56 for exhausting heat by forming a gas flow therein (see FIGS. 1 and 5). Air is also supplied to the gap between the chamber window 61 and the lamp light emission window 53 to cool the lamp house 5 and the chamber window 61.

  Next, a processing procedure for the semiconductor wafer W in the heat treatment apparatus 1 will be described. The semiconductor wafer W to be processed here is a semiconductor substrate to which impurities (ions) are added by an ion implantation method. The activation of the impurities is performed by flash light irradiation heat treatment (annealing) by the heat treatment apparatus 1. In this specification, first, the entire procedure of the flash light irradiation heat treatment will be briefly described, and then the voltage monitor of the capacitor 93 will be particularly described. The processing procedure of the heat treatment apparatus 1 described below proceeds by the control unit 3 controlling each operation mechanism of the heat treatment apparatus 1.

  First, the holding unit 7 is lowered from the processing position shown in FIG. 5 to the delivery position shown in FIG. The “processing position” is the position of the holding unit 7 when the semiconductor wafer W is irradiated with light from the flash lamp FL, and is the position in the chamber 6 of the holding unit 7 shown in FIG. Further, the “delivery position” is the position of the holding unit 7 when the semiconductor wafer W is carried in and out of the chamber 6, and is the position of the holding unit 7 shown in FIG. The reference position of the holding unit 7 in the heat treatment apparatus 1 is the processing position. Before the processing, the holding unit 7 is located at the processing position, and this is lowered to the delivery position at the start of processing. As shown in FIG. 1, when the holding portion 7 is lowered to the delivery position, the holding portion 7 comes close to the chamber bottom portion 62, and the tip of the support pin 70 penetrates the holding portion 7 and protrudes above the holding portion 7.

  Next, when the holding unit 7 is lowered to the delivery position, the valve 82 and the valve 87 are opened, and normal temperature nitrogen gas is introduced into the heat treatment space 65 of the chamber 6. Subsequently, the gate valve 185 is opened to open the transfer opening 66, and the semiconductor wafer W is loaded into the chamber 6 through the transfer opening 66 by the transfer robot outside the apparatus and placed on the plurality of support pins 70. Is done.

  The purge amount of nitrogen gas into the chamber 6 when the semiconductor wafer W is loaded is about 40 liters / minute, and the supplied nitrogen gas is moved from the gas introduction buffer 83 in the direction of the arrow AR4 shown in FIG. Then, the exhaust gas is exhausted by utility exhaust via the discharge path 86 and the valve 87 shown in FIG. A part of the nitrogen gas supplied to the chamber 6 is also discharged from an outlet (not shown) provided inside the bellows 47. In each step described below, nitrogen gas is continuously supplied to and exhausted from the chamber 6, and the supply amount of the nitrogen gas is variously changed according to the processing process of the semiconductor wafer W.

  When the semiconductor wafer W is loaded into the chamber 6, the transfer opening 66 is closed by the gate valve 185. The holding unit lifting mechanism 4 raises the holding unit 7 from the delivery position to a processing position close to the chamber window 61. In the process in which the holding unit 7 is lifted from the delivery position, the semiconductor wafer W is transferred from the support pins 70 to the susceptor 72 of the holding unit 7 and is placed and held on the upper surface of the susceptor 72. When the holding unit 7 is raised to the processing position, the semiconductor wafer W held by the susceptor 72 is also held at the processing position.

  Each of the six zones 711 to 716 of the hot plate 71 is heated to a predetermined temperature by a heater (resistive heating wire 76) individually incorporated in each zone (between the upper plate 73 and the lower plate 74). ing. When the holding unit 7 rises to the processing position and the semiconductor wafer W comes into contact with the holding unit 7, the semiconductor wafer W is preheated by the heater built in the hot plate 71 and the temperature gradually rises.

  Preheating for about 60 seconds is performed at this processing position, and the temperature of the semiconductor wafer W rises to a preset preheating temperature T1. The preheating temperature T1 is set to about 200 ° C. to 700 ° C., preferably about 350 ° C. to 600 ° C. (500 ° C. in the present embodiment) at which impurities added to the semiconductor wafer W do not diffuse due to heat. . Further, the distance between the holding unit 7 and the chamber window 61 can be arbitrarily adjusted by controlling the rotation amount of the motor 40 of the holding unit lifting mechanism 4.

  After the preheating time of about 60 seconds elapses, flash light is irradiated from the flash lamp FL of the lamp house 5 toward the semiconductor wafer W under the control of the control unit 3 while the holding unit 7 is positioned at the processing position. When performing flash light irradiation from the flash lamp FL, the power supply unit 95 charges the capacitor 93 in advance to accumulate electric charges. Further, the waveform setting unit 31 sets the waveform of the pulse signal output to the gate of the IGBT 96 based on the input content from the input unit 33. Then, the IGBT controller 98 controls ON / OFF of the IGBT 96 according to the waveform to control the current flowing from the capacitor 93 to the flash lamp FL to emit light from the flash lamp FL and irradiate the semiconductor wafer W with flash light. Although the total light emission time of the flash lamp FL depends on the waveform of the pulse signal set by the waveform setting unit 31, it is 1 second or less at the longest.

  By irradiating the semiconductor wafer W held by the holding unit 7 at the processing position with flash light, the surface temperature of the semiconductor wafer W is raised to the processing temperature T2 in a short time. The processing temperature T2 is a temperature at which the impurities injected into the semiconductor wafer W are activated, and is set to 1000 ° C. or higher.

  As described above, the flash light irradiation heating by the flash lamp FL is finished, and after waiting for about 10 seconds at the processing position, the holding unit 7 is lowered again to the delivery position shown in FIG. The wafer W is transferred from the holding unit 7 to the support pins 70. Subsequently, the transfer opening 66 closed by the gate valve 185 is opened, and the semiconductor wafer W placed on the support pins 70 is unloaded by a transfer robot outside the apparatus, and the semiconductor wafer W is flushed in the heat treatment apparatus 1. The light irradiation heat treatment is completed.

  As described above, nitrogen gas is continuously supplied to the chamber 6 during the heat treatment of the semiconductor wafer W in the heat treatment apparatus 1, and the supply amount is about 30 liters / minute when the holding unit 7 is located at the processing position. When the holding unit 7 is located at a position other than the processing position, the rate is about 40 liters / minute.

  Next, the voltage monitor of the capacitor 93 will be further described. 7 and 8 are flowcharts showing a processing procedure regarding voltage monitoring of the capacitor 93 in the heat treatment apparatus 1. First, the waveform setting unit 31 sets the waveform of the pulse signal (step S1). FIG. 9 is a diagram illustrating an example of a waveform of a pulse signal. The waveform of the pulse signal can be defined by inputting from the input unit 33 a recipe in which the pulse width time (on time) and the pulse interval time (off time) are sequentially set as parameters. When an operator inputs a recipe describing such parameters from the input unit 33 to the control unit 3, the waveform setting unit 31 of the control unit 3 sets a pulse waveform that repeats ON / OFF as shown in FIG. Then, the waveform setting unit 31 outputs the set waveform to the IGBT control unit 98. In the present embodiment, 30 IGBT control units 98 are provided corresponding to 30 flash lamps FL on a one-to-one basis, and the 30 IGBT control units 98 are the same as shown in FIG. A pulse waveform is output.

  Further, charging of the capacitor 93 by the power supply unit 95 is started (step S2). In the present embodiment, the power supply unit 95 performs charging by applying a voltage of 4000 V to the capacitor 93 for a predetermined charging time (for example, 50 seconds). All of the 30 capacitors 93 provided corresponding to the 30 flash lamps FL are individually charged by the power supply unit 95. In the charging process of steps S2 and S3, each of the 30 capacitors 93 accumulates electric charge according to its electrostatic capacity and charging voltage.

  After a predetermined charging time has elapsed, the process proceeds from step S3 to step S4, where it is determined whether or not the storage voltage after charging all 30 capacitors 93 is equal to the charging voltage by the power supply unit 95. Here, the “storage voltage” is a voltage generated by the electric charge stored in the capacitor 93, and the storage voltage is measured by the voltage monitor 21. The “charging voltage” is a voltage (4000 V in this embodiment) applied to the capacitor 93 by the power supply unit 95 during charging.

  In step S <b> 4, the detection unit 32 of the control unit 3 detects each of the 30 capacitors 93 based on the voltage measurement result by the 30 voltage monitors 21 provided in one-to-one correspondence with the 30 capacitors 93. It is determined whether or not the stored voltage is equal to the charging voltage. In the determination, the determination may be made based on whether or not the stored voltage is within an allowable range with respect to the charging voltage (for example, within ± 5% of the charging voltage).

  When the detection unit 32 detects that the stored voltage is different from the charging voltage even in one of the thirty capacitors 93, the process proceeds to step S5 and a corresponding process is performed as a charging error. Specifically, the capacitor 93 whose stored voltage is different from the charging voltage and the power supply unit 95 that has charged the capacitor 93 are inspected, and if there is a malfunction, repair or replacement is performed.

  On the other hand, when the storage voltage of all 30 capacitors 93 is equal to the charging voltage, it is a case where all the capacitors 93 are normally charged, and the process proceeds to step S6 to start discharging the flash lamp FL. At the same time, the IGBT control unit 98 outputs a pulse signal to the gate of the IGBT 96 according to the pulse waveform as shown in FIG. 9 set by the waveform setting unit 31 (step S7). As a result, the flash lamp FL emits light, and the semiconductor wafer W is irradiated with the flash light. However, in the present embodiment, the current flowing from the capacitor 93 to the flash lamp FL is chopper-controlled by the IGBT 96 being repeatedly turned on and off.

  When the IGBT control unit 98 outputs a pulse signal to the gate of the IGBT 96 according to the pulse waveform of FIG. 9, the IGBT 96 is turned on when the pulse signal output from the IGBT control unit 98 is on, and the IGBT 96 is turned off when the pulse signal is off. . As a result, the circuit including the flash lamp FL and the capacitor 93 is turned on / off by the IGBT 96.

  Further, the control unit 3 controls the trigger circuit 97 and applies a trigger voltage to the trigger electrode 91 in synchronization with the timing when the IGBT control unit 98 first turns on the IGBT 96. When the charge is accumulated in the capacitor 93 and the IGBT 96 is turned on, and when a high voltage is applied to the trigger electrode 91 in synchronization therewith, the charge accumulated in the capacitor 93 is transferred to the glass tube 92 of the flash lamp FL. A discharge occurs between the electrodes at both ends, and current starts to flow, and light is emitted by excitation of atoms or molecules of xenon at that time. That is, the flash lamp FL starts to emit light, and the current value flowing through the flash lamp FL increases with time.

  When energization of the flash lamp FL is once started and the IGBT 96 is repeatedly turned on and off intermittently in a state where the current value remains a predetermined value or more, the flash lamp FL is not required to be applied to the trigger electrode 91. Current continues to flow. That is, if a high voltage is applied to the trigger electrode 91 only when the IGBT 96 is first turned on, then the current continues to flow through the flash lamp FL without applying the trigger voltage. When the IGBT 96 is in the on state, the current value flowing in the glass tube 92 of the flash lamp FL increases, and when the IGBT 96 is in the off state, the current value decreases. When the pulse interval time is long or when the current value flowing through the flash lamp FL is low, a high voltage may be applied to the trigger electrode 91 each time the IGBT 96 is turned on. Further, a high voltage may be applied to the trigger electrode 91 at regular time intervals.

  In this way, the current value waveform is defined by the pattern in which the current continues to flow through the flash lamp FL and the IGBT 96 is turned on and off. The emission intensity of the flash lamp FL is substantially proportional to the current flowing through the flash lamp FL. Therefore, the light emission waveform of the flash lamp FL approximates the waveform of the current value flowing through the flash lamp FL.

  When the flash lamp FL is simply caused to emit light without using the IGBT 96, almost all of the charge accumulated in the capacitor 93 is consumed by one light emission, and the output waveform from the flash lamp FL is shown in FIG. Such a single pulse has a width of about 0.1 to 10 milliseconds. On the other hand, in the present embodiment, the IGBT 96 is connected to the circuit including the flash lamp FL and a pulse signal is output to the gate thereof, whereby the circuit is intermittently turned on / off by the IGBT 96 and flashed from the capacitor 93. The current flowing through the lamp FL is chopper controlled. As a result, the light emission of the flash lamp FL is chopper-controlled, and the electric charge accumulated in the capacitor 93 is intermittently discharged and divided and consumed by the flash lamp FL, and the flash lamp is consumed for a very short time. FL repeats flashing. The IGBT 96 is turned on before the current value completely becomes “0”, and the current value increases again. Therefore, the light emission intensity becomes completely “0” even while the flash lamp FL is repeatedly blinking. It is not a thing.

  As described above, the waveform setting unit 31 of the control unit 3 sets the waveform of the pulse signal based on the input content from the input unit 33, and the IGBT control unit 98 outputs the pulse signal to the gate of the IGBT 96 according to the waveform. Then, the IGBT 96 is controlled to be turned on / off according to the pulse signal output from the IGBT control unit 98, and the circuit including the flash lamp FL is turned on / off by the IGBT 96, whereby the current flowing through the flash lamp FL is chopper-controlled. A light emission waveform is defined. That is, the waveform setting unit 31 directly sets the waveform of the pulse signal output to the gate of the IGBT 96, but indirectly sets the light emission waveform of the flash lamp FL. By appropriately adjusting the pulse width time and the pulse interval time input from the input unit 33, the waveform of the pulse signal output from the IGBT control unit 98 to the gate of the IGBT 96 changes, and the emission waveform of the flash lamp FL is also free. It can be set.

  FIG. 10 is a diagram illustrating an example of a light emission waveform when the current flowing through the flash lamp FL is chopper-controlled. When the IGBT control unit 98 outputs a pulse signal having a waveform as shown in FIG. 9 to the gate of the IGBT 96 and chopper-controls the current flowing through the flash lamp FL, the emission waveform of the flash lamp FL is as shown in FIG. Become. In the light emission waveform shown in FIG. 10, the light emission intensity first rises to some extent with time, and then the light emission intensity becomes a substantially constant value while repeating fine increase and decrease, and then the light emission intensity decreases. The flash lamp FL emits light with a light emission waveform as shown in FIG. 10, and the semiconductor wafer W held by the holding portion 7 at the processing position is irradiated with the flash light. Note that the timing at which the discharge light emission of the flash lamp FL is started in steps S6 and S7 is when the preheating time of about 60 seconds of the semiconductor wafer W has elapsed.

  When the light emission of the flash lamp FL as shown in FIG. 10 ends, the process proceeds from step S8 to step S9, and it is determined whether or not the residual voltage of the 30 capacitors 93 is within a predetermined allowable range. Here, “residual voltage” is a kind of stored voltage, and in particular, is a voltage generated by the charge remaining in the capacitor 93 after the end of flash emission.

  In step S <b> 9, the detection unit 32 of the control unit 3 detects each of the 30 capacitors 93 based on the voltage measurement result by the 30 voltage monitors 21 provided in one-to-one correspondence with the 30 capacitors 93. It is determined whether or not the residual voltage is within a predetermined allowable range. When the flash lamp FL is caused to emit light with a single pulse as shown in FIG. 11 without using the IGBT 96, most of the electric charge accumulated in the capacitor 93 is discharged and consumed by the flash lamp FL. On the other hand, when the current flowing through the flash lamp FL is chopper controlled using the IGBT 96, the charge stored in the capacitor 93 is usually stored, although depending on the waveform of the pulse signal set by the waveform setting unit 31. A part is consumed by the discharge of the flash lamp FL. In this case, after the light emission of the flash lamp FL is finished, the electric charge that has not been consumed remains in the capacitor 93. In step S9, the residual voltage generated by the charge remaining in the capacitor 93 is checked even after the flash emission ends.

FIG. 12 is a diagram for explaining the determination of the residual voltage of 30 capacitors 93. The horizontal axis in FIG. 12 indicates the channel numbers sequentially assigned to the drive circuits provided in one-to-one correspondence with the 30 flash lamps FL. The vertical axis represents the residual voltage of the capacitor 93 measured by the voltage monitor 21. In FIG. 12, the allowable range of the residual voltage is between the upper limit value V _H and the lower limit value V _L. The allowable range values (absolute values of the upper limit value V _H and the lower limit value V _L ) are set according to the waveform of the pulse signal set by the waveform setting unit 31. That is, when the total on time of the pulse signal is long, the time during which the IGBT 96 is in the on state is long, so that a large amount of charge of the capacitor 93 is consumed and remains in the capacitor 93 after the flash emission ends. The amount of charge is reduced. Therefore, in such a case, the allowable range value is set to be relatively small. On the contrary, when the total on time of the pulse signal is short, the charge is not consumed so much, and the charge remaining in the capacitor 93 after the flash emission ends increases, so the allowable range is set to be relatively large. . Note that the width of the allowable range (difference between the upper limit value V _H and the lower limit value V _L ) is appropriately set according to the determination accuracy.

  As a result of the determination in step S9, when the residual voltages of all 30 capacitors 93 are within the allowable range, normal discharge light emission is performed by the flash lamps FL corresponding to all the capacitors 93. Yes, returning to step S2, the process up to step S9 is repeated. If a new pulse signal waveform is set, the process may return from step S9 to step S1.

On the other hand, if even one of the thirty capacitors 93 does not fall within the allowable range, the process proceeds to step S10, where the residual voltage of the capacitor 93 outside the allowable range is the upper limit value V of the allowable range. _The detection unit 32 determines whether it is larger than _H or smaller than the lower limit value V _L. In the example shown in FIG. 12, the residual voltage of the capacitor 93 included in the circuit of channel number 4 is larger than the upper limit value V _{H of the} allowable range. This means that the electric charge accumulated in the capacitor 93 was not consumed because the flash lamp FL corresponding to the channel number 4 did not emit light for some reason (step S12). Possible causes of the flash lamp FL not emitting light include a case where the IGBT 96 does not close even when a pulse signal is applied, or a trouble with the flash lamp FL itself including the trigger electrode 91. Therefore, in such a case, the IGBT 96 and the flash lamp FL included in the circuit of the channel number 4 are inspected, and if there is a defect, repair or replacement is performed.

In the example shown in FIG. 12, the residual voltage of the capacitor 93 included in the circuit of channel number 28 is smaller than the lower limit value V _{L of the} allowable range. This means that most of the electric charge stored in the capacitor 93 corresponding to the channel number 28 is discharged and consumed by the flash lamp FL. The cause of such a phenomenon is considered to be a short circuit of the IGBT 96 in most cases (step S11). That is, the IGBT 96 does not function as a switching element, and current continues to flow from the capacitor 93 to the flash lamp FL, so that most of the electric charge accumulated in the capacitor 93 is consumed. Therefore, in such a case, the IGBT 96 included in the circuit of the channel number 28 is inspected, and if there is a defect, repair or replacement is performed.

  As a cause of the residual voltage of the capacitor 93 being out of the allowable range, a pulse signal having a waveform different from that of the other IGBT 96 may be output to the gate of the IGBT 96 corresponding to the capacitor 93. When a hardware problem is not found in the drive circuit including the capacitor 93 whose residual voltage is out of the allowable range, it is preferable that the waveform of the pulse signal output to the corresponding IGBT 96 is also inspected.

  In the example shown in FIG. 12, the residual voltage of the capacitor 93 included in the circuit corresponding to the remaining channel numbers other than the channel numbers 4 and 28 is within the allowable range. Therefore, the normal flash emission scheduled for the flash lamps FL corresponding to these channel numbers is performed, and the elements constituting the circuit are functioning normally.

  In the present embodiment, 30 voltage monitors 21 are provided corresponding to the 30 capacitors 93 on a one-to-one basis, and the storage voltage of each capacitor 93 is individually measured. Based on the measurement results obtained by the 30 voltage monitors 21, the detection unit 32 detects the storage state of the 30 capacitors 93. By individually detecting the storage state of the 30 capacitors 93, the circuit abnormality such as contact failure in the drive circuit of the 30 flash lamps FL is individually checked, and the flash lamp FL emits light with an inappropriate intensity. Can be prevented.

  The timing for detecting the storage state of the capacitor 93 is preferably from the time when charging of the thirty capacitors 93 is completed in step S3 to the start of discharging the thirty flash lamps FL in step S6 (step S4). ). The storage state is detected in step S4 in order to check whether or not all 30 capacitors 93 are properly charged. It is determined whether or not the storage voltage is equal to the charging voltage for each of the thirty capacitors 93, and if any one is different, the detection unit 32 detects the storage abnormality.

  It is also preferable to detect the storage state of the capacitor 93 after the light emission of the thirty flash lamps FL is completed in step S8 (steps S9 and S10). The detection of the storage state in steps S9 and S10 is performed in order to check whether or not the charges accumulated in all 30 capacitors 93 have been properly discharged. For each of the thirty capacitors 93, it is determined whether or not the residual voltage is within a predetermined allowable range. If even one of the capacitors is out of the allowable range, the detection unit 32 detects a storage abnormality.

Whether or not the flash lamp FL has properly emitted light can also be checked by detecting the storage state after flash emission. That is, if the residual voltage of the capacitor 93 after light emission is larger than the upper limit value V _{H of the} allowable range, it means that the flash lamp FL corresponding to the capacitor 93 has not emitted light, and the flash lamp FL itself Abnormality is assumed. On the contrary, if the residual voltage of the capacitor 93 after light emission is smaller than the lower limit value V _{L of the} allowable range, it means that the flash lamp FL corresponding to the capacitor 93 has emitted more than expected, and the short circuit of the IGBT 96 has occurred. is assumed.

  In any case, when the detection unit 32 detects an abnormality in the storage state even for one of the thirty capacitors 93, the drive circuit including the capacitor 93 is inspected, and if there is a defective portion, repair or the like is performed. Do. In this way, all 30 flash lamps FL can emit light with appropriate and uniform intensity.

  While the embodiments of the present invention have been described above, the present invention can be modified in various ways other than those described above without departing from the spirit of the present invention. For example, in the above embodiment, the state of charge is detected after the charging of the capacitor 93 is completed and the light emission of the flash lamp FL is completed, but the technique according to the present invention is used when the heat treatment apparatus 1 is abnormally stopped. Thus, the storage state of the capacitor 93 may be detected. Specifically, when the heat treatment apparatus 1 is abnormally stopped (for example, an emergency stop due to a drop of the semiconductor wafer W, etc.), the voltage monitor 21 individually measures the storage voltage of the 30 capacitors 93, and the detection unit 32 The presence or absence of charge remaining in each capacitor 93 is detected. When the heat treatment apparatus 1 is abnormally stopped, the apparatus is naturally repaired, but it is dangerous if a high-voltage charge remains in the capacitor 93 at that time. For this reason, if the presence or absence of electric charge remaining in the 30 capacitors 93 is detected based on the measurement result by the voltage monitor 21 as described above, a reliable safety check can be performed. It goes without saying that the capacitor 93 with the charge remaining is separately discharged and then repaired after the charge is eliminated.

  In the above embodiment, the IGBT 96 is incorporated into the drive circuit of the flash lamp FL and the current flowing through the flash lamp FL is controlled by chopper control. However, even a drive circuit that does not incorporate the IGBT 96 is related to the present invention. Technology can be applied. That is, the voltage monitor 21 may be provided for the capacitor 93 of the drive circuit not provided with the IGBT 96, and the stored voltage may be measured. In this case, after the flash emission ends, almost all of the electric charge accumulated in the capacitor 93 is consumed. However, regarding whether or not the capacitor 93 is properly charged and whether or not there is any electric charge remaining in the capacitor 93, It can be performed in the same manner as described above.

  Further, instead of the IGBT 96, another transistor that can turn on and off the circuit according to the signal level input to the gate may be used. However, since a considerable amount of power is consumed for the light emission of the flash lamp FL, it is preferable to employ an IGBT or a GTO (Gate Turn Off) thyristor suitable for handling a large amount of power.

  In the above embodiment, the lamp house 5 is provided with 30 flash lamps FL. However, the present invention is not limited to this, and the number of flash lamps FL can be any number ( One may be sufficient). In this case, the same number of capacitors 93 and voltage monitors 21 are provided according to the number of flash lamps FL, and the stored voltage of each capacitor 93 is individually measured. Then, based on the measurement result by the voltage monitor 21, the detection unit 32 detects the storage state of the capacitor 93. The flash lamp FL is not limited to a xenon flash lamp, and may be a krypton flash lamp.

  The setting of the waveform of the pulse signal output to the gate of the IGBT 96 is not limited to inputting parameters such as a pulse width and a pulse interval from the input unit 33 one by one. May be directly input graphically, or a waveform previously set and stored in a storage unit such as a magnetic disk may be read, or may be downloaded from the outside of the heat treatment apparatus 1. May be.

  Moreover, in the said embodiment, although the IGBT control part 98 was made into an element different from the control part 3, if the control part 3 is comprised with the computer which can respond in response to input at high speed, and will output, The function of the IGBT control unit 98 may be realized by the control unit 3.

  In the above embodiment, the semiconductor wafer W is preheated by placing it on the hot plate 71. However, the preheating method is not limited to this, and a halogen lamp is provided to provide light. The semiconductor wafer W may be preheated to the preheating temperature T1 by irradiation.

  Further, the substrate to be processed by the heat treatment apparatus according to the present invention is not limited to a semiconductor wafer, and may be a glass substrate or a solar cell substrate used for a liquid crystal display device or the like. Further, the technique according to the present invention may be applied to bonding of metal and silicon or crystallization of polysilicon.

DESCRIPTION OF SYMBOLS 1 Heat processing apparatus 3 Control part 4 Holding part raising / lowering mechanism 5 Lamp house 6 Chamber 7 Holding part 21 Voltage monitor 22, 23 Resistor 31 Waveform setting part 32 Detection part 33 Input part 60 Upper opening 61 Chamber window 65 Heat treatment space 71 Hot plate 72 Susceptor 91 Trigger electrode 92 Glass tube 93 Capacitor 94 Coil 95 Power supply unit 96 IGBT
97 Trigger circuit 98 IGBT controller FL Flash lamp W Semiconductor wafer

Claims (5)

A heat treatment apparatus for heating a substrate by irradiating the substrate with flash light,
Holding means for holding the substrate;
A plurality of flash lamps for irradiating flash light onto the substrate held by the holding means;
A plurality of capacitors that are provided corresponding to the plurality of flash lamps in a one-to-one correspondence and store charges for discharging the plurality of flash lamps to emit light;
An insulated gate bipolar transistor for intermittently connecting each of the plurality of flash lamps and a corresponding capacitor;
A plurality of storage voltage measuring means provided in one-to-one correspondence with the plurality of capacitors and measuring a storage voltage of the corresponding capacitor;
Detecting means for detecting a storage state of the plurality of capacitors based on measurement results by the plurality of storage voltage measuring means;
With
The detecting means is configured to store the plurality of capacitors when the residual voltages of the plurality of capacitors measured by the plurality of stored voltage measuring means are not within a predetermined range after light emission of the plurality of flash lamps is completed. Anomaly ,
When the residual voltage of any of the plurality of capacitors measured by the plurality of storage voltage measuring units is larger than the upper limit value of the predetermined range, the detection unit is not emitting a flash lamp corresponding to the capacitor. If the residual voltage is smaller than the lower limit value of the predetermined range, it is determined that the insulated gate bipolar transistor is short-circuited . The heat treatment apparatus according to claim 1, wherein
The detecting means is a period between the completion of charging of the plurality of capacitors and the start of discharging of the plurality of flash lamps based on the measurement results of the plurality of stored voltage measuring means. A heat treatment apparatus that detects a storage abnormality. In the heat treatment apparatus according to claim 1 or 2,
The heat treatment apparatus characterized in that the detection means detects the presence or absence of electric charge remaining in the plurality of capacitors based on the measurement results of the plurality of stored voltage measurement means when the apparatus abnormally stops . A heat treatment method for heating a substrate by irradiating the substrate with flash light,
A charging step of charging a plurality of capacitors provided in a one-to-one correspondence with a plurality of flash lamps;
A discharge step of emitting flash light by discharging the charges accumulated in the plurality of capacitors with the plurality of flash lamps;
A power storage detection step of measuring a power storage voltage of the plurality of capacitors to detect a power storage state;
With
In the discharging step, each of the plurality of flash lamps is intermittently connected to a corresponding capacitor by an insulated gate bipolar transistor, and the charge accumulated in the plurality of capacitors is intermittently discharged by the plurality of flash lamps. ,
In the power storage detection step, after the light emission of the plurality of flash lamps is finished, when the residual voltage of the plurality of capacitors is not within a predetermined range, the power storage abnormality of the plurality of capacitors,
When the residual voltage of any of the plurality of capacitors is greater than the upper limit value of the predetermined range, the power storage detection step assumes that the flash lamp corresponding to the capacitor has not emitted light, and the residual voltage is the predetermined voltage A heat treatment method characterized by determining that the insulated gate bipolar transistor is short-circuited when it is smaller than a lower limit value of the range . The heat treatment method according to claim 4, wherein
The power storage detection step detects a power storage abnormality by measuring a power storage voltage of the plurality of capacitors between the completion of charging of the plurality of capacitors and the start of discharging of the plurality of flash lamps. A heat treatment method characterized by the above .

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