JP5688444B2 - Semiconductor device - Google Patents

Description

The invention disclosed in this specification describes a semiconductor device having an insulating gate structure using a crystalline silicon film provided on an insulating substrate such as glass or quartz, such as a thin film transistor (TFT), a thin film diode (TFD), The present invention also relates to a thin film integrated circuit to which these are applied, in particular, a thin film integrated circuit for a passive matrix liquid crystal display device, a thin film integrated circuit for an active matrix liquid crystal display device, and a manufacturing method thereof.

In recent years, thin film transistors are formed in a matrix on an insulating substrate such as glass or quartz.
Research on active matrix liquid crystal display devices using FT as a switching element has been actively conducted.

An active matrix liquid crystal display device in which an active matrix circuit (also referred to as a pixel circuit or a pixel matrix circuit) and a peripheral driver circuit (also referred to as a driver-circuit) are integrated on the same insulating substrate has attracted attention. This configuration is called a peripheral drive circuit integrated type.

In a conventional active matrix liquid crystal display device, transparent electrodes are used in which electrodes for driving a liquid crystal layer are formed on two substrates and face each other. Liquid crystal is sealed between the two substrates, and the direction of the electric field applied to the liquid crystal is set to a direction substantially perpendicular to the substrate surface. Further, by changing the electric field strength, the alignment direction of liquid crystal molecules generally having a rod-like shape is changed to be parallel to the substrate or perpendicular to the substrate. In this case, in general, in order to modulate light by utilizing optical anisotropy, which is one of the characteristics of the liquid crystal material, a deflection plate is disposed in the device so that incident light becomes linearly polarized light. It was.

However, a liquid crystal electro-optical device using such an operation method is dark and unclear when viewed from an oblique direction even when viewed from a direction perpendicular to the display surface. If so, a phenomenon of discoloration was observed.

In order to solve such a problem, there is a method (IPS mode) in which the direction of the electric field applied to the liquid crystal layer is a direction parallel to the substrate surface.
In such an electro-optical device, since the liquid crystal molecule major axis is switched while maintaining a state parallel to the substrate, the change in the optical characteristics of the liquid crystal due to the viewing angle is small.
For this reason, the light leakage due to the viewing angle, the decrease in contrast, and the like are small compared to the conventional TN and STN systems.

As an electrode configuration of this IPS mode, a method in which comb-like electrodes are formed on a single substrate as shown in FIG. 17 is known.
However, when the comb-like electrode is used, there is a problem that in the pixel element, the wiring pattern is miniaturized and complicated, and the productivity is poor.
In addition, since the electrode shape is complicated, the electric field applied to the liquid crystal layer is also complicated.
Furthermore, by using a comb-like electrode, light is blocked and the effective area (aperture ratio) through which light can be transmitted is significantly reduced, and only a dark display can be realized, and practical application is impossible.

The present invention solves the above-mentioned problems, and the object of the present invention is to provide a peripheral drive circuit integrated type that has high contrast without a transparent electrode, can be mass-produced with simple processes, and has a large aperture ratio. An object of the present invention is to provide a liquid crystal display device and a manufacturing method thereof.

  In order to solve the above problems and achieve the above object, the present invention uses the following means.

The first of the present invention is a pair of substrates at least one of which is transparent as shown in FIG.
A liquid crystal layer is sandwiched between the pair of substrates,
A plurality of pixels are arranged in a matrix on one substrate,
The pixel electrode 108 and the common electrodes 110 and 111 exist in the same layer,
The common electrode and the common lines 103 and 104 are sandwiched between insulating layers, exist in different layers, and are connected by contacts,
A liquid crystal display comprising a structure capable of modulating light by applying an electric field substantially parallel to a substrate surface between the pixel electrode and the common electrode to control an alignment state of liquid crystal molecules. Device.

In the above structure, the active matrix liquid crystal display device includes a thin film transistor in each pixel. The thin film transistor includes a pixel electrode 108, gate lines 102 and 105 connected to scanning lines, and a source line connected to a signal line. A liquid crystal display device having the scan lines 106 and 107.

  In the above structure, the passive matrix liquid crystal display device is passively driven.

In the above structure, the common electrodes 110 and 111 and the pixel electrode 108 are parallel, are in the same layer as shown in FIG. 2, and are made of the same material and in the same process.

In the liquid crystal display device, the common electrode and the pixel electrode are made of aluminum, a metal containing aluminum as a main component, or a laminate of Si or Ti and aluminum.

In addition, the common lines 103 and 104 and the gate lines 102 and 105 are formed in the same layer and in the same material and in the same process as shown in FIG.

The second aspect of the present invention is as shown in FIG.
A pair of substrates at least one of which is transparent;
A liquid crystal layer is sandwiched between the pair of substrates,
A plurality of pixels are arranged in a matrix on one substrate,
The pixel electrode 108 and the common electrodes 110 and 111 exist in the same layer,
The common electrode and the common wire are sandwiched between insulating layers, exist in different layers, and are connected by contacts,
On top of that, a planarizing film 230 is provided.
A liquid crystal display comprising a structure capable of modulating light by applying an electric field substantially parallel to a substrate surface between the pixel electrode and the common electrode to control an alignment state of liquid crystal molecules. Device.

The planarization film 230 over the common electrode and the pixel electrode in the above structure is a liquid crystal display device using an organic material made of polyimide or the like, a film using an inorganic material made of silicon nitride or silicon oxide, or a laminated film thereof.

In the present invention, as shown in FIG.
A pair of substrates at least one of which is transparent;
A liquid crystal layer is sandwiched between the pair of substrates,
A plurality of pixels are formed in a matrix on one substrate,
Within one pixel, one pixel electrode 108 is formed between a pair of common electrodes 110 and 111,
A liquid crystal display comprising a structure capable of modulating light by applying an electric field substantially parallel to a substrate surface between the pixel electrode and the common electrode to control an alignment state of liquid crystal molecules. Device.

The third aspect of the present invention is as shown in FIGS.
Forming a crystalline semiconductor layer 101 over a substrate having an insulating surface 201;
Forming a gate insulating film 205 on the crystalline semiconductor layer;
Forming a first conductive film 210 on the gate insulating film;
Forming the first conductive film on the gate lines 102 and 105 and the common lines 103 and 104;
Doping the crystalline semiconductor layer; and
Forming a first interlayer film 206 on the entire surface;
Forming a contact hole;
Forming a second conductive film on the first interlayer film;
The second conductive film includes a pixel electrode 108, common electrodes 110 and 111, and a source line 106.
, 107, and a step of forming a liquid crystal display device.

The crystalline semiconductor layer referred to here is a single crystal silicon film, a polycrystalline silicon film in which amorphous and crystals are mixed, or an amorphous-based polycrystalline silicon film that has a slight crystal structure. A silicon film having at least crystallinity such as.

In order to obtain the configuration shown in FIG.
Forming a crystalline semiconductor layer 101 over a substrate having an insulating surface 201;
Forming a gate insulating film 205 on the crystalline semiconductor layer;
Forming a first conductive film 210 on the gate insulating film;
Forming the first conductive film on the gate line 105 and the common lines 103 and 104;
Doping the crystalline semiconductor layer; and
Forming a first interlayer film 206 on the entire surface;
Forming a contact hole;
Forming a second conductive film on the first interlayer film;
The second conductive film includes a pixel electrode 108, common electrodes 110 and 111, and a source line 106.
, 107, a step of forming a planarizing film 230 on the pixel electrode, the common electrode, the source line, and the entire surface of the substrate,
It is characterized by the production of a liquid crystal display device having

Forming a crystalline semiconductor layer over a substrate having an insulating surface;
Forming a gate insulating film on the crystalline semiconductor layer;
Forming a first conductive film on the gate insulating film;
Forming the first conductive film on a gate line and a common line;
Doping the crystalline semiconductor layer; and
Forming a first interlayer film on the entire surface;
Forming a contact hole;
Forming a second conductive film on the first interlayer film;
Forming the second conductive film on a pixel electrode, a common electrode, and a source line,
In addition, the liquid crystal display device is manufactured using five or less masks.

The planarization film 230 over the common electrode in the above structure is characterized by manufacturing a liquid crystal display device using a film made of an organic material made of polyimide or the like, an inorganic material made of silicon nitride, or a laminated film thereof.

Forming a crystalline semiconductor layer over a substrate having an insulating surface;
Forming a gate insulating film on the crystalline semiconductor layer;
Forming a first conductive film on the gate insulating film;
Forming the first conductive film on a gate line and a common line;
Oxidizing the first conductive film;
Performing a first impurity doping on the crystalline semiconductor layer;
Removing the conductive oxide film;
After the step of removing the conductive oxide film, a step of performing a second impurity doping at a lower concentration than the first impurity doping;
Forming a first interlayer film on the entire surface;
Forming a contact hole;
Forming a second conductive film on the first interlayer film;
Forming the second conductive film on a pixel electrode, a common electrode, and a source line,
In addition, the liquid crystal display device is manufactured using five or less masks.

In the above structure, after the step of forming the second conductive film with the pixel electrode, the common electrode, and the source line, a step of forming a planarization film on the entire surface of the substrate;
And a liquid crystal display device in which the entire process is manufactured with five or less masks.

In the fourth aspect of the present invention, as shown in FIG.
The wiring connection terminal 900 with the external device is a liquid crystal display device characterized by being composed of a stack of wiring formed by stacking at least two or more wirings.

As shown in FIG.
A wiring connection terminal 900 with an external device is a liquid crystal display device characterized in that it is formed by stacking wiring formed by stacking at least two wirings on a silicon film 101 formed on an insulating substrate. is there.

In the liquid crystal display device, the wiring stack having the above structure is formed using the same material and using the same process.

The wiring connection terminal 900 having the above structure is a liquid crystal display device including aluminum, a metal containing aluminum as a main component, an inorganic compound having conductivity, or a laminate of Si or Ti and aluminum. is there.

As shown in FIG.
Forming a first conductive film 210 over a substrate 201 having an insulating surface;
Forming the first conductive film into a shape of a first wiring terminal 211;
Forming a second conductive film 220 on the first conductive film;
Forming the second conductive film into the shape of the second wiring terminal 221;
Forming an interlayer insulating film 230 on the entire surface of the substrate;
Scraping the interlayer insulating film on the substrate surface, exposing the upper surface of the second wiring terminal, and forming a wiring connection terminal 900 with an external device;
It is characterized by the production of a liquid crystal display device having

Forming a semiconductor layer 101 over a substrate 201 having an insulating surface;
Forming a first conductive film 210 on the semiconductor layer;
Forming the first conductive film into a shape of a first wiring terminal 211;
Forming a second conductive film on the first conductive film;
Forming the second conductive film into the shape of the second wiring terminal 221;
Forming an interlayer insulating film 230 on the entire surface of the substrate;
Scraping the interlayer insulating film on the substrate surface, exposing the upper surface of the second wiring terminal, and forming a wiring connection terminal 900 with an external device;
A method for manufacturing a liquid crystal display device having the following.

The fifth aspect of the present invention is as shown in FIG.
A pair of substrates at least one of which is transparent;
A liquid crystal layer is sandwiched between the pair of substrates,
The first wiring and the second wiring sandwich the insulating layer and exist in different layers,
The second wiring for shielding a region existing between the first wirings adjacent in parallel; the first wiring for shielding a region existing between the second wirings adjacent in parallel; The liquid crystal display device is characterized in that a pixel display region surrounded by one wiring and the second wiring can modulate light.

A pair of substrates at least one of which is transparent;
A liquid crystal layer is sandwiched between the pair of substrates,
In one pixel, one pixel electrode 1208 is formed between a pair of common electrodes 1210 and 1211 and shields a region existing between source lines 1206 and 1207 and the adjacent common electrode. Common wire 1203;
The liquid crystal display device includes a pixel electrode 1208 for shielding a region existing between the gate line 1205 and the adjacent common line 1203.

In the above structure, a storage capacitor is formed between both the common line 1203 and the gate line 1205 which are the first wiring and the pixel electrode which is the second wiring.

As shown in FIG. 16, the counter substrate is a liquid crystal display device including a plurality of black matrices 1600 smaller than the common electrode 1210 that sufficiently fills a gap between wirings generated when a pair of substrates are overlapped. .

A manufacturing process of the present invention will be described with reference to FIGS.
An amorphous silicon thin film 101 is formed on a substrate having an insulating surface [FIG. 4 (a)], and is formed into a desired size on an island using a photolithography method, and (1) patterning is performed. [FIG. 4B] A gate insulating film 205 is formed thereon. [FIG. 4 (c)]
A top view in this state is shown in FIG.

A first conductive film 210 is formed on the gate insulating film. [FIG. 6 (d)]
As the material of the first conductive film, Cr, Al, Ta, Ti can be used. Further, a multilayer film in which these films are combined may be formed.

Next, (2) patterning is performed by using a photolithography method to form scanning lines, gate lines 102 and 105 connected to the scanning lines, and common lines 103 and 104. [Fig. 6
(E)]
A top view in this state is shown in FIG.

  Then, the gate insulating film 205 is etched using the gate electrode as a mask.

Thereafter, P ions are implanted into the semiconductor layer by a known ion doping method.
Subsequently, the N-channel TFT is covered with (3) a resist mask, B ions are implanted, and then laser annealing is performed. [FIG. 6 (f)]
At this time, the LDD structure may be formed by a known ion doping method. Then
The characteristics of the transistor can be made more stable.

Next, a first interlayer insulating film 206 is formed. [FIG. 8G] This interlayer insulating film separates the common line and the common electrode and connects them only with the contact. By doing so, the disturbance of the electric field generated in the comb electrode is prevented. In the conventional comb-shaped electrode shown in FIG. 17, when an electric field is applied to the liquid crystal layer, the electric field is disturbed by extra wiring that is not directly related (for example, common lines or source lines that are not comb-toothed portions). It was happening.
Further, when a planarizing film such as a polyimide film is formed thereon, the end portion of the pixel electrode and the end portion of the common electrode formed in a later process can be located at the same distance from the substrate.

In addition, as each interlayer insulating film, a film using an organic material made of polyimide or the like, an inorganic material made of silicon nitride, or a laminated film thereof can be used.

Then, using photolithography method, (4) patterning is performed [FIG. 8 (h)]
A second conductive film 220 is formed thereon by a known sputtering method.
Then, using the photolithography method again, (5) patterning is performed, and the pixel electrode 1
08, the common electrode and the source line 106 are formed, and the state shown in FIG. FIG. 1 is a top view in this state.
FIG. 1 is a view intentionally shown so that a portion where wiring cannot be seen can be seen, and a portion formed by the same material and in the same process is filled with the same diagonal pattern.

In this way, the CMOS structure could be fabricated with the five masks (1), (2), (3), (4), and (5).
In this way, a laminated film with an interlayer insulating film or a planarizing film is formed, and the distance between the end of the common electrode and the end of the pixel electrode from the substrate is approximately the same, so that A pixel electrode is formed with an insulating film interposed therebetween.
In this way, an electric field can be applied directly to the liquid crystal layer, and display characteristics are improved.

Simultaneously with the manufacturing process, the wiring connection terminal 900 of the external device shown in FIG.
1), (2), (3), (4), and (5).
A cross-sectional view of the wiring connection terminal is shown in FIG.
Conventionally, in order to produce a wiring connection terminal, a process of using a mask has to be added.

First, as in the above manufacturing process, a crystalline semiconductor thin film is formed on a substrate having an insulating surface, and is formed into an island having a shape of a wiring connection terminal using a photolithography method to a desired size ( 1) Perform patterning.
However, since this step only adjusts the height, it is not necessary to produce the wiring connection terminal.

  Next, a gate insulating film 205 is formed thereon.

A first conductive film 210 is formed on the gate insulating film.
As the material of the first conductive film, Cr, Al, Ta, Ti can be used. Further, a multilayer film in which these films are combined may be formed.

Next, using the photolithography method, (2) patterning is performed, and the first wiring terminal 2
11 is formed.

  Then, the gate insulating film 205 is etched to form a first interlayer insulating film 206.

Thereafter, (4) patterning is performed using a photolithography method, the first interlayer insulating film on the first wiring terminal 211 is removed, and the second conductive film 2 is formed thereon by a known sputtering method.
20 is formed.
Then, using the photolithography method again, (5) patterning is performed to form the second wiring terminal 221.

Thereafter, when the second interlayer insulating film 230 is formed, the surface of the second wiring terminal 221 is covered. [FIG. 10 (a)] Therefore, O ₂ ashing is performed to scrape the surface to expose the surface of the second wiring terminal and the surface of the second wiring. [FIG. 10B] In this way, the wiring connection terminal 900 of the external device can also be manufactured by using 4 to 5 masks of (1), (2), (3), (4), and (5).

The above manufacturing process makes it possible to manufacture a peripheral driving circuit integrated liquid crystal display device having wiring connection terminals of an external device with five or less masks.

  Moreover, it is good also as an electrode structure as shown below.

For example, the arrangement of the pixel electrode and the common electrode may be configured such that the pixel electrode is provided between a pair of common electrodes provided in one pixel as shown in FIG. In this way, the aperture ratio is further improved.

Further, the common electrode 1203 and the gate line 1 are formed in the shape of the pixel electrode 1208 as shown in FIG.
A configuration may be adopted in which a storage capacitor is formed with both of the two.
Furthermore, when the common line 1203 is designed as shown in FIG. 14, a further storage capacitor is formed.
FIG. 15 shows an equivalent circuit of the pixel portion in the electrode configuration of FIG.

At the same time, changing the shape of the pixel electrode and the common line as described above prevents light leakage through which visible light passes through the gap between the lines when the liquid crystal display device is driven to display an image. Combines effects.

An alignment film made of polyimide was formed on the CMOS structure thus formed. As the alignment film, polyimide was formed by a known spin coating method or DIP method.

Next, the alignment film surface was rubbed.
The rubbing direction varies depending on the liquid crystal material used. In the case of a material having a positive dielectric anisotropy, the direction is non-parallel to the electric field direction and forms an angle of 45 ° or closer to the electric field direction. Furthermore, if the dielectric anisotropy is a negative material, it is non-perpendicular to the electric field,
The direction is 45 ° in the direction perpendicular to the electric field or an angle closer to the direction perpendicular to the electric field. The rubbing process on the second substrate side is performed in parallel or antiparallel to the rubbing direction of the first substrate.

The substrate thus formed and the opposite substrate were overlapped to form a liquid crystal panel. The pair of substrates is configured to have a uniform substrate interval over the entire panel surface by sandwiching a spherical spacer between the substrates. The pair of substrates were sealed with an epoxy adhesive in order to bond and fix the pair of substrates. The seal pattern surrounds the pixel region and the peripheral drive circuit region. Then, after cutting the pair of substrates into a predetermined shape, a liquid crystal material was injected between the substrates.

Next, two polarizing plates were bonded to the outside of the substrate. About the arrangement of the polarizing plate, a pair of polarizing plates are arranged so that their optical axes are orthogonal, and the optical axis of one of the polarizing plates, for example, the optical axis of the polarizing plate,
Parallel to the rubbing direction.

When the substrates are overlapped in this way, when a liquid crystal display device is driven to display an image, a black matrix having a light-shielding property is provided above the gap between the wiring and the wiring that does not need to transmit visible light or above the transistor. BM) is generally arranged.

As the black matrix, a light-shielding metal thin film such as a titanium film or a chromium film, or a resin material in which a black pigment is dispersed can be used.

Conventionally, when forming a black matrix (BM), a large alignment margin was taken to form the black matrix, but by doing so, the aperture ratio of the pixel region was lowered.

However, in the present invention, as shown in FIG. 12, the aperture ratio is improved by changing the shape of the pixel electrode and the common line, forming a BM, and not forming the black matrix in the pixel display region as much as possible.
The semiconductor layer region, which is a region that cannot be shielded by simply changing the shape of the wiring, has a light shielding property and is formed of a material that functions as a BM, or only this portion is formed on the counter substrate.
Form. This black matrix may be smaller than the common electrode and is not formed in the pixel display region.
Further, the region that cannot be shielded from light is surrounded by wiring, and even if this black matrix is formed, it has nothing to do with a decrease in aperture ratio.
This eliminates the need for a large alignment margin, improves the aperture ratio, and protects the semiconductor region from light degradation.

In this way, the liquid crystal alignment is controlled without providing a transparent electrode in five mask processes,
A liquid crystal display device capable of modulating light could be obtained.
In addition, by adopting the IPS mode structure, the alignment deviation between the upper and lower substrates is eliminated, the distance accuracy between the common electrode and the liquid crystal drive electrode can be improved, and the aperture ratio is improved.

In this way, a liquid crystal display device capable of controlling the liquid crystal alignment and modulating light without providing a transparent electrode in five mask processes could be obtained.
In addition, by adopting the IPS mode structure, the upper and lower substrates were not misaligned, and the distance accuracy between the common electrode and the liquid crystal drive electrode could be improved.

In the conventional electrode wiring using the comb electrode, there are many wirings and electrodes existing in the layer closest to the liquid crystal layer, and the liquid crystal layer is in a complicated shape and is in contact with the pixel display portion. A complicated electric field was generated, and complicated electric field lines existed. For this reason, the aperture ratio is low, and the complicated electrode shape makes the electric field applied to each liquid crystal in the pixel display portion non-uniform, resulting in deterioration in display characteristics.

However, as in the present invention, when the common line and the common electrode are sandwiched between the insulating layers, separated into different layers and connected by contact, the wiring and electrodes present in the layer closest to the liquid crystal layer are
Only common electrodes, pixel electrodes, and source lines are provided.
The common electrode, the pixel electrode, and the source line have a simple shape and are arranged in parallel in the same layer.
Therefore, a more uniform lateral electric field can be applied to the liquid crystal material in contact with the pixel display portion, and the display characteristics are improved.

As described above, in the present invention, the gate line and the common line are formed first, the first interlayer film is formed, and then the pixel electrode and the common electrode are formed. In the first interlayer film, distance positions of the pixel electrode end portion and the common electrode end portion from the respective substrates are substantially matched.
That is, it is an interlayer film for disposing the pixel electrode end on the interlayer insulating layer directly beside the common electrode end.
In addition, the first interlayer film is used for extra wiring (common line and source) when an electric field is applied to the liquid crystal layer.
The pixel electrode and the common electrode formed in a later process,
There is an effect that the position is further the same distance from the substrate.

In the present invention, the first interlayer film may be a planarizing film, and the pixel electrode, the common electrode, and the source line may be formed. By doing so, there is an effect that the pixel electrode and the common electrode formed in a later process are positioned at the same distance from the substrate.

Furthermore, a planarized second interlayer film may be formed after forming the common electrode, the pixel electrode, and the source line. This flattened second interlayer film also serves as a protective film.

In the present invention, the common electrode, the pixel electrode, and the source line are arranged in parallel in the same layer, and are made of the same material and the same process.
By doing so, the number of electrode layers is reduced and the cost can be reduced.
Furthermore, since the electrode wiring is simpler than that of the conventional comb electrode, the aperture ratio is improved.

When aluminum is used as the electrode and wiring material of the present invention in the case of forming a film at 650 ° C. or lower, the conductivity and heat dissipation are excellent, and the TFT and the like can be protected from the generated heat.
In addition, since the resistance is low, there is little loss, and the wirings are prevented from interfering with each other.

Conventionally, in order to produce a wiring connection terminal, a process of using a mask has to be added. However, (1), (2), (3), (4) simultaneously with the above manufacturing process.
) And (5), and a peripheral driving circuit integrated liquid crystal display device having wiring connection terminals of an external device can be manufactured with five or less masks.

Further, when a black matrix is formed by taking a large alignment margin on the counter substrate as in the prior art, there is a problem that the aperture ratio of the pixel region is lowered. However, in the present invention, as shown in FIG. 12, the shape of the pixel electrode and the common line can be changed to form a BM.
Then, a semiconductor layer region that cannot be shielded by changing the shape of the wiring is used as a half BM, or as shown in FIG. 16, a BM smaller than the common electrode is formed only on this portion on the counter substrate.
In this way, it is not necessary to take a large alignment margin, the aperture ratio can be improved, and the semiconductor region can be protected from deterioration due to light.

As described above, the present invention is an invention having great industrial value. Particularly, a thin film transistor is formed on a large-area substrate, and this is used for an active matrix, a driver circuit, a CPU, a memory, and the onboard method. In the case of ultra-thin personal computers and portable terminals, the field of use is expanded without limit and has sufficient qualities to form a new industry.

FIG. 2 is a top view illustrating a configuration of a pixel portion in the liquid crystal device according to the first embodiment of the invention. FIG. 6 is a cross-sectional view taken along line A-A ′, a cross-sectional view taken along line B-B ′, and a cross-sectional view taken along line C-C ′ of the configuration of the pixel portion according to the first embodiment of the invention. Sectional view taken along line A-A ′, sectional view taken along line B-B ′, and sectional view taken along line C-C ′ of the configuration of the pixel portion of Example 4 of the invention Sectional drawing of the manufacturing process of Example 1 of this invention Top view of the manufacturing process of FIG. Sectional drawing of the manufacturing process of Example 1 of this invention Top view of the manufacturing process of FIG. Sectional drawing of the manufacturing process of Example 1 of this invention The top view of the wiring connection terminal of this invention, and sectional drawing in A-A 'line Sectional drawing of the manufacturing process of the wiring connection terminal of this invention FIG. 7 is a top view illustrating a configuration of a pixel portion in a liquid crystal device according to Embodiment 2 of the present invention. FIG. 6 is a top view illustrating a configuration of a pixel portion in a liquid crystal device according to Embodiment 3 of the present invention. Sectional view taken along line A-A ′, sectional view taken along line B-B ′, and sectional view taken along line C-C ′ of the configuration of the pixel portion according to the third embodiment of the present invention. Top view of manufacturing process of Example 3 of the present invention Pixel part equivalent circuit diagram of Example 3 of the present invention Top view when the counter substrate is bonded in Example 3 of the present invention A top view showing a pixel portion composed of a conventional comb-shaped electrode

  Hereinafter, the present invention will be described in more detail with reference to examples.

  4 to 8 show a manufacturing process of the liquid crystal display device of this embodiment at 600 ° C. or lower.

First, using Corning # 1737 as a substrate 201 having an insulating surface, silicon oxide is deposited as a base film (not shown) to a thickness of 2000 mm by sputtering.
When a quartz substrate or the like is used, it is not necessary to form a base film.

Thereafter, a thickness of 300 to 1000 mm on the silicon oxide base film, which is 500 mm in this embodiment.
The amorphous silicon film 101 is formed by a parallel plate type plasma CVD method using silane glow discharge. When using the low pressure CVD method, 450 ° C to 650 ° C using disilane.
Typically, an amorphous silicon film is formed at 540 ° C. [Fig. 4 (a)]

After the amorphous silicon film is formed, the amorphous silicon film is given crystallinity by laser light irradiation or heat treatment, or by a combination of laser light irradiation and heat treatment.

The obtained crystalline silicon film was (1) patterned by photolithography to form island regions. [Fig. 4 (b)]

Further, on the crystalline silicon film, a silicon oxide film, a silicon nitride film, a silicon oxynitride film, and a stacked film thereof are formed by a plasma CVD method to have a thickness of 500 mm to 2000 mm, and in this embodiment 1000
A silicon oxide film was deposited as a gate insulating film 205 on the entire surface. As the plasma CVD method, a film is formed by glow discharge of a mixed gas of silane and oxygen. [FIG. 4 (c)]
A top view of this state is shown in FIG.
In this embodiment, as shown in FIG. 5, the shape of the semiconductor layer is a bent shape.

After that, on the gate insulating film, an aluminum film having a thickness of 3000 mm to 10,000 mm, and in this embodiment, a thickness of 4000 mm was deposited as a first conductive film 210 on the entire surface by sputtering. [FIG. 6 (d)]

For the aluminum film formation, an aluminum alloy target containing 0.1 to 5% by weight of a substance such as silicon or scandium is used. In this embodiment, the film is formed using a target containing 0.2% by weight of scandium.

The reason for containing scandium is to suppress the formation of projections called hillocks and whiskers due to abnormal growth of aluminum in the subsequent heat process at 100 ° C. or higher.

As a material other than aluminum, a conductive metal such as Cr, Ta, or Ti can be used.

Next, using the resist mask formed on the first conductive film, the aluminum film and the gate insulating film are patterned (2), and the resist mask is removed, so that the conductive film covers the channel region. Thus, the gate line 102 is formed. At the same time, a common line is formed. [Fig. 6 (e)]
A top view of this state is shown in FIG.

  Then, the gate insulating film 205 is removed using the gate line 102 as a mask.

Thereafter, P (phosphorus) ions are doped on the entire surface by known ion doping as impurities imparting N-type.

Next, (3) a resist mask is disposed to cover the N-channel thin film transistor.

Thereafter, B (boron) ions are implanted.
Here, before the implantation of B ions, it is a low concentration impurity region in which P ions are implanted at a low concentration. Therefore, the conductivity type is easily reversed by the implantation of B ions.

Then, the resist mask is removed, and laser light irradiation is performed to activate the implanted impurities and anneal the region into which the impurity ions have been implanted.

Next, as a first interlayer insulating film, a thickness of 3000 to 8000 mm, in this embodiment, plasma C
A silicon nitride film 206 having a thickness of 5000 mm is formed by the VD method. [FIG. 8G] This may be a silicon oxide film or a multilayer film of a silicon oxide film and a silicon nitride film. Moreover, you may use the film | membrane using the organic substance which consists of polyimides.
When a polyimide film is used, a flattened film is formed on the interlayer film by a known spin coating method.
In this way, by flattening, each second metal wiring formed in a later process can be positioned at approximately the same distance from the substrate.
Alternatively, for example, a multilayered film may be formed in which a 2500 mm thick flattened polyimide film is formed after a 2500 mm thick silicon nitride film is formed.

Thereafter, a resist mask is formed on the interlayer insulating film.
Then, a contact hole for the source region 202 and a contact hole for the drain region 203 are formed by (4) etching. [Fig. 8 (h)]

Then, by sputtering, the thickness is 3000 mm to 10000 mm, and in this example, the thickness is 4 mm.
A 000 Å aluminum film was deposited on the entire surface as a second conductive film.

The aluminum film is formed using a target containing 0.2% by weight of scandium similarly to the first conductive film.

As a material other than aluminum, a conductive metal such as Cr, Ta, or Ti can be used.

Next, using the resist mask formed on the conductive film, the aluminum film is patterned (5)
Then, the pixel electrode 108, the common electrode, and the source line 106 are formed by removing the resist mask. [FIG. 8 (i)]
A top view of this state is shown in FIG.
At this time, the distance from the substrate to the end of the pixel electrode and the distance from the substrate to the end of the common electrode are substantially the same.
Thereafter, a planarizing film made of polyimide or the like may be formed as the second interlayer film. The planarizing film also serves as a protective film.

Next, an alignment film made of polyimide was formed. As the alignment film, polyimide was formed by a known spin coating method or DIP method.

Next, the alignment film surface was rubbed.
The rubbing direction varies depending on the liquid crystal material used. In the case of a material having a positive dielectric anisotropy, the direction is non-parallel to the electric field direction and forms an angle of 45 ° or closer to the electric field direction. Furthermore, if the dielectric anisotropy is a negative material, it is non-perpendicular to the electric field,
The direction is 45 ° in the direction perpendicular to the electric field or an angle closer to the direction perpendicular to the electric field.

Next, details of the manufacturing process of the counter substrate will be described.
First, a black matrix is formed on a counter substrate to a thickness of 1000 to 2000 mm.

This black matrix is arranged only in the gap of the metal wiring other than the pixel display portion when the cells are assembled later. As the black matrix, a resin material containing a metal thin film or a black pigment is used.
Next, when it is necessary to display an image in color, a color filter is formed with a known configuration.

Next, a planarizing film made of a translucent resin material is formed so as to cover the black matrix and the color filter.

The rubbing process on the opposite substrate side is performed in parallel or antiparallel to the rubbing direction of the first substrate.

The substrate thus formed and the opposite substrate were overlapped to form a liquid crystal panel. The pair of substrates is configured to have a uniform substrate interval over the entire panel surface by sandwiching a spherical spacer between the substrates. The pair of substrates were sealed with an epoxy adhesive in order to bond and fix the pair of substrates. The seal pattern surrounds the pixel region and the peripheral drive circuit region. Then, after cutting the pair of substrates into a predetermined shape, a liquid crystal material was injected between the substrates.

  Finally, two polarizing plates are bonded to the outside of the substrate to complete the liquid crystal display device.

  In the configuration shown in the present embodiment, the electrode pattern is different from that in the first embodiment.

First, a base film (not shown) and an amorphous silicon film are formed on a substrate having an insulating surface by the same method as in the first embodiment.

  Once the amorphous silicon film is formed, the amorphous silicon film is made crystalline as in the first embodiment.

An island region is formed in the obtained crystalline silicon film by the same method as in the first embodiment. The shape of this crystalline silicon film 1101 is as shown in FIG.

Further, a gate insulating film is deposited on the entire surface of the crystalline silicon film by the same method as in the embodiment.

Thereafter, an aluminum film is deposited on the entire surface of the gate insulating film as the first conductive film by the same method as in the first embodiment.

Next, by using the resist mask formed on the first conductive film, the aluminum film and the gate insulating film are patterned, and the resist mask is removed, so that the conductive film is gate-lined in the region covering the channel region. To form. At the same time, a common line and a source line having a line width of 6 μm are formed.

  Then, the gate insulating film is removed.

Thereafter, in the same manner as in Example 1, P (phosphorus) ions are doped on the entire surface by known ion doping as impurities imparting N-type conductivity.

  Next, a resist mask that covers the N-channel thin film transistor is provided.

Thereafter, B (boron) ions are implanted in the same manner as in the first embodiment.
Then perform a laser annealing.

Next, an interlayer insulating film is formed by the same method as in the first embodiment. Further, a flattening film by a known spin coating method may be laminated on this interlayer film.

Thereafter, a resist mask is formed on the polyimide film.
The contact hole for the source region and the contact hole for the drain region
The formation of the holes is performed by etching.

Then, an aluminum film is deposited on the entire surface as a second conductive film by the same method as in the first embodiment.

Next, a pixel electrode and a common electrode are formed by patterning an aluminum film using a resist mask formed on the conductive film and removing the resist mask.
In this embodiment, three common electrodes 1110, 1111 and 1112 are formed in one pixel,
Between the adjacent common electrodes, pixel electrodes 1108 and 1109 having a width of 2 μm are formed.

  The pixel portion thus formed is shown in FIG.

Thereafter, a liquid crystal cell was produced in the same manner as in the example. Thereafter, similarly to Example 1, a polarizing plate was pasted on a pair of substrates to obtain a liquid crystal electro-optical device.

In the configuration shown in this embodiment, as shown in FIGS. 12 and 13, compared to the first embodiment, the counter substrate has a pixel electrode pattern, a common electrode pattern, and a black matrix. The point is different.

First, a base film (not shown) and an amorphous silicon film are formed on a substrate having an insulating surface by the same method as in the first embodiment.

  Once the amorphous silicon film is formed, the amorphous silicon film is made crystalline as in the first embodiment.

  Island regions 1201 are formed on the obtained crystalline silicon film in the same manner as in the first embodiment.

Further, a gate insulating film 1305 is deposited on the entire surface of the crystalline silicon film 1201 by the same method as in the embodiment.

Thereafter, an aluminum film is deposited on the entire surface of the gate insulating film as the first conductive film by the same method as in the first embodiment.

Next, by using the resist mask formed on the first conductive film, the aluminum film and the gate insulating film are patterned, and the resist mask is removed, so that the conductive film is gate-lined in the region covering the channel region. 1202 and 1205 are formed. At the same time, the common line 1203,
1204 is formed.
A top view in this state is shown in FIG.
As shown in FIG. 14, the shape of the common line 1203 is changed so that it also serves as the BM.

  Then, the gate insulating film is removed.

Thereafter, in the same manner as in Example 1, P (phosphorus) ions are doped on the entire surface by known ion doping as impurities imparting N-type conductivity.

  Next, a resist mask that covers the N-channel thin film transistor is provided.

Thereafter, B (boron) ions are implanted in the same manner as in the first embodiment.
Then perform a laser annealing.

Next, an interlayer insulating film is formed by the same method as in the first embodiment. A flattening film by a known spin coating method may be laminated on this interlayer film.

Thereafter, a resist mask is formed on the polyimide film.
Then, a contact hole for the source region 1302 and a contact hole for the drain region 1303 are formed by etching.

Then, an aluminum film is deposited on the entire surface as a second conductive film by the same method as in the first embodiment.

Next, by patterning the aluminum film using a resist mask formed over the conductive film and removing the resist mask, the pixel electrode 1208, the common electrode 1210,
1211 and source lines 1206 and 1207 are formed.

A top view of this state is shown in FIG. 12, and a cross-sectional view is shown in FIG.
The pattern of the pixel electrode at this time is T-shaped as shown in FIG. 12, and overlaps with both the common line and the gate line, and a storage capacitor is formed at the overlap. ing.
FIG. 15 shows an equivalent circuit diagram of the pixel portion of this embodiment.

Next, details of the manufacturing process of the counter substrate of this embodiment will be described.
First, a black matrix is formed on a counter substrate to a thickness of 1000 to 2000 mm. As a material used for the black matrix, a resin material containing a metal thin film or a black pigment is used.

As in this embodiment, only the semiconductor layer region, which is a region that cannot be shielded even if the wiring shape is changed, is shielded by the BM of the counter substrate. (Fig. 16)
Therefore, the black matrix 1600 may be smaller than the common electrode 1208 and is not formed in the pixel display region.
Even if this small black matrix is formed, it has nothing to do with a decrease in the aperture ratio.
Further, the semiconductor layer region that is a region that cannot be shielded by changing the shape of the wiring may be formed of a material that has a light shielding property and functions as a BM.
This eliminates the need for a large alignment margin, improves the aperture ratio, and protects the semiconductor region from light degradation.

Thereafter, a liquid crystal cell was produced in the same manner as in Example 1. Thereafter, similarly to Example 1, a polarizing plate was pasted on a pair of substrates to obtain a liquid crystal electro-optical device.

As shown in FIG. 3, the structure shown in this embodiment is different from the first embodiment in that the second interlayer insulating film is formed after the pixel electrode and the common electrode are formed. Therefore, the top view is the same as FIG.

The first embodiment is different from the first embodiment in that the pixel electrode 108, the common electrodes 110 and 111, and the source line 10
The process is the same up to the process of forming 6, 107.

After the pixel electrode, the common electrode, and the source line are formed, the second interlayer insulating film has a thickness of 300.
In this embodiment, a silicon nitride film 230 having a thickness of 5000 mm is formed by plasma CVD in this embodiment.
This film may be a silicon oxide film or a multilayer film of a silicon oxide film and a silicon nitride film. Moreover, you may use the film | membrane using the organic substance which consists of polyimides.
When a polyimide film is used, the interlayer film can be planarized by a known spin coating method. In this way, by flattening, each second metal wiring formed in a later process can be positioned at approximately the same distance from the substrate.
Alternatively, a multilayer film may be formed in which a 2500 mm thick flattened polyimide film is formed after a 2500 mm thick silicon nitride film is formed.
This second interlayer insulating film serves to protect the TFT. Further, the electric field strength applied to the liquid crystal layer can be adjusted by changing the thickness of the film.

Thereafter, a liquid crystal cell was produced in the same manner as in Example 1. Thereafter, similarly to Example 1, a polarizing plate was pasted on a pair of substrates to obtain a liquid crystal electro-optical device.

In the configuration shown in this embodiment, the wiring connection terminals 900 of the external device shown in FIG. (5). A cross-sectional view of the wiring connection terminal is shown in FIG.

First, in the same manner as in Example 1, an amorphous silicon film is formed on a substrate having an insulating surface, and this is formed into an island having a shape of a wiring connection terminal using a photolithography method to a desired size. (1) Perform patterning.
However, since this step only adjusts the height, it is not necessary to produce the wiring connection terminal.

  Next, a gate insulating film 205 is formed thereon as in the first embodiment.

A first conductive film 210 is formed on the gate insulating film as in the first embodiment.
As the material of the first conductive film, Cr, Al, Ta, Ti can be used. Further, a multilayer film in which these films are combined may be formed.

Next, in the same manner as in the first embodiment, (2) patterning is performed using the photolithography method to form the first wiring terminal 211.

Then, like the first embodiment, the gate insulating film 205 is etched to form a first interlayer insulating film 206.

Thereafter, as in the first embodiment, (4) patterning is performed using the photolithography method, the first interlayer insulating film on the first wiring terminal 211 is removed, and a known sputtering method is formed thereon. Thus, the second conductive film 220 is formed.
Then, using the photolithography method again, (5) patterning is performed to form the second wiring terminal 221.

Thereafter, when the second interlayer insulating film 230 is formed as in the fourth embodiment, the second wiring terminal 2
The surface of 21 will be covered. [FIG. 10 (a)] Therefore, O ₂ ashing is performed to scrape the surface to expose the surface of the second wiring terminal and the surface of the second wiring. [FIG. 10 (b)]
In this way, the wiring connection terminal 900 of the external device is also (1), (2), (3), (4), (5),
4-5 masks can be used.

Through the above manufacturing process, a peripheral driving circuit integrated liquid crystal display device including wiring connection terminals of an external device is manufactured using five or less masks.

  The configuration of the present embodiment is the same as that of the first embodiment except for the following requirements.

First, a quartz substrate is used as an insulating substrate. Note that the substrate is not limited to quartz as long as it can withstand the heat treatment temperature.
A silicon oxide film having a thickness of 3000 mm is formed on the quartz substrate as a base film.

Next, an amorphous silicon film is formed to a thickness of 600 mm by a low pressure CVD method.
The thickness of the amorphous silicon film is preferably 2000 mm or less.

Thereafter, a metal element that promotes crystallization of silicon is selectively introduced into a part of the amorphous silicon film,
Crystallization is performed by heating at 640 ° C. for 4 hours.

When the crystalline silicon film is obtained, a thermal oxide film is formed to a thickness of 200 mm by performing heat treatment at 950 ° C. in an oxygen atmosphere containing 3% HCl.

  Next, the thermal oxide film is removed. Then, (1) patterning was performed to obtain island regions.

Thereafter, a liquid crystal cell was produced in the same manner as in Example 1. Thereafter, similarly to Example 1, a polarizing plate was pasted on a pair of substrates to obtain a liquid crystal electro-optical device.

101 Amorphous semiconductor layer 102 Gate line n
103 Common line n
104 Common line n-1
105 Gate line n + 1
106 Source line n
107 source line n + 1
108 pixel electrode 110, 111 common electrode 201 insulating substrate 202 source region 203 drain region 204 channel region 205 gate insulating film 206 first interlayer film 210 first conductive film 211 first conductive wiring 220 second conductive film 221 Second conductive wiring 230 Second interlayer insulating film 301 Amorphous semiconductor layer 302 Gate line n
303 Common line n
304 Common line n-1
305 Gate line n + 1
306 Source line n
307 source line n + 1
900 Wiring connection terminal 1101 Amorphous semiconductor layer 1102 Gate line n
1103 Common line n
1104 Common line n-1
1105 Gate line n + 1
1106 Source line n
1107 Source line n + 1
1108 Pixel electrode 1110, 1111, 1112 Common electrode 1201 Amorphous semiconductor layer 1202 Gate line n
1203 Common line n
1204 Common line n-1
1205 Gate line n + 1
1206 Source line n
1207 Source line n + 1
1208 Pixel electrode 1210, 1211 Common electrode 1301 Insulating substrate 1302 Source region 1303 Drain region 1304 Channel region 1305 Gate insulating film 1306 First interlayer film 1600 Black matrix 1701 Amorphous semiconductor layer 1703 Common line 1704 Gate line 1705 Gate line n + 1
1706 Source line n
1707 Source line n + 1
1708 Pixel electrode

Claims (2)

A semiconductor layer above the substrate;
A gate electrode having a region overlapping with the semiconductor layer via a first insulating film;
A second insulating film above the semiconductor layer, the first insulating film, and the gate electrode;
A source line electrically connected to the semiconductor layer;
A first electrode above the second insulating film;
A second electrode above the second insulating film;
Liquid crystal above the first electrode and the second electrode;
A connection portion above the substrate,
The connecting portion is a portion in which the first insulating film, the first conductive layer above the first insulating film, and the second conductive layer above the first conductive layer are stacked. Have
The gate electrode and the first conductive layer are disposed in the same layer ,
Before Kiso over scan lines, wherein the second conductive layer, a semiconductor device which is characterized in that which has been disposed in the same layer. A first semiconductor layer above the substrate;
A gate electrode having a region overlapping with the first semiconductor layer via a first insulating film;
A second insulating film above the first semiconductor layer, the first insulating film, and the gate electrode;
A source line electrically connected to the semiconductor layer;
A first electrode above the second insulating film;
A second electrode above the second insulating film;
Liquid crystal above the first electrode and the second electrode;
A connection portion above the substrate,
The connection portion includes a second semiconductor layer, the first insulating film above the second semiconductor layer, the first conductive layer above the first insulating film, and the first conductive layer. A second conductive layer above the layer, and a layered portion;
The first semiconductor layer and the second semiconductor layer are disposed in the same layer ,
The gate electrode and the first conductive layer are disposed in the same layer ,
Before Kiso over scan lines, wherein the second conductive layer, a semiconductor device which is characterized in that which has been disposed in the same layer.

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