JP5685932B2 - Thin film transistor - Google Patents

Description

  The present invention relates to a thin film transistor in which an organic semiconductor material or the like is used as a semiconductor material.

  In recent years, a thin film transistor using an organic semiconductor material has attracted attention in place of a thin film transistor made of an inorganic material typified by silicon. Since a thin film transistor made of an organic semiconductor material can be manufactured by a low-temperature process, a plastic substrate or a film can be used, and a flexible, lightweight, and hardly broken element can be formed. The thin film transistor can be formed using a liquid material by a simple method such as a coating method or a printing method, and an element can be formed in a short time. Therefore, there is also a very great merit that the process cost and the forming apparatus cost can be kept very low. In addition, since the organic semiconductor material easily changes its material characteristics by changing its molecular structure, etc., the thin film transistor using the organic semiconductor material includes functions that were difficult to realize with an inorganic material. It can support various functions.

Such a thin film transistor includes a source electrode and a drain electrode, a channel region made of an organic semiconductor material between these regions, a gate electrode capable of applying an electric field to the channel region, and a gate insulation between the gate electrode and the channel region. Has a membrane. With such a structure, when an electric field is applied to the channel region, a current can flow between the source electrode and the drain electrode. The thin film transistor made of the organic semiconductor material as described above is disclosed in, for example, Japanese Patent Application Laid-Open No. 2009-141203.
JP 2009-141203 A

  Here, a configuration example of a thin film transistor using a conventional organic semiconductor material will be described with reference to FIG. FIG. 7A is a diagram illustrating only a conductor portion and a semiconductor portion of the thin film transistor, and FIG. 7B is a cross-sectional view taken along line X-X ′ in FIG. As shown in FIG. 7A, the gate electrode is usually formed in consideration of a process error in alignment accuracy during manufacturing, and an electric field is applied to a wider range including at least the entire channel region. It is like that. Therefore, an electric field is applied to the source electrode and the drain electrode in part or in whole, and a parasitic capacitance is generated in the portion to which the electric field is applied. When such parasitic capacitance occurs, there is a problem that the response speed of the thin film transistor element is lowered.

Further, when an electric field is applied by the gate electrode, a current flow as shown by a double-headed arrow in FIG. That is, the thin film transistor is originally designed with only the region indicated by W as a channel region, but a parasitic channel that causes a current to flow as indicated by a double arrow is formed. When such a parasitic channel is formed, the current magnitude is W
It changes in a complicated manner depending on the shape of each electrode and the shape of the semiconductor. Therefore, there is a problem that the circuit simulation process becomes complicated in order to perform an accurate circuit simulation.

  FIG. 8 is a diagram showing another configuration example of a thin film transistor using a conventional organic semiconductor material. However, even in such a configuration example, the problems related to the parasitic capacitance and the parasitic channel described above occur.

The present invention is for solving the above-mentioned problems. The invention according to claim 1 is a substrate having a main surface, and an organic semiconductor disposed in a stacking direction of the substrate with respect to the main surface. A source electrode and a drain electrode which are provided so as to be in contact with the organic semiconductor layer and which are opposed to each other to form a channel region; a gate electrode which is provided via the organic semiconductor layer and the insulating layer; A thin film transistor comprising a source electrode wiring portion that is conductively connected, a drain electrode wiring portion that is conductively connected to the drain electrode, and a gate electrode wiring portion that is conductively connected to the gate electrode, the organic thin film transistor as viewed from the stacking direction. When superimposing the gate electrode and the semiconductor layer, the organic semiconductor the gate electrode is present in the layer, said gate electrode, said source electrode and the drain electrode and the front When superimposing a region composed of the channel region, a region composed of the source electrode and the drain electrode and the channel region is present in the gate in the electrode, the organic semiconductor layer wherein the drain electrode and the source electrode wiring portion at the periphery of the The gate electrode wiring portion is arranged between the wiring portions, and both ends in the first direction in the plane of the main surface of the region composed of the source electrode, the drain electrode, and the channel region as viewed from the stacking direction. And the gate electrode is larger than the minimum channel length at both ends in the second direction perpendicular to the first direction, and the source electrode wiring portion and the gate electrode are outside the one end of the gate electrode. and the wiring portion are adjacent, outside of the one end facing the other end of said gate electrode, characterized in that said drain electrode wiring portion and the gate electrode wiring portion adjacent To.

  According to a second aspect of the present invention, in the thin film transistor according to the first aspect, the first in-plane of the main surface of the region composed of the source electrode, the drain electrode, and the channel region as viewed from the stacking direction. The gate electrode is larger than the minimum channel length at both ends in the direction and both ends in the second direction perpendicular to the first direction.

  According to the thin film transistor of the present invention, since the parasitic capacitance can be reduced as much as possible, it is possible to suppress a decrease in the response speed of the thin film transistor element. In addition, according to the thin film transistor of the present invention, since the parasitic channel can be made as small as possible, the stability of the thin film transistor element operation is improved.

It is a figure which shows the thin-film transistor with which a gate electrode overlaps with a source electrode, a drain electrode, and a channel region. It is a figure which shows the thin film transistor of manufacture defect. It is a figure which shows the thin-film transistor in which a gate electrode contains a source electrode, a drain electrode, and a channel region. It is a figure explaining the problem by a leakage current. It is a figure which shows the thin-film transistor 100 which concerns on embodiment of this invention. It is a figure which shows the thin-film transistor 100 which concerns on other embodiment of this invention. It is a figure which shows the structural example of the thin-film transistor using the conventional organic-semiconductor material. It is a figure which shows the structural example of the thin-film transistor using the conventional organic-semiconductor material.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a diagram illustrating a thin film transistor in which a gate electrode overlaps a source electrode, a drain electrode, and a channel region as viewed from the stacking direction, and illustrates only a conductor portion and a semiconductor portion of the thin film transistor.

  In addition, in the present specification and claims, the first configuration and the second configuration are superimposed when viewed from the stacking direction, when the projection is performed in the stacking direction, It shows that the projection according to the second configuration overlaps.

Further, in the thin film transistor shown in this specification and the drawings, the layered structure has been exemplified as the top gate / bottom contact structure, but the structure of the thin film transistor according to the present invention is not limited to this, and the bottom gate is not limited thereto. It should be noted that any structure such as a bottom contact structure, a bottom gate / top contact structure, a top gate / top contact structure, a top gate / bottom contact structure, or a coplanar structure can be employed.

  In the thin film transistor as illustrated in FIG. 1, the gate electrode and the source electrode, or the gate electrode and the drain electrode overlap with each other in a region other than the region (A′B′C′D ′) functioning as a thin film transistor element when viewed from the stacking direction. Therefore, parasitic capacitance can be eliminated.

  In the thin film transistor shown in FIG. 1, the gate electrode and the source electrode, or the gate electrode and the drain electrode overlap with each other in a region other than the region (A′B′C′D ′) constituting the thin film transistor element, as viewed from the stacking direction. Therefore, it is possible to eliminate the parasitic channel.

  However, in the thin film transistor having the layout as shown in FIG. 1, since the alignment accuracy at the time of manufacturing the transistor is not considered, for example, as shown in FIG. 2, the gate electrode (A′B′C′D ′ rectangular) The region) does not overlap with the channel region between the source electrode and the drain electrode as designed, and a poorly manufactured thin film transistor element is formed.

  Therefore, a thin film transistor in which the gate electrode includes a source electrode, a drain electrode, and a channel region as shown in FIG. 3 is examined. In such a thin film transistor, a first direction and a second direction perpendicular to the first direction are defined in a main surface on which an organic semiconductor layer or the like of a base material (not shown) is formed.

In the example shown in FIG. 3, the alignment accuracy at the time of manufacturing the thin film transistor at each of both ends in the first direction and both ends in the second direction of the region (abcd rectangular region) composed of the source electrode, the drain electrode, and the channel region. The gate electrode (rectangular region A′B′C′D ′) is configured to be large by a minute or more (ΔW or more). According to such a configuration, the gate electrode (A'B'C '
D ′ rectangular region) may be displaced at most from the source electrode, drain electrode, and channel region, at least one of the gate electrodes (A′B′C′D ′ rectangular region). Since the portion overlaps the channel region between the source electrode and the drain electrode, a poorly manufactured thin film transistor element is not formed.

  Here, a condition to be satisfied by ΔW will be described. ΔW as described above is defined as the minimum channel length. This will be described later.

  By the way, generally, a large leak current flows through the organic semiconductor portion to which no electric field is applied by the gate electrode. Also in the thin film transistor structure in which the alignment accuracy at the time of manufacturing the transistor as described above is taken into consideration, a leak current Im as shown in FIG. 4 flows. Such a leakage current Im flows through the left half path shown in FIG. 4, but such a leakage current does not flow through the right half path. This is because the gate electrode wiring portion is provided so as to overlap when viewed from the stacking direction so as to block the right half path. Therefore, the thin film transistor according to the present invention is configured to take such a countermeasure against leakage current.

  FIG. 5 is a diagram showing a thin film transistor 100 according to an embodiment of the present invention. FIG. 5A is a diagram showing only a conductor portion and a semiconductor portion of the thin film transistor 100, and FIG. A) It is sectional drawing of XX '.

As the base material 110 used for the thin film transistor 100 according to the embodiment of the present invention, the base material 110 having an arbitrary function can be used according to the use of the thin film transistor element according to the embodiment. Such a substrate 110 may be a rigid substrate having no flexibility such as a glass substrate or a flexible substrate having flexibility such as a film made of a plastic resin. Also good. In the present embodiment, any of such rigid base materials and flexible base materials is preferably used, but among them, it is preferable to use a flexible base material. This is because by using a flexible base material, the organic semiconductor element of this embodiment can be manufactured by the Roll to Roll process, so that the organic semiconductor element of this embodiment can be made more productive. .

  Here, examples of the plastic resin used for the flexible base material include PET, PEN, PES, PI, PEEK, PC, PPS, and PEI.

  Moreover, the base material 110 used in the present embodiment may be composed of a single layer, or may have a configuration in which a plurality of layers are laminated. Examples of the substrate 110 having a configuration in which a plurality of layers are stacked include a substrate having a configuration in which a barrier layer made of a metal material is stacked on a substrate made of the plastic resin. Here, the base material 110 made of the plastic resin has an advantage that the organic semiconductor element of the present embodiment can be made flexible, but on the surface when forming the source electrode and the drain electrode. It has been pointed out that it has the disadvantage of being easily damaged. However, for example, by using the base material 110 on which the barrier layer as described above is laminated, even when the base material made of the plastic resin is used, there is an advantage that the above disadvantages can be solved. is there.

  The thickness of the substrate 110 used in the present embodiment is usually preferably 1 mm or less, and particularly preferably in the range of 50 μm to 700 μm. Here, when the base material 110 used in the present embodiment has a configuration in which a plurality of layers are stacked, the above thickness means the sum of the thicknesses of the respective layers.

  A source electrode 120 and a drain electrode 130 are provided on one main surface of the substrate 110 as described above. Here, in this embodiment, the source electrode 120 and the drain electrode 130 are defined as electrodes provided in a region functioning as a semiconductor (abcd rectangular region). 125 that is provided in communication with the source electrode 120 and conductively connected to the source electrode 120 is defined as a source electrode wiring portion, and 135 that is provided in communication with the drain electrode 130 and is conductively connected to the drain electrode 130. It is defined as a drain electrode wiring part. All of these electrodes are provided in the direction of lamination with respect to the main surface of the substrate 110.

  In the present embodiment, the conductive material used for the source electrode 120, the source electrode wiring portion 125, the drain electrode 130, the drain electrode wiring portion 135, and the gate electrode 140 and the gate electrode wiring portion 145 described later is a desired conductive material. The electrode is not particularly limited as long as an electrode having a thickness can be formed. As such a conductive material, for example, a metal material such as Al, Cr, Au, Ag, Ta, Cu, C, Pt, and Ti, a light-shielding conductive organic material such as a carbon paste, or any of these materials Can be mentioned. In addition, the thickness of each electrode used in this embodiment is usually preferably in the range of 10 nm to several hundred nm.

  The organic semiconductor layer 150 is provided in the rectangular region ABCD so as to cover the source electrode 120 and the drain electrode 130 as described above in the stacking direction of the main surface of the substrate 110. The organic semiconductor layer 150 can be formed by a method such as a coating method or a printing method. The organic semiconductor material used for the organic semiconductor layer 150 of the thin film transistor 100 of the present embodiment is a material that can form an organic semiconductor layer having desired semiconductor characteristics depending on the use of the thin film transistor element of the present embodiment and the like. It is not limited, The organic-semiconductor material generally used for an organic-semiconductor transistor can be used.

  Examples of such organic semiconductor materials include π-electron conjugated aromatic compounds, chain compounds, organic pigments, and organosilicon compounds. More specifically, low molecular organic semiconductor materials such as pentacene, and polypyrroles such as polypyrrole, poly (N-substituted pyrrole), poly (3-substituted pyrrole), and poly (3,4-disubstituted pyrrole). , Polythiophene, poly (3-substituted thiophene), poly (3,4-disubstituted thiophene), polythiophenes such as polybenzothiophene, polyisothianaphthenes such as polyisothianaphthene, and polychess such as polychenylene vinylene Nylene vinylenes, poly (p-phenylene vinylenes) such as poly (p-phenylene vinylene), polyanilines such as polyaniline and poly (N-substituted aniline), polyacetylenes such as polyacetylene, and polyazulenes such as polydiacetylene and polyazulene High molecular organic semiconductor materials such as Of these, pentacene or polythiophenes can be preferably used in the present embodiment.

  In the present embodiment, an organic semiconductor is described as an example of the semiconductor material. However, the semiconductor layer used in the thin film transistor according to the present invention may not be a semiconductor layer made of an organic semiconductor material. Examples of printable inorganic semiconductors that can be printed include zinc oxide, oxides containing In, Ga, and Zn having an amorphous structure, microcrystalline Si, and amorphous Si. These inorganic semiconductor materials can also be used.

  A gate insulating layer 160 is further provided in the stacking direction on the organic semiconductor layer 150 as described above. Such a gate insulating layer 160 can impart desired insulation to the gate insulating layer, and does not impair the performance of the organic semiconductor layer 150 when the gate insulating layer is formed on the organic semiconductor layer 150. If it is, it will not specifically limit. Examples of such an insulating resin material include acrylic resins, phenol resins, fluorine resins, epoxy resins, cardo resins, vinyl resins, imide resins, and novolac resins.

  In addition, the thickness of the gate insulating layer 160 used in this embodiment may be within a range in which desired insulating properties can be imparted to the gate insulating layer 160 depending on the type of the insulating resin material constituting the gate insulating layer 160 and the like. There is no particular limitation. Note that the gate insulating layer 160 also needs interface characteristics that do not impair the characteristics of the semiconductor.

  The thickness of the gate insulating layer formed on the organic semiconductor layer 150 is preferably within a range of 0.01 μm to 5 μm, particularly preferably within a range of 0.01 μm to 3 μm, and more preferably 0.01 μm to It is preferable to be in the range of 1 μm.

  A gate electrode 140 and a gate electrode wiring part 145 are further provided on the gate insulating layer 160 as described above.

  Here, in this embodiment, the gate electrode 140 is defined as an electrode in a region (rectangular region indicated by A′B′C′D ′) that is assumed to function as a semiconductor. On the other hand, 145 provided to communicate with the gate electrode 140 and conductively connected to the gate electrode 140 is defined as a gate electrode wiring portion 145. Here, the thin film transistor 100 according to this embodiment is characterized in that the gate electrode wiring portion 145 that is conductively connected to the gate electrode 140 is provided at two locations.

  The dimensional relationship of each component in the thin film transistor 100 of this embodiment will be described. In the thin film transistor 100 according to the present embodiment, when viewed from the stacking direction, the organic semiconductor layer 160 (rectangular region indicated by ABCD) includes a gate electrode 140 (rectangular region indicated by A′B′C′D ′). It has become a relationship.

  In the present specification and claims, the first configuration includes the second configuration when viewed from the stacking direction. When projection is performed in the stacking direction, the projection by the first configuration is the second configuration. The state which includes the projection by a structure is shown.

  In the thin film transistor 100 according to the present embodiment, the gate electrode 140 is a region including the source electrode 120, the drain electrode 130, and a channel region (a region between the source electrode 120 and the drain electrode 130) as viewed from the stacking direction. The dimensional relationship includes (a rectangular area indicated by abcd).

  The overlapping portion of the gate electrode 140 layer and the organic semiconductor layer 150 and the overlapping portion of the gate electrode 140 layer and the source electrode 120 / drain electrode 130 layer all cause parasitic capacitance. However, since the thin film transistor 100 according to the present embodiment has the dimensional relationship as described above, the thin film transistor 100 has a configuration in which the parasitic capacitance can be made as small as possible. Thereby, according to the present embodiment, the parasitic capacitance can be made as small as possible, and the decrease in the response speed of the thin film transistor element can be suppressed.

  In addition, according to the thin film transistor 100 of the present invention, the parasitic channel can be made as small as possible. As a region where the parasitic channel can occur, a region between the source electrode wiring part 125 and the drain electrode 130 between A′D ′ and ad, and a drain electrode wiring part 135 between the B′C ′ and bc. Compared with a conventional thin film transistor, the area between the drain electrode 130 and the drain electrode 130 is greatly reduced. Thereby, according to the thin film transistor 100 of the present invention, the parasitic channel can be made small, a decrease in the response speed of the thin film transistor element can be suppressed, and the stability of the operation of the thin film transistor element is improved.

  In the thin film transistor 100 according to the present embodiment, the gate electrode wiring portion 145 is always disposed between the source electrode wiring portion 125 and the drain electrode wiring portion 135 at the periphery of the organic semiconductor layer 150 when viewed from the stacking direction. It is the composition which becomes. That is, for example, if the periphery of the organic semiconductor layer 150 is rotated counterclockwise from the source electrode wiring portion 125 as a reference, the gate electrode wiring portion 145 is first arranged. Further, when the periphery of the organic semiconductor layer 150 is rotated clockwise from the source electrode wiring part 125 as a reference, the gate electrode wiring part 145 is similarly arranged. With this structure, the gate electrode wiring portion 145 is provided between the source electrode wiring portion 125 and the drain electrode wiring portion 135 so as to overlap when viewed from the stacking direction. The leakage current described in (2) does not flow.

  The embodiment shown in FIG. 5 has a structure in which two gate electrode wiring portions 145 are arranged in a direction parallel to the first direction in order to suppress the occurrence of the leakage current as described above. Such a structure is not essential, and any of the two gate electrode wiring portions 145 may have a structure as shown in FIG. 6 as long as the gate electrode wiring portion 145 is disposed between the source electrode wiring portion 125 and the drain electrode wiring portion 135, for example. It does not matter. FIG. 6 is a view showing a thin film transistor 100 according to another embodiment of the present invention.

In the thin film transistor 100 according to the present embodiment, both ends in the first direction in the plane of the main surface of the region (rectangular region indicated by abcd) including the source electrode 120, the drain electrode 130, and the channel region as viewed from the stacking direction. In addition, at both ends of the second direction perpendicular to the first direction, the gate electrode 140 (rectangular area indicated by A′B′C′D ′) is larger than the minimum channel length (ΔW or more). It is a feature. There is a high possibility that the channel length is selected to be a minimum length capable of providing characteristics as a transistor, which is higher than patterning accuracy such as lithography and printing when forming the thin film transistor 100. That is, as the channel length, there is a high possibility that the minimum length capable of exhibiting characteristics as a transistor when the thin film transistor 100 is manufactured is selected. If ΔW is not less than the minimum channel length, the source / drain current can be turned on / off so that the circuit performance can be exhibited, and the thin film transistor 100 can be minimized.

  According to such a configuration, the gate electrode (A′B′C′D ′ rectangular region) is shifted from the source electrode 120, the drain electrode 130, and the channel region (rectangular region indicated by abcd) at the maximum. Even if there is nothing, at least a part of the gate electrode 140 (rectangular region of A′B′C′D ′) overlaps the channel region between the source electrode 120 and the drain electrode 130, and thus a thin film transistor element with poor manufacturing Is not formed.

  As described above, according to the thin film transistor of the present invention, since the parasitic capacitance can be reduced as much as possible, it is possible to suppress a decrease in the response speed of the thin film transistor element. In addition, according to the thin film transistor of the present invention, since the parasitic channel can be made as small as possible, the stability of the thin film transistor element operation is improved.

Hereinafter, the present invention will be specifically described with reference to examples.
1. Example 1
In this example, a thin film transistor element including an organic semiconductor layer having a top gate structure was manufactured.
(1) Formation of planarization layer A cardo resin solution (solid content concentration: 20 wt%) was spin-coated on a substrate. The spin coating at this time was held at 800 rpm for 10 seconds. Thereafter, the substrate was dried at 120 ° C. for 2 minutes and then exposed on the entire surface at 350 mJ / cm ² . It was dried in an oven at 120 ° C. for 30 minutes. The thickness of the planarizing layer was 1 μm.
(2) Formation of Source / Drain Electrode Gold was formed by vacuum vapor deposition and patterned into a source / drain shape by an ordinary photolithography method. When the formed source electrode and drain electrode were observed with a reflection optical microscope, the distance between the source electrode and the drain electrode (channel length) was 5 μm, W was 20 μm to 150 μm, and the electrode thickness was 5 μm. It was.
(3) Formation of organic semiconductor layer By applying a coating liquid obtained by dissolving an organic semiconductor material (polythiophene) in a trichlorobenzene solvent at a solid content concentration of 0.2 wt% by an inkjet method between the source and drain electrodes, A pattern was applied between the source electrode and the drain electrode (channel formation site) and the periphery thereof. The application direction by the ink jet method was set to be perpendicular to the source and drain electrodes. Thereafter, an organic semiconductor layer was formed by drying at 200 ° C. for 10 minutes on a hot plate under an N ₂ atmosphere. The film thickness of the formed organic semiconductor layer was 0.1 μm. The shape of the organic semiconductor was 300 μm × 300 μm.
(4) Formation of gate insulating layer A cardo resin solution (solid concentration: 20 wt%) was spin-coated on the substrate. The spin coating at this time was held at 800 rpm for 10 seconds. Thereafter, the substrate was dried at 100 ° C. for 2 minutes and subjected to pattern exposure at 350 mJ / cm ² . Next, the resist development of the exposed part was performed, and then it was dried in an oven at 100 ° C. for 30 minutes. The gate insulating layer was formed on the organic semiconductor layer (channel forming portion) and on the source / drain electrodes and wiring. A 15 um contact hole was opened at a place where electrical contact between the gate electrode wiring and the data electrode wiring was necessary. The film thickness of the gate insulating layer was 1 μm.
(5) Formation of gate electrode Aluminum was formed into a film by vacuum deposition, and was patterned by an ordinary photolithography method. Although the design value of ΔW was 5 μm, it was shifted by 2 μm in the first direction and 3 μm in the second direction. The thickness of the gate electrode wiring portion 145 in FIG. 5 is 5 μm, and crosses the end portion of the semiconductor. The gate electrode wiring and the source / drain electrode wiring were in electrical contact with each other through a contact hole.
(6) Evaluation As a result of measuring the transistor characteristics of the thin film transistor element having the organic semiconductor layer produced, it was found that it was driven as a transistor. At this time, the ON current of the organic semiconductor transistor was larger than the designed value, but the design was easy because it did not depend on the magnitude of W. On the other hand, the OFF current was 2 × 10 ⁻¹² A or less.
2. Comparative Example 1
(1) Manufacturing Method An element having the layout shown in FIG. 8 was manufactured.
(2) The evaluation ON current is larger than the design value, and the smaller the W is, the larger the error is. On the other hand, the OFF current was the same as in the example.
3. Comparative Example 2
(1) Manufacturing Method An element having the layout shown in FIG. 4 was manufactured.
(2) The error of the evaluation ON current was the same as in the example. On the other hand, the OFF current is 2 × 10 −10 A, which is 100 times larger than that of the embodiment, and there is a concern that the power consumption of the circuit increases and malfunction due to discharge of the storage capacitor.

DESCRIPTION OF SYMBOLS 100 ... Thin-film transistor 110 ... Base material 120 ... Source electrode 125 ... Source electrode wiring part 130 ... Drain electrode 135 ... Drain electrode wiring part 140 ... Gate electrode 145 ... Gate Electrode wiring portion 150 ... organic semiconductor layer 160 ... gate insulating layer

Claims (1)

A substrate having a main surface;
An organic semiconductor layer disposed in a stacking direction with respect to the main surface of the substrate;
A source electrode and a drain electrode provided in contact with the organic semiconductor layer and facing each other to form a channel region;
A gate electrode provided via the organic semiconductor layer and an insulating layer;
A source electrode wiring portion conductively connected to the source electrode;
A drain electrode wiring portion conductively connected to the drain electrode;
A thin film transistor comprising a gate electrode wiring portion conductively connected to the gate electrode,
When the organic semiconductor layer and the gate electrode are overlapped when viewed from the stacking direction, the gate electrode is present in the organic semiconductor layer,
When a region composed of the gate electrode , the source electrode, the drain electrode, and the channel region is overlapped, a region composed of the source electrode, the drain electrode, and the channel region exists in the gate electrode,
The gate electrode wiring portion is disposed between the source electrode wiring portion and the drain electrode wiring portion at the periphery of the organic semiconductor layer ,
Seen from the stacking direction,
At both ends in the first direction in the plane of the main surface of the region composed of the source electrode, the drain electrode, and the channel region, and at both ends in the second direction perpendicular to the first direction,
Over the minimum channel length, the gate electrode is large,
Outside the one end of the gate electrode, the source electrode wiring part and the gate electrode wiring part are adjacent,
A thin film transistor , wherein the drain electrode wiring portion and the gate electrode wiring portion are adjacent to each other outside the other end opposite to the one end of the gate electrode .

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