JP5676957B2 - A ceramic body with a conductive layer and a method for producing a ceramic body with a conductive layer. - Google Patents
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Description
本発明は、導電層付きセラミック体、および導電層付きセラミック体の製造方法に関する。 The present invention relates to a ceramic body with a conductive layer and a method for producing a ceramic body with a conductive layer.
コンデンサや共振器などに利用されるセラミック誘電体に、電極等の導電層を形成する方法が、例えば下記特許文献１等に提案されている。 A method of forming a conductive layer such as an electrode on a ceramic dielectric used for a capacitor, a resonator, or the like has been proposed in, for example, Patent Document 1 below.
特許文献１では、ＢａＴｉＯ３を主結晶相とするセラミック体の表面に、ガラスと金属材料とを混ぜたペーストを塗布して焼成し、ＡｇまたはＣｕを主成分とする導電層（金属層）を形成している。 In Patent Document 1, a paste in which glass and a metal material are mixed is applied to the surface of a ceramic body having BaTiO 3 as a main crystal phase and fired to form a conductive layer (metal layer) containing Ag or Cu as a main component. Forming.
上記特許文献１に記載されているような従来の方法では、導電層とセラミック体との接合強度は、比較的低い値しか得られていない。しかも、上記特許文献１に記載されているＢａＴｉＯ３は、ガラスとの反応性が高くペースト中のガラスと比較的結合し易いＢａと、ＡｇやＣｕと反応性が低く、セラミック体や導電層全体に拡散し易いＴｉとが、１：１の原子数比となっている。一方、ＢａＴｉ４Ｏ９は、Ｂａ：Ｔｉが１：４となっており、ＢａＴｉＯ３を主結晶相とするセラミック体は、ＡｇやＣｕ等を主成分とする金属層との接合強度は比較的小さい。従来は、ＢａＴｉ４Ｏ９を主結晶相とするセラミック体に導電層を形成した場合、電極の剥がれ等の不良が比較的多く発生する虞があった。本願発明は、かかる課題を解決することを目的とする。 In the conventional method as described in Patent Document 1, only a relatively low value is obtained for the bonding strength between the conductive layer and the ceramic body. Moreover, BaTiO 3 described in Patent Document 1 has a low reactivity with Ba, Ag and Cu, which are highly reactive with glass and relatively easy to bond with the glass in the paste, and the entire ceramic body and conductive layer. Ti, which easily diffuses, has an atomic ratio of 1: 1. On the other hand, BaTi 4 O 9 has Ba: Ti of 1: 4, and the ceramic body having BaTiO 3 as the main crystal phase has a relatively high bonding strength with the metal layer mainly composed of Ag, Cu, or the like. small. Conventionally, when a conductive layer is formed on a ceramic body having BaTi 4 O 9 as a main crystal phase, there has been a risk that relatively many defects such as electrode peeling may occur. The present invention aims to solve such a problem.
かかる課題を解決するため、本願では、セラミック体の表面に導電層が接合された、導電層付きセラミック体であって、前記セラミック体は、ＢａＴｉ４Ｏ９を主結晶相とし、前記導電層は、ＡｇまたはＣｕを主成分とし、ガラス成分にＳｉおよびＢｉを含み、前記導電層と前記セラミック体との境界部分に、Ｂｉを主成分として含むとともに、ＴｉおよびＯを含有する接合領域が形成されていることを特徴とする導電層付きセラミック体を提供する。 In order to solve this problem, in the present application, a ceramic body with a conductive layer in which a conductive layer is bonded to the surface of the ceramic body, the ceramic body having BaTi 4 O 9 as a main crystal phase, , Ag or Cu as a main component, Si and Bi as glass components, and a junction region containing Ti and O as well as Bi as a main component is formed at the boundary between the conductive layer and the ceramic body. A ceramic body with a conductive layer is provided.
また、少なくともＢｉ２Ｏ３を含むガラス粉末およびＡｇまたはＣｕのいずれかを主成分とする導電性粉末を混合してなるペーストを、ＢａＴｉ４Ｏ９を主結晶相とするセラミック体の表面に塗布する塗布工程と、前記ペーストを焼成して、前記セラミック体の表面に、ＡｇまたはＣｕを主成分とし、ガラス成分にＳｉおよびＢｉを含む導電層を形成する焼成工程とを有し、平均粒径が３μｍ以下の前記導電性粉末を用いることを特徴とする導電層付きセラミック体の製造方法を、併せて提供する。 Further, a paste formed by mixing a glass powder containing at least Bi 2 O 3 and a conductive powder mainly composed of either Ag or Cu is applied to the surface of the ceramic body having BaTi 4 O 9 as the main crystal phase. And a firing step of firing the paste to form a conductive layer containing Ag or Cu as a main component and Si and Bi as glass components on the surface of the ceramic body, and having an average particle size And a method for producing a ceramic body with a conductive layer, wherein the conductive powder is 3 μm or less.
ＢａＴｉ４Ｏ９を主結晶相とするセラミック体に対する、導電層の接合強度が比較的高い。比較的強い接合強度で接合された導電層を備えるセラミック体を作製することができる。 The bonding strength of the conductive layer to the ceramic body having BaTi 4 O 9 as the main crystal phase is relatively high. A ceramic body including a conductive layer bonded with a relatively strong bonding strength can be manufactured.
以下、本発明の導電層付きセラミック体、および導電層付きセラミック体の製造方法について詳細に説明する。 Hereinafter, the ceramic body with a conductive layer and the method for producing the ceramic body with a conductive layer of the present invention will be described in detail.
図１（ａ）は、本発明の導電層付きセラミック体の一実施形態である誘電体基板１０の概略斜視図、図１（ｂ）は誘電体基板１０の一主面に垂直な方向に切断した断面を拡大して表す概略図である。 FIG. 1A is a schematic perspective view of a dielectric substrate 10 which is an embodiment of a ceramic body with a conductive layer of the present invention, and FIG. 1B is cut in a direction perpendicular to one main surface of the dielectric substrate 10. It is the schematic which expands and represents the done cross section.
本実施形態の誘電体基板１０は、例えばＢａＴｉ４Ｏ９を主結晶相とするセラミック基板（セラミック体）１２の表面に、Ａｇを主成分とし、ＳｉおよびＢｉをガラス成分に含んだ導電層１４が形成されている。なお、図１（ａ）では、セラミック基板１２の表面の所望領域に限定して、導電層１４が被着されている。導電層１４は、Ａｇ等を主成分とする金属粒子が、ガラス成分を介して結合されるように形成されている。 The dielectric substrate 10 of the present embodiment has a conductive layer 14 containing Ag as a main component and Si and Bi as glass components on the surface of a ceramic substrate (ceramic body) 12 having, for example, BaTi 4 O 9 as a main crystal phase. Is formed. In FIG. 1A, the conductive layer 14 is deposited only in a desired region on the surface of the ceramic substrate 12. The conductive layer 14 is formed so that metal particles mainly composed of Ag or the like are bonded via a glass component.
なお、本実施形態において、ＢａＴｉ４Ｏ９を主結晶相とするとは、セラミック体に含まれるチタン酸バリウム系の結晶相のうち、５０％以上の結晶相がＢａＴｉ４Ｏ９結晶であることをいう。また、Ａｇを主成分とするとは、Ａｇを５０質量％以上の割合で含有することをいう。セラミック体に含まれる結晶相の種類、含有割合については、例えばＸ線回折装置、ＩＣＰ発光分光分析装置を用いてセラミック体の断面を観察する公知の分析手法により、容易に同定・定量することができる。 In the present embodiment, “BaTi 4 O 9 is the main crystal phase” means that 50% or more of the crystal phase of the barium titanate-based crystal phase contained in the ceramic body is a BaTi 4 O 9 crystal. Say. In addition, “mainly composed of Ag” means containing Ag in a proportion of 50% by mass or more. The type and content ratio of the crystal phase contained in the ceramic body can be easily identified and quantified by a known analysis method of observing a cross section of the ceramic body using, for example, an X-ray diffractometer or an ICP emission spectroscopic analyzer. it can.
導電層１４は、例えば、従来周知の厚膜ペースト法を用い、セラミック基板１２の表面に被着させた状態に形成すればよい。具体的には、例えば、Ａｇの粉末と、ガラス粉末とを所定量計量し、上記の各粉末とをミキサーで混合し、ペーストを作成する。ペーストにおけるＡｇ粉末とガラス粉末との混合比率は、Ａｇ粉末を例えば９８質量％、ガラス粉末を例えば２．０質量％とする。作成したこのペーストを、スクリーン印刷などでセラミック表面のろう付けする箇所に塗布し、大気中で焼成して導電層１４を形成すればよい。ガラス粉末は、例えばＳｉＯ２粒子、Ｂｉ２Ｏ３粒子、Ｂ２Ｏ３粒子、ＺｎＯ粒子を含んでいる。 The conductive layer 14 may be formed in a state of being attached to the surface of the ceramic substrate 12 using, for example, a conventionally known thick film paste method. Specifically, for example, a predetermined amount of Ag powder and glass powder are weighed, and each of the above powders is mixed with a mixer to prepare a paste. The mixing ratio of Ag powder and glass powder in the paste is, for example, 98% by mass for Ag powder and 2.0% by mass for glass powder. The prepared paste may be applied to a portion of the ceramic surface to be brazed by screen printing or the like, and fired in the air to form the conductive layer 14. The glass powder contains, for example, SiO 2 particles, Bi 2 O 3 particles, B 2 O 3 particles, and ZnO particles.
誘電体基板１０では、導電層１４とセラミック基板１２との境界部分に、Ｂｉを主成分として含むとともに、ＴｉおよびＯを含有する接合領域１８が形成されている。Ｂｉを主成分として含むとは、広義には、公知のＥＰＭＡ（Ｅｌｅｃｔｒｏｎ Ｐｒｏｂｅ Ｍｉｃｒｏ Ａｎａｌｙｚｅｒ）解析によって計測されたピーク強度のうち、Ｂｉを表すスペ
クトルのピーク強度が、最も高いことをいう。
In the dielectric substrate 10, a junction region 18 containing Bi as a main component and containing Ti and O is formed at a boundary portion between the conductive layer 14 and the ceramic substrate 12. The phrase “containing Bi as a main component” means that, in a broad sense, the peak intensity of the spectrum representing Bi is the highest among the peak intensities measured by the well-known EPMA (Electron Probe Micro Analyzer) analysis.
ＢｉやＴｉ等の各元素の含有割合（質量％）は、例えば走査型電子顕微鏡装置を用いて行う、従来公知のＥＤＳ（エネルギー分散型Ｘ線分析法）によって求めることができる。例えば、ＥＤＡＸ社製ＰＨＯＥＮＩＸを用い、加速電圧１５ｋＶで各原子に対応するスペクトルを求め、各原子に対応するスペクトル強度から算出することができる。本実施形態では、Ｂｉを５０質量％以上含んでいる。 The content ratio (mass%) of each element such as Bi and Ti can be determined by a conventionally known EDS (energy dispersive X-ray analysis method) performed using, for example, a scanning electron microscope apparatus. For example, a spectrum corresponding to each atom can be obtained at an acceleration voltage of 15 kV using PHOENIX manufactured by EDAX, and calculated from the spectrum intensity corresponding to each atom. In this embodiment, 50 mass% or more of Bi is included.
本実施形態の誘電体基板１０では、接合領域１８に、ＴｉおよびＯが含有されており、接合領域１８は、Ｂｉ、Ｔｉ、Ｏとが化合した化合物を主成分としている。 In the dielectric substrate 10 of the present embodiment, Ti and O are contained in the bonding region 18, and the bonding region 18 is mainly composed of a compound in which Bi, Ti, and O are combined.
従来のＢａＴｉＯ３誘電体に、ガラス成分を含む金属ペーストを用いて導電層を形成した場合、Ｂａの含有割合が多いので、導電層内のガラス成分がセラミック体側に偏析し、このガラス成分がセラミック体のＢａと結合することで、セラミック体に導電層が接合されている。ＴｉはＡｇ等と反応性が弱く、セラミック体や導電層の内部全体に拡散して、接合に殆ど寄与はしていなかった。 When a conductive layer is formed using a metal paste containing a glass component on a conventional BaTiO 3 dielectric, the glass component in the conductive layer is segregated to the ceramic body side because the Ba content is large, and this glass component is ceramic. The conductive layer is bonded to the ceramic body by bonding with Ba of the body. Ti was weakly reactive with Ag and the like, diffused throughout the interior of the ceramic body and the conductive layer, and hardly contributed to the bonding.
本実施形態の誘電体基板１０では、導電層１４とセラミック基板１２との接合部分に、導電層内からＢｉが、セラミック基板１２からＴｉがそれぞれ集まって反応し、Ｂｉ、Ｔｉ、Ｏとが化合した化合物を主成分とする接合領域１８を形成している。 In the dielectric substrate 10 of the present embodiment, Bi and Ti from the conductive layer gather and react with each other at the joint between the conductive layer 14 and the ceramic substrate 12, and Bi, Ti, and O are combined. Thus, the junction region 18 containing the compound as a main component is formed.
誘電体基板１０では、導電層１４とセラミック基板１２とが、この接合領域１８によって比較的強固に接合されている。 In the dielectric substrate 10, the conductive layer 14 and the ceramic substrate 12 are bonded relatively firmly by the bonding region 18.
本実施形態では、接合領域１８中の気孔の開口率は４０％以下となっている。接合領域１３中の気孔とは、接合領域１８を導電層１４の側からセラミック基板１２の側に貫通する孔であり、例えば走査型電子顕微鏡装置を用いて行う断面視において確認することができる。この接合領域１８中の気孔率の開口率とは、断面視において、セラミック基板１２に平行な方向に沿った１０μｍに渡る範囲のうち、この平行な方向に沿った気孔の大きさの合計長さ（μｍ）の割合（すなわち、合計長さ／１０）の大きさをいう。上記開口率が４０％以下とすることで、導電層１４のセラミック基板１２に対する接合強度を、比較的高くすることができる。 In the present embodiment, the aperture ratio of the pores in the bonding region 18 is 40% or less. The pores in the bonding region 13 are holes that penetrate the bonding region 18 from the conductive layer 14 side to the ceramic substrate 12 side, and can be confirmed, for example, in a cross-sectional view using a scanning electron microscope apparatus. The opening ratio of the porosity in the bonding region 18 is the total length of the pore sizes along the parallel direction in a range of 10 μm along the direction parallel to the ceramic substrate 12 in a cross-sectional view. It is the size of the ratio (ie, total length / 10) of (μm). By setting the aperture ratio to 40% or less, the bonding strength of the conductive layer 14 to the ceramic substrate 12 can be made relatively high.
また、誘電体基板１０は、導電層１４の内部に、Ｓｉを主成分として含むとともにＢａを含有する第１部分１６を有している。第１部分１６は、導電層１４を形成するためのペーストに含まれるガラス成分に、セラミック基板１２のＢａが含有された部分である。本実施形態では、この第１部分１６には、ペーストに含まれるＺｎも含有されている。 The dielectric substrate 10 includes a first portion 16 containing Si as a main component and containing Ba inside the conductive layer 14. The first portion 16 is a portion in which Ba of the ceramic substrate 12 is contained in the glass component included in the paste for forming the conductive layer 14. In the present embodiment, the first portion 16 also contains Zn contained in the paste.
導電層１４を厚さ方向に２分割した各領域のうち、セラミック基板１２の表面に近い側の第１領域は、セラミック基板１２の表面から遠い側の第２領域に比べて、厚さ方向に平行な平面による断面視における第１部分１６の占有面積率が大きい。 Of each region obtained by dividing the conductive layer 14 in the thickness direction, the first region closer to the surface of the ceramic substrate 12 is closer to the thickness direction than the second region far from the surface of the ceramic substrate 12. The occupation area ratio of the first portion 16 in the cross-sectional view by the parallel plane is large.
すなわち、第１部分１６は、セラミック基板１２の表面の側に偏析し、第１部分１６の一部は、接合領域１８やセラミック基板１２の一部に接合している。本実施形態では、この第１部分１６も、導電層１４とセラミック基板１２との接合に寄与しており、第１部分１６がセラミック基板１２の表面の側に偏析することで、比較的高い接合強度を実現している。この第１部分１６は、例えば導電層１４の断面を走査型電子顕微鏡で観察することで確認できる。例えば、この電子顕微鏡撮影層を画像処理することで、Ａｇを主成分とした周辺の金属相の面積に対する第１部分１６の面積の割合を、比較的容易に算出することもできる。 That is, the first portion 16 segregates on the surface side of the ceramic substrate 12, and a part of the first portion 16 is bonded to the bonding region 18 and a portion of the ceramic substrate 12. In the present embodiment, the first portion 16 also contributes to the bonding between the conductive layer 14 and the ceramic substrate 12, and the first portion 16 segregates on the surface side of the ceramic substrate 12, so that a relatively high bonding is achieved. Realizes strength. The first portion 16 can be confirmed, for example, by observing a cross section of the conductive layer 14 with a scanning electron microscope. For example, by performing image processing on this electron microscope imaging layer, the ratio of the area of the first portion 16 to the area of the surrounding metal phase mainly composed of Ag can be calculated relatively easily.
例えば、図１（ｂ）の断面図において、導電層１４の最高点を通りセラミック基板１２の主面に平行な直線Ｌ１とし、セラミック基板１２の主面から導電層１４の最高点までの５０％の高さ位置を通るセラミック基板１２の主面に平行な直線Ｌ２とすると、セラミック基板１２の表面と直線Ｌ１とに挟まれた領域が第１領域Ｓ１、直線Ｌ１と直線Ｌ２とに挟まれた領域が第２領域Ｓ２に対応する。この断面における第１部分１６の占有面積率が、第２領域に比べて第１領域が、より大きくなっている。 For example, in the cross-sectional view of FIG. 1B, a straight line L1 that passes through the highest point of the conductive layer 14 and is parallel to the main surface of the ceramic substrate 12 is 50% from the main surface of the ceramic substrate 12 to the highest point of the conductive layer 14. When the straight line L2 is parallel to the main surface of the ceramic substrate 12 and passes through the height position, the region sandwiched between the surface of the ceramic substrate 12 and the straight line L1 is sandwiched between the first region S1, the straight line L1, and the straight line L2. The region corresponds to the second region S2. The area occupied by the first portion 16 in this cross section is larger in the first region than in the second region.
また、誘電体基板１０では、第２領域Ｓ２において、この第１部分１６の占める面積は例えば２０質量％未満となっている。第１部分１６は、導電層１４が形成される際、ガラス成分がセラミック基板１２のＢａと反応して形成された部分である。この第１部分１６が形成されることで、ＳｉやＯは、この第１部分１６に集中的に分布する。結果、本実施形態の誘電体基板１０では、第２領域における第１部分１６の面積占有率が、２０質量％未満と比較的少なくなっている。 In the dielectric substrate 10, the area occupied by the first portion 16 in the second region S2 is, for example, less than 20% by mass. The first portion 16 is a portion formed by reacting the glass component with Ba of the ceramic substrate 12 when the conductive layer 14 is formed. By forming the first portion 16, Si and O are intensively distributed in the first portion 16. As a result, in the dielectric substrate 10 of the present embodiment, the area occupancy of the first portion 16 in the second region is relatively low at less than 20% by mass.
ＳｉおよびＯ、ＳｉとＯとの化合物であるＳｉＯ２等は、導電層１４とセラミック基板１２との接合に寄与するが、例えばＳｉＯ２が導電層１４の表面に露出した場合、導電層１４の表面の半田（例えば、ＳｎＡｇＣｕ系半田等）に対する濡れ性は、比較的大きく低減してしまう。本実施形態では、第１領域Ｓ１に第１部分１６が形成され、ガラス成分が第１領域Ｓ１に集中している。このため、第２領域Ｓ２ひいては導電層１４の表面に露出する第１部分１６は、比較的小さくされている。 SiO 2 or the like which is a compound of Si and O, Si and O contributes to the bonding between the conductive layer 14 and the ceramic substrate 12. For example, when SiO 2 is exposed on the surface of the conductive layer 14, The wettability with respect to the surface solder (for example, SnAgCu solder) is relatively greatly reduced. In the present embodiment, the first portion 16 is formed in the first region S1, and the glass component is concentrated in the first region S1. Therefore, the second region S2 and thus the first portion 16 exposed on the surface of the conductive layer 14 is relatively small.
また、Ｔｉは比較的酸化し易い。誘電体基板において、導電層の表面にＴｉが露出していると、この露出部分からも内部に向けて酸化が進行し、導電層１４が変質する虞もある。また、酸化が進行して導電層１４とセラミック基板１２との接合部分が酸化すると、導電層１４とセラミック基板１２との接合強度が低減してしまう。本実施形態の誘電体基板１０は、セラミック基板１２のＴｉが導電層１４に拡散した場合も、セラミック基板１２と導電層１４との接合部分に形成された接合領域１８内に偏析し、導電層１４表面に露出するＴｉ成分は比較的少なくなっている。このため、本実施形態の誘電体基板１０では、導電層１４の表面における酸化も比較的少なく、内部に向けた酸化の進行も抑制されている。 Ti is relatively easy to oxidize. In the dielectric substrate, if Ti is exposed on the surface of the conductive layer, oxidation also proceeds from the exposed portion toward the inside, and the conductive layer 14 may be deteriorated. In addition, when the oxidation progresses and the bonding portion between the conductive layer 14 and the ceramic substrate 12 is oxidized, the bonding strength between the conductive layer 14 and the ceramic substrate 12 is reduced. In the dielectric substrate 10 of the present embodiment, even when Ti of the ceramic substrate 12 diffuses into the conductive layer 14, the dielectric substrate 10 segregates in the bonding region 18 formed in the bonding portion between the ceramic substrate 12 and the conductive layer 14, and the conductive layer 14 The Ti component exposed on the surface is relatively small. For this reason, in the dielectric substrate 10 of this embodiment, the oxidation of the surface of the conductive layer 14 is relatively small, and the progress of oxidation toward the inside is suppressed.
本実施形態の誘電体基板１０は、導電層１４の厚さが４０μｍ以上７０μｍ以下と比較的大きいにも関わらず、セラミック基板１２に対する導電層１４の接合強度が４００Ｎ／ｍｍ２以上と比較的大きくなっている。 In the dielectric substrate 10 of the present embodiment, the bonding strength of the conductive layer 14 to the ceramic substrate 12 is relatively large as 400 N / mm 2 or more, although the thickness of the conductive layer 14 is relatively large as 40 μm or more and 70 μm or less. It has become.
本実施形態の誘電体基板１０は、例えば以下に示す方法で作製すればよい。 The dielectric substrate 10 of the present embodiment may be manufactured by the following method, for example.
まず、例えばＢａＴｉ４Ｏ９を主結晶相とするセラミック基板１２を準備する。 First, for example, a ceramic substrate 12 having a main crystal phase of BaTi 4 O 9 is prepared.
セラミック基板１２は、例えば以下のように形成することができる。原料粉末として、純度９９％以上のＢａＣＯ３、ＴｉＯ２およびＺｎＯ、純度９８％以上のＣｕＯ粉末を準備し、これらを所定量秤量し、混合、粉砕し、得られた粉末を１０００〜１１５０℃の温度で１時間以上保持して仮焼する。仮焼時の昇温速度は８００℃以上の温度において平均５０〜２００℃／時間で昇温する。仮焼した粉末を粉砕粒径がメジアン径で０．５〜２．０μｍに粉砕する。粉砕後の仮焼粉末にバインダーを添加しプレス成形やドクターブレード法等の公知の方法により所定形状に成形後、脱バインダー後のカーボン量が０．１重量％以下となるよう脱バインダーを行う。脱バインダー条件は４００〜８００℃で２０時間以上保持する。脱バインダー後、大気中または酸素を含む雰囲気中において、昇温速度２０〜３００℃／時間で昇温し、１０５０〜１３００℃で５〜３０時間焼成する。例えば以
上のような工程を経て、セラミック基板１２を作製することができる。
The ceramic substrate 12 can be formed as follows, for example. As raw material powder, BaCO 3 , TiO 2 and ZnO having a purity of 99% or more, and CuO powder having a purity of 98% or more were prepared, weighed a predetermined amount, mixed and pulverized, and the obtained powder was 1000 to 1150 ° C. Hold at temperature for 1 hour or longer and calcine. The temperature increase rate during calcination is an average temperature of 50 to 200 ° C./hour at a temperature of 800 ° C. or higher. The calcined powder is pulverized to a median diameter of 0.5 to 2.0 μm. A binder is added to the calcined powder after pulverization, and after forming into a predetermined shape by a known method such as press molding or a doctor blade method, the binder is removed so that the carbon amount after debinding is 0.1% by weight or less. The binder removal condition is maintained at 400 to 800 ° C. for 20 hours or more. After debinding, the temperature is raised at a rate of temperature rise of 20 to 300 ° C./hour in the air or an atmosphere containing oxygen, and baked at 1050 to 1300 ° C. for 5 to 30 hours. For example, the ceramic substrate 12 can be manufactured through the above processes.
このセラミック基板１２を、平面研削加工機を用いた加工を経て表面を研磨する。この研磨工程では、セラミック基板１２の、少なくともペーストを塗布する領域を含む表面を、算術平均表面粗さＲａが０．４μｍ以上かつ１．５μｍ以下の範囲に研磨する。表面をこの範囲に研磨することで、導電体層の膜厚を比較的均一にしつつ、セラミック体に対する導電層の接合強度を比較的高くすることができる。 The surface of the ceramic substrate 12 is polished through a process using a surface grinding machine. In this polishing step, the surface of the ceramic substrate 12 including at least the region where the paste is applied is polished so that the arithmetic average surface roughness Ra is in the range of 0.4 μm to 1.5 μm. By polishing the surface within this range, the bonding strength of the conductive layer to the ceramic body can be made relatively high while the film thickness of the conductive layer is made relatively uniform.
この後、セラミック基板１２の研磨部分導電層１４を形成する。導電層１４の形成（メタライズ処理）には、従来周知の厚膜ペースト法を利用することができる。 Thereafter, the polished partial conductive layer 14 of the ceramic substrate 12 is formed. For the formation (metallization process) of the conductive layer 14, a conventionally known thick film paste method can be used.
このメタライズ処理では、例えば、Ａｇの粉末とガラス粉末とを所定量計量し、エチルセルロースなどのバインダーをテルピネオールなどの有機溶剤で溶解したビヒクルと上記粉体をミキサーで混合し、ペーストを作成する。Ａｇ粉末とガラス粉末との混合比率は、Ａｇ粉末を例えば９８質量％、ガラス粉末を例えば２．０質量％とする。作成したこのペーストを、スクリーン印刷などでセラミック表面のろう付けする箇所に塗布し、大気中で焼成して導電層１４を形成すればよい。ガラス粉末は、例えばＳｉＯ２粒子、Ｂｉ２Ｏ３粒子、Ｂ２Ｏ３粒子、ＺｎＯ粒子を含んでいる。 In this metallization treatment, for example, a predetermined amount of Ag powder and glass powder are weighed, and a vehicle in which a binder such as ethyl cellulose is dissolved in an organic solvent such as terpineol and the above powder are mixed with a mixer to prepare a paste. The mixing ratio of the Ag powder and the glass powder is, for example, 98 mass% for the Ag powder and 2.0 mass% for the glass powder. The prepared paste may be applied to a portion of the ceramic surface to be brazed by screen printing or the like, and fired in the air to form the conductive layer 14. The glass powder contains, for example, SiO 2 particles, Bi 2 O 3 particles, B 2 O 3 particles, and ZnO particles.
その後、大気雰囲気で焼成して、導電層１４を形成する。より具体的には、焼成炉において、９０分かけて室温から８４０℃までゆっくり昇温させた後、２０分間８４０℃の温度を維持し、３０分ほどの短い時間で室温まで降下させる。かかる焼成工程を経ることで、接合部分に接合領域１８が形成された、セラミック基板１２と導電層１４とが接合された誘電体基板１０を得ることができる。 Thereafter, the conductive layer 14 is formed by firing in an air atmosphere. More specifically, after slowly raising the temperature from room temperature to 840 ° C. over 90 minutes in a baking furnace, the temperature of 840 ° C. is maintained for 20 minutes, and the temperature is lowered to room temperature in a short time of about 30 minutes. Through this firing step, it is possible to obtain the dielectric substrate 10 in which the ceramic substrate 12 and the conductive layer 14 are bonded, in which the bonding region 18 is formed in the bonding portion.
ＢｉとＴｉとは、約９００℃の温度で化合物を形成することが知られている。一方、例えば９００℃以上の温度では、ガラス成分の気化が起こり始め気泡が発生するので、９００℃以上の温度とすると接合強度は低下してしまう。このため、ペーストの焼成は、従来では、８００〜８５０度の温度範囲で１０分間程度の短い時間で実施していた。本実施形態では、８４０度程度の温度まで、充分に長い時間をかけてゆっくりと昇温させるので、ガラスペーストが十分に移動できる。ペースト内では、ＢｉとＴｉのみでなく、ＢｉとＴｉとＯ等を含む複数の元素が混合された状態となっており、ＢｉとＴｉとを含む化合物が形成される条件温度は、９００℃を下回っている。このため、９００℃に近い８４０℃程度の温度範囲を、比較的長い時間だけ維持することで、ＢｉとＴｉとＯとを含む接合領域１８が、セラミック基板１２と導電層１４との接合部分の、比較的広い領域にわたって形成される。 Bi and Ti are known to form compounds at a temperature of about 900 ° C. On the other hand, for example, at a temperature of 900 ° C. or higher, the glass component starts to vaporize and bubbles are generated. Therefore, if the temperature is 900 ° C. or higher, the bonding strength is lowered. For this reason, paste baking has been conventionally performed in a temperature range of 800 to 850 degrees C. for a short time of about 10 minutes. In this embodiment, since the temperature is slowly raised to a temperature of about 840 degrees over a sufficiently long time, the glass paste can move sufficiently. In the paste, not only Bi and Ti but also a plurality of elements including Bi, Ti, and O are mixed, and the condition temperature for forming the compound containing Bi and Ti is 900 ° C. It is below. For this reason, by maintaining a temperature range of about 840 ° C., which is close to 900 ° C., for a relatively long time, the bonding region 18 containing Bi, Ti, and O becomes the bonding portion between the ceramic substrate 12 and the conductive layer 14. Formed over a relatively wide area.
なお、導電層１４を形成する際にペーストに含有させるＡｇ粉末の粒径は、３．０μｍ以下、好ましくは２．０μｍ以下であることが好ましい。Ａｇ粉末の粒径を３．０μｍ以下とすることで、ＢｉやＯやＳｉの移動経路の密度が高くなり、ＢｉやＯやＳｉが、セラミック基板１２の表面のより広い範囲に、高い密度で到達する。 Note that the particle size of the Ag powder included in the paste when forming the conductive layer 14 is 3.0 μm or less, preferably 2.0 μm or less. By setting the particle size of the Ag powder to 3.0 μm or less, the density of the movement path of Bi, O, and Si is increased, and Bi, O, and Si are distributed in a wider range on the surface of the ceramic substrate 12 at a high density. To reach.
以下、本発明の実施例を示すとともに、本発明の効果の一例について説明しておく。 Examples of the present invention will be described below, and examples of the effects of the present invention will be described.
まず、上記実施形態の誘電体基板の一例の断面を観察した結果を示しておく。図２は、上記工程を経て作製された誘電体基板の断面を、走査型電子顕微鏡で観察して得られた写真（断面ＳＥＭ写真）である。また、図３(ａ)および（ｂ）は、図２（ａ）に示す断面ＳＥＭ写真を取得する際に測定した、当該断面におけるＥＰＭＡ（Ｅｌｅｃｔｒｏｎ Ｐｒｏｂｅ Ｍｉｃｒｏ Ａｎａｌｙｚｅｒ）による分析結果である。走査型電子顕微鏡は、
例えば日立製Ｓ−８００を用い、加速電圧１５ｋＶで撮影した。
First, the result of observing a cross section of an example of the dielectric substrate of the above embodiment will be described. FIG. 2 is a photograph (cross-sectional SEM photograph) obtained by observing a cross-section of the dielectric substrate manufactured through the above-described process with a scanning electron microscope. FIGS. 3A and 3B are analysis results by EPMA (Electron Probe Micro Analyzer) in the cross section measured when the cross-sectional SEM photograph shown in FIG. 2A is acquired. Scanning electron microscope
For example, using S-800 manufactured by Hitachi, the image was taken at an acceleration voltage of 15 kV.
図３(ａ)は図２に示す点Ａにおける各元素の特性Ｘ線の強度を示す図であり、図３（ｂ）は図２に示す点Ｂにおける各元素の特性Ｘ線の強度を示す図である。図２に示す点Ａは、上記実施形態における接合領域１８に対応し、図２に示す点Ｂは、上記実施形態における第１部分１６に対応している。図３（ａ）から分かるように、接合領域１３に対応する図２の点Ａ部分は、Ｂｉを主成分として含むとともに、ＴｉおよびＯを含有する。セラミック基板と導電層との境界部分に、ＢｉとＴｉとの化合物が形成されていることがわかる。また、図３（ｂ）から分かるように、第１部分１６に対応する図２の点Ｂでは、Ｓｉを主成分として含むとともにＢａを含有する。導電層１４内のガラス成分によって、セラミック基板１２と導電層１４とが接合されていることがわかる。 3A is a diagram showing the intensity of the characteristic X-ray of each element at point A shown in FIG. 2, and FIG. 3B is the intensity of the characteristic X-ray of each element at point B shown in FIG. FIG. A point A shown in FIG. 2 corresponds to the bonding region 18 in the above embodiment, and a point B shown in FIG. 2 corresponds to the first portion 16 in the above embodiment. As can be seen from FIG. 3A, the point A portion of FIG. 2 corresponding to the bonding region 13 contains Bi as a main component and contains Ti and O. It can be seen that a compound of Bi and Ti is formed at the boundary between the ceramic substrate and the conductive layer. Further, as can be seen from FIG. 3B, the point B in FIG. 2 corresponding to the first portion 16 contains Si as a main component and Ba. It can be seen that the ceramic substrate 12 and the conductive layer 14 are bonded together by the glass component in the conductive layer 14.
また、図４(ａ)および（ｂ）は、図２および図３に示す試料とは別の誘電体基板の断面を、走査型電子顕微鏡で観察して得られた写真（断面ＳＥＭ写真）である。図４(ａ)は、ペーストに混合する粉末として、平均粒径が５μｍのＡｇ粉末を用いた試料についてのＳＥＭ写真であり、図４（ｂ）は、ペーストに混合する粉末として、平均粒径が２μｍのＡｇ粉末を用いたＳＥＭ写真である。 4 (a) and 4 (b) are photographs (cross-sectional SEM photographs) obtained by observing a cross section of a dielectric substrate different from the sample shown in FIGS. 2 and 3 with a scanning electron microscope. is there. FIG. 4A is an SEM photograph of a sample using Ag powder having an average particle diameter of 5 μm as powder to be mixed with the paste, and FIG. 4B is an average particle diameter as powder mixed with the paste. Is an SEM photograph using 2 μm Ag powder.
図４（ａ）に比較して、図４（ｂ）の方は、セラミック基板１２と導電層１４との接合部分に形成された接合領域１８の気孔の開口率が、より小さいことが確認できる。導電層１４の形成用に用いるペーストに用いるＡｇ粒子は、平均粒径は比較的小さいことが好ましく、例えば平均粒径３．０μｍ以下であることが好ましい。
また、図４(ａ)に示す試料と図４（ｂ）に示す試料それぞれに対し、導電層１４の接合強度を評価した結果、図４(ａ)に示す試料の接合強度は平均で約３７８Ｎ、図４（ｂ）に示す試料では平均で約５１１Ｎであった。この接合強度の評価は、セラミック基板に形成した導電層の表面に、半田を介してＣｕ製のピンを接合し、このピンを一軸方向に引っ張た際、Ｃｕピンが剥がれる際の強度を計測した。各資料それぞれで１０点計測した平均値を求めた。接合領域１８の気孔の開口率は、セラミック基板１２と導電層１４との接合強度に関係しており、接合領域１８の面積が大きい方が接合強度は高くなっている。
Compared to FIG. 4A, it can be confirmed that in FIG. 4B, the aperture ratio of the pores in the bonding region 18 formed in the bonding portion between the ceramic substrate 12 and the conductive layer 14 is smaller. . The Ag particles used in the paste used for forming the conductive layer 14 preferably have a relatively small average particle size, for example, an average particle size of 3.0 μm or less.
Also, as a result of evaluating the bonding strength of the conductive layer 14 for each of the sample shown in FIG. 4A and the sample shown in FIG. 4B, the bonding strength of the sample shown in FIG. In the sample shown in FIG. 4B, the average was about 511N. For the evaluation of the bonding strength, a Cu pin was bonded to the surface of the conductive layer formed on the ceramic substrate via solder, and when this pin was pulled in a uniaxial direction, the strength when the Cu pin was peeled was measured. . An average value obtained by measuring 10 points for each material was obtained. The opening ratio of the pores in the bonding region 18 is related to the bonding strength between the ceramic substrate 12 and the conductive layer 14, and the bonding strength is higher as the area of the bonding region 18 is larger.
１０ 誘電体基板
１２ セラミック基板
１４ 導電層
１６ 第１部分
１８ 接合領域
DESCRIPTION OF SYMBOLS 10 Dielectric substrate 12 Ceramic substrate 14 Conductive layer 16 1st part 18 Joining area | region
Claims (7)
前記セラミック体は、ＢａＴｉ４Ｏ９を主結晶相とし、
前記導電層は、ＡｇまたはＣｕを主成分とし、ＳｉおよびＢｉをガラス成分に含み、
前記導電層と前記セラミック体との境界部分に、Ｂｉを主成分として含むとともに、ＴｉおよびＯを含有する接合領域が形成されていることを特徴とする導電層付きセラミック体。 A ceramic body with a conductive layer in which a conductive layer is bonded to the surface of the ceramic body,
The ceramic body has BaTi 4 O 9 as a main crystal phase,
The conductive layer includes Ag or Cu as a main component, Si and Bi as glass components,
A ceramic body with a conductive layer, wherein a junction region containing Ti and O and containing Bi as a main component is formed at a boundary portion between the conductive layer and the ceramic body.
前記導電層を厚さ方向に２分割した各領域のうち、前記セラミック体の表面に近い側の第１領域は、前記セラミック体の表面から遠い側の第２領域に比べて、厚さ方向に平行な平面による断面視における前記第１部分の占有面積率が大きいことを特徴とする請求項１記載の導電層付きセラミック体。 Inside the conductive layer has a first portion containing Si as a main component and containing Ba,
Of each region obtained by dividing the conductive layer into two in the thickness direction, the first region closer to the surface of the ceramic body is closer to the thickness direction than the second region far from the surface of the ceramic body. 2. The ceramic body with a conductive layer according to claim 1, wherein the area occupied by the first portion in a cross-sectional view by a parallel plane is large.
前記ペーストを焼成して、前記セラミック体の表面に、ＡｇまたはＣｕを主成分とし、ガラス成分にＳｉおよびＢｉを含む導電層を形成する焼成工程とを有し、
平均粒径が３μｍ以下の前記導電性粉末を用いることを特徴とする導電層付きセラミック体の製造方法。 Application in which a paste formed by mixing a glass powder containing at least Bi 2 O 3 and a conductive powder containing either Ag or Cu as a main component is applied to the surface of a ceramic body having BaTi 4 O 9 as a main crystal phase. Process,
Firing the paste, and forming a conductive layer containing Ag or Cu as a main component and containing Si and Bi as a glass component on the surface of the ceramic body,
A method for producing a ceramic body with a conductive layer, wherein the conductive powder having an average particle diameter of 3 μm or less is used.
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