JP5661694B2 - Multi-level power converter - Google Patents

Description

  The present invention relates to a multi-level power conversion device having an improved overcurrent protection function.

  Conventionally, an ordinary two-level inverter device has been used as a power conversion device that converts direct current to alternating current. Recently, the need for a high-voltage, large-capacity power conversion device has expanded, and so-called multi-level inverter devices of three or more levels have been applied to, for example, inverter devices for driving motors.

  A three-level inverter device is a device that literally outputs three DC potentials. In contrast, the conventional two-level inverter device outputs two DC potentials. The difference in the configuration of the inverter is that a two-level inverter device connects two switching elements connected in series to a DC power supply in parallel and obtains an AC output from the intermediate point, whereas a three-level inverter device In the apparatus, four switching elements are connected in series to a DC power source having three potentials of positive, zero, and negative to form a series connection body, and an AC output is obtained from the middle point. Both ends of the series connection body of the three-level inverter device are connected to positive and negative DC potentials, and the intermediate points of the switching elements on the positive and negative ends and the intermediate switching elements are respectively set to zero potential via diodes. Clamped. Each of the switching elements constituting the series connection body has flywheel diodes connected in reverse parallel. A portion including the series connection body and the clamp diode is referred to as a switching leg.

  For two-level and three-level inverter devices, a single-phase AC output is obtained by connecting two switching legs in parallel, and a three-phase AC output is obtained by connecting three switching legs in parallel. Can do.

  In a conventional two-level inverter device, the voltage between the main electrodes of the switching element is detected for the purpose of overcurrent protection of the switching element, and when the switching element is turned on, the voltage between the main electrodes of the switching element is higher than the reference voltage If so, a method of reducing the gate voltage or stopping the apparatus has been used.

  That is, in the normal operation state, when an ON pulse is applied to the control electrode of the switching element, the voltage between the main electrodes of the element decreases to a saturation voltage with a slight delay time. On the other hand, when an overcurrent flows when the element is turned on, the voltage between the main electrodes of the element does not decrease because of the internal resistance of the element. Therefore, when an on-pulse is given and the voltage between the main electrodes of the element is equal to or higher than the detection level after a predetermined delay time, it is determined that an overcurrent is flowing, and overcurrent protection is possible if the device is stopped.

  Various proposals in which this concept is applied to a three-level inverter device have been made (see, for example, Patent Document 1).

JP 2000-354383 A (page 5, FIG. 3)

  Since the method disclosed in Patent Document 1 does not require a current detection unit, the apparatus can be easily mounted. However, the speed at which the voltage between the main electrodes of the switching element decreases depends on the characteristics of the element and the load current, and its adjustment / setting is difficult and there is a problem of operation delay.

  In addition, in the intermediate switching element that is not connected to both ends of the switching leg of the three-level inverter device, no current flows through the element even if an on-pulse is applied to the element in the reflux mode. There is a problem in that it cannot be positively fixed, and eventually, overcurrent protection based on voltage detection between the main electrodes cannot be used.

  Furthermore, a DC short-circuit does not necessarily occur in a healthy state as the switching element is erroneously ignited, and if the impedance decreases in the short-circuited state, there is a problem that this method cannot be detected in some cases. It was.

  The present invention has been made in view of the above problems, and provides a multilevel power conversion device capable of detecting an overcurrent abnormality of a main circuit element quickly and surely and performing overcurrent protection. With the goal.

In order to achieve the above object, a multilevel power conversion device according to the present invention includes a DC power supply having a potential of N (N is an integer of 3 or more) level and a parallel connection to the DC power supply, and reverses a flywheel diode. A series connection body of (N-1) × 2 switching elements connected in parallel and (N-2) intermediate potentials of the DC power supply were connected so as to fix the intermediate portion of the series connection body ( N-2) A gate pulse is supplied to the control pole of the switching element in order to obtain an N-level phase voltage from a plurality of switching legs composed of 2 clamp diodes and the midpoint of the series connection body When an ON pulse for turning on each switching element is given from the control means and the control means, an abnormal signal is output when the voltage between the main electrodes of the switching element is a predetermined value or more. Voltage monitoring means; and calculation means for logically calculating an output of the voltage monitoring means for each switching leg to determine abnormality of a main circuit element in the switching leg, wherein the calculation means includes the voltage monitoring means. When any two of the abnormal signals are always input, it is determined that an abnormality has occurred.

  ADVANTAGE OF THE INVENTION According to this invention, the multilevel power converter device which can detect the overcurrent abnormality of a main circuit element quickly and reliably and can perform an overcurrent protection can be provided.

The circuit block diagram of the power converter device which concerns on Example 1 of this invention. The internal block diagram of the voltage detector used for the power converter device of Example 1. FIG. The internal block diagram of the arithmetic circuit used for the power converter device of Example 1. FIG. The short-circuit mode analysis diagram of a three-level inverter. The internal block diagram of the voltage detector used for the power converter device which concerns on Example 2 of this invention. The internal block diagram of the arithmetic circuit used for the power converter device of Example 2. FIG. The short circuit mode analysis figure at the time of the clamp diode failure of a 3 level inverter. The internal block diagram of the voltage detector used for the power converter device which concerns on Example 3 of this invention. The internal block diagram of the arithmetic circuit used for the power converter device of Example 3. FIG. The circuit block diagram of the power converter device which concerns on Example 4 of this invention. The short-circuit mode analysis diagram of a 4-level inverter. The short circuit mode analysis figure at the time of the clamp diode failure of a 4 level inverter. The internal block diagram of the arithmetic circuit used for the power converter device of Example 4. FIG.

  Embodiments of the present invention will be described below with reference to the drawings.

  A power converter according to a first embodiment of the present invention will be described with reference to FIGS. 1 to 4. FIG. 1 is a circuit configuration diagram of a power conversion apparatus according to Embodiment 1 of the present invention.

  A DC voltage obtained from the DC power source 1 is supplied to a series circuit composed of DC voltage dividing capacitors 2p and 2n. The DC power source 1 has a voltage of 2E. Therefore, if the positive potential of the DC voltage dividing capacitor 2p is + E, the potential at the midpoint of the DC voltage dividing capacitors 2p and 2n is 0, and the negative potential of the DC voltage dividing capacitor 2n is -E.

  The DC voltage having the three-level potential obtained in this way is supplied to the switching legs 3u, 3v and 3w. In FIG. 1, the internal structure of the switching leg 3u is shown. Since the internal configuration of the other switching legs 3v and 3w is basically the same as that of the switching leg 3u, their illustration and description are omitted.

  The switching leg 3u includes four switching elements Q1, Q2, Q3 and Q4 connected in series, flywheel diodes D1, D2, D3 and D4 connected in antiparallel to these switching elements, and a smoothing capacitor 2p and The clamp diode DP is connected from the midpoint of 2n to the midpoint of the switching elements Q1 and Q2, and the clamp diode DN is connected from the midpoint of the smoothing capacitors 2p and 2n to the midpoint of the switching elements Q3 and Q4. . Here, the switching element Q1 and the switching element Q4 are connected to the + E potential and the −E potential of the DC power supply, respectively. Since the switching element Q1 and the switching element Q4 form the end of the switching leg 3u, they are called switching elements at both ends. On the other hand, since the switching element Q2 and the switching element Q3 form an intermediate part of the switching leg 3u, they are referred to as an intermediate part switching element. The switching elements, flywheel diodes and clamp diodes in the switching leg are collectively referred to as main circuit elements.

  A gate pulse is applied from the control circuit 6 to the control poles of the switching elements Q1, Q2, Q3 and Q4 constituting the switching leg 3u. The switching elements Q1, Q2, Q3, and Q4 output a desired U-phase output voltage to the midpoint of the switching elements Q2 and Q3 by PWM control, for example. This U-phase output voltage is supplied to the primary winding of the AC motor 4 as a load. Similarly, the V-phase output voltage and the W-phase output voltage are respectively supplied from the switching legs 3v and 3w to the primary winding of the AC motor 4.

  The voltage Vce between the main electrodes of the switching elements Q1, Q2, Q3 and Q4 is applied to the voltage monitors 51, 52, 53 and 54, respectively. The voltage monitor 51, 52, 53 and 54 is also supplied with a gate pulse for the switching element from the control circuit 6. Outputs of the voltage monitors 51, 52, 53 and 54 are given to the arithmetic circuit 7. In the arithmetic circuit 7, an overcurrent abnormality of the switching element and the diode in the switching leg 3 u is detected by performing a conditional calculation described later. Similarly, the voltage between the main electrodes of the switching elements constituting the switching legs 3v and 3w is also monitored by the corresponding voltage monitor, and an overcurrent abnormality is detected, but the illustration is omitted. .

  FIG. 2 is an internal configuration diagram of the voltage monitor 51.

  The positive potential side of the voltage Vce between the main electrodes of the switching element Q1 is connected to the positive input of the comparator 512 via a reverse blocking diode 511 connected in the reverse direction. The negative potential side of the voltage Vce is connected to the negative input of the comparator 512 through a voltage bias by the detection level setting unit 513. In this way, when the voltage Vce exceeds the detection level, the comparator 512 outputs 1. The output of the comparator 512 becomes one input of the AND circuit 514. The other input of the AND circuit 514 is supplied with a gate pulse for the switching element Q 1 obtained from the control circuit 6. In this way, it is possible to detect whether or not the voltage Vce between the main electrodes when the switching element Q1 is on is excessive.

  In the first embodiment, the voltage monitor 51 is applied to switching elements in all the switching legs. Therefore, the voltage monitors 52, 53 and 54 have the same configuration as the voltage monitor 51.

  FIG. 3 is an internal configuration diagram of the arithmetic circuit 7 in FIG.

  The output signals of the voltage monitors 51, 52, 53 and 54 become one input of AND circuits 71, 72, 73 and 74, respectively. The other inputs of the AND circuits 71, 72, 73 are supplied with the outputs of the OR circuits 81, 82, 83, and 84. The input of the OR circuit 81 is supplied with three signals other than the output signal of the voltage monitor 51 which is one input of the AND circuit 71, that is, the output signals of the voltage monitors 52, 53 and 54. Similarly, three signals other than the output signals of the voltage monitors 52, 53, and 54 are applied to the OR circuits 82, 83, and 84, respectively. Output signals from the AND circuits 71, 72, 73 and 74 are supplied to the OR circuit 75. With this configuration, when any two or more of the output signals of the voltage monitors 51, 52, 53, and 54 become 1, the output of the OR circuit 75, that is, the output of the arithmetic circuit 7 is 1. It becomes.

  The operation of the first embodiment will be described below with reference to the short-circuit mode analysis diagram of FIG.

  FIG. 4A shows the current route of the short-circuit current when the flywheel diode D1 in the switching leg is short-circuited. Since the flywheel diode D1 and the switching element Q1 are connected in parallel, the following discussion also applies when the switching element Q1 is in a short-circuit state.

  As shown in FIG. 4A, when the switching elements Q2 and Q3 are simultaneously turned on, a short-circuit current flows from the + E potential to the routes D1 (or Q1), Q2, Q3, DN, and 0 potential. Therefore, it can be determined that the flywheel diode D1 or the switching element Q1 is short-circuited when the main-electrode voltage Vce when the switching elements Q2 and Q3 are on exceeds the detection level.

  Here, the reason why the delay element that has been conventionally required in the circuit of the voltage monitor 51 shown in FIG. 2 is unnecessary will be described. As described above, when detecting an overcurrent abnormality of the flywheel diode D1 or the switching element Q1, a condition is required in which the main-electrode voltage Vce when both the switching elements Q2 and Q3 are on exceeds the detection level. Since the switching elements Q2 and Q3 do not change from the OFF state to the ON state at the same time, even if any of the switching elements Q2 and Q3 is in the transient ON state and the inter-electrode voltage Vce exceeds the detection level, In the normal state, the other inter-electrode voltage Vce does not exceed the detection level. Accordingly, it is possible to quickly detect an overcurrent abnormality without the delay element.

  FIG. 4B shows a current route of the short-circuit current when the flywheel diode D2 or the switching element Q2 in the switching leg is short-circuited. As shown in FIG. 4B, when the switching elements Q3 and Q4 are simultaneously turned on, a short-circuit current flows from the 0 potential to the DP, D2 (or Q2), Q3, Q4, and -E potential routes. Accordingly, it can be determined that the flywheel diode D2 or the switching element Q2 is short-circuited when the main-electrode voltage Vce when the switching elements Q3 and Q4 are on exceeds the detection level.

  FIG. 4C shows the current route of the short-circuit current when the flywheel diode D3 or the switching element Q3 in the switching leg is short-circuited. As shown in FIG. 4C, when the switching elements Q1 and Q2 are simultaneously turned on, a short-circuit current flows from the + E potential to the Q1, Q2, D3 (or Q3), DN, and 0 potential routes. Therefore, it can be determined that the flywheel diode D3 or the switching element Q3 is short-circuited when the main electrode voltage Vce when the switching elements Q1 and Q2 are on exceeds the detection level.

  FIG. 4D shows the current route of the short-circuit current when the flywheel diode D4 or the switching element Q4 in the switching leg is short-circuited. As shown in FIG. 4D, when the switching elements Q2 and Q3 are turned on at the same time, a short-circuit current flows from the 0 potential to the DP, Q2, Q3, D4 (or Q4), and -E potential routes. Therefore, it can be determined that the flywheel diode D4 or the switching element Q4 is short-circuited when the main-electrode voltage Vce when the switching elements Q2 and Q3 are on exceeds the detection level.

  As described above, when any main circuit element in the switching leg is short-circuited, the main electrode voltage Vce when the two switching elements are on always exceeds the detection level. Therefore, if the voltage monitor shown in FIG. 2 and the arithmetic circuit shown in FIG. 3 are used in combination, this overcurrent abnormality can be detected.

  The arithmetic circuit in FIG. 3 is configured to detect an overcurrent abnormality when the voltage Vce between the main electrodes when any two or more switching elements are on exceeds the detection level. As analyzed, if the configuration is such that an overcurrent abnormality is detected when the voltage Vce between the two main switching elements adjacent to each other in the switching leg exceeds the detection level, the reliability is further improved. Obviously, an overcurrent abnormality can be detected.

  Hereinafter, the power converter concerning Example 2 of the present invention is explained with reference to Drawing 5 thru / or Drawing 7.

  FIG. 5 is an internal configuration diagram of a voltage monitor 51A used in the power conversion apparatus according to the second embodiment of the present invention. About each part of this Example 2, the same part as each part of the internal structure figure of the voltage monitor used for the power converter device which concerns on Example 1 of FIG. 2 is shown with the same code | symbol, and the description is abbreviate | omitted. The second embodiment is different from the first embodiment in that a delay unit 515 is provided on the output side of the comparator 512 in the voltage monitor 51A, and the output of the delay unit 515 is provided to the AND circuit 514. is there.

  As described above, the delay unit 515 is configured not to detect a transient state when the switching element Q1 is turned on. In this transient state, the voltage Vce exceeds the detection level regardless of the presence or absence of an overcurrent abnormality, and thus causes erroneous detection in the second embodiment.

  In the second embodiment, the voltage monitor 51A with a delay is applied to the voltage monitor 51 and 54 of the switching element at both ends of the switching leg in FIG. Apply the voltage monitor without delay shown in.

  FIG. 6 is an internal configuration diagram of an arithmetic circuit 7A used in the power conversion apparatus according to the second embodiment of the present invention. As shown in FIG. 6, the output signals of the voltage monitors 51 and 54 are directly supplied to the OR circuit 75A. The output signals of the voltage monitors 52 and 53 are supplied to the AND circuit 76, and the output signal of the AND circuit 76 is supplied to the OR circuit 75A. The output of the OR circuit 75A is configured to be the output of the arithmetic circuit 7A.

  The operation of the second embodiment will be described below with reference to the short-circuit mode analysis diagram of FIG.

  FIG. 7A shows the current route of the short-circuit current when the clamp diode DP in the switching leg is short-circuited. As shown in FIG. 7A, when the switching element Q1 is turned on, a short-circuit current flows through the route from + E potential to Q1, DP, and 0 potential. Therefore, when the main electrode voltage Vce when the switching element Q1 is on exceeds the detection level, it can be determined that the clamp diode DP is short-circuited.

  FIG. 7B shows a current route of the short-circuit current when the clamp diode DN in the switching leg is short-circuited. As shown in FIG. 7B, when the switching element Q4 is turned on, a short-circuit current flows from the 0 potential to the DN, Q4, and -E potential routes. Therefore, when the main electrode voltage Vce when the switching element Q4 is on exceeds the detection level, it can be determined that the clamp diode DN is short-circuited.

  What can be said from the short-circuit mode analysis diagram of FIG. 7 is that in order to detect an overcurrent abnormality of the clamp diode, the main-electrode voltage Vce when the switching element at either end of the switching leg is on exceeds the detection level. It can be seen that it is good to do.

  Therefore, considering the operation at the time of overcurrent abnormality of all the main circuit elements including the clamp diode, when the main circuit element in any of the switching legs is short-circuited, the switching element Q1 is turned on between the main electrodes. It can be seen that the voltage Vce increases, the switching-element Q4 on-time main electrode voltage Vce increases, or the switching elements Q2 and Q3 on-time main electrode voltage Vce both increase.

  For the above reasons, if the arithmetic circuit 7A shown in FIG. 6 is used, it is possible to quickly detect that any of the main circuit elements is short-circuited. When the main electrode voltage Vce when the switching element Q1 is on is large, it is considered that the switching element Q3, the flywheel diode D3, or the clamp diode DP is short-circuited. When the main electrode voltage Vce when the switching element Q4 is on is large, it is considered that the switching element Q2, the flywheel diode D2, or the clamp diode DN is short-circuited. Then, when the on-state main electrode voltage Vce of the switching elements Q2 and Q3 is both large, it is considered that the switching element Q1 or the flywheel diode D1, or the switching element Q4 or the flywheel diode D4 is short-circuited.

  Hereinafter, the power converter concerning Example 3 of the present invention is explained with reference to Drawing 8 and Drawing 9. FIG.

  FIG. 8 is an internal configuration diagram of a voltage monitor 51B used in the power conversion apparatus according to Embodiment 3 of the present invention. About each part of this Example 3, the same part as each part of the internal block diagram of the voltage monitor used for the power converter device which concerns on Example 2 of FIG. 5 is shown with the same code | symbol, and the description is abbreviate | omitted. The third embodiment is different from the second embodiment in that an AND circuit 514A that inputs the output of the comparator 512 and the gate signal is provided, and the output of the AND circuit 514A is also used as another output of the voltage monitor 51B. This is the point that was configured. Therefore, the voltage monitor 51B outputs two signals with and without delay as a signal having a large main-electrode voltage Vce when on. In the third embodiment, the voltage monitor 51B that outputs these two signals is applied to the voltage monitor 51 and 54 for the switching element at both ends of the switching leg in FIG.

  FIG. 9 is an internal configuration diagram of an arithmetic circuit 7B used in the power conversion apparatus according to Embodiment 3 of the present invention. About each part of this Example 3, the same part as each part of the internal block diagram of the arithmetic circuit used for the power converter device which concerns on Example 1 of FIG. 3 is shown with the same code | symbol, and the description is abbreviate | omitted. The third embodiment differs from the first embodiment in that the delayed output signals of the voltage monitors 51B and 54 are added to the input of the OR circuit 75B.

  Although the arithmetic circuit 7A shown in FIG. 6 of the second embodiment has a simple circuit configuration, since the voltage monitor 51A with a delay is used at both ends of the switching leg, the switching element or fly in the middle part of the switching leg is used. Even when the overcurrent of the wheel diode is abnormal, the overcurrent abnormality detection is delayed by the delay time set by the delay unit 515. As a countermeasure, if the voltage monitor 51B of this embodiment and the arithmetic circuit 7B are used in combination, even if an overcurrent abnormality occurs in the switching element or flywheel diode in the middle part of the switching leg, it is detected without a time delay. It becomes possible.

  Hereinafter, the power converter concerning Example 4 of the present invention is explained with reference to Drawing 10 thru / or Drawing 13.

  FIG. 10 is a circuit configuration diagram of the power conversion device according to the fourth embodiment of the present invention. In each part of the fourth embodiment, the same parts as those in the circuit configuration diagram of the power conversion apparatus according to the first embodiment of FIG. 1 are denoted by the same reference numerals, and the description thereof is omitted. The fourth embodiment is different from the first embodiment in that a DC voltage dividing capacitor 2c is provided in the DC power supply section between the DC voltage dividing capacitor 2p and the DC voltage dividing capacitor 2n, and in addition to the potentials + E and -E, the potential + E / 3 And a four-level configuration capable of outputting the potential −E / 3, and accordingly, a switching element Q5 and a flywheel diode D5, and a switching element Q6 and a flywheel diode D6 are provided in series in the switching leg 3u1. Clamp diodes DP1 and DN1 are provided for clamping the output potential to + E / 3. The intermediate points of switching elements Q1 and Q2, the intermediate points of switching elements Q4 and Q5, and the output potential are clamped to -E / 3. Clamping diodes DP2 and DN2 are provided for switching between the switching elements Q2 and Q3. Voltage monitoring devices 55 and 56 for detecting the main electrode voltage Vce when the switching devices Q5 and Q6 are turned on are provided, and the output is given to the arithmetic circuit 7C. It is the point comprised as follows.

  That is, the circuit configuration diagram of FIG. 10 is obtained by changing the three-level inverter device of FIG. 1 to a four-level inverter device. In FIG. 10, the gate signal to each switching element given from the control circuit 6 is shown by a single line.

  Hereinafter, the operation of the fourth embodiment will be described with reference to the short-circuit mode analysis diagrams of FIGS.

FIG. 11A shows the current route of the short-circuit current when the flywheel diode D1 in the switching leg is short-circuited. Since the flywheel diode D1 and the switching element Q1 are connected in parallel, the following discussion also applies when the switching element Q1 is in a short-circuit state.

  As shown in FIG. 11A, when the switching elements Q2, Q3 and Q4 are simultaneously turned on, they are short-circuited from the + E potential to the D1 (or Q1), Q2, Q3, Q4, DN1, and + E / 3 potential routes. Current flows. Therefore, it can be determined that the flywheel diode D1 or the switching element Q1 is short-circuited when the main-electrode voltage Vce when the switching elements Q2, Q3, and Q4 are on exceeds the detection level.

  FIG. 11B shows the current route of the short-circuit current when the flywheel diode D2 or the switching element Q2 in the switching leg is short-circuited. As shown in FIG. 11 (b), when the switching elements Q3, Q4 and Q5 are turned on at the same time, the DP1, D2 (or Q2), Q3, Q4, Q5, DN2 and -3 / E potentials from the + E / 3 potential. A short-circuit current flows through the route. Therefore, it can be determined that the flywheel diode D2 or the switching element Q2 is short-circuited when the main-electrode voltage Vce when the switching elements Q3, Q4, and Q5 are on exceeds the detection level.

  FIG. 11C shows a current route of a short-circuit current when the flywheel diode D3 or the switching element Q3 in the switching leg is short-circuited. As shown in FIG. 11C, when the switching elements Q4, Q5, and Q6 are turned on at the same time, from the −E / 3 potential to the route of D3 (or Q3), DN, Q5, Q6, and −E potential. Short circuit current flows. Therefore, it can be determined that the flywheel diode D3 or the switching element Q3 is short-circuited when the main-electrode voltage Vce when the switching elements Q4, Q5, and Q6 are on exceeds the detection level.

  FIG. 11D shows the current route of the short-circuit current when the flywheel diode D4 or the switching element Q4 in the switching leg is short-circuited. As shown in FIG. 11D, when the switching elements Q1, Q2 and Q3 are simultaneously turned on, they are short-circuited from the + E potential to the Q1, Q2, Q3, D4 (or Q4), DN1 and + E / 3 potential routes. Current flows. Therefore, it can be determined that the flywheel diode D4 or the switching element Q4 is short-circuited when the main-electrode voltage Vce when the switching elements Q1, Q2, and Q3 are on exceeds the detection level.

  FIG. 11E shows a current route of a short-circuit current when the flywheel diode D5 or the switching element Q5 in the switching leg is short-circuited. As shown in FIG. 11E, when the switching elements Q2, Q3, and Q4 are simultaneously turned on, the DP1, Q2, Q3, Q4, D5 (or Q5), DN2, and -E / 3 from the + E / 3 potential. A short-circuit current flows through the potential route. Accordingly, it can be determined that the flywheel diode D5 or the switching element Q5 is short-circuited when the main-electrode voltage Vce when the switching elements Q2, Q3, and Q4 are on exceeds the detection level.

  FIG. 11 (f) shows the current route of the short-circuit current when the flywheel diode D6 or the switching element Q6 in the switching leg is short-circuited. As shown in FIG. 11 (f), when the switching elements Q3, Q4, and Q5 are simultaneously turned on, the route from the −E / 3 potential to the DP2, Q3, Q4, Q5, D6 (or Q6), and the −E potential. A short circuit current flows. Therefore, it can be determined that the flywheel diode D6 or the switching element Q6 is short-circuited when the main-electrode voltage Vce when the switching elements Q3, Q4, and Q5 are on exceeds the detection level.

  As can be seen from the above short-circuit mode analysis, in the case of a four-level inverter, if it is detected that the main inter-electrode voltage Vce of the three adjacent switching elements exceeds the detection level, any switching in the switching leg An overcurrent abnormality of the element or flywheel diode can be detected. In addition, if the detection is performed strictly in this way, it is possible to identify a portion in a short circuit state to some extent. When this is expanded to an N (N is an integer, N> 2) level inverter, if it is detected that the main-pole voltage Vce at the ON time of adjacent (N-1) switching elements exceeds the detection level. I know it ’s good.

  The above is a case of strict overcurrent abnormality detection. However, as described in the first embodiment, even if it is detected that the main-pole voltage Vce when any two switching elements are on exceeds the detection level, It is easily considered that detection is possible. When this is expanded to an N-level inverter, if it is detected that the main inter-electrode voltage Vce of any two switching elements in the switching leg of the N-level inverter has exceeded the detection level, any switching in the switching leg can be performed. It can be said that an overcurrent abnormality of the element or the flywheel diode can be detected.

  FIG. 12 is a failure mode analysis diagram when the clamp diode is short-circuited. FIG. 12 corresponds to FIG. 7 in the three-level inverter.

  FIG. 12A shows the current route of the short-circuit current when the clamp diode DP1 in the switching leg is short-circuited. As shown in FIG. 12A, when the switching element Q1 is turned on, a short-circuit current flows through a route from the + E potential to Q1, DP, and + E / 3 potential. Therefore, when the main electrode voltage Vce when the switching element Q1 is on exceeds the detection level, it can be determined that the clamp diode DP is short-circuited.

  FIG. 12B shows a current route of the short-circuit current when the clamp diode DP2 in the switching leg is short-circuited. As shown in FIG. 12B, when the switching elements Q1 and Q2 are turned on, a short-circuit current flows through the route from the + E potential to the Q1, Q2, DP2, and −E / 3 potential. Therefore, it can be determined that the clamp diode DP2 is short-circuited when the main-electrode voltage Vce when the switching elements Q1 and Q2 are on exceeds the detection level.

  FIG. 12C shows the current route of the short-circuit current when the clamp diode DN1 in the switching leg is short-circuited. As shown in FIG. 12C, when the switching elements Q5 and Q6 are turned on, a short-circuit current flows from the + E / 3 potential to the DN1, Q5, Q6, and -E potential routes. Therefore, it can be determined that the clamp diode DN1 is short-circuited when the main-electrode voltage Vce when the switching elements Q5 and Q6 are on exceeds the detection level.

  FIG. 12D shows a current route of the short-circuit current when the clamp diode DN2 in the switching leg is short-circuited. As shown in FIG. 12D, when the switching element Q6 is turned on, a short-circuit current flows from the −E / 3 potential to the routes DN2, Q6, and −E potential. Therefore, when the main electrode voltage Vce when the switching element Q6 is on exceeds the detection level, it can be determined that the clamp diode DN2 is short-circuited.

  As described above, as in the case of the three-level inverter, it is possible to detect the overcurrent abnormality of the clamp diode by monitoring the main electrode voltage Vce when the switching elements at both ends in the switching leg are on. . Further, by monitoring the main electrode voltage Vce when the switching elements adjacent to both ends are turned on, it is possible to identify the clamp diode having a short-circuit failure. In the case of an N-level inverter, a short-circuited clamp diode can be specified by monitoring the main-electrode voltage Vce when ON of (N-3) switching elements adjacent to both ends.

  FIG. 13 is an example of an internal configuration diagram of an arithmetic circuit 7C used in the power conversion apparatus according to Embodiment 4 of the present invention. About each part of this Example 4, the same part as each part of the internal block diagram of the arithmetic circuit used for the power converter device which concerns on Example 1 of FIG. 3 is shown with the same code | symbol, and the description is abbreviate | omitted. The fourth embodiment is different from the first embodiment in that the outputs of the voltage monitors 52 to 55 are configured to be the inputs of the AND circuits 71 to 74 and the OR circuits 81 to 84, and the voltage monitors 51 and 56. Is added to the input of the OR circuit 75C. Here, the voltage monitor 51 and 56 of the switching element at both ends of the switching leg uses the voltage monitor with delay shown in FIG. 5, and the voltage monitor 52 to 55 of the switching element in the middle part is shown in FIG. Use the voltage monitor with no delay shown.

  According to the above configuration, it is possible to detect an overcurrent abnormality of all main circuit elements with a relatively simple configuration, like the arithmetic circuit 7A in the three-level inverter shown in FIG. When this is expanded to an N-level inverter, the ON-state main-electrode voltage Vce of the switching elements at either end of the switching leg exceeds the detection level, or any two of the N intermediate switching elements. An overcurrent abnormality can be detected depending on whether the main electrode voltage Vce exceeds the detection level when two or more switching elements are on.

  Further, when the third embodiment in the three-level inverter is expanded to an N-level inverter, the voltage Vce between the main electrodes with delay of the switching elements at both ends in either of the switching legs exceeds the detection level, or in the switching leg. An overcurrent abnormality can be detected more quickly depending on whether or not any two or more of the switching elements in the ON state without delay when the main electrode voltage Vce exceeds the detection level.

  Normally, when an overcurrent abnormality is detected, the gate pulse is blocked, and in some cases, the circuit breaker of the main circuit of the power converter is turned off to stop the power converter. At this time, as described above, if an abnormal signal from the voltage monitor is stored, it is possible to specify to some extent which main circuit element has an overcurrent abnormality.

1 DC power supply 2p, 2n, 2c DC voltage dividing capacitor 3u, 3v, 3w switching leg 3u1, 3v1, 3w1 switching leg Q1, Q2, Q3, Q4, Q5, Q6 switching elements D1, D2, D3, D4, D5, D6 Flywheel diode DP, DN, DP1, DN1, DP2, DN2 Clamp diode 4 AC motor 51, 51A, 51B, 52, 53, 54, 55, 56 Voltage monitor 511 Reverse blocking diode 512 Comparator 513 Detection level setting device 514, 514A AND circuit 515 delay circuit 6 control circuit 7, 7A, 7B, 7C arithmetic circuit 71, 72, 73, 74 AND circuit 75, 75A, 75B, 75C OR circuit 81, 82, 83, 84 OR circuit

Claims (3)

A DC power source having a potential of N (N is an integer of 3 or more) level;
A series connection of (N−1) × 2 switching elements connected in parallel to the DC power supply and flywheel diodes connected in reverse parallel, and the series connection to (N−2) intermediate potentials of the DC power supply. A plurality of switching legs composed of (N−2) × 2 clamp diodes connected so as to fix an intermediate portion of the connection body;
Control means for supplying a gate pulse to the control pole of the switching element in order to obtain an N-level phase voltage from the midpoint of the series connection body;
Voltage monitoring means for outputting an abnormal signal when the voltage between the main electrodes of the switching element is a predetermined value or more when an ON pulse for turning on each switching element is given from the control means;
Calculating means for logically calculating the output of the voltage monitoring means for each switching leg to determine abnormality of the main circuit element in the switching leg;
The multi-level power converter according to claim 1, wherein when the two abnormal signals are necessarily input from the voltage monitoring unit, the arithmetic unit determines that an abnormality has occurred. The computing means is
2. The multilevel power conversion device according to claim 1, wherein an abnormality is determined when any two of the abnormality signals of switching elements in an intermediate portion of the switching leg are input. The multi-level power converter according to claim 1 or 2, wherein when the arithmetic means determines that an abnormality has occurred, an overcurrent protection operation is performed and the apparatus is stopped.

Images