JP5649576B2 - 3D ultrasonic imaging system - Google Patents

Description

Cross-reference of related applications

  This application is a continuation-in-part of US patent application Ser. No. 12 / 286,555, filed Sep. 30, 2008, and is named “Chang et al.” Under the name “3D ultrasound imaging system”. Claims the priority of US patent application Ser. No. 61 / 192,063, filed Sep. 15, 2008. This application also claims the priority of US patent application Ser. No. 11 / 474,098 filed Jun. 23, 2006 and international application PCT / US2007 / 014526 filed Jun. 22, 2007. The entire contents of the above application are incorporated herein by reference.

  The present invention generally relates to three-dimensional ultrasound imaging systems, and more particularly to a medical ultrasound imaging system that performs three-dimensional imaging using a two-dimensional array of transducer elements within a probe housing.

  Medical ultrasound imaging is becoming the industry standard for many medical imaging applications. Techniques have been developed to provide processes using two-dimensional (2-day) transducer arrays and 3-dimensional (3-day) images of internal organs. These systems require thousands of beamforming channels. The ability to operate such a system results in the use of an analog phase shift technique with a digital delay beamformer, which results in a compromise of image quality.

  There is a continuing need for further improvements in ultrasound imaging techniques that allow improved real-time three-dimensional imaging capabilities. In addition, this improved capability should support real-time continuous display for 4-dimensional (4-day) functions.

US patent application Ser. No. 12 / 286,555, filed Sep. 30, 2008 U.S. Patent Application No. 61 / 192,063, "Ultrasound 3D Imaging System.", Chiang et al. , Filed September 15, 2008 US Patent Application No. 11 / 474,098, filed June 23, 2006 International Application No. PCT / US2007 / 014526, filed June 22, 2007 US Pat. No. 6,292,433 International Application No. PCT / US2007 / 014526, US June 22, 2007, Designated as US US Patent Application No. 11 / 474,098, filed June 23, 2006 US Pat. No. 6,721,235 US Pat. No. 6,106,472 US Pat. No. 6,869,401

  The present invention relates to a medical ultrasound imaging system that provides three-dimensional (3-day) imaging using a 2-dimensional (2-day) array of transducer elements within a probe housing. Embodiments of the present invention provide systems and methods for medical imaging having high resolution and multiple image modalities.

  In a preferred embodiment, the probe housing has a first beamforming circuit that transmits the beamformed data to a second housing having a second beamforming circuit. The first beamforming circuit provides a far field subarray beamforming operation. The final beamformed data is transmitted from the scanning head to a second housing having the second beamforming circuit, which provides near-field beam steering and beam focusing.

  The preferred embodiment provides a scan head that can be connected to a conventional ultrasound system, where the scan head provides input to the conventional beamforming processing function. The scanning head beamformer can utilize a low power charge domain processor having at least 32 beamforming channels.

  The preferred embodiment of the present invention uses a sparse array in which only a small portion of the transducer elements need to be activated. High quality by selecting the four corner elements of the array to provide a suitable average lobe bandwidth, minimizing average sidelobe energy and clutter, eliminating periodicity and maximizing peak-to-sidelobe ratio An image is created. In order to steer the beam over the volume or region of interest, the various transducer elements must be driven in the proper order to maintain the peak-to-sidelobe ratio. The system processor may be programmed to provide the desired order for driving the transducers to direct the beam at various angles. Alternatively, a separate controller may be used to control the sparse array drive. The preferred embodiment provides a scan head with an integrated switch circuit to sequentially select sparse array drive elements for sequential multiple beamforming. The scanning head may be connected to a conventional ultrasound system, where the scanning head provides input to a conventional beamforming processing function. In another embodiment, the transmit array element and the receive array element are operated independently, the transmit element having a sparse array, and the receive element is an almost fully populated array. In the preferred embodiment, the multiplexer and beamformer circuit are integrated into the interface system, or alternatively into the host processing system, leaving a two-dimensional transducer array installed within the probe housing.

  The present invention utilizes nondestructive detection at each stage of the delay element in the beamformer. So, for example, with a 65 stage delay line, there are 64 usable outputs, one for each stage. Its time resolution is in the range of 1 / 8λ to 1 / 16λ.

  The use of a high voltage multiplexer in the probe and the non-destructive detection method enables time multiplexed sequential beamforming. Now it is possible to change the tap selection of each delay line sequentially to form multiple beams.

  In addition to the three-dimensional (three-day) display capability, a fourth-dimensional or time-resolved image display can be used to record and display a series of images recorded, for example, at 10 frames per second or more. This makes it possible to see rapidly changing features such as blood flow or flow rate; heart wall motion etc. at a video frame rate of 30 frames per second.

Another preferred embodiment of the present invention utilizes a three-stage beamformer system, where the first stage performs a first beamforming operation based on data received from the transducer array and provides first beamforming data. And the first beamforming data is taken over by a second stage of performing a second beamforming operation to provide second stage beamforming data, and the second stage beamforming data is then subjected to a third beamforming operation. To the third beam forming stage to be performed.

  The steps may be performed using a charge domain processor. The data may also be converted from analog to digital form before the first or second stage, at the third stage, or thereafter. One stage may utilize a parallel beamforming operation and the second stage may provide a serial beamforming action.

Figure 2 illustrates the use of a two-dimensional tiled array for ultrasound imaging of the present invention. 2 illustrates a steerable two-dimensional array of the present invention. Figure 2 illustrates the use of a first beamformer device for far-field beam steering and focusing and a second time-delayed beamformer for near-field beamforming. Fig. 4 illustrates a first analog subarray beamformer that sends data to a digital beamformer. 2 illustrates a scanning head for a two-dimensional transducer probe. 1 illustrates a preferred embodiment utilizing a flexible circuit board and cable assembly. 1 illustrates a preferred embodiment of a three-dimensional imaging system according to the invention of an integrated subarray scan head. FIG. 4 illustrates a preferred embodiment of an integrated subarray scanhead invention using a charge domain processor for second time delay beamforming. Fig. 4 illustrates the use of an integrated subarray scan head probe of the present invention with a second stage beamforming ultrasound processor. Fig. 4 illustrates the use of an integrated subarray scan head with a digital beamforming processor. 1 illustrates an ultrasound system of the present invention. 2 illustrates a sparse array used in the present invention. The sparse array operation is illustrated graphically. Fig. 4 illustrates the use of an integrated sparse array scan head probe of the present invention connected to a host system with charge domain beamforming. Fig. 4 illustrates the use of an integrated sparse array scan head probe of the present invention connected to a conventional digital ultrasound system having m parallel beamforming components. 1 illustrates a scan head connected to a portable computer of a preferred embodiment of the present invention. Illustrate a receive array that is substantially fully filled, in which the receive elements are independent of the transmit array and do not overlap the transmit array. The azimuth and elevation cross sections of the receive array beam pattern are illustrated graphically. FIG. 13 is an enlarged portion of the azimuth beam pattern of FIG. 12, showing a main lobe and side lobe structure. Fig. 4 illustrates a receive array beam pattern that is substantially fully filled. Fig. 4 shows a selected transmission position for a sparse array of the present invention. FIG. 16 illustrates a cross-sectional view of the transmit sparse array beam pattern of the embodiment of FIG. Illustrates a sparse transmit array beam pattern. It is illustrated that the average sidelobe energy can be limited to less than -35 dB relative to the central peak of the beam pattern. Illustrates a two-dimensional differential delay equation. Illustrates the delay difference profile. Illustrates the differential delay error. Fig. 4 illustrates an embodiment of a system processor in a four parallel beamforming system. Fig. 4 illustrates uncoded and coded transmit waveforms for spread spectrum ultrasound transmission. Illustrates the process of forming a transmission signal. 1 illustrates a preferred embodiment with a matched filter.

  The purpose of the beam forming system is to focus the signal received from the image point onto the transducer array. By inserting an appropriate delay in the beamformer at the wavefront propagating in a particular direction, signals arriving from the direction of interest are added coherently while signals from other directions are not added coherently. Or canceled. For real-time three-dimensional applications, a separate electronic circuit is required for each transducer element. Using conventional implementations, as the number of elements increases, the final electronic device becomes rapidly bulky and expensive. Traditionally, the cost, size, complexity and power requirements of high resolution beamformers have been avoided by “workaround”. For real-time three-dimensional high-resolution ultrasound imaging applications, an electronically steerable two-dimensional beamforming processor based on a “delay-and-sum” calculation algorithm was chosen.

The concept of an electronically tunable acoustic conformal lens is to divide the surface of the two-dimensional transducer array into relatively small sub-array planar “tiles”. The tile / subarray 120 is sufficiently small, as described in US Pat. No. 5,057,036, the entire contents of which are hereby incorporated by reference, and when the object is placed within the field of view of the imaging system, as shown in FIG. Incident radiation 122 from the object toward each “tile” may be treated using a far-field approximation. An additional delay element is incorporated as a second stage process so that all subarrays can be added coherently (ie, global near field beamforming is achieved by simply delaying and then adding the outputs from all subarrays) ). The delayed sum beamformer allows each subarray to “see” the signal radiating from a particular direction. By adjusting the delay associated with each element of the array, the viewing direction of the array is electronically steered toward the radiation source. Thus, instead of looking in one direction as seen at 124a, the direction of tile 120 can be steered in various directions 124b. The delay line requirements for each element in the subarray may be less than 100 steps. Only a long delay for global summing is required for the final near-field focusing.

  To scan the image plane using a steerable beamformer system, a process such as that shown in FIG. 2 may be used. A raster scan 260 is used to scan the image plane 262 using a two-dimensionally steerable transducer array 264.

A detailed view of the electronically controlled beamforming system of the present invention is shown in FIG. 3A. This system consists of banks 330 ₁ -330 _N of parallel time delay beamforming processors. Each processor 330 has two components: a two-dimensional sub-array beamformer 332 for far-field beam steering / focusing, and an additional time delay processor that enables hierarchical near-field beamforming of the output from each corresponding sub-array. 334. The sub-array 332 includes m programmable delay lines 340 with tap selectors 342, a multiplexer 344 and a summed output 346. As seen in FIG. 3A, for a system with n subarrays, n parallel programmable second-stage near-field time delays are required for individual delay adjustment, which is a total of n parallel delays. The output is converted by an A / D converter 352 so that the output can be coherently added 354, which in turn is filtered by 338 to provide a 3D image of the target object. Processor 336 controls subarray operations.

  The use of a scan head with a second stage digital beamformer is shown in FIG. 3B. In this embodiment, each of a plurality of N subarray beamformers 400, which may be the near-field beamformer of the preferred embodiment, receives signals from m transducer elements having separate delay lines. Since the delay line outputs are summed and provided to the beamformer 420, the beamformer may be a conventional system having a conventional processor 480. A separate subarray processor 460 controls the beamformer 400.

Without using this hierarchical, sub-array far-field, then near-field beamforming approach for a two-dimensional array of 80 × 80 elements, 6400 lines can be used to connect the transducer array to a conventional beamforming system. A cable made of wire is required. As shown in FIG. 3A, the number of inputs to each subarray processor is equal to the total number of delay elements in the subarray, and each subarray has only one output. The number of inputs to the subarray bank is equal to the number of two-dimensional array elements, and the number of outputs from the subarray bank is equal to the total number of transducer array elements divided by the number of subarray elements, that is, from the subarray bank based on the input number The number of outputs decreases by a multiple equal to the size of the subarray. For example, if you choose to use a 5 × 5 subarray to implement this hierarchical beamforming concept, after the first stage subarray beamforming, the total number of wires required to connect to the second stage nearfield beamformer is Decrease by a factor of 25. In particular, as noted above, without using this 2D subarray beamformer, 6400 wires would be required to connect an 80x80 2D transducer array to a conventional backend beamforming system. Cost. Using the 5 × 5 subarray processing bank for the first time reduces the number of wires required to connect to the back-end beamforming system to 256. In accordance with the present invention, a bank of 256 5 × 5 element sub-array beamformers can be integrated with an 80 × 80 element two-dimensional array in a scan head so that a cable consisting of 256 wires can be integrated into the integrated scan. Suitable for connecting the head with a back-end near-field beamforming system. Note that a 5 × 5 subarray far-field beamforming processor is easily integrated in one small silicon integrated circuit, and that eight such 5 × 5 subarray beamformers can be integrated on a single chip. That is important. In this embodiment, no more than 32 chips are integrated into the scan head, thereby reducing the cable size from 6400 wires to 256 wires.

  The beamformer processing system is a time domain processor that can simultaneously process the return of a large two-dimensional array, providing a low power, highly integrated beamforming system capable of real-time processing of the entire array in a portable system. A system with 192 parallel receive channels supports matrix 2D array probes for real-time 3D / 4D imaging applications, and the hierarchical multi-stage beamforming method is used in conjunction with a low power, compact ultrasound system. It may be broken.

  FIG. 3B shows a hierarchical beamforming architecture in which beamforming of groups of adjacent receiving elements is performed in two stages, ie one common delay instead of one long delay for each of the receiving elements. Long delays are shared by all elements in the group, but each has its own short, programmable delay before the long delay. Within each group, the outputs from each of the short delays are summed together and then applied to the common long delay. A small group of adjacent receiving elements having this common long delay characteristic is defined as a “sub-array” of transducers. For example, for applications that use a two-dimensional matrix array for real-time three-dimensional imaging, the sub-array may be a small array with 4 × 4 or 5 × 5 adjacent elements. The first stage programmable delay of each element in this subarray is integrated within the transducer probe, and then the summed output from each subarray is connected to the backend processor. Therefore, for a two-dimensional array of 64 × 48 elements (3072 or more transducer elements), if a 4 × 4 subarray is used for first stage beamforming, connect the tip probe to the backend processor. Requires only 192 input / output cable elements.

  In a preferred embodiment, the hierarchical beamforming may also be applied to a one-dimensional (one-day) array for real-time two-dimensional imaging applications. For example, for a 128-element one-dimensional array, groups of eight adjacent elements may be grouped together as a subarray. Within each subarray, each of the eight elements has its own short programmable delay, and then the outputs of the eight delays are summed together and then applied to a common long delay. It is important to mention that two different methods can be used for this two-stage implementation. In a first implementation, an entire beamforming circuit having both the short delay and the long delay is placed in a back-end processor, so that an input / output between the transducer probe and the back-end processor for a 128-element one-dimensional array. 128 connection cables are used as cables. An alternative implementation is to integrate all subarray processors into a transducer probe, ie, for a 128 element array, a total of 16 subarray processors, each with 8 programmable delays, are in the transducer probe. Because it is integrated, only 16 cable elements are required to connect the front-end integrated probe with the back-end processor. Only 16 long delayed beamforming circuits are required in the back end to complete the beamforming function. Similarly, for a 64 element array with 8 integrated 8 element subarray processors in the probe, the backend processor is simplified to only 8 beamforming circuits to connect the frontend integrated probe to the backend processor. Requires only 8 cable elements. Furthermore, since a low power transmission circuit and an A / D converter are integrated into the front end probe, wireless communication may be used to connect the front end probe and the back end processor. A wireless USB connection or a wireless Firewire connection may be used.

  The structure of a 64 × 48 element two-dimensional transducer probe 485 with an integrated 4 × 4 subarray processor is illustrated in FIG. 3C. The 64 × 48 element two-dimensional array 487 comprises a 48-row stacking of one-dimensional arrays each having 64 elements. Since the connection to each 64 element 1D transducer array element is made through a flexible cable, the transducer head assembly has a 2D transducer array and 48 flexible cables 486. As shown in FIG. 3C, each subarray has 4 × 4 elements (or other rectangular or two-dimensional shape, preferably having at least 16 to 256 elements per subarray), and the 48 flexible cables Are grouped into 12 groups, and each of the four adjacent flexible cables is connected to the printed circuit board, that is, the flexible cables corresponding to the one-dimensional transducer array in rows 1 to 4 are connected to the first printed circuit board 488. Connected, the row 5 to row 8 flexible cables are connected to the second printed circuit board 487, and so on until the row 45 to row 48 flexible cables are connected to the twelfth printed circuit board. One end of each flexible cable is connected to the transducer element, and the other end of the flexible cable is connected to a 64 element flexible connector installed on the printed circuit board. Within each printed circuit board are 16 4 × 4 element subarray processors 489 and a high voltage multiplexer chip 491. The subarray processor consists of 16 parallel programmable delay lines each with a low noise preamplifier at its input, and a separate programmable multiplier as an apodizer, and the outputs of the 16 multipliers are Add together to form one output. Within each substrate is also a high voltage multiplex chip to allow 4x64 element transducers to operate in either transmit or receive mode. A memory chip 490 is also installed on each printed circuit board to store the delay programmed for each of the delay lines. There is also a power supply cable and a digital input 492 connected to each printed circuit board through the interface 495.

  Except that one 64-element transducer array 491 is connected to a flexible cable 497, one end of the flexible cable is connected to each of the transducer elements, and the other end of the cable is connected to a 64-pin flexible connector, A 64-element one-dimensional array embodiment with an integrated first stage sub-array processor may also be implemented using the design of FIG. 3C. The connector is placed on a printed circuit board. There are eight 8-element subarray processors in the printed circuit. Each subarray processor consists of 8 programmable delay lines, each delay line has its isolated low noise preamplifier, and the output of the delay line is an apodizer, i.e. for the beam shaping function There is a multiplier. The outputs of the eight multipliers are added together to form one analog output. A high voltage multiplexer circuit chip is also included on the printed circuit board to allow the 64-element transducer to operate in either transmit or receive mode. A memory chip is also placed on the printed circuit board to store the programmed delay for each of the delay lines. There is also a power supply cable and a digital input connected to each printed circuit board.

A preferred embodiment of a 64 element (or more, eg 128 or 256 element) one-dimensional array 496 with an integrated subarray processor is shown in FIG. 3D. In this embodiment, instead of using a printed circuit board, the sub-array processing chip 499a, the high voltage multiplexer circuit chip 499b, and the memory chip 499c are directly installed on a flexible printed circuit or cable (497, 498). The system described herein is used with a catheter or probe for insertion into a body cavity for cardiac imaging (4D) or other body organ. The probe or catheter assembly includes a circuit housing having the first plurality of beamformers described herein.

  A preferred embodiment of the present invention for two-dimensional array beamforming, each having improved signal-to-noise ratio performance and minimizing noise and cable loss, is illustrated in FIGS. In all three embodiments, a bank of m parallel subarray beamforming processors 520 and multiplexers 528 are integrated with the two-dimensional transducer array 525 to create a compact, low noise scan head 500. FIG. 4 illustrates a system in which a compact scan head is connected to a dedicated processing module, which includes m parallel preamplifiers / tages (TGCs) 522, a transmit / receive chip 524 and a second stage. A time delay processing unit 526 is accommodated. This dedicated processing module communicates with the host computer 540 via FireWire IEEE 1394 or USB or PC bus 542. Control and synchronization is performed by a system controller 544 located within the processing module or housing 546. FIG. 5 depicts the same architecture as described in FIG. 4 with the exception that within the dedicated processing module, a second stage time delay processing unit is connected to a handheld probe 660 and a computer housing 648. It is specially implemented by using a charge domain programmable {CDP} time delay line 600 within. FIG. 6B illustrates a system in which a compact sparse array scan head 700 is connected to a conventional, commercially available time domain digital ultrasound imaging system 780 having n parallel beamforming channels 760. In FIG. 6A, it can be readily seen that the time delay processor 720 may also be implemented by using a CDP time delay line 740. In these embodiments, the near-field beamformer is housed 720, 780 in the same housing as other image processing functions. These systems are described in U.S. Patent Nos. 6,028,028, both of which are incorporated herein by reference in their entirety.

By systematically changing the beamformer delay and shading along the viewing angle of the 2D transducer array, the return echo along the line of sight representing the 3D radiation source is used to create a scanned image at the scan angle. obtain. The system is capable of providing continuous real-time large area scanned images in a wide field of view at 20 frames or more per second. At this frame rate, the system is used to display a continuous 3D image versus time, thus providing 4D information of the scanned object. As shown in FIG. 7, a CDP beamforming chip 810, a time multiplexed computing structure, is used to generate multiple beams, ie, for each transmit pulse, a two-dimensional subarray beamformer 818 and its A bank with a corresponding second stage near-field time delay line can provide multiple beams sequentially. The calculation circuit sequentially generates the delay necessary to form k beams. The device operates as follows. Once the set of sampled return echoes is loaded into the delay line with sampling circuit 814 at time t ₁ , the delay required to form beam 1 is calculated 812 within each module 822, the total delay line Are applied in parallel. The sampled return echoes with appropriate delays are coherently added 802 and filtered 804 to form a first beam. The time t _2, the delay required to form the beam 2 are computed within each module and applied in parallel to all delay lines. The sampled return echoes with appropriate delays are added coherently to form a second beam. The procedure is repeated until the Kth beam is formed coherently.

For example, if a computing circuit with 16 serial addressable outputs is incorporated with a CDP subarray and a second stage time delay line, for each transmit pulse, 16 beams or scans each along a different scan angle. A line is created. For 256 pulses with a 15 cm down-range depth, the system can generate 4096 beams with a 64 × 64 pixel resolution at a frame rate of 20 frames per second. The system is fully programmable and the beam forming electronics can be adjusted to zoom in to a smaller field of view for high resolution or higher frame rate images. For example, using 192 transmit pulses with the same 15 cm down-range depth, the system generates 3072 beams at 64 × 48 pixel resolution at a frame rate of 30 frames per second.

  The described array addresses ultrasound imaging applications using a two-dimensional 2 cm × 2 cm array at a frequency of 3 MHz. The requirement for resolutions on the order of less than half a wavelength specifies as large an aperture as possible that can be accommodated in a compact package. In order to examine the 90 degree scan volume and minimize the effect of grating lobes, an element pitch or spacing of less than 0.25 mm is desirable, leading to an 80 × 80 element array. Using the subarray processing technique described above, a scanning head with integrated subarray beamforming circuitry followed by a second stage near-field beam steering / beam focusing system provides a practical embodiment. However, the embodiment still requires at least 32 subarray chips to be integrated on the scan head. To achieve this resolution with a much smaller amount of processing components in the scan head, an alternative pseudo-random array design approach can be used.

  In order to put a sparse array into practical use, a combination of low insertion loss and wide bandwidth performance is important to achieve acceptable image forming performance at low illumination levels. The quarter wave front matching layer has a low acoustic impedance, and the physically solid backing provides a robust array that loses only 3-4 decibels in converting received signal energy to electrical energy. Array bandwidths greater than 75% are typical for this design and fabrication process. The transducer array also uses a suitable element positioning and interconnection system for the beamformer circuit. The electronic device is installed on a printed circuit board attached to the transducer element via a flexible cable. In practice, most array elements are connected to the output using a flexible cable. However, only a small part of the total number of elements is wired on the circuit board. Nevertheless, multiple array element connections are sufficient to ensure a unique pattern of active element locations in the final array.

  As an example of a sparse array, assuming a 2 × 2 cm array with 256 active elements, the final fill factor is 4%. Since the S / N ratio of the output of the array is proportional to the number of active elements, this fill factor corresponds to a sensitivity loss of -13 dB when compared to a packed array of the same size. To compensate for this loss, a wider bandwidth transmitted signal is chosen to increase array sensitivity. With the approach presented here, the sensitivity is increased on the order of about 10 dB. Further details regarding sparse array devices can be found in US Pat.

  The positioning of the elements of the array takes an approach where care must be taken to remove any periodicity that results in a grating lobe against the main lobe. A pseudo-random or random array may be used (FIG. 8A). Active element configuration shapes are developed that maximize beamformer efficiency while minimizing grating and sidelobe clutter. Switching between a plurality of different array patterns is performed to provide the most efficient beam pattern at various beam angles for the region or volume of interest being scanned. Thus, the first pattern uses the pattern illustrated in FIG. 8A, which is then switched to the second pattern for a different scan angle. This may include selecting a transducer element in the neighborhood 880 surrounding the given array for scanning at the second angle.

The primary goal of the optimization method is to minimize the average sidelobe energy. In particular, this is done by interactively evaluating optimal criteria:

Here, the weighting function, W (u _x , u _y ), gives more weight to the region in the array response for which the sidelobe reduction is to be obtained. The optimization method begins with no weighting {ie, W (u _x , u _y ) = 1} and proceeds by successively selecting better weighting functions that satisfy the optimization criteria. Maximum sidelobe seeking reduced beam pattern _{precomputed, B (u x, u y} ), the so is related, the weighting _{W (u x, u y)} = B (u x, u y) Chosen to be This is done interactively until convergence.

Basically, random arrays have an imaging point spread function with N main lobe-to-average sidelobe ratio, where N is the total number of active elements in the array.
spread function). For the 256 element sparse array example, the final ratio is -13 decibels. The use of a wide bandwidth approach improves this ratio by 10 dB. Based on the optimization criteria, a pseudo-random arrangement of array elements was generated (FIG. 8A).

  FIG. 8B is a plot of array performance, sensitivity vs. cross range for a sparsely sampled array of 256 elements at 3 MHz. The peak to maximum side lobe level is about 30 dB. In order to improve this performance, the system was configured to achieve the maximum possible main lobe to clutter level ratio, which was independently verified.

  FIG. 9B depicts a system in which a sparse array scan head 900 is connected to a conventional commercially available time domain digital ultrasound imaging system 940 having m parallel beamforming channels. In FIG. 9A, it is easy to see that the time delay processor is also implemented by using a CDP time delay line 920 in a housing 925 connected to another computer 927. An array of m multiplexers 906 is used to switch between sequences of scan patterns performed using a software program and system controller 940 or processor 950. The sequence of sparse array patterns is thus selected to scan the object being imaged at various scan angles to provide their three-dimensional ultrasound imaging.

  Commercially available window-based 3D visualization software is used to visualize, manipulate and analyze 3D multi-beam volume image data generated by an electronically adjustable acoustic conformal lens system. Conventionally, a clinician having a diagnostic two-dimensional ultrasound image section views a two-dimensional scanned image for each slice and reproduces the information in a three-dimensional representation in the head in order to determine a patient's tissue. This procedure requires the clinician to have a highly sophisticated understanding of human tissues as well as sufficient evidence of evidence. In order to create a three-dimensional structure from a “finished” image, the clinician must consider all available slices. Viewing hundreds of slices takes too much time, even for a single patient. Three-dimensional visualization based on three-dimensional volume data helps overcome this problem by providing clinicians with a three-dimensional representation of patient tissue reconstructed from multiple scanned beamforming data sets.

KB-V 3 Day (KB-V) of KB-VIS technologies, Chennai, India, Chennai, India
Commercially available software tools such as (ol3D) are: • Fast Volume-Rendering
・ Shaded Surface Display
The display or viewing of a three-dimensional feature is provided.

  The shaded surface module allows easy visualization of surfaces in the volume. Surfaces are created with intensity-based thresholding. Instead, the Seeding option allows the selection of the specific binding structure of interest.

・ MIP (maximum value projection method) using Radials
・ MPR using diagonal and double diagonal and three-dimensional correlation (multi-section conversion display method)
・ Mr Peace Love and Multi-Cut (MRP Slabs & Multi-Cuts)
・ Curved MPPR (Surface conversion display method)
-Color and opacity presets using editor-Area expansion and stereo measurement-Cutaway viewing and interactive real-time buoy eye (VOI) using slab solids

  The interior of the volume is easily visualized using the “Cut Away Viewing” tool. The cut plane (Cut-Plane) is sliced through the solid and is used to indicate the internal area. The cutting plane is easily positioned and oriented using a mouse.

  The buoy eye (interest volume) tool allows interactive display of the volume of interest in real time. The user can perform a simple click-and-drag mouse operation to view the partial volume of interest very easily and in real time.

  ・ Image saving in multiple formats

  Images displayed by CB-Vol3D (KB-Vol3D) can be captured in various image formats {including DICOM, JPEG (JPEG) and BM (BMP), etc.}.

  ・ Capture movies in ABI format

Visualization operations are also captured in AVI movie.le, Windows Media Player, Quick-Time, and Real Player (Real).
Player) et al.

  The present invention may be implemented using a scan head 12 connected to a portable computer 14 as shown in FIG. The ultrasound system 10 also has a cable 16 that connects the probe 12 to the processor housing 14. Some embodiments may use an interface unit 13 having a beamformer device. As described in detail in U.S. Pat. Nos. 5,098,097, the entire contents of these patents are incorporated herein by reference, the scan head 12 contains a transducer array 15A (2 days) and a multiplexer and / or beamforming component. And a possible circuit housing 15B.

  A two-dimensional array configuration using a sparse array for transmission and a non-overlapping fully assembled array is used for reception. For an N × M element array, only m elements with an optimal sparse array arrangement are used for transmission, and then the remaining NM-m elements are used as a receive array. For example, for a two-dimensional array of 40 × 60 elements, 256 elements are used as transmitting elements, the arrangement of the transmitting elements is optimized based on selection criteria, and the remaining 2144 elements are used as receiving elements. This embodiment simplifies the required multiplexer requirements for a two-dimensional array, in which case the multiplexer may be installed in the interface housing.

  An example of an element arrangement for a 40 to 60 receive array 50 that is almost fully implemented is shown in FIG. The 2400 element array is evicted by 256 sparse array transmit elements, yielding 2144 receive element arrangements. These receiving elements are independent and do not overlap with the sparse array transmitting element. In a preferred embodiment, the transmitter elements are configured to be less than 25% of the total number of array elements, and preferably less than 15%.

  A cross section of the azimuth and elevation angle of the beam pattern of the receiving array described above is shown in FIG. The first sidelobe is about -13 dB relative to the central peak. The grating lobe is less than −30 dB relative to the peak. If the width is wider than the height of the two-dimensional array, the azimuth beam width {plotted in blue (solid line)} is slightly narrower than the elevation beam width {plotted in green (dotted line)}.

  In FIG. 13, the enlarged view of the azimuth beam pattern described above shows a detailed main lobe and side lobe structure. In this case, the beam width is about 1.5 degrees. The beam pattern is substantially the same as a fully mounted 60 × 40 element beam pattern. The receive array beam pattern is shown in FIG. As mentioned above, the receive sparse array consists of 2144 elements. There is no sidelobe due to the eviction of the center of the array by 256 (transmit) elements.

  An example of the final element arrangement for the 256 transmit sparse arrays 60 is shown in FIG. The arrangement of 256 elements is limited to the central 32 × 32 elements of the fully assembled array. These elements are independent and do not overlap with the receiving array elements. A cross-sectional view of the transmit sparse array beam pattern is shown in FIG. The first sidelobe is about -17 dB relative to the central peak. The grating lobe is less than -27 dB relative to the peak. The sparse array optimization algorithm minimizes sidelobe energy with an orientation of +/− 45 degrees and an elevation angle of +/− 45 degrees.

  FIG. 17 shows a beam pattern of the sparse transmission array shown in FIG. The transmit beam pattern is designed to uniformly cover the 4 × 4 beam data pyramid. The transmit sparse array consists of a 256 element subset of a fully assembled 2400 element array (filling approximately 10%). In order to minimize the transmit and receive sidelobe energy in the +/− 45 degree azimuth region and the +/− 45 degree elevation region, the placement by the transmit / receive array design algorithm required over 750 iterations. As shown in FIG. 18, after 750 iterations, the final sparse transmit array element arrangement limits the average sidelobe energy to less than -35 dB relative to the central peak of the beam pattern.

A low-power ultrasound system that can electronically scan a two-dimensional matrix array to generate more than 20 three-dimensional images in real time using a 64x64 4096 scanning beam for more than 20 three-dimensional images Is done. For each transmit pulse, the system can generate 16 received beams. In addition, the design can support a wide bandwidth encoded transmit waveform for pulse compression to drive a 1.5 dimensional array and improve system sensitivity. The wide bandwidth allows the use of chirped or coded waveforms (PN sequences) that can extend the length of low power transmission bursts without loss of distance resolution. The combination of these features results in an imaging array with an electronic system that fits within a portable handheld device.

  The beamformer processing system is a time domain processor that simultaneously processes the response of a large two-dimensional array, providing real-time processing of the entire array, thus providing a low-cost, highly integrated beam that can be held by hand. It is a former.

  There is a strong demand for real-time three-dimensional ultrasound imaging using a two-dimensional matrix array. In this section, we analyze the minimum number of receive beamforming channels required in an ultrasound system to support real-time 3D imaging. It is shown that a minimum of 192 parallel receive beamforming channels are required to support reasonable dimensions such as a 48 × 64 element array.

  An example of a system having an acoustically conformable lens that is electronically adjustable to divide the plane of a two-dimensional transducer array into relatively small sub-array planar “tiles” is described in US Pat. Although formed, the beamforming of the entire array is divided into two stages, the first being a sub-array beamforming of small apertures, followed by a large aperture coherent addition of outputs from each of the sub-arrays of the second stage . As depicted, the tile / subarray is sufficiently large so that when the object is placed in the field of view of the imaging system, incident radiation from the object to each “tile” is handled using a far field approximation. Can be made smaller. However, near-field beamforming capabilities have been incorporated into the actual embodiment of the subarray beamforming system to allow for wider applications. An additional delay element was incorporated as a second stage process to allow all subarrays to be added coherently. The delay-and-sum beamformer allows each subarray to “look” for a signal that radiates from a particular direction. By adjusting the delay associated with each element of the array, the viewing direction of the array can be electronically steered toward the radiation source. The delay line requirements for each element in the subarray may be less than a hundred steps. Only a long delay for global addition is required for final near-field focusing. A detailed diagram of the electronically controlled beam forming system of the present invention is shown in FIG. This system consists of a bank of parallel time-delay beamforming processors. Each processor has two components: a two-dimensional subarray beamformer for small aperture beam steering / focusing, and an additional time delay processor that enables hierarchical near-field beamforming of the output from each corresponding subarray; Consists of. As seen in FIG. 14A referenced above for a system with m subarrays, m parallel programmable second stage near-field time delays allow all m parallel outputs to be coherently added. This summed output provides a three-dimensional image of the target object, while necessary for individual delay adjustment to enable

  For an 80x80 two-dimensional array, if this hierarchical subarray small aperture then large aperture beamforming approach is not used, a 6400 wire cable connects the transducer array to a conventional beamforming system. It is easy to understand what is necessary to do. As shown in FIG. 14A of Patent Document 5 referred to above, the number of inputs to each subarray processor is equal to the total number of delay elements in the subarray, and each subarray has only one output. That is, the number of inputs to a subarray is equal to the number of transducer elements associated with that subarray. The number of subarray outputs is equal to the total number of transducer array elements divided by the number of subarrays. For example, if you choose to use a 5 × 5 subarray to implement this hierarchical beamforming system, the wires required to connect to the second stage near-field beamformer after the first stage subarray beamforming The total number of is reduced to 1/25. In particular, as described above, if this two-dimensional subarray beamforming is not used, 6400 wires are required to connect an 80 × 80 two-dimensional transducer array to a conventional back-end beamformer. Initially using a 5 × 5 subarray processing bank, the number of wires required to connect to the backend beamforming system is reduced to 256. In accordance with this example of the present invention, when a bank of 256 5 × 5 element subarray beamformers is integrated with an 80 × 80 element two-dimensional array of scan heads, a cable consisting of 256 wires is integrated. Connect the scanning head and back-end near-field beamforming system appropriately.

  Note that a 5x5 subarray small aperture beamforming processor is easily integrated into a small size silicon integrated circuit, and that eight such 5x5 subarray beamformers can be integrated on a single integrated circuit. It is important to do. Note that subarrays generally have between 9 and 64 transducer elements corresponding to 3x3 to 8x8 subarrays. Preferred ranges are or between 4x4 and 6x6 arrays for square array shapes. Rectangular subarrays are also preferably used in 3x4, 4x5, or 4x6. Note that the quarter λ error minimum criterion is used. With only 32 integrated circuit devices needing to be incorporated into the scan head, the cable size can be reduced from 6400 wires to 256 wires. Similarly, for a two-dimensional array of 64 × 48 elements, using the 4 × 4 subarray processing bank in the transducer housing first, the number of back-end beamforming channels is reduced to 192.

  In the present invention, a preferred embodiment for two-dimensional array beamforming, each minimizing noise and cable loss with improved signal-to-noise ratio performance, is illustrated in FIGS. 4-6B. In these embodiments, a bank of m parallel subarray beamforming processors is integrated with a two-dimensional transducer array to create a compact, low noise scanning head. In FIG. 4, a compact scan head is connected to a dedicated processing module and accommodates m parallel preamplifiers / tagged circuits (TGCs), transmit / receive chips and a second stage time delay processing unit. This dedicated processing module communicates with the host computer 540 via FireWire, UsB or PCIbus. Control and synchronization is performed by a system controller located within the processing module. FIG. 5 depicts the same architecture as described in FIG. 4, except that the exception is implemented within the dedicated processing module and that the second stage time delay processing unit is specifically implemented using a charge domain programmable time delay line. It is. 6A and 6B illustrate a system in which the compact scan head is connected to a conventional, commercially available time domain digital ultrasound imaging system having m parallel beamforming channels. 6A and 6B, it can be readily seen that the time delay processor can also be implemented using a CDP time delay line.

  In the preferred embodiment of the system, a large aperture beamforming system is incorporated into the main processor housing of the ultrasound imaging system, as shown in conjunction with FIGS. 19-24B.

  Since the speed of sound in the tissue is about 1500 cm / sec, the round-trip propagation time of a sound wave that penetrates a depth of 15 cm is about 20 microseconds. Providing diagnostic quality images requires at least 64 × 64 scanning beams for 3D stereoscopic images with more than 20 frame rates per second for real-time 3D image formation. For each transmit beam, the real-time 3D imaging system must be able to form at least 16 beams for each transmit pulse to meet the preferred 3D frame rate requirements. This section deals with both serial time multiplexed transmit beamforming and parallel simultaneous time domain beamforming implementations.

To achieve the 16 beam scanning requirement, a combination of serial and parallel architectures may be used, i.e., the system is a front-end time-multiplexed serial beamforming element to form two beams. Using technology, followed by 8 parallel beamforming methods on the back-end processor, or the system forms 4 serial beams for each serial output beam, and then the back-end processor Such as forming a beam.

By systematically changing the beamformer delay and shading along the viewing angle of the two-dimensional transducer array, the return echo along the line of sight representing the three-dimensional radiation source is used to create a scanned image at that scanning angle. It may be broken. The system can provide continuous real-time large area scanned images within a wide field of view at 20 frames per second or more. As shown in FIG. 7, in the CDP beamforming chip, a time-multiplexed calculation structure is used to generate multiple beams, ie, for each transmitted pulse, a two-dimensional subarray and its corresponding second Banks with staged near-field time delay lines can provide multiple beams sequentially. The calculation circuit sequentially generates the delay required to form K beams. The device operates using the following sequence: Once a set of sampled return echoes is loaded into the delay line, the delay required to form beam 1 at time t ₁ is within each module. And applied to all delay lines in parallel. The sampled return echoes with appropriate delay are added coherently to form the first beam. The delay required to form beam ₂ at time t2 is calculated within each module and applied in parallel to all delay lines. The sampled return echoes with appropriate delay are added coherently to form a second beam. The procedure is repeated until the Kth beam is formed coherently.

  For example, if a computing circuit with 16 serial addressable outputs is combined with a processor subarray and a second stage time delay line, 16 beams or scan lines, each along a different scan angle, for each transmit pulse Can be created. For 256 pulses with a down range of 15 cm depth, the system can generate 4096 beams with a 64 × 64 pixel resolution at a frame rate of 20 frames per second. The system is fully programmable and the beam forming electronics can be adjusted to zoom in to a smaller field of view for high resolution or higher frame rate images. For example, using 192 transmit pulses with the same down-range depth of 15 cm, the system can generate 3072 beams with a 64 × 48 pixel resolution at a frame rate of 30 frames per second.

  The purpose of the beamforming system is to focus the signal received from the pixel points onto the transducer array. By inserting an appropriate delay in the beamformer to match the wavefronts propagating in a particular direction, signals arriving from the direction of interest are added coherently while signals from other directions are coherently added. Not added or canceled. The time-of-flight from the source to the focus is calculated and stored in memory for all channels from multiple directions of arrival in parallel. Conventional embodiments require a separate electronic circuit for each beam, and for a multiple beam system, the final electronic equipment becomes rapidly bulky and expensive as the number of beams increases. For example, a beamformer for a linear 192 element array requires 192 parallel delay lines each having a programmable delay length greater than 128λ. In order to form four parallel beams, for example, a total of 768 programmable long delay lines are required. In order to simplify the electronics required for multiple beams, a hierarchical two-stage beamforming system is described.

The concept of hierarchical beamforming is to divide the time-of-flight calculation into two parts, the first part is a coarse resolution, a short delay for the beam formation of a small aperture, with a fine resolution and a large aperture A long delay for beam formation follows. FIG. 19 shows a three-dimensional differential delay equation for a two-dimensional array. This equation shows the delay difference of the array elements (x _m , y _m ) as a function of distance (relative to the center of the two-dimensional array) and angle, theta and phi. The equation can be changed to a one-dimensional array by setting all y _m (y coordinates of element positions) to zero. The delay difference can be limited to a single plane (instead of a solid) by setting the angle phi = 0.

  In order to illustrate the operation of a two-stage delay, a delay difference profile must be generated for all elements in the one-dimensional or two-dimensional array. To do this, the differential delay equation was calculated and all delay differences were tabulated as a function of angle theta and phi at a given distance. For example, as shown in FIG. 20, the delay difference profile was plotted for elements near the center of the two-dimensional array.

  In a two stage delay system, the tabulated data from the process is divided into a coarse delay and a fine delay. To determine how to separate the coarse and fine delays, the maximum delay difference error is limited (typically set to have a maximum delay difference error of 1 sample or less). The tabulated delay (from the process) is also used to determine when the receiving element is enabled. For example, FIG. 21 depicts the delay difference error as a function of distance for a small number of elements. The worst case delay difference (data plotted in blue) is the corner of a two-dimensional array (theta = + 45 degrees, phi == theta = −45 degrees, phi = −45 degrees) attempting to receive image data. +45 degrees). For this case, the maximum delay difference is greater than the limit (> 1 sample error), so the element is not enabled to receive to a range greater than about 100 samples.

  A block diagram of a hierarchical two-stage parallel beamforming system 958 is shown in FIG. 22A. A two-dimensional transducer array 960 of handheld probes, such as 12 in FIG. 10, weighing less than about 15 pounds is connected to amplifier 962 before being connected to the input of beam forming system 964. The beam forming system has a plurality of short delay lines, and the outputs of the delay lines are added coherently by an adder circuit 968, but the summed output of the adder circuit is fed to a long delay line 970 and the long line is added. The output of the delay line is also added by the adder circuit 972. The first stage coarse beamforming comprises, for example, the process of coherently adding the return echoes from the small apertures in the eight adjacent receivers of this particular embodiment. Due to the small size of the aperture, the delay length of each short delay is only about 8λ. Thus, for a 192 element input, 24 such small apertures, a coarse beam is formed. Each of the 24 beams is then applied to its corresponding programmable long delay line for large aperture, fine resolution beamforming. Four such beamforming structures are required to form four parallel beams. As seen in FIG. 22A, this hierarchical embodiment requires only 192 short delays to form 24 coarse beams, and then each one has a programmable delay length that is less than 128λ. Followed by 24 long delay lines. For four parallel beams, only 192 short delays plus 96 long delays are required, which provides great savings in terms of electronics and power.

  In addition, within each short aperture, within the short delay line, a time-of-flight control circuit is used to select the tap position output from the charge domain processing circuit, which non-destructively outputs the tapped delay line output. To detect. Each receiver has a beam shading / apodization multiplier. Within each processor, all multipliers share a common output. The summed charge is applied to a matched filter to decode and compress the return echo to produce an imaging pulse having a reduced signal-to-noise ratio. An A-D converter or an on-chip charge domain A-D converter may be used so that the hierarchical addition is performed digitally.

In the preferred embodiment, it is important to use a high speed digital communication connection between the beamformer output and the backend processor. As described above, the analog return echo received by each transducer element is converted into a digital signal by an A / D converter (A / D) during signal processing. As shown by beamformer 974 in FIG. 22B, an AD converter 976 is used at the input of each short delay line, and the time delay is done digitally. Alternatively, as shown in the embodiment 980 of FIG. 22C, the AD converter 982 may be used at the output of each coarse beam, and the long delay may be performed digitally. The A-D conversion may be performed using available discrete components or, in a preferred embodiment, a charge domain A-D converter is used for the charge domain beamforming with hierarchical addition performed digitally. It may be formed on the same integrated circuit as the device.

  The use of coded or spread spectrum signals has gained great patronage in the communications community. The usage is now routinely used in satellite, cellular, and wired digital communication systems. An example of 5 cycles of a 3 MHz sinusoid without spread spectrum coding is shown in FIG. 23A. Coded or spread spectrum systems transmit broadband, temporarily extended excitation signals with finite time-bandwidth products. The received signal is decoded to produce an imaging pulse having an improved signal to noise ratio. An advantage of using coded signals in an ultrasound imaging system is that it provides high resolution imaging usage while significantly reducing peak acoustic power. These signals also provide signal processing gain that improves the overall receiver sensitivity. Direct sequence modulation is the modulation of a carrier by a code sequence. In practice, this signal can be AM (pulse), FM, amplitude, phase or angle modulation. The signal may also be a pseudo-random or PN sequence that includes a sequence of binary values that repeats after a specified time.

  The concept of using a spread spectrum / coded excitation transmit waveform with ultrasound has the process of modulating a basic sequence of transmit pulses of length P with a code sequence having a code length N. An N burst code pulse sequence is often called an N chirp code. An example of a gated 3 MHz sinusoid with 5 Chirp Barker coding [111-11] is shown in FIG. 23B. Each “chirp” corresponds to one cycle of the gated transmit waveform. Thus, FIG. 23B looks almost identical to that of FIG. 23A, except that the fourth cycle is inverted. In both FIGS. 23A and 23B, the continuous line represents a continuously sampled sinusoidal waveform, but the cross-hatched point is the sampled signal, where 10 samples are taken per cycle. A coded pulse sequence having a length N × P can effectively reduce the peak power in the transmission media by spreading the output spectrum for a longer duration. Upon receiving the spread spectrum / coded return echo, a pulse compression matched filter may be used to decode the received signal to produce an imaging pulse having an improved signal-to-noise ratio (SNR). The SN ratio improvement of the N × P coded pulse sequence is 10 log (NP). Thus, for a length 7 Barker code and a 2-cycle burst transmit waveform, an SNR improvement of 11.4 dB is achieved. However, in this system, the transmit and receive waveforms are oversampled with an S oversample ratio. Typically, an oversample ratio of S = 4 was used. Therefore, a matched filter with a tap length of N × P × S is used at the receiving end to decode and compress the return echo to produce an imaging pulse with an SN ratio improvement of 10 log (NPS) May be. In the above example, a signal-to-noise ratio of 17.5 dB is achieved with N = 7, P = 2, and S = 4.

  A preferred method of forming the transmit signal is shown in FIGS. 24A-24C. The basic sequence is a single pulse as seen in FIG. 24A. The convolution of the basic sequence using the Barker code using the 5 chirp Barker code [111-11] is represented in FIG. 24B. Finally, the system transmits an oversampled version of the continuous waveform as shown in FIG. 24C, and the waveform oversampled 6 times is used as the transmit waveform.

A 192 channel receive beamforming system capable of forming four parallel, compressed beams for each transmitted, spread, coded and excited waveform is shown in beamformer system 985 of FIG. 25A. In this embodiment, a two-stage hierarchical beamforming architecture is used, initially a small aperture short delay beamformer 986 outputs a signal that is coherent of the return echoes from eight adjacent transducers. The pulse compression matched filter 987 then follows to decode the received signal, and this compressed signal 988 is applied to the long delay line to complete the beamforming request. In the system 990 of FIG. 25B, an AD converter 992 is incorporated at each of the matched filter outputs. The process is then followed in which the long delay is performed digitally using the second stage digital delay line embodiment.

An example of a matched filter is shown in FIG. 25C. The filter 994 includes a K-stage tapped delay line that receives a signal from the sampling circuit 995 and K programmable multipliers. A spread, coarsely beamformed signal, f _n, is continuously applied to the input of the delay line. At each stage of the delay, the signal is detected nondestructively and multiplied by W _k , which is a tap weight 996, where k = 1, 2, 3,. . , K-2, K-1, K. The weighted signals are added together in an adder circuit 997 to create a compressed output g _n 998. At time t = n, g _n = f _n−1 W ₁ + f _n−2 W ₂ + f _n−3 W ₃ +. . . + F _n-K-2 W _K-2 + f _n-K-1 W _K-1 + f _n-K W _K

  Using the example shown in FIGS. 24A-24C, if the system transmits 5 chirped Barker codes oversampled 6 times and the matched filter weights the transmitted 5 chirped Barker code excitation waveforms The matched filter is a cross-correlation that is a compressed, decoded and pulsed signal (see FIG. 25D) with a filter gain of 10 log (5 × 6) = 15 decibels. Output 999 is created.

  The claims should not be read as limited to the described order or elements unless stated to that effect. All embodiments that fall within the scope and spirit of the following claims and their equivalents are claimed as the invention.

Claims (24)

A two-dimensional transducer array and the and the first plurality of sub-arrays beamformer within the probe housing in the probe housing, stores beamformer control data for controlling the first stage beamforming operation in the probe housing The first plurality of subarray beamformers connected to a memory device in the probe housing;
A second plurality of beamformers in the second housing , wherein the second plurality of beamformers communicates with the probe housing, and the second plurality of beamformers is in a second stage beamforming operation. the image data received from the first plurality of sub-arrays beamformer for performing the second stage beam forming operation is performed and beamformed more beamformer second to produce image data The second plurality of beamformers, wherein the plurality of first sub-array beamformers perform a first stage beamforming operation in parallel operation such that the first subarray beamformer receives image data from the first stage beamforming operation; and
A medical ultrasound imaging system comprising: a data processing system for processing the beamformed image data to provide three-dimensional ultrasound image data .   The system of claim 1, further comprising a plurality of multiplexer circuits within the probe housing, the system generating at least 20 three-dimensional images per second.   The system of claim 1, wherein the array of transducer elements operates as a sparse array.   The system of claim 1, wherein the beamformer device comprises coarse and fine delay elements.   The system of claim 1, wherein the second beamformer comprises a second stage beamformer connected to a subarray processor that provides time domain processing of 3D ultrasound images.   The system of claim 5, further comprising a third stage beamformer.   The system of claim 1, wherein the system comprises a coded transmit signal system and a receiver system for decoding.   8. The system of claim 7, wherein the system comprises a transducer array in a probe housing connected to a processor housing, the transducer array comprising a plurality of at least 4 rows of transducer elements, each row having at least 64 transducer elements. The described system.   The system of claim 1, further comprising a sparse array system.   9. The system of claim 8, wherein each row of transducer elements is connected to a circuit board having a plurality of subarray beamformers.   The system of claim 1 further comprising a matched filter. The system of claim 1, further comprising a computer program usable in a data processing system that provides an oversampled transmit waveform.   The system of claim 1, wherein the probe housing further comprises a plurality of flexible cables, each cable connecting a transducer subarray to a circuit board having a corresponding beamformer subarray. The system of claim 1, wherein the probe housing surrounds a plurality of circuit boards, each circuit board having at least one of a first plurality of subarray beamformers and a multiplexer circuit .   The system of claim 1, further comprising a flexible circuit.   The system of claim 15, wherein the flexible circuit comprises a plurality of flexible cables or flexible printed circuits.   The system of claim 11, wherein the matched filter has a plurality of weights associated with several stages of delay lines.   The system of claim 1, wherein each beam in the plurality of subarray beamformers is compressed.   The system of claim 1, wherein the second plurality of beamformers comprises a plurality of digital beamformers. The system of claim 1 , wherein the first plurality of beamformers comprises a charge domain processor. The system of claim 1, further comprising a data processing system programmed to process the data using a spread spectrum excitation waveform stored in the memory .   The system of claim 1, further comprising a system processor in the second housing for performing Doppler processing and scan conversion. 2. The cardiac imaging system of claim 1, wherein the system comprises a cardiac imaging system having at least 16 parallel transmission beams to form an image of the subject's heart using at least 16 subarray beamformers in the probe housing. system.   The system of claim 1, wherein the second housing comprises a processor housing, a display and a control panel and weighs less than about 15 pounds.

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