JP5636110B2 - ベクトル先頭ゼロ、ベクトル末尾ゼロ、ベクトルオペランド1sカウントおよびベクトルパリティ計算のための機能ユニット - Google Patents
ベクトル先頭ゼロ、ベクトル末尾ゼロ、ベクトルオペランド1sカウントおよびベクトルパリティ計算のための機能ユニット Download PDFInfo
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- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
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- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
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- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
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- G—PHYSICS
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- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
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Description
Claims (18)
- 次元がNのベクトル演算を実行するために、半導体に実装されるベクトル機能ユニットであって、
それぞれが論理回路を含むN個の機能ユニットを備え、
前記論理回路は、
対応するA、B,およびCオペランドに対する乗算加算命令と、
第1のオペランドに対する先頭ゼロ命令と、
第2のオペランドに対する末尾ゼロ命令と、
第3のオペランドに対するパリティ命令を実行する、ベクトル機能ユニット。 - 前記N個の機能ユニットはそれぞれ、さらに、第4のオペランドそれぞれに、1のカウント命令を実行する論理回路を含む、請求項1に記載のベクトル機能ユニット。
- 次元がNのベクトル演算を実行するために、半導体に実装されるベクトル機能ユニットであって、
それぞれが論理回路を含むN個の機能ユニットを備え、
前記論理回路は、
対応するA、B,およびCオペランドに対する乗算加算命令と、
第1のオペランドに対する先頭ゼロ命令と、
第2のオペランドに対する末尾ゼロ命令と、
第3のオペランドに対する1のカウント命令を実行する、ベクトル機能ユニット。 - 前記N個の機能ユニットはそれぞれ、さらに、第4のオペランドそれぞれに、パリティ命令を実行する論理回路を含む、請求項3に記載のベクトル機能ユニット。
- 前記N個の機能ユニットはそれぞれ、マイクロコード化されている、請求項1から4のいずれか一項に記載のベクトル機能ユニット。
- 前記乗算加算命令のための論理計算に利用される論理回路は、さらに、前記先頭ゼロ命令のための論理計算にも利用される、請求項1から5のいずれか一項に記載のベクトル機能ユニット。
- 方法であって、
半導体チップでベクトル演算を実行する段階を備え、
前記実行する段階は、
前記半導体チップに実装されているベクトル機能ユニットで第1のベクトル命令を実行する段階と、
前記ベクトル機能ユニットで第2のベクトル命令を実行する段階と
前記機能ユニットで第3のベクトル命令を実行する段階と、
前記機能ユニットで第4のベクトル命令を実行する段階と、
を有し、
前記第1のベクトル命令は、ベクトル乗算加算命令であり、
前記第2のベクトル命令は、ベクトル先頭ゼロカウント命令であり、
前記第3のベクトル命令は、ベクトル末尾ゼロカウント命令であり、
前記第4のベクトル命令は、ベクトルパリティ命令である、方法。 - 前記機能ユニットで第5のベクトル命令を実行する段階をさらに備え、
前記第5のベクトル命令は、1のカウント命令である、請求項7に記載の方法。 - 方法であって、
半導体チップでベクトル演算を実行する段階を備え、
前記実行する段階は、
前記半導体チップに実装されているベクトル機能ユニットで第1のベクトル命令を実行する段階と、
前記ベクトル機能ユニットで第2のベクトル命令を実行する段階と
前記機能ユニットで第3のベクトル命令を実行する段階と、
前記機能ユニットで第4のベクトル命令を実行する段階と、
を有し、
前記第1のベクトル命令は、ベクトル乗算加算命令であり、
前記第2のベクトル命令は、ベクトル先頭ゼロカウント命令であり、
前記第3のベクトル命令は、ベクトル末尾ゼロカウント命令であり、
前記第4のベクトル命令は、1のカウント命令である、方法。 - 前記機能ユニットで第5のベクトル命令を実行する段階をさらに備え、
前記第5のベクトル命令は、ベクトルパリティ命令である、請求項9に記載の方法。 - 前記第2のベクトル命令のための論理計算に利用されるものと同じ論理回路を利用して前記第1のベクトル命令のための論理計算を実行する段階をさらに備える、請求項7から10のいずれか一項に記載の方法。
- 前記第1のベクトル命令のための論理計算は、先頭の1の決定を含む、請求項7から11のいずれか一項に記載の方法。
- フラットパネルディスプレイと、
半導体チップに実装されたプロセッサと
を備えるコンピューティングシステムであって、
前記プロセッサは、次元Nのベクトル演算を実行するベクトル機能ユニットを有し、
前記ベクトル機能ユニットは、
それぞれが論理回路を含むN個の機能ユニットを備え、
前記論理回路は、
対応するA、B,およびCオペランドに対する乗算加算命令と、
第1のオペランドに対する先頭ゼロ命令と、
第2のオペランドに対する末尾ゼロ命令と、
第3のオペランドに対するパリティ命令とを実行する、コンピューティングシステム。 - 前記N個の機能ユニットはそれぞれ、さらに、第4のオペランドそれぞれに、1のカウント命令を実行する論理回路を含む、請求項13に記載のコンピューティングシステム。
- フラットパネルディスプレイと、
半導体チップに実装されたプロセッサと
を備えるコンピューティングシステムであって、
前記プロセッサは、次元Nのベクトル演算を実行するベクトル機能ユニットを有し、
前記ベクトル機能ユニットは、
それぞれが論理回路を含むN個の機能ユニットを備え、
前記論理回路は、
対応するA、B,およびCオペランドに対する乗算加算命令と、
第1のオペランドに対する先頭ゼロ命令と、
第2のオペランドに対する末尾ゼロ命令と、
第3のオペランドに対する1のカウント命令とを実行する、コンピューティングシステム。 - 前記N個の機能ユニットはそれぞれ、さらに、第4のオペランドそれぞれに、パリティ命令を実行する論理回路を含む、請求項15に記載のコンピューティングシステム。
- 前記N個の機能ユニットはそれぞれ、マイクロコード化されている、請求項13から16のいずれか一項に記載のコンピューティングシステム。
- 前記乗算加算命令のための論理計算に利用される論理回路は、さらに、前記先頭ゼロ命令のための論理計算にも利用される、請求項13から17のいずれか一項に記載のコンピューティングシステム。
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US12/890,457 US9092213B2 (en) | 2010-09-24 | 2010-09-24 | Functional unit for vector leading zeroes, vector trailing zeroes, vector operand 1s count and vector parity calculation |
US12/890,457 | 2010-09-24 | ||
PCT/US2011/052889 WO2012040539A2 (en) | 2010-09-24 | 2011-09-23 | Functional unit for vector leading zeroes, vector trailing zeroes, vector operand 1s count and vector parity calculation |
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JP2013543173A JP2013543173A (ja) | 2013-11-28 |
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CN (2) | CN106126194A (ja) |
BR (1) | BR112013008616A2 (ja) |
DE (1) | DE112011103195T5 (ja) |
GB (1) | GB2497455B (ja) |
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2010
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- 2011-09-23 BR BR112013008616A patent/BR112013008616A2/pt not_active IP Right Cessation
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GB2497455A (en) | 2013-06-12 |
WO2012040539A3 (en) | 2012-07-05 |
KR20130062352A (ko) | 2013-06-12 |
KR101517762B1 (ko) | 2015-05-06 |
GB201303912D0 (en) | 2013-04-17 |
CN106126194A (zh) | 2016-11-16 |
JP2013543173A (ja) | 2013-11-28 |
US9092213B2 (en) | 2015-07-28 |
TWI547868B (zh) | 2016-09-01 |
TW201229888A (en) | 2012-07-16 |
CN103119578A (zh) | 2013-05-22 |
DE112011103195T5 (de) | 2013-06-27 |
US20120079253A1 (en) | 2012-03-29 |
BR112013008616A2 (pt) | 2016-06-14 |
CN103119578B (zh) | 2016-08-03 |
WO2012040539A2 (en) | 2012-03-29 |
GB2497455B (en) | 2017-08-09 |
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