JP5635987B2 - 基板の表面の計測特性を評価するシステムおよび方法 - Google Patents

基板の表面の計測特性を評価するシステムおよび方法 Download PDF

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JP5635987B2
JP5635987B2 JP2011525221A JP2011525221A JP5635987B2 JP 5635987 B2 JP5635987 B2 JP 5635987B2 JP 2011525221 A JP2011525221 A JP 2011525221A JP 2011525221 A JP2011525221 A JP 2011525221A JP 5635987 B2 JP5635987 B2 JP 5635987B2
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substrate
metric
evaluation
shape
region
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JP2012501553A5 (https=
JP2012501553A (ja
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ベーララギャバン・サシシュ
シンハ・ジェイディープ・ケー．
フェティング・ラビ
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KLA Corp
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KLA Tencor Corp
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/20—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by the properties tested or measured, e.g. structural or electrical properties
    • H10P74/203—Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects

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  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Testing Resistance To Weather, Investigating Materials By Mechanical Methods (AREA)
  • Length Measuring Devices By Optical Means (AREA)
JP2011525221A 2008-08-28 2009-08-28 基板の表面の計測特性を評価するシステムおよび方法 Expired - Fee Related JP5635987B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US9272008P 2008-08-28 2008-08-28
US61/092,720 2008-08-28
PCT/US2009/055313 WO2010025334A2 (en) 2008-08-28 2009-08-28 Localized substrate geometry characterization

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JP2012501553A JP2012501553A (ja) 2012-01-19
JP2012501553A5 JP2012501553A5 (https=) 2012-10-11
JP5635987B2 true JP5635987B2 (ja) 2014-12-03

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US (1) US8065109B2 (https=)
EP (1) EP2324495A4 (https=)
JP (1) JP5635987B2 (https=)
WO (1) WO2010025334A2 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106575630A (zh) * 2014-07-13 2017-04-19 科磊股份有限公司 使用叠加及成品率关键图案的度量

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US8768665B2 (en) 2010-01-08 2014-07-01 Kla-Tencor Technologies Corporation Site based quantification of substrate topography and its relation to lithography defocus and overlay
FR2955654B1 (fr) * 2010-01-25 2012-03-30 Soitec Silicon Insulator Technologies Systeme et procede d'evaluation de deformations inhomogenes dans des plaques multicouches
US8630479B2 (en) 2011-01-07 2014-01-14 Kla-Tencor Corporation Methods and systems for improved localized feature quantification in surface metrology tools
US9031810B2 (en) 2011-01-11 2015-05-12 Haiguang Chen Methods and systems of object based metrology for advanced wafer surface nanotopography
US9354526B2 (en) * 2011-10-11 2016-05-31 Kla-Tencor Corporation Overlay and semiconductor process control using a wafer geometry metric
US9177370B2 (en) * 2012-03-12 2015-11-03 Kla-Tencor Corporation Systems and methods of advanced site-based nanotopography for wafer surface metrology
US9588441B2 (en) 2012-05-18 2017-03-07 Kla-Tencor Corporation Method and device for using substrate geometry to determine optimum substrate analysis sampling
US9355440B1 (en) * 2012-10-10 2016-05-31 Kla-Tencor Corp. Detection of selected defects in relatively noisy inspection data
US9546862B2 (en) 2012-10-19 2017-01-17 Kla-Tencor Corporation Systems, methods and metrics for wafer high order shape characterization and wafer classification using wafer dimensional geometry tool
DE102013109515B4 (de) * 2013-03-12 2017-08-31 Taiwan Semiconductor Mfg. Co., Ltd. Methodik der Überlagerungs-Prüfung
FR3006048A1 (fr) * 2013-05-24 2014-11-28 Commissariat Energie Atomique Procede de caracterisation de la topographie d'une surface
US9029810B2 (en) * 2013-05-29 2015-05-12 Kla-Tencor Corporation Using wafer geometry to improve scanner correction effectiveness for overlay control
US9384540B2 (en) 2013-12-03 2016-07-05 Sunedison Semiconductor Limited (Uen201334164H) Systems and methods for interferometric phase measurement
US10024654B2 (en) 2015-04-06 2018-07-17 Kla-Tencor Corporation Method and system for determining in-plane distortions in a substrate
US10062158B2 (en) 2015-07-10 2018-08-28 Globalwafers Co., Ltd. Wafer nanotopography metrology for lithography based on thickness maps
DE102015220924B4 (de) 2015-10-27 2018-09-27 Siltronic Ag Suszeptor zum Halten einer Halbleiterscheibe mit Orientierungskerbe, Verfahren zum Abscheiden einer Schicht auf einer Halbleiterscheibe und Halbleiterscheibe
US10331028B2 (en) 2015-11-12 2019-06-25 Toshiba Memory Corporation Imprinting apparatus, recording medium, and imprinting method
JP6899080B2 (ja) 2018-09-05 2021-07-07 信越半導体株式会社 ウェーハ形状データ化方法
TWI889613B (zh) 2021-04-27 2025-07-01 美商應用材料股份有限公司 用於半導體處理的應力與覆蓋管理

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US5898106A (en) * 1997-09-25 1999-04-27 Digital Instruments, Inc. Method and apparatus for obtaining improved vertical metrology measurements
US6503767B2 (en) * 2000-12-19 2003-01-07 Speedfam-Ipec Corporation Process for monitoring a process, planarizing a surface, and for quantifying the results of a planarization process
JP3849547B2 (ja) * 2002-02-28 2006-11-22 信越半導体株式会社 半導体エピタキシャルウェーハの測定方法、半導体エピタキシャルウェーハの測定装置、半導体エピタキシャルウェーハの製造方法及びコンピュータプログラム
DE10229818A1 (de) * 2002-06-28 2004-01-15 Carl Zeiss Smt Ag Verfahren zur Fokusdetektion und Abbildungssystem mit Fokusdetektionssystem
JP4464033B2 (ja) * 2002-06-13 2010-05-19 信越半導体株式会社 半導体ウエーハの形状評価方法及び形状評価装置
JP3769262B2 (ja) * 2002-12-20 2006-04-19 株式会社東芝 ウェーハ平坦度評価方法、その評価方法を実行するウェーハ平坦度評価装置、その評価方法を用いたウェーハの製造方法、その評価方法を用いたウェーハ品質保証方法、その評価方法を用いた半導体デバイスの製造方法、およびその評価方法によって評価されたウェーハを用いた半導体デバイスの製造方法
US7324917B2 (en) * 2004-07-02 2008-01-29 Kla-Tencor Technologies Corporation Method, system, and software for evaluating characteristics of a surface with reference to its edge
US7161669B2 (en) * 2005-05-06 2007-01-09 Kla- Tencor Technologies Corporation Wafer edge inspection
JP2007234945A (ja) * 2006-03-02 2007-09-13 Toshiba Ceramics Co Ltd レーザーマーキングウェーハおよびその製造方法
WO2007137261A2 (en) * 2006-05-22 2007-11-29 Kla-Tencor Technologies Corporation Methods and systems for detecting pinholes in a film formed on a wafer or for monitoring a thermal process tool

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106575630A (zh) * 2014-07-13 2017-04-19 科磊股份有限公司 使用叠加及成品率关键图案的度量

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Publication number Publication date
WO2010025334A2 (en) 2010-03-04
EP2324495A4 (en) 2013-06-05
US8065109B2 (en) 2011-11-22
EP2324495A2 (en) 2011-05-25
JP2012501553A (ja) 2012-01-19
US20110144943A1 (en) 2011-06-16
WO2010025334A3 (en) 2010-05-20

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