JP5623217B2 - Manufacturing method of semiconductor device - Google Patents

Manufacturing method of semiconductor device Download PDF

Info

Publication number
JP5623217B2
JP5623217B2 JP2010214466A JP2010214466A JP5623217B2 JP 5623217 B2 JP5623217 B2 JP 5623217B2 JP 2010214466 A JP2010214466 A JP 2010214466A JP 2010214466 A JP2010214466 A JP 2010214466A JP 5623217 B2 JP5623217 B2 JP 5623217B2
Authority
JP
Japan
Prior art keywords
semiconductor wafer
coating material
film
resist
coating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2010214466A
Other languages
Japanese (ja)
Other versions
JP2012069823A (en
Inventor
隆 藤村
隆 藤村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Priority to JP2010214466A priority Critical patent/JP5623217B2/en
Publication of JP2012069823A publication Critical patent/JP2012069823A/en
Application granted granted Critical
Publication of JP5623217B2 publication Critical patent/JP5623217B2/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B05SPRAYING OR ATOMISING IN GENERAL; APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
    • B05DPROCESSES FOR APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
    • B05D1/00Processes for applying liquids or other fluent materials
    • B05D1/40Distributing applied liquids or other fluent materials by members moving relatively to surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26

Landscapes

  • Application Of Or Painting With Fluid Materials (AREA)
  • Coating Apparatus (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)

Description

本発明は、半導体装置の製造方法に関する。特にフォトリソグラフィ工程において用いられるレジストなどの厚膜の塗布膜形成方法に関するものである。   The present invention relates to a method for manufacturing a semiconductor device. In particular, the present invention relates to a method for forming a thick coating film such as a resist used in a photolithography process.

半導体装置を製造する工程のひとつであるフォトリソグラフィ工程においては、半導体ウエハ上にレジストを塗布する工程がある。半導体ウエハ上にレジストを塗布するには回転法を用いる。回転法では、真空チャックに半導体ウエハを固定し、レジストを半導体ウエハ中心部に滴下した後、半導体ウエハを回転させる。回転させることによりレジストは半導体ウエハの表面全体に広げられ、半導体ウエハ表面に均一なレジスト膜が塗布させることができる。レジストの厚さはレジストの粘度とレジスト吐出した後の回転数によって決めることができる。(例えば、非特許文献1参照)
場合によっては厚いレジスト膜が必要となることがある。レジスト膜を厚く形成する場合にはレジストの粘度を高くし、回転数を低回転にする必要がある。
In a photolithography process which is one of processes for manufacturing a semiconductor device, there is a process of applying a resist on a semiconductor wafer. A rotation method is used to apply a resist on a semiconductor wafer. In the rotation method, a semiconductor wafer is fixed to a vacuum chuck, a resist is dropped on the center of the semiconductor wafer, and then the semiconductor wafer is rotated. By rotating, the resist is spread over the entire surface of the semiconductor wafer, and a uniform resist film can be applied to the surface of the semiconductor wafer. The thickness of the resist can be determined by the viscosity of the resist and the number of rotations after the resist is discharged. (For example, see Non-Patent Document 1)
In some cases, a thick resist film may be required. In the case of forming a thick resist film, it is necessary to increase the viscosity of the resist and to reduce the rotation speed.

「フォトエッチングと微細加工」 総合電子出版社、1977年発行"Photoetching and microfabrication" General electronic publisher, published in 1977

しかしながら、レジスト膜を厚く形成する為にレジストの粘度を高くし、回転数を低回転にした場合には、回転によりレジストを完全に振り切ることができず、半導体ウエハ外周部分のレジストが厚くなる。一方半導体ウエハの中心部分は薄くなり、均一性のよい膜を形成することができない。レジスト膜厚の均一性が悪いと、その後の露光にも影響を与え、パターニング寸法のバラツキも大きくなる。また、半導体ウエハ面内で大きくレジスト膜厚が変わると、露光時のフォーカスが取れなくなったり、レジスト膜厚が厚くなった部分では、相対的に露光エネルギーが低くなりパターン不良が発生したりする。   However, if the resist viscosity is increased and the rotational speed is decreased to form a thick resist film, the resist cannot be completely shaken off by the rotation, and the resist on the outer peripheral portion of the semiconductor wafer becomes thick. On the other hand, the central portion of the semiconductor wafer becomes thin, and a film with good uniformity cannot be formed. When the uniformity of the resist film thickness is poor, the subsequent exposure is also affected, and the variation in the patterning dimension increases. Also, if the resist film thickness largely changes in the semiconductor wafer surface, focus during exposure cannot be obtained, and exposure energy is relatively lowered in a portion where the resist film thickness is increased, resulting in pattern defects.

半導体ウエハ外周部分のレジストが厚くなるのを防ぐために、回転数を高くする方法もあるが、この場合全体的にレジスト膜厚が薄くなり所望の膜厚が得られなくなる。   In order to prevent the resist on the outer peripheral portion of the semiconductor wafer from becoming thicker, there is a method of increasing the number of revolutions. However, in this case, the resist film thickness becomes thin as a whole, and a desired film thickness cannot be obtained.

本発明は、上記問題を解決する為になされたものであり、半導体ウエハ上に厚いレジスト膜を均一に形成するという塗布膜形成方法を提供するものである。   The present invention has been made to solve the above-described problems, and provides a coating film forming method in which a thick resist film is uniformly formed on a semiconductor wafer.

上記の課題を解決するために、以下のような手段を用いた。
1.半導体ウエハ上に第一の塗布材を滴下する工程と、前記半導体ウエハを第一の成膜回転数にて回転させて前記第一の塗布材を前記半導体ウエハ全体に広げて第一の塗布膜を成膜する工程と、前記第一の塗布材を塗布した前記半導体ウエハに第一のソフトベークを施す工程と、前記半導体ウエハを回転させながら、前記半導体ウエハ上に第二の塗布材を滴下し、第二の成膜回転数にて回転させて前記第二の塗布材を前記半導体ウエハ全体に広げて第二の塗布膜を成膜する工程と、前記第二の塗布膜を成膜した前記半導体ウエハに第二のソフトベークを施す工程と、を含むことを特徴とする半導体装置の製造方法とした。
In order to solve the above problems, the following means were used.
1. A step of dropping a first coating material on the semiconductor wafer; and rotating the semiconductor wafer at a first film-forming rotation speed to spread the first coating material over the entire semiconductor wafer, thereby forming a first coating film Forming a film, applying a first soft bake to the semiconductor wafer coated with the first coating material, and dropping a second coating material on the semiconductor wafer while rotating the semiconductor wafer. Then, the second coating film is formed by spreading the second coating material over the entire semiconductor wafer by rotating at the second film-forming rotation speed, and forming the second coating film. And a step of subjecting the semiconductor wafer to a second soft bake.

2.前記第一の塗布材が前記第二の塗布材よりも高粘度であって、かつ、前記第一の成膜回転数は、第二の成膜回転数より低いことを特徴とすることを特徴とする半導体装置の製造方法とした。 2. The first coating material has a higher viscosity than the second coating material, and the first film-forming rotation speed is lower than the second film-forming rotation speed. The method for manufacturing a semiconductor device is as follows.

3.前記第一の塗布材と前記第二の塗布材は、同一溶質成分および同一溶剤成分からなり、溶質成分と溶剤成分の成分比が異なることを特徴とする半導体装置の製造方法とした。 3. The first coating material and the second coating material are composed of the same solute component and the same solvent component, and the component ratio of the solute component and the solvent component is different.

4.前記第一のソフトベークの温度が前記第二のソフトベークの温度よりも高いことを特徴とする半導体装置の製造方法とした。 4). The semiconductor device manufacturing method is characterized in that the temperature of the first soft bake is higher than the temperature of the second soft bake.

5.前記半導体ウエハの外周部分の前記第一の塗布膜の盛り上がり膜厚が、前記半導体ウエハの中心付近の第一の塗布膜の膜厚と第二の塗布膜の膜厚の和と同程度であることを特徴とする半導体装置の製造方法とした。 5. The raised film thickness of the first coating film on the outer peripheral portion of the semiconductor wafer is approximately the same as the sum of the film thickness of the first coating film and the film thickness of the second coating film near the center of the semiconductor wafer. This is a method for manufacturing a semiconductor device.

上記方法を用いることにより、膜厚が均一な厚膜塗布膜を形成することができる。   By using the above method, a thick coating film having a uniform film thickness can be formed.

本発明の実施形態に係る半導体レジスト塗布方法を示す工程順の断面模式図である。It is a cross-sectional schematic diagram of the process order which shows the semiconductor resist coating method which concerns on embodiment of this invention. 従来方法でレジストを厚く塗布したときの断面模式図である。It is a cross-sectional schematic diagram when a resist is apply | coated thickly by the conventional method.

以下、図面を参考に本発明を実施例により説明する。
図1は、本発明のレジスト形成方法を示す図で、図1(a)から図2(f)は工程順に示した断面模式図である。
Hereinafter, the present invention will be described by way of examples with reference to the drawings.
FIG. 1 is a view showing a resist forming method of the present invention, and FIGS. 1A to 2F are schematic cross-sectional views showing the order of steps.

まず、図1(a)に示すように、半導体ウエハ1上にレジスト吐出ノズル2から第一の塗布剤である第一のレジスト3を滴下する。そして、半導体ウエハ1を回転させる事により、図1(b)のように第一のレジスト3を半導体ウエハ1全面に広げる。次いで、成膜回転数で半導体ウエハを回転させることで第一のレジストが成膜される。この時、滴下する第一のレジスト3の粘度および、半導体ウエハ1の成膜回転数を調整する事により、図1(c)に示すように第一のレジスト3が半導体ウエハ1の外周部分で盛り上がるようにする。たとえば、粘度が150cp以下、成膜回転数2000rpmで半導体ウエハ外周部のレジストの盛り上がり5は大きくなる。このレジスト3が盛り上がった部分5のレジスト膜厚は、中心付近の第一の塗布膜の膜厚と第二の塗布膜の膜厚の和である最終的に狙っているレジスト膜厚と同等か、少し高めに調整する。   First, as shown in FIG. 1A, a first resist 3 as a first coating agent is dropped onto a semiconductor wafer 1 from a resist discharge nozzle 2. Then, by rotating the semiconductor wafer 1, the first resist 3 is spread over the entire surface of the semiconductor wafer 1 as shown in FIG. Next, the first resist is formed by rotating the semiconductor wafer at the film formation speed. At this time, by adjusting the viscosity of the first resist 3 to be dropped and the film formation rotation speed of the semiconductor wafer 1, the first resist 3 is formed at the outer peripheral portion of the semiconductor wafer 1 as shown in FIG. Try to get excited. For example, the resist bulge 5 on the outer periphery of the semiconductor wafer becomes large when the viscosity is 150 cp or less and the film forming rotation speed is 2000 rpm. Is the resist film thickness of the portion 5 where the resist 3 swells equal to the final resist film thickness that is the sum of the film thickness of the first coating film near the center and the film thickness of the second coating film? Adjust it slightly higher.

次に、第一のレジスト3を塗布した半導体ウエハ1をホットプレート上で90℃、1分程度のソフトベークをする。このソフトベーク工程は、第一のレジストに含まれる溶剤を蒸発させるためだけではなく、第二の塗布剤である第二のレジスト滴下時に、第二のレジストに含まれる溶剤が塗布済みの第一のレジストを不均一に溶かすことを防止するために重要な工程である。市販のレジストにおいてレジストメーカーから推奨されているソフトベーク条件では、下層の第一のレジストを不均一に溶かすという不具合があるので、後のパターニングに支障をきたさない範囲で、メーカー推奨温度よりも高めの温度設定とするのがよい。   Next, the semiconductor wafer 1 coated with the first resist 3 is soft baked on a hot plate at 90 ° C. for about 1 minute. This soft baking process is not only for evaporating the solvent contained in the first resist, but also when the second resist as the second coating agent is dropped, the solvent contained in the second resist has been applied. This is an important step for preventing non-uniform dissolution of the resist. The soft bake conditions recommended by resist manufacturers for commercially available resists have the problem of non-uniform dissolution of the underlying first resist. It is better to set the temperature.

次いで、図1(d)に示すように、回転中の半導体ウエハ1に粘度30cp以下の第二のレジスト6を半導体ウエハ1上に滴下し、次いで半導体ウエハ1を3000rpm以上の成膜回転数で回転させることにより、図1(e)のように、第二のレジストを半導体ウエハ1全面に成膜する。このとき、第一のレジスト3で形成した半導体ウエハ外周部分の盛り上がり部分5が壁の役割を果たすので、第二のレジスト6が、外周部分の盛り上がり部分5で囲まれた領域内で留まることにより、図1(f)に示すように、半導体ウエハ1上に厚くて均一なレジスト膜8を形成する事ができる。   Next, as shown in FIG. 1 (d), a second resist 6 having a viscosity of 30 cp or less is dropped onto the rotating semiconductor wafer 1 on the semiconductor wafer 1, and then the semiconductor wafer 1 is deposited at a rotation speed of 3000 rpm or more. By rotating, a second resist is formed on the entire surface of the semiconductor wafer 1 as shown in FIG. At this time, since the raised portion 5 of the outer peripheral portion of the semiconductor wafer formed of the first resist 3 serves as a wall, the second resist 6 stays within the region surrounded by the raised portion 5 of the outer peripheral portion. As shown in FIG. 1 (f), a thick and uniform resist film 8 can be formed on the semiconductor wafer 1.

上述したように、第二のレジストの滴下は、スタティックディスペンスではなく、ダイナミックディスペンスとしたほうが第一のレジストを不均一に溶かすということを防止できる。尚、第一のレジストの滴下は、スタティックディスペンスでもダイナミックディスペンスでもどちらでも構わない。   As described above, the dropping of the second resist can prevent the first resist from being dissolved non-uniformly by using dynamic dispensing instead of static dispensing. The first resist may be dropped by either static dispensing or dynamic dispensing.

次に、厚くて均一なレジスト膜8を形成した半導体ウエハ1をホットプレート上で85℃、1分程度のソフトベークを行う。こうして厚膜のレジスト塗布が完成する。この後は通常のフォトリソグラフィ工程と同様である。   Next, the semiconductor wafer 1 on which the thick and uniform resist film 8 is formed is soft-baked on a hot plate at 85 ° C. for about 1 minute. In this way, thick resist coating is completed. The subsequent steps are the same as those in a normal photolithography process.

なお、以上の工程において、第一のレジスト塗布後のソフトベーク温度は第二のレジスト塗布後のソフトベーク温度よりも高いことが望ましい。   In the above steps, it is desirable that the soft bake temperature after the first resist application is higher than the soft bake temperature after the second resist application.

また、上記例のように第二のレジスト6は、第一のレジストに比べ低粘度のものとする。第一のレジスト3と第二のレジスト6は、同一溶質成分および同一溶剤成分からなり、溶質成分と溶剤成分の成分比が異なることで粘度が異なるものである。   Further, as in the above example, the second resist 6 has a lower viscosity than the first resist. The first resist 3 and the second resist 6 are composed of the same solute component and the same solvent component, and have different viscosities due to different component ratios of the solute component and the solvent component.

これまでの説明では、塗布材としてレジストで説明したが、塗布材は、ポリイミドやポリアミドでもよい。
また、上記例のような2回塗布だけではなく、第一のレジストと第二のレジストに加え第三のレジストを塗布するというように3回又はそれ以上の塗布を行なっても良い。
In the description so far, the resist has been described as the coating material, but the coating material may be polyimide or polyamide.
Further, not only the application twice as in the above example, but also the application may be performed three times or more, such as applying the third resist in addition to the first resist and the second resist.

1 半導体ウエハ
2 レジスト吐出ノズル
3 第一のレジスト
4 回転の遠心力により広がっている高粘度レジスト
5 レジストの盛り上がり
6 第二のレジスト
7 回転の遠心力により広がっている低粘度レジスト
8 厚くて均一なレジスト膜
DESCRIPTION OF SYMBOLS 1 Semiconductor wafer 2 Resist discharge nozzle 3 First resist 4 High-viscosity resist spreading by rotating centrifugal force 5 Resist swell 6 Second resist 7 Low-viscosity resist spreading by rotating centrifugal force 8 Thick and uniform Resist film

Claims (3)

半導体ウエハ上に第一の塗布材を滴下する工程と、
前記半導体ウエハを第一の成膜回転数にて回転させて前記半導体ウエハ全体に広げ、前記第一の塗布材が前記半導体ウエハの外周部分で盛り上がるように、第一の塗布膜を成膜する工程と、
前記第一の塗布材を塗布した前記半導体ウエハに第一のソフトベークを施す工程と、
前記半導体ウエハを回転させながら、前記半導体ウエハ上に第二の塗布材を滴下し、第二の成膜回転数にて回転させて前記第二の塗布材を前記半導体ウエハ全体に広げて第二の塗布膜を成膜する工程と、
前記第二の塗布膜を成膜した前記半導体ウエハに第二のソフトベークを施す工程と、
を含み、
前記第一の塗布材が前記第二の塗布材よりも高粘度であって、かつ、前記第一の成膜回転数は、第二の成膜回転数より低いことを特徴とする半導体装置の製造方法。
Dropping the first coating material on the semiconductor wafer;
The semiconductor wafer is rotated at a first film-forming rotation speed to spread over the entire semiconductor wafer, and a first coating film is formed so that the first coating material swells at the outer peripheral portion of the semiconductor wafer. Process,
Applying a first soft bake to the semiconductor wafer coated with the first coating material;
While rotating the semiconductor wafer, a second coating material is dropped on the semiconductor wafer, and the second coating material is spread over the entire semiconductor wafer by rotating at a second film-forming rotation speed. Forming a coating film of
Applying a second soft bake to the semiconductor wafer on which the second coating film has been formed;
Including
The first coating material is a higher viscosity than the second coating material, and the first film forming rpm, semiconductors you being lower than the second deposition rpm Device manufacturing method.
半導体ウエハ上に第一の塗布材を滴下する工程と、
前記半導体ウエハを第一の成膜回転数にて回転させて前記半導体ウエハ全体に広げ、前記第一の塗布材が前記半導体ウエハの外周部分で盛り上がるように、第一の塗布膜を成膜する工程と、
前記第一の塗布材を塗布した前記半導体ウエハに第一のソフトベークを施す工程と、
前記半導体ウエハを回転させながら、前記半導体ウエハ上に第二の塗布材を滴下し、第二の成膜回転数にて回転させて前記第二の塗布材を前記半導体ウエハ全体に広げて第二の塗布膜を成膜する工程と、
前記第二の塗布膜を成膜した前記半導体ウエハに第二のソフトベークを施す工程と、
を含み、
前記第一の塗布材と前記第二の塗布材は、同一溶質成分および同一溶剤成分からなり、溶質成分と溶剤成分の成分比が異なることを特徴とする半導体装置の製造方法。
Dropping the first coating material on the semiconductor wafer;
The semiconductor wafer is rotated at a first film-forming rotation speed to spread over the entire semiconductor wafer, and a first coating film is formed so that the first coating material swells at the outer peripheral portion of the semiconductor wafer. Process,
Applying a first soft bake to the semiconductor wafer coated with the first coating material;
While rotating the semiconductor wafer, a second coating material is dropped on the semiconductor wafer, and the second coating material is spread over the entire semiconductor wafer by rotating at a second film-forming rotation speed. Forming a coating film of
Applying a second soft bake to the semiconductor wafer on which the second coating film has been formed;
Including
The first coating material and the second coating material are the same solute component and made of the same solvent components, a manufacturing method of a semi-conductor device you wherein component ratio of solute and solvent component are different.
半導体ウエハ上に第一の塗布材を滴下する工程と、
前記半導体ウエハを第一の成膜回転数にて回転させて前記半導体ウエハ全体に広げ、前記第一の塗布材が前記半導体ウエハの外周部分で盛り上がるように、第一の塗布膜を成膜する工程と、
前記第一の塗布材を塗布した前記半導体ウエハに第一のソフトベークを施す工程と、
前記半導体ウエハを回転させながら、前記半導体ウエハ上に第二の塗布材を滴下し、第二の成膜回転数にて回転させて前記第二の塗布材を前記半導体ウエハ全体に広げて第二の塗布膜を成膜する工程と、
前記第二の塗布膜を成膜した前記半導体ウエハに第二のソフトベークを施す工程と、を含み、
前記第一のソフトベークの温度が前記第二のソフトベークの温度よりも高いことを特徴とする半導体装置の製造方法。
Dropping the first coating material on the semiconductor wafer;
The semiconductor wafer is rotated at a first film-forming rotation speed to spread over the entire semiconductor wafer, and a first coating film is formed so that the first coating material swells at the outer peripheral portion of the semiconductor wafer. Process,
Applying a first soft bake to the semiconductor wafer coated with the first coating material;
While rotating the semiconductor wafer, a second coating material is dropped on the semiconductor wafer, and the second coating material is spread over the entire semiconductor wafer by rotating at a second film-forming rotation speed. Forming a coating film of
Applying a second soft bake to the semiconductor wafer on which the second coating film has been formed,
Method of manufacturing a semi-conductor device temperature of the first soft bake you being higher than the temperature of the second soft bake.
JP2010214466A 2010-09-24 2010-09-24 Manufacturing method of semiconductor device Expired - Fee Related JP5623217B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2010214466A JP5623217B2 (en) 2010-09-24 2010-09-24 Manufacturing method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2010214466A JP5623217B2 (en) 2010-09-24 2010-09-24 Manufacturing method of semiconductor device

Publications (2)

Publication Number Publication Date
JP2012069823A JP2012069823A (en) 2012-04-05
JP5623217B2 true JP5623217B2 (en) 2014-11-12

Family

ID=46166699

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2010214466A Expired - Fee Related JP5623217B2 (en) 2010-09-24 2010-09-24 Manufacturing method of semiconductor device

Country Status (1)

Country Link
JP (1) JP5623217B2 (en)

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5654435A (en) * 1979-10-11 1981-05-14 Matsushita Electric Ind Co Ltd Photosensitive resin coating method
JPS62211919A (en) * 1986-03-13 1987-09-17 Oki Electric Ind Co Ltd Application of organic compound
JPH03262567A (en) * 1990-03-12 1991-11-22 Fujitsu Ltd Multilayer resist coating method
JPH0429215A (en) * 1990-05-25 1992-01-31 Nippon Telegr & Teleph Corp <Ntt> Contact lens with color discriminating function and its production
JPH07153677A (en) * 1993-11-30 1995-06-16 Mitsumi Electric Co Ltd Formation method of semiconductor coating film
JP2008006379A (en) * 2006-06-29 2008-01-17 Disco Abrasive Syst Ltd Protection film formation method
JP2008091066A (en) * 2006-09-29 2008-04-17 Seiko Epson Corp Thin-film forming method, and method of manufacturing organic el element
JP5143395B2 (en) * 2006-10-24 2013-02-13 新科實業有限公司 Method for forming resist on wafer

Also Published As

Publication number Publication date
JP2012069823A (en) 2012-04-05

Similar Documents

Publication Publication Date Title
US9170496B2 (en) Method of pre-treating a wafer surface before applying a solvent-containing material thereon
JP2009207997A (en) Rotation applying method and rotation applying apparatus
US7718551B2 (en) Method for forming photoresist layer
US9633834B2 (en) Photolithographic method for forming a coating layer
US7435692B2 (en) Gas jet reduction of iso-dense field thickness bias for gapfill process
JP2006253207A (en) Method of coating, method of manufacturing semiconductor device
CN113171936A (en) Glue spreading method in photoetching process
JP5623217B2 (en) Manufacturing method of semiconductor device
US20100003403A1 (en) Photoresist coating process
JP2012256780A (en) Resist coating method by spin coating method
JP2002324745A (en) Method for forming resist film
TWI254358B (en) Method of coating photoresist and photoresist layer formed by the same
KR100685679B1 (en) Spin coating method
JP2008108838A (en) Method for forming resist to wafer
JP2011023387A (en) Forming method of resist film
JP6374373B2 (en) Spin coater
KR20060135984A (en) Spin coating method
US11550223B2 (en) Coating method and coating system
TWI724215B (en) Method for cleaning wafer edge
JPS6334925A (en) Formation of photoresist film
JPH09134909A (en) Spin-coating device for thin film formation, semiconductor device and formation of thin film
JP2003093955A (en) Method and device for coating thin film
JPH046086B2 (en)
JP2005021803A (en) Method for rotary coating and method for manufacturing semiconductor device using it
JPH0656832B2 (en) Resist coating method

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20130711

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20140130

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20140204

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20140404

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20140902

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20140924

R150 Certificate of patent or registration of utility model

Ref document number: 5623217

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313113

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

S533 Written request for registration of change of name

Free format text: JAPANESE INTERMEDIATE CODE: R313533

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees