JP5608963B2 - Matrix type display device - Google Patents

Description

  The present invention relates to a matrix type display device such as a liquid crystal display, and more particularly to a matrix type display device that can maintain a constant display performance even when there is a factor that causes voltage fluctuation.

A voltage-driven display device such as a liquid crystal display device or an electrophoretic display device is often driven by an active matrix method using a thin film transistor (TFT). FIG. 6 is a schematic cross-sectional view showing a conventional example of a single pixel region of a liquid crystal display device driven by an active matrix system, and a solid line portion in FIG. 4 is an equivalent circuit diagram of a single pixel of the liquid crystal display device. . In the liquid crystal display device 100 illustrated in FIG. 6, a liquid crystal layer 130 is sandwiched between a TFT substrate 110 having a pixel electrode 101 and a color filter substrate 120 having a counter electrode 121, and the liquid crystal layer 130 is a pixel. present as capacitance C _LC, is further formed storage capacitor C _ST as a capacitance component as a parallel circuit and the pixel capacitance C _LC.

The storage capacitor _CST is provided for each pixel formation portion 111, and has a capacitance component between the pixel electrode 101 formed on the TFT substrate 110 and the reference electrode 103 provided on the base substrate 104 side of the pixel electrode 101. It is comprised by arrange | positioning the insulating film 102 which is (for example, refer nonpatent literature 1). As a case where the storage capacitor _CST is necessary, a parasitic capacitor _CGS exists between the pixel electrode 101 and the scanning line (gate line) (reference numeral 41 in FIG. 4), and the presence of the parasitic capacitor _CGS causes a pixel. When the voltage applied to the formation portion 111 fluctuates and the display performance is affected, or when the liquid crystal molecules having anisotropy are applied to the pixel electrode 101, the direction of the molecules changes. As a result, the pixel electrode 101 In this case, the value of the pixel capacitance _CLC that is formed between the counter electrode 121 and the counter electrode 121 varies.

In such a case, by providing the storage capacitor C _ST, since the voltage variation based on the anisotropy of the presence and the liquid crystal molecules of the parasitic capacitance C _GS can be relatively small, applied to the pixel formation portion 111 The voltage is stabilized and good display performance can be obtained. The effect on display performance due to voltage fluctuations varies depending on the specifications of the liquid crystal display, but in high-quality liquid crystal displays with many gradations, slight fluctuations in voltage are sensitively reflected in the display performance, so it is more retained. it is that it is preferable to crowded make the capacitance _{C ST} in the TFT substrate 110.

Conventionally, the holding capacitor _{C ST} that are built on the TFT substrate 110 is 0.5 times to 1.0 times with respect to the pixel capacitance _{C LC.} In this case, the reference for forming the storage capacitor _CST from the relationship between the film thickness and dielectric constant of the insulating film 102 between the pixel electrode 101 and the reference electrode 103 and the relationship between the film thickness and dielectric constant of the liquid crystal layer 130. It is sufficient that the area C of the electrode 103 is 10 to 30% larger than the area A of the pixel electrode 101. As a result, even if a metal electrode is used as the reference electrode 103, the aperture ratio is not greatly reduced, and such a metal electrode is often used from the viewpoint of simplicity of the process.

However, along with the further improvement in quality of recent liquid crystal displays, the number of gradations of pixels is further increased and the response is improved. When the number of gradations is increased, the gradation changes even if the voltage applied to the pixel electrode 101 is slightly changed. Therefore, the allowable value of voltage fluctuation becomes smaller than before. Therefore, it is necessary to crowded create a larger storage capacitor C _ST. Further, in order to improve the responsiveness, it is necessary to reduce the film thickness of the liquid crystal layer 130 to increase the pixel capacitance _CLC , or to apply a ferroelectric liquid crystal having spontaneous polarization. The capacity _CST also needs to be increased.

In the liquid crystal display device described in Patent Document 1, a storage capacitor is formed by a first electrode made of an opaque metal and a pixel electrode made of a transparent conductive film, and the aperture ratio is improved by the layout of the first electrode. It is characterized by having.
Responsible editing: Hiroo Hori, Koji Suzuki, “Color LCD”, Kyoritsu Shuppan, 2001, pages 116-120. JP-A-5-203981 (paragraphs 0011 to 0012)

As described above, when the storage capacitor _CST is further increased, the area C of the reference electrode 103 may be enlarged. In a normal manufacturing process, the reference electrode 103 is formed in the same process as the wiring layer. Therefore, it is provided as an opaque metal electrode layer. Therefore, in the case of a display that needs to transmit a backlight or the like, such as a transmissive liquid crystal display, increasing the area C of the reference electrode 103 decreases the transmittance, that is, the light use efficiency. This is a disadvantage from the viewpoint of power consumption. In order to solve this problem, if the material of the reference electrode 103 is a transparent conductive material, in the liquid crystal display 100, the backlight or the like 150 is not shielded by the reference electrode 103, so that the aperture ratio is not lowered. Therefore, the means for increasing the storage capacitor _CST can be _handled to some extent by simply increasing the area C of the reference electrode 103. However, in this case, since the reference electrode 103 made of a material different from that of the wiring portion, which is a metal electrode, is used, the film forming process and the etching process increase, which increases the product cost.

  On the other hand, it is possible to use the same transparent electrode as the reference electrode 103 for the wiring layer. However, since the transparent electrode material has a higher specific resistance than the metal electrode, the wiring resistance is increased, and the screen size and operation as a display are increased. Speed may be limited. Further, in a reflective liquid crystal display or electronic paper that does not need to transmit a backlight, the area C of the reference electrode 103 can be enlarged even when an opaque metal electrode is used as in the past.

As shown in FIG. 6, the reference electrode 103 is formed by the reference electrode 103 and the pixel electrode 101 because the reference electrode 103 is formed below the pixel electrode 101 in a plan view with an area C smaller than the pixel electrode 101. The storage capacitor _CST corresponds to the area where the reference electrode 103 and the pixel electrode 101 overlap in plan view.

However, even when the area C of the reference electrode 103 is increased to increase the storage capacitor _CST , the area C of the reference electrode 103 is limited to about one time the area of the pixel electrode 101 at most. Thus, although different depending relationship thickness and dielectric constant of the liquid crystal layer 130 to form a storage capacitor C _ST thickness and dielectric constant, and the pixel capacitance C _LC of the insulating film 102 to form a, the increase of the storage capacitor C _ST There was a limit.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a high-quality matrix display device that further increases the number of gradations of pixels or improves responsiveness. Responsiveness is improved when the tolerance of fluctuation is smaller than before, or by increasing the pixel capacity by reducing the film thickness of the liquid crystal layer or applying a ferroelectric liquid crystal with spontaneous polarization. It is an object of the present invention to provide a matrix display device that can maintain a high-quality display performance at a constant level.

A matrix display device according to the first embodiment of the present invention for solving the above-described problems is provided.
A first substrate having a base substrate, a pixel formation portion and a switching element portion provided on the base substrate, wherein the pixel formation portion includes a pixel electrode formed on the base substrate, and the pixel An insulating film formed so as to cover a part of the electrode, and a reference electrode formed on the insulating film so that an area of an overlapping portion with the pixel electrode in a plan view is B A first substrate;
A second substrate having a transparent substrate and a counter electrode formed on the entire surface or part of the transparent substrate so as to face the pixel electrode;
A matrix type display device comprising: a light control layer provided between the first substrate and the second substrate, the optical control layer of which optical characteristics are changed by applying a voltage between the pixel electrode and the counter electrode. There,
In each pixel unit, the overlapping portion in plan view of the pixel electrode and the reference electrode composed of the area B constitutes a storage capacitor, and when the area obtained by subtracting the area B from the area of the pixel electrode is A, The overlapping portion in plan view of the pixel electrode having the area A and the counter electrode constitutes a pixel capacitance.

According to the present invention, in each pixel unit, the reference electrode having the same potential as the counter electrode is formed on the pixel electrode (on the counter electrode side) via the insulating film. The overlapping portion (area B) in FIG. 5 forms the storage capacitor _CST without forming the pixel capacitor _CLC . An overlapping portion (area A) in plan view of the pixel electrode having the area A obtained by subtracting the area B from the area of the pixel electrode and the counter electrode formed on the second substrate constitutes the pixel capacitor _CLC . . In such a configuration, an area C of an overlapping portion in a plan view of a pixel electrode and a reference electrode (having the same potential as the counter electrode) provided below the pixel electrode (on the base substrate side) via an insulating film (see FIG. 6) is formed in the same area as the area B according to the present invention, in other words, since the reference electrode uses an optically opaque metal electrode, the light transmission of that portion is performed. Compared with the case where the aperture ratio is the same, the matrix type display device according to the first embodiment of the present invention can relatively reduce the pixel capacitance _CLC . As a result, the relative ratio (C _ST / C _LC ) between the storage capacitor C _ST and the pixel capacitor C _LC can be made larger than before.

By these things, or use can be left stored in the storage capacitor C _ST relatively large charge to the pixel capacitance C _LC, for example, a large liquid crystal variations in pixel voltage occurs easily dielectric anisotropy Even in a liquid crystal display device or an electrophoretic display device using a ferroelectric liquid crystal having spontaneous polarization, fluctuations in the pixel voltage can be suppressed by the storage capacitor _CST that is relatively larger than in the past. The display control performance can be kept constant by driving the light control layer made of the same at a predetermined voltage. In the conventional example of FIG. 6, the area of the reference electrode is about 10% to about 30% with respect to the area of the pixel electrode.

  In the matrix display device according to the first aspect of the present invention, the ratio (B / A) of the area B to the area A is 0.1 / 0.9 or more and 0.7 / 0.3 in each pixel unit. It is preferable to configure so as to be within the range of less than.

According to the present invention, since the area B constituting the storage capacitor _CST is sufficiently secured, the aperture ratio is reduced due to the area A constituting the pixel capacitor _CLC being too small, and the display performance is improved. In relation, it is preferable that the ratio (B / A) between the area B and the area A is within the above range.

A matrix display device according to a second embodiment of the present invention for solving the above-described problem is a first substrate having a base substrate, a pixel formation portion and a switching element portion provided on the base substrate, The pixel forming portion covers a second reference electrode formed on the base substrate so that an area of an overlapping portion with a pixel electrode formed later in plan view is C, and the second reference electrode is covered. The formed second insulating film, the pixel electrode formed on the second insulating film, the first insulating film formed so as to cover a part of the pixel electrode, and the first insulating film formed on the first insulating film A first substrate having at least a first reference electrode formed so that an area of an overlapping portion with the pixel electrode in a plan view is B;
A second substrate having a transparent substrate and a counter electrode formed on the entire surface or part of the transparent substrate so as to face the pixel electrode;
A matrix type display device comprising: a light control layer provided between the first substrate and the second substrate, the optical control layer of which optical characteristics are changed by applying a voltage between the pixel electrode and the counter electrode. There,
In each pixel unit, an overlapping portion in plan view of the pixel electrode and the first reference electrode having the area B constitutes a first storage capacitor, and in plan view of the pixel electrode and the second reference electrode. When the overlapping portion constitutes a second storage capacitor and the area obtained by subtracting the area B from the area of the pixel electrode is A, the overlapping portion in plan view of the pixel electrode having the area A and the counter electrode is It constitutes a pixel capacity.

According to the present invention, as in the case of the first embodiment, in each pixel unit, the first reference electrode having the same potential as the counter electrode is formed on the pixel electrode (on the counter electrode side) via the first insulating film. since it is, the overlapping portion (area B) in a plan view of the first reference electrode consisting of the pixel electrode and the area B constitute the first storage capacitor C _ST1 without forming the pixel capacitance C _LC. An overlapping portion (area A) in plan view of the pixel electrode having the area A obtained by subtracting the area B from the area of the pixel electrode and the counter electrode formed on the second substrate constitutes the pixel capacitor _CLC . . Furthermore, in the second embodiment, in each pixel unit, a second reference electrode (having the same potential as the counter electrode) provided below the pixel electrode (on the base substrate side) via a second insulating film; The overlapping portion (area C) in plan view with the pixel electrode constitutes the second storage capacitor _CST2 .

Such a configuration of the second form is an overlapping portion in plan view of a reference electrode (having the same potential as the counter electrode) provided below the pixel electrode (on the base substrate side) via an insulating film and the pixel electrode. Compared to the case where (area C) is a storage capacitor (see the conventional example of FIG. 6), two storage capacitors composed of the first storage capacitor _CST1 and the second storage capacitor _CST2 can be configured. The relative ratio [(C _ST1 + C _ST2 ) / C _LC ] with the pixel capacitance can be made larger than before. As a result, it is possible to set aside a relatively large charge in the storage capacitor _{C ST (C ST1 + C ST2} ) with respect to the pixel capacitance _{C LC,} for example, the size of the variation of the pixel voltage occurs easily dielectric anisotropy Even in a liquid crystal display device or an electrophoretic display device using a liquid crystal or a ferroelectric liquid crystal having spontaneous polarization, the holding capacitance C _ST (C _ST1 + C _ST2 ) which is relatively larger than the conventional one is used. The fluctuation of the pixel voltage can be suppressed, and the display performance can be kept constant by driving the light control layer made of liquid crystal or the like with a predetermined voltage.

  As a preferable aspect of the matrix type display device according to the first and second aspects of the present invention, the switching element portion is configured to be a thin film transistor portion.

  As a preferable aspect of the matrix display device according to the first and second embodiments of the present invention, the light control layer is configured to be a liquid crystal layer.

  As a preferable aspect of the matrix display device according to the first and second embodiments of the present invention, the light control layer is configured to be an electrophoretic material layer.

According to the matrix type display device of the first embodiment of the present invention, the overlapping portion (area B) of the pixel electrode and the reference electrode in plan view forms the holding capacitor _CST without forming the pixel capacitor _CLC. Then, a pixel electrode having an area A obtained by subtracting the area B from the area of the pixel electrode and an overlapping portion (area A) in plan view of the counter electrode constitute the pixel capacitor _CLC . Therefore, the area C (see FIG. 6) of the overlapping portion in plan view between the pixel electrode and a reference electrode (having the same potential as the counter electrode) provided below the pixel electrode (on the base substrate side) via an insulating film. In the case where the conventional electrode is formed in the same area as the area B according to the present invention, in other words, since the reference electrode uses an optically opaque metal electrode, there is no light transmission in that portion. In the case of the same aperture ratio, the matrix display device according to the first embodiment of the present invention can relatively reduce the pixel capacitance _CLC . As a result, the relative ratio (C _ST / C _LC ) between the storage capacitor C _ST and the pixel capacitor C _LC can be made larger than before. By these things, or use can be left stored in the storage capacitor C _ST relatively large charge to the pixel capacitance C _LC, for example, a large liquid crystal variations in pixel voltage occurs easily dielectric anisotropy Even in a liquid crystal display device or an electrophoretic display device using a ferroelectric liquid crystal having spontaneous polarization, fluctuations in the pixel voltage can be suppressed by the storage capacitor _CST that is relatively larger than in the past. The display control performance can be kept constant by driving the light control layer made of the same at a predetermined voltage.

According to the matrix type display device of the second embodiment of the present invention, in addition to the first embodiment, the second reference electrode (the counter electrode and the counter electrode) is further provided below the pixel electrode (on the base substrate side) via the second insulating film. Are formed at the same potential), the overlapping portion (area C) in plan view of the pixel electrode and the second reference electrode constitutes the second storage capacitor _CST2 . Therefore, the overlapping part (area C) in plan view of the reference electrode (which has the same potential as the counter electrode) provided below the pixel electrode (on the base substrate side) via the insulating film and the pixel electrode is retained. Compared to the case of the capacitance (refer to the conventional example of FIG. 6), since the two storage capacitors composed of the first storage capacitor C _ST1 and the second storage capacitor C _ST2 can be configured, the relative ratio between the storage capacitor and the pixel capacitor [(C _ST1 + C _ST2 ) / C _LC ] can be made larger than before. As a result, it is possible to set aside a relatively large charge in the storage capacitor _{C ST (C ST1 + C ST2} ) with respect to the pixel capacitance _{C LC,} for example, the size of the variation of the pixel voltage occurs easily dielectric anisotropy Even in a liquid crystal display device or an electrophoretic display device using a liquid crystal or a ferroelectric liquid crystal having spontaneous polarization, the holding capacitance C _ST (C _ST1 + C _ST2 ) which is relatively larger than the conventional one is used. The fluctuation of the pixel voltage can be suppressed, and the display performance can be kept constant by driving the light control layer made of liquid crystal or the like with a predetermined voltage.

  In such a matrix display device of the present invention, the light control layer is configured to be a liquid crystal layer or an electrophoretic material layer, thereby further increasing the number of gradations of pixels and improving the responsiveness. A liquid crystal display device or an electrophoretic display device can be configured. In these display devices, the allowable value of voltage fluctuation is smaller than before, or the pixel capacitance is increased by reducing the film thickness of the liquid crystal layer, or a ferroelectric liquid crystal having spontaneous polarization is applied. Thus, even when the responsiveness is improved, high-quality display performance can be maintained constant.

  Hereinafter, although the matrix type display device of the present invention will be described in detail, the present invention is not limited to the form of the drawings or the following embodiments.

[Matrix type display device]
1, FIG. 2 and FIG. 5 (hereinafter referred to as “FIG. 1 etc.”) are schematic sectional views showing examples of single pixel regions of the matrix type display device of the present invention. 3 is a schematic plan view showing an example of a single pixel region of the matrix display device of the present invention, and FIG. 4 is a schematic diagram of an equivalent circuit diagram of a single pixel of the matrix display device of the present invention. Here, the matrix display devices 60A and 60B shown in FIGS. 1 and 2 are embodiments showing a liquid crystal display device in which a liquid crystal layer is adopted as the light control layer 30, and the matrix display device 60C shown in FIG. These are embodiments showing an electrophoretic display device in which a microcapsule electrophoretic layer is employed as the light control layer 30 ′. In the following description, the matrix display devices 60A, 60B, and 60C are collectively denoted by reference numeral 60.

  As shown in FIG. 1 and the like, the matrix display device 60 of the present invention includes a first substrate 10, a second substrate 20, and a light control layer 30 provided between the first substrate 10 and the second substrate 20. And have. In FIG. 1 etc., the code | symbol 50 represents a polarizing plate, a backlight, etc. in case the matrix type display apparatus 60 of this invention is a liquid crystal display device.

  The first substrate 10 is a substrate having a base substrate 4 and pixel forming portions 11 and switching element portions 12 provided in the in-plane direction on the base substrate 4. The pixel forming portion 11 and the switching element portion 12 are provided in each single pixel. In the matrix type display device 60 of the present invention, the first substrate 10 has two types (the first substrate 10A according to the first embodiment shown in FIG. 1 and the first substrate 10B according to the second embodiment shown in FIG. 2). ). In the following description, the first substrate 10A according to the first embodiment and the first substrate 10B according to the second embodiment are collectively denoted by reference numeral 10.

As shown in FIG. 1, the first substrate 10 </ b> A according to the first embodiment covers a pixel electrode 1 formed in a predetermined area on the base substrate 4 and a part of the pixel electrode 1 in the pixel forming unit 11. And a reference electrode 3 formed on the insulating film 2 and formed so that the area of the overlapping portion with the pixel electrode 1 in plan view is B. It has become. In the first substrate 10A according to the first embodiment, in each pixel unit, the overlapping portion (area B) in plan view between the pixel electrode 1 and the reference electrode 3 having the area B constitutes the storage capacitor _CST . When the area obtained by subtracting the area B of the overlapping portion from the area of the pixel electrode 1 is defined as A, the overlapping portion (area in plan view) of the pixel electrode 1 having the area A and the counter electrode 21 described later. A) is characterized in that it constitutes the pixel capacitance _CLC .

On the other hand, as shown in FIG. 2, the first substrate 10 </ b> B according to the second embodiment has a base in the pixel forming portion 11 so that the area of the overlapping portion with the pixel electrode 1 to be formed later is C. A second reference electrode 13 formed on the substrate 4, a second insulating film 14 formed so as to cover the second reference electrode 13, a pixel electrode 1 formed on the second insulating film 14, and a pixel electrode A first insulating film 2 formed so as to cover a part of the first insulating film 2 and a first insulating film 2 formed on the first insulating film 2 so that an area of an overlapping portion with the pixel electrode 1 in a plan view is B; The structure has at least one reference electrode 3. In the first substrate 10B according to the second embodiment, in each pixel unit, the overlapping portion (area B) in plan view between the pixel electrode 1 and the first reference electrode 3 having the area B is the first storage capacitor. C _ST1 is formed, the overlapping portion (area C) in plan view of the pixel electrode 1 and the second reference electrode 13 forms the second storage capacitor C _ST2, and the area obtained by subtracting the area B from the area of the pixel electrode 1 Is a characteristic that the overlapping portion (area A) in plan view of the pixel electrode 1 and the counter electrode 21 having the area A constitutes the pixel capacitor _CLC .

  The second substrate 20 is formed on the transparent substrate 22 and on the entire surface or a part of the transparent substrate 22 so as to face the pixel electrode 1 provided on the first substrate 10 according to the first to second embodiments. And a counter electrode 21 formed to face the pixel electrode 1. Further, the light control layer 30 is provided between the first substrate 10 and the second substrate 20 according to the first and second embodiments so as to be sandwiched between the two substrates, and the pixel electrode 1 and the counter electrode 21. The optical characteristics are changed by applying a voltage between the two.

In the present invention, in the matrix type display device 60A provided with the first substrate 10A according to the first embodiment, as shown in FIG. 1, an insulating film is formed on the pixel electrode 1 (on the counter electrode 21 side) in each pixel unit. 2, the reference electrode 3 having the same potential as that of the counter electrode 21 is formed, so that the overlapping portion (area B) in plan view of the pixel electrode 1 and the reference electrode 3 does not constitute the pixel capacitor C _LC. A storage capacitor _CST is configured. An overlapping portion (area A) in plan view of the pixel electrode 1 having the area A obtained by subtracting the area B from the area of the pixel electrode 1 and the counter electrode 21 formed on the second substrate 20 is a pixel. Construct capacity _CLC . In such a configuration, the area of the overlapping portion in plan view between the pixel electrode and a reference electrode (having the same potential as the counter electrode) provided below the pixel electrode 1 (on the side of the base substrate 4) via an insulating film. When C (see the conventional example in FIG. 6) is formed with the same area as the area B according to the present invention, in other words, since the reference electrode uses an optically opaque metal electrode, Compared with the case where the aperture ratio due to the absence of light transmission is the same, the matrix type display device according to the first embodiment of the present invention can relatively reduce the pixel capacitance _CLC . As a result, the holding capacitor _{C ST} and the relative ratio of the pixel capacitance _{C LC (C ST / C LC} ) and can be larger than conventional, the holding capacitor _{C ST} relatively large charge to the pixel capacitance _{C LC} It is possible to store in.

On the other hand, in the matrix display device 60B including the first substrate 10B according to the second embodiment, as shown in FIG. 2, the first insulating film is formed on the pixel electrode 1 (on the counter electrode 21 side) in each pixel unit. Since the first reference electrode 3 having the same potential as the counter electrode 21 is formed via 2, the overlapping portion (area B) in plan view between the pixel electrode 1 and the first reference electrode 3 having the area B is a pixel. constituting the first storage capacitor _{C ST1} without forming the capacitor _{C LC.} An overlapping portion (area A) in plan view of the pixel electrode 1 having an area A obtained by subtracting the area B from the area of the pixel electrode 1 and the counter electrode 21 formed on the second substrate 20 is a pixel capacitance C. Configure _LC . Further, in the second embodiment, in each pixel unit, the second reference electrode 13 (the same potential as the counter electrode 21) provided below the pixel electrode 1 (on the base substrate 4 side) via the second insulating film 14 is used. And the overlapping portion (area C) in plan view with the pixel electrode 1 constitutes the second storage capacitor _CST2 .

Such a configuration of the second mode is a plan view of a pixel electrode and a reference electrode (having the same potential as the counter electrode) provided via an insulating film only under the pixel electrode 1 (on the base substrate 4 side). Than the case where the overlapping portion (area C) is used as the storage capacitor (see the conventional example of FIG. 6), the two storage capacitors including the first storage capacitor _CST1 and the second storage capacitor _CST2 can be configured. The relative ratio [(C _ST1 + C _ST2 ) / C _LC ] between the storage capacitor and the pixel capacitor can be made larger than the conventional one. As a result, it is possible to set aside a relatively large charge in the storage capacitor _{C ST (C ST1 + C ST2} ) with respect to the pixel capacitance _{C LC,} for example, the size of the variation of the pixel voltage occurs easily dielectric anisotropy Even in a liquid crystal display device or an electrophoretic display device using a liquid crystal or a ferroelectric liquid crystal having spontaneous polarization, the holding capacitance C _ST (C _ST1 + C _ST2 ) which is relatively larger than the conventional one is used. The fluctuation of the pixel voltage can be suppressed, and the display performance can be kept constant by driving the light control layer made of liquid crystal or the like with a predetermined voltage.

  Hereinafter, each configuration of the matrix display device 60 of the present invention will be described in detail. The first substrate 10A according to the first embodiment and the first substrate 10B according to the second embodiment will be described in order.

(First substrate according to the first embodiment)
As shown in FIG. 1, the first substrate 10 </ b> A according to the first embodiment has a large number of single pixels provided regularly in the in-plane direction on the base substrate 4. In FIG. 1, a single pixel including a switching element unit 12 and a pixel formation unit 11 is shown.

  As the base substrate 4, a substrate generally used as a base substrate of a liquid crystal display device or an electrophoretic display device can be used, and it may be an organic substrate or an inorganic substrate. When the matrix display device 60 of the present invention is a liquid crystal display device, a polarizing plate, a backlight, etc. 50 are usually provided on the base substrate surface opposite to the side on which the light control layer 30 (liquid crystal layer) is provided. Therefore, the base substrate 4 is preferably transparent or translucent so that light from the backlight 50 or the like can be transmitted. On the other hand, when the matrix display device 60 of the present invention is an electrophoretic display device, the base substrate 4 does not necessarily need to be transparent or translucent, and may be opaque.

  Examples of organic substrates include polyethersulfone (PES), polyethylene naphthalate (PEN), polyamide, polybutylene terephthalate, polyethylene terephthalate, polyphenylene sulfide, polyether ether ketone, liquid crystal polymer, fluororesin, polycarbonate, and polynorbornene. An organic substrate made of resin, polysulfone, polyarylate, polyamideimide, polyetherimide, polyimide, or the like, or a composite substrate thereof can be given. Such an organic substrate may have rigidity, or may be a thin flexible film having a thickness of about 5 μm to 300 μm. The use of a flexible substrate makes it possible to make a liquid crystal display device or an electrophoretic display device having TFTs flexible. Moreover, as an inorganic substrate, a glass substrate, a silicon substrate, a ceramic substrate etc. can be mentioned, for example. As the glass substrate, borosilicate glass having a small alkali element such as Na can be used, and the thickness thereof can be about 0.05 mm to 3.0 mm for liquid crystal displays. .

  The switching element unit 12 is provided together with the pixel forming unit 11 in each single pixel constituting the matrix display device 60. In FIG. 1, the switching element portion 12 is provided with a TFT having a bottom gate / top contact structure as shown in FIG. On the other hand, the reference electrode 3 and the pixel electrode 1 are formed in a predetermined size in the pixel forming portion 11. Specifically, as will be described later, the pixel forming unit 11 includes a pixel electrode 1 on a pixel electrode 1 having a predetermined area formed on the base substrate 4 and an insulating film 2 covering a part of the pixel electrode 1. And the reference electrode 3 formed so that the area of the overlapping portion in plan view is B. Therefore, since the reference electrode 3 is provided on the insulating film 2 formed on a part of the pixel electrode 1, the reference electrode 3 is formed with a smaller area than a part of the pixel electrode 1.

The gate electrode 5 is formed on the base substrate 4. As a material for forming the gate electrode 5, a metal such as aluminum, titanium, copper, gold, platinum, chromium, palladium, indium, molybdenum, nickel or an alloy such as MoW, ITO (indium tin oxide), indium oxide, IZO Examples thereof include transparent conductive materials such as (indium zinc oxide), SnO ₂ , and ZnO. As can be seen from FIG. 3, since the gate electrode 5 is often formed simultaneously with the scanning line 41, a highly conductive metal or alloy is preferably used. The gate electrode 5 may be formed as a single layer, or may be a stack of different layers.

  The gate electrode 5 can be formed by existing thin film forming means such as vapor deposition and sputtering and patterning means. For example, it can be formed by means including sputtering film formation, mask exposure, development, etching, etc. (referred to as “PEP means” (Photolithography and Etching Process); hereinafter the same). The thickness of the gate electrode 5 is preferably about 30 nm to 200 nm, although it depends on the conductivity of the material. A preferable lower limit of the thickness of the gate electrode 5 is selected from the above range depending on the conductivity of the electrode material and the adhesion strength with the base substrate 4. The upper limit of the thickness of the gate electrode 5 is that the insulating film 2 at the step portion between the base substrate 4 and the gate electrode 5 when the insulating film 2 (including the gate insulating film), the source electrode 7 and the drain electrode 8 described later are provided. A preferable value is selected from the above range in consideration that the insulation coating by is sufficient and the electrode pattern formed thereon is not broken. In particular, when the base substrate 4 having flexibility is used, it is necessary to consider the balance of stress.

As shown in FIG. 1, the pixel electrode 1 is provided on the base substrate 4 to constitute a pixel forming portion 11 of each single pixel. The pixel electrode 1 is a pattern electrode formed with a predetermined area. By applying a voltage to a counter electrode 21 included in a second substrate 20 described later, the light control layer 30 (for example, a liquid crystal layer or an electric electrode). It acts to change the optical properties of the electrophoresis layer. When the matrix type display device of the present invention is a liquid crystal display device 60A provided with a liquid crystal layer (see FIG. 1), the formation material of the pixel electrode 1 is ITO (indium tin oxide), indium oxide, IZO (indium). Zinc oxide), transparent conductive materials such as SnO ₂ and ZnO can be preferably mentioned. On the other hand, when the matrix display device of the present invention is an electrophoretic display device 60C having an electrophoretic layer (see FIG. 5), the pixel electrode 1 is formed of the same transparent conductive material as described above. Alternatively, it may be an opaque metal material or alloy material. Examples of the metal material or alloy material herein include metals such as aluminum, titanium, copper, gold, platinum, chromium, palladium, indium, molybdenum, and nickel, and alloys such as MoW.

  The pixel electrode 1 can be formed by existing thin film forming means such as vapor deposition and sputtering and patterning means, like the gate electrode 5, the source electrode 7, and the drain electrode 8 described above. The thickness of the pixel electrode 1 varies depending on the material of the pixel electrode 1, but is 50 nm to 300 nm in the case of normal ITO. The pixel electrode 1 may be formed before the source electrode 7 and the drain electrode 8 are formed (see FIG. 1), or may be formed after the source electrode 7 and the drain electrode 8 are formed. Good. As shown in FIGS. 1 to 3, the pixel electrode 1 is normally connected to the drain electrode 8. The base substrate 4 before forming the gate electrode 5 and the pixel electrode 1 has a barrier layer for preventing diffusion of impurities and gas permeation from the substrate, an undercoat layer for improving adhesion, and the like. May be provided.

The insulating film 2 is formed so as to cover the gate electrode 5 and part of the pixel electrode 1. The insulating film 2 covering the gate electrode 5 and the insulating film 2 covering a part of the pixel electrode 1 may be made of the same material formed at the same time, or made of the same or different materials formed separately. It may be a thing. A portion of the insulating film 2 covering the gate electrode 5 functions as a so-called gate insulating film. On the other hand, the insulating film 2 covering a part of the pixel electrode 1 functions as a capacitance component by forming the reference electrode 3 on the insulating film 2 thereafter. Examples of the material for forming such an insulating film 2 include inorganic materials such as SiO ₂ , SiN _x , A1 ₂ O ₃ , polychloropyrene, polyethylene terephthalate, polyoxymethylene, polyvinyl chloride, polyvinylidene fluoride, cyanoethyl pullulan, polymethyl methacrylate, It can be formed of organic materials such as polysulfone, polycarbonate, polyimide, or a resist material that is generally used. The insulating film 2 made of an inorganic material can be formed by CVD or sputtering, and the insulating film 2 made of an organic material can be formed by various coating methods such as spin coating.

The thickness of the insulating film 2 is preferably as thin as possible, but from the viewpoint of the gate insulating film constituting the TFT, if it is too thin, the leakage current between the source electrode 7-drain electrode 8 and the gate electrode 5 increases, and the ON The device may have a low / OFF ratio. Therefore, the thickness of the insulating film 2 is usually preferably about 20 nm to 500 nm. On the other hand, from the viewpoint of forming the storage capacitor _CST by providing the insulating film 2 on a part of the pixel electrode 1, the storage capacitor _CST becomes small if it is too thick, and the leakage current between the electrodes increases if it is too thin. In general, it is preferably about 30 nm to 300 nm because it does not function as a capacitor. Therefore, taking these into consideration, the thickness of the insulating film 2 is preferably 20 nm to 500 nm, and more preferably 30 nm to 300 nm.

The semiconductor film 6 is formed on the gate insulating film 2 located on the gate electrode 5 by PEP means. The type of the semiconductor film 6 is not particularly limited, and various semiconductor materials can be formed by various film forming means. For example, a non-doped amorphous silicon (a-Si) film, a phosphorus-doped n ⁺ a-Si film, After the film is continuously formed by the PECVD method, the pattern can be formed by the PEP means. As another example of the semiconductor film 6, for example, an organic semiconductor material such as pentacene may be formed. Although the thickness of the semiconductor layer 6 is not specifically limited, For example, it forms in 30 nm-about 200 nm. Here, the semiconductor layer 6 is formed before the formation of the source electrode 7 and the drain electrode 8 described later, but the semiconductor layer 6 can also be formed after the formation of the source electrode 7 and the drain electrode 8.

  The source electrode 7 and the drain electrode 8 are patterned on the semiconductor film 6 so as to be spaced apart from each other by a predetermined distance. The source electrode 7 and the drain electrode 8 are usually formed of the same material, but the material is selected according to the type of semiconductor material. For example, when the semiconductor film 6 is formed of a p-type semiconductor material, the source electrode 7 and the drain electrode 8 are preferably formed of a metal having a high work function, and the semiconductor film 6 is formed of an n-type semiconductor material. The source electrode 7 and the drain electrode 8 are preferably formed of a metal having a small work function. The reason is that the source electrode 7 and the drain electrode 8 need to be in ohmic contact with the semiconductor film 6. Examples of electrode materials having a high work function include gold, platinum, and transparent conductive films (indium / tin oxide, indium / zinc oxide, etc.). Examples of electrode materials having a low work function include aluminum, calcium, and lithium. And a laminated structure of aluminum and aluminum. Since the source electrode 7 and the drain electrode 8 are often formed at the same time as the signal line 42 as can be seen from FIG. 3, a metal or alloy having good conductivity is preferably used. In FIG. 1, the drain electrode 8 is electrically connected to the pixel electrode 1.

For the source electrode 7 and the drain electrode 8, for example, a mask designed to have a channel length of 5 μm and a channel width of 50 μm is used, and for example, a sputtering method or an electron beam (EB) deposition method so Can be formed. In addition, when forming the source electrode 7 and the drain electrode 8 on the insulating film 2, for the purpose of preventing contamination of the surface of the insulating film 2, an inorganic material such as SiO ₂ , SiN _x , Al ₂ O ₃ , An interlayer insulating film (not shown) having a thickness of about 30 nm made of an organic material such as polychloropyrene, polyethylene terephthalate, polyoxymethylene, polyvinyl chloride, polyvinylidene fluoride, cyanoethyl pullulan, polymethyl methacrylate, polysulfone, polycarbonate, polyimide is provided. Also good.

The reference electrode 3 is a pattern electrode formed on the insulating film 21 provided on a part of the pixel electrode 1 with an area smaller than the area of the insulating film 2. As shown in FIG. 4, the reference electrode 3 is formed to have the same potential as a counter electrode 21 described later, and the storage capacitor C _ST (pixel capacitance C) is formed by the pixel electrode 1 and the reference electrode 3 sandwiching the insulating film 2. _This is a capacity in parallel with _LC . See FIG. The material for forming the reference electrode 3 may be formed of the same material as that of the source electrode 7 and the drain electrode 8 described above, or may be formed of a different material. When the reference electrode 3 is formed of the same material, it is preferable because the source electrode 7, the drain electrode 8, and the reference electrode 3 can be formed in one step. On the other hand, when the material of the reference electrode 3 is different from the material of the source electrode 7 and the drain electrode 8, for example, the reference electrode 3 is formed of a transparent conductive material, and the source electrode 7 and the drain electrode 8 are formed of a metal material or an alloy material. If so, they are formed in separate steps. In this case, the formation order of these electrodes is not ask | required.

  In the present invention, the reference electrode 3 is formed in a conventional area, that is, the area C of the reference electrode 2 is about 10% to about 30% with respect to the area A of the pixel electrode 1.

As shown in FIG. 1, an insulating film 2 is formed under the reference electrode 3, and a pixel electrode 1 is formed under the insulating film 2. Accordingly, the laminated structure consisting of a reference electrode 3 / insulating film 2 / pixel electrode 1 constitutes a storage capacitor C _ST, the size of the storage capacitor C _ST is overlapped portion in plan view and the reference electrode 3 and the pixel electrode 1 The area B is specified. Since the reference electrode 3 has the same potential as the counter electrode 21 included in the second substrate 20, the stacked structure including the reference electrode 3 / the light control layer 30 / the counter electrode 21 does not form a pixel capacitor. Therefore, when the area obtained by subtracting the area B of the overlapped portion from the area of the pixel electrode 1 is A (see FIG. 1), the pixel electrode 1 having the area A and the counter electrode formed on the second substrate 20 are opposed to each other. The overlapping portion in plan view with the electrode 21 constitutes the pixel capacitor _CLC .

The protective film 9 is provided mainly to prevent oxidation of the semiconductor film 6 and is provided so as to cover the TFT as shown in FIG. The general protective film 9 is a film having an oxygen barrier property and a water vapor barrier property, and examples thereof include a thin film made of SiO ₂ , SiN or the like and having a thickness of about 20 nm to 2000 nm. The protective film 9 can be formed by sputtering or the like.

  Note that the protective film 9 is not provided on the pixel electrode 1. When the matrix type display device of the present invention is a liquid crystal display device 60A, a liquid crystal alignment film 15 is usually provided on the pixel electrode 1 and the reference electrode 3 (see FIG. 1). Examples of the material for forming the liquid crystal alignment film 15 include organic materials such as polyimide, and examples of the film forming method include a spin coating method. On the other hand, when the matrix display device of the present invention is an electrophoretic display device 60C (see FIG. 5), an electrode protective layer 15 'is usually provided on the pixel electrode 1 and the reference electrode 3. Examples of the material for forming the electrode protective layer 15 ′ include organic materials such as PMMA, and examples of the film forming method include a spin coating method.

(First substrate according to the second embodiment)
As shown in FIG. 2, the first substrate 10 </ b> B according to the second embodiment is a second reference electrode having the same potential as the counter electrode 21 via the second insulating film 14 below the pixel electrode 1 (on the base substrate 4 side). 13 is different from the first substrate 10A according to the first embodiment in that 13 is formed, but is otherwise the same as the first substrate 10A according to the first embodiment. In the following, the constituent elements denoted by the same reference numerals as those of the first substrate 10A according to the first embodiment are the same as those in the first embodiment, and therefore the description thereof is minimized.

That is, in the first substrate 10B shown in FIG. 2, the second reference electrode 13 having a predetermined pattern is formed on the base substrate 4 simultaneously with the patterning of the gate electrode 5 or before and after the gate electrode 5 is patterned. Form. The second reference electrode 13 is formed with an area C. The second reference electrode 13 forms a second storage capacitor _CST2 together with the second insulating film 14 and the pixel electrode 1, and the reference electrode 3 (referred to as the first reference electrode 3 in the first substrate 10B) and the first insulating film 2. And the first storage capacitor _CST1 configured by the pixel electrode 1 are complemented. By providing such a second storage capacitor _{C ST2,} the holding capacitor _{C ST} that first substrate 10B according to the second embodiment has is _"C ST1 _{+ C ST2".} Therefore, the ratio of the storage capacitor C _ST (C _ST1 + C _ST2 ) to the pixel capacitor C _LC can be relatively increased as compared with the first substrate 10A according to the first embodiment.

Similar to the gate electrode 5, the second reference electrode 13 is a pattern electrode formed on the base substrate 4 with a predetermined area. In the present application, the area of the portion where the reference electrode 13 and the pixel electrode 1 overlap in plan view is represented by area C. Similar to the reference electrode 3 (first reference electrode 3), the second reference electrode 13 is formed to have the same potential as the counter electrode 21 described later, as shown in FIG. A second storage capacitor C _ST2 (capacitance in parallel with the pixel capacitor C _LC , see the broken line portion in FIG. 4) is formed between the sandwiched pixel electrodes 1. The material for forming the second reference electrode 13 may be the same material as the gate electrode 5 or a different material. When the second reference electrode 13 is formed of the same material, it is preferable because the gate electrode 5 and the second reference electrode 13 can be formed in one step. On the other hand, when the material of the second reference electrode 13 and the material of the gate electrode 5 are different, for example, when the second reference electrode 13 is formed of a transparent conductive material and the gate electrode 5 is formed of a metal material or an alloy material, Each is formed in a separate process. In this case, the formation order of both electrodes is not ask | required. The base substrate 4 before the gate electrode 5 and the second reference electrode 13 are formed has a barrier layer for preventing impurity diffusion and gas permeation from the substrate, and an undercoat for improving adhesion. A layer or the like may be provided.

In the second embodiment, the second insulating film 14 is formed on the second reference electrode 13, and the pixel electrode 1 is further formed on the second insulating film 14. That is, the second reference electrode 13 is formed so as to face the pixel electrode 1 with the second insulating film 14 interposed therebetween, and such a laminated structure constitutes a storage capacitor _CST2 in each single pixel. The size of the second reference electrode 13 is important in relation to the size of the second storage capacitor _CST2 .

For example, as shown in FIG. 2, the area C is formed smaller than the area B that defines the size of the first storage capacitor _CST1 including the first reference electrode 3, the first insulating film 2, and the pixel electrode 1. In addition, it may be formed so as to be hidden under it. In this case, the second storage capacitor C _ST2 acts to complement the first storage capacitor C _ST1 . On the other hand, the area C may be formed larger than the area B. In this case, the first holding capacitor C _ST1 acts to complement the second holding capacitor C _ST2 . Note that even if the storage capacitor C _ST is the same (C _ST1 + C _ST2 ), if the area C is larger than the area B, the area A becomes relatively large, so the ratio of the pixel capacitance C _{LC to} the storage capacitor C _ST Is relatively small, but the area A that is the drive region of the light control layer 30 is large, so that the so-called aperture ratio can be improved. In this way, by adjusting the size of the second reference electrode 13 and the first reference electrode 3, the degree of freedom in adjusting the storage capacitor and the aperture ratio is further improved as compared with the first substrate 10A according to the first embodiment. Can be made.

  In the case where the area C is larger than the area B (not shown), if the second reference electrode 13 is formed of a transparent conductive material that does not hinder light transmission, a backlight or the like 50 is provided to provide a liquid crystal layer (light control). It is also possible to increase the aperture ratio of the pixel portion 11 that drives the layer 30).

As shown in FIG. 2, the second insulating film 14 is formed on the second reference electrode 13. However, the second insulating film 14 may be formed so as to cover the gate electrode 5 at the same time. The second insulating film 14 on the gate electrode 5 functions as a so-called gate insulating film. On the other hand, the portion of the second insulating film 14 covering the second reference electrode 13 functions as a capacitance component (retention capacitance C _ST2 ) by forming the pixel electrode 1 thereafter. Since the material, film forming method, thickness, and the like of the second insulating film 14 can be the same as those of the insulating film 2 described above, the description thereof is omitted here.

  On the second insulating film 14, the semiconductor film 6, the source electrode 7, and the drain electrode 8 are formed in this order. Since the semiconductor film 6 and the source electrode 7 and drain electrode 8 are formed of the same material, film forming method, thickness, and the like, the description thereof is omitted here.

  The pixel electrode 1 is formed on the second insulating film 14 so as to be connected to the drain electrode 8. The difference between the first substrate 10B according to the second embodiment and the first substrate 10A according to the first embodiment is that the pixel electrode 1 constituting the first substrate 10B is formed on the second insulating film 14. In contrast, the pixel electrode 1 constituting the first substrate 10 </ b> A is formed on the base substrate 4. In the first substrate 10B according to the second embodiment, a first insulating film 2 (simply represented by “insulating film 2” in the first embodiment) formed on the pixel electrode 1 and the first insulating film 2 are formed. The first reference electrode 3 (simply referred to as “reference electrode 3” in the first embodiment) provided on the liquid crystal and the liquid crystal alignment film 15 provided on the pixel electrode 1 and the first reference electrode 3 are related to the first embodiment. Since it is the same as that of the first substrate 10A, the same reference numerals are used here and the description thereof is omitted. The protective film provided in the TFT section 12 is the same as that in the first embodiment.

FIG. 3 is a schematic plan view showing an example of a single pixel region. As shown in the figure, the opening region of the pixel includes a scanning line 41, a signal line 42, a switching element portion 12 (TFT portion), and the like. It can be seen that this is a region where the pixel electrode 1 is formed, except where is formed. The scanning line 41 is a wiring extending in the horizontal direction of the matrix type display device in order to apply a voltage to the gate electrode 5, and is also called a gate line. Usually, the scanning line 41 and the gate electrode 5 are formed simultaneously. On the other hand, the signal line 42 is a wiring extending in the vertical direction of the matrix type display device in order to apply a data signal to the source electrode 7 and the drain electrode 8. Usually, the signal line 42, the source electrode 7, the drain electrode 8, Are formed simultaneously. The pixel electrode 1 is formed on almost the entire surface of the pixel forming portion 11 for each pixel. On the other hand, the reference electrode 3 is provided as a common electrode so as to traverse each pixel in the horizontal direction. An area B in FIG. 3 is an area of an overlapping portion between the pixel electrode 1 and the reference electrode 3. This area B, since the reference electrode 3 is in the same potential as the counter electrode 21, not the pixel capacitance C _LC, forming the holding capacitor C _ST. An area A in FIG. 3 is an area obtained by subtracting the above-described overlapping area B from the area of the pixel electrode 1 and constitutes a pixel capacitor _CLC .

(Second board)
The second substrate 20 is provided with a counter electrode 21 so as to face the pixel electrode 1 and the reference electrode 3 (the first reference electrode 3 in the second embodiment) of the first substrate 10. More specifically, as shown in FIG. 1 and the like, the second substrate 20 is formed in a predetermined pattern on the transparent substrate 22 and one surface (surface on the light control layer 30 side) of the transparent substrate 22. A colored layer 23 and a black matrix layer 24, a transparent protective film 25 formed on the colored layer 23 and the black matrix layer 24, and a counter electrode 21 formed on the entire surface or a part of the transparent protective film 25. A color filter substrate. In the case of a monochrome display or a field sequential display that does not use a color filter, it is not necessary to form a color filter, and only the counter electrode 21 is required. Although not shown, a polarizing plate is usually provided on the other surface of the second substrate 20 (the surface opposite to the surface on the light control layer 30 side). Some light absorption axes of the polarizing plate and the polarizing plate provided on the first substrate 10 are arranged orthogonal to each other.

  Since the transparent substrate 22 is a substrate provided on the viewer side of the matrix type display device 60 of the present invention, it is desirable that the transparent substrate 22 be a highly transparent substrate. Usually, a highly transparent glass substrate or quartz substrate having a thickness of about 0.5 mm to 1.1 mm, or a highly transparent plastic substrate having a thickness of about 0.05 mm to 0.2 mm is used. Examples of such a plastic substrate include polycarbonate and polyethersulfone.

  The colored layer 23 is a layer of a predetermined color formed on the transparent substrate 22, and a colored pattern of R (red), G (green), or B (blue) is formed for each pixel. . The colored layer 23 contains a resin material constituting the main component and a material made of a colored component, and further contains additive materials such as a dispersant and an initiator as necessary. Examples of the material constituting the main component include polyimide resin, polyvinyl alcohol, and acrylic resin, and examples of the material composed of the coloring component include organic pigments and dyes such as azo lake and quinacridone.

  The black matrix layer 24 is a layer provided to shield leaked light, and is provided in a predetermined pattern in the in-plane direction of the transparent substrate 22. Usually, the first substrate 10 is provided at a position facing the switching element portion 12. The black matrix layer 24 is formed of a metal thin film such as chromium, or a resin layer such as a polyimide resin, an acrylic resin, or an epoxy resin containing light shielding particles such as carbon fine particles or a black pigment. In the matrix display device 60 of the present invention, the black matrix layer 24 may not be formed.

  The transparent protective film 25 is provided on the colored layer 23 in order to prevent fading of pigments and dyes contained in the colored layer 23 from active components in the air and active components contained in the adhesive used for bonding. Further, the surface on the side in contact with the liquid crystal layer or the electrophoretic layer that is the light control layer 30 is flattened, and the components contained in the colored layer 23 are eluted to prevent the light control layer 30 from being adversely affected. Sometimes provided. As such a transparent protective film 25, an organic substance capable of causing a polymerization reaction and a crosslinking reaction can be preferably used. Specific examples include a (meth) acrylate group-containing compound having an unsaturated double bond group, an epoxy group-containing compound, a urethane group-containing compound.

  The counter electrode 21 is an electrode facing the pixel electrode 1 of the first substrate 10, and is usually formed on the entire surface of the second substrate 20, but is formed on a part of the second substrate 20 in a predetermined pattern. May be. In the case of forming with a predetermined pattern, it is formed with an area larger than the pixel electrode 1 of the first substrate 10 in consideration of the aperture ratio, the ease of alignment between the first substrate 10 and the second substrate 20, and the like. It is preferable that When the light control layer 30 is a liquid crystal layer, the counter electrode 21 applies a voltage to the liquid crystal layer together with the pixel electrode 1 to drive the liquid crystal to change the optical characteristics. On the other hand, when the light control layer 30 is an electrophoretic layer, a voltage is applied to the electrophoretic layer together with the pixel electrode 1 to move the electrophoretic particles in, for example, the microcapsule to change the optical characteristics.

As a material for forming the counter electrode 21, a transparent electrode such as ITO is preferably used, and a pattern can be formed in a predetermined area B by an existing thin film forming means such as vapor deposition or sputtering and a patterning means. The thickness of the counter electrode 21 is 50 nm to 300 nm in the case of normal ITO, although it varies depending on the forming material. Since the counter electrode 21 is formed to have the same potential as the reference electrode 3, the area of the reference electrode 3 is determined from the area of the pixel electrode 1 in the portion where the counter electrode 21 and the pixel electrode 1 are opposed to each other. A region of area A minus area B constitutes pixel capacitor _CLC, and a region of area B where counter electrode 21 and reference electrode 3 overlap in plan view constitutes storage capacitor _CST .

(Light control layer)
Examples of the light control layer 30 include a liquid crystal layer and an electrophoretic layer. These layers are provided between the pixel electrode 1 provided on the first substrate 10 and the counter electrode 21 provided on the second substrate 20, and the optical characteristics are changed by applying a voltage between the two electrodes. To do.

  The liquid crystal layer can be formed of various known liquid crystal materials, and can be arbitrarily selected from, for example, a smectic liquid crystal, a nematic liquid crystal, and a costic liquid crystal. The electrophoretic layer may be a so-called microcapsule electrophoretic electrophoretic layer or a so-called twisted ball (zilicon bead) electrophoretic layer. In the former (microcapsule type) electrophoretic layer, as shown in FIG. 5, when a voltage is applied between both electrodes, black particles and white particles in the microcapsule 31 move depending on the polarity of the voltage. , Display performance. In the latter (twist ball type) electrophoretic layer, when a voltage is applied between both electrodes, the spherical fine particles with the hemisphere painted in black and white rotate depending on the polarity of the voltage, and display performance is exhibited. To do.

  Note that a spacer (not shown) is usually provided between the substrates 10 and 20 in order to make the light control layer 30 have a predetermined thickness while keeping the first substrate 10 and the second substrate 20 at a predetermined interval. . As the spacer, a sheet-like member or particle having the same thickness or particle size as the desired interval is used.

(Area of each electrode)
As shown in FIGS. 1 and 5, the matrix type display devices 60A and 60C according to the first embodiment of the present invention have an area B [plan view of the area of the pixel electrode 1 and the area of the reference electrode 3 in each unit pixel. The ratio (B / A) of the area of [overlapping part in] and area A [area obtained by subtracting the above-described overlapping part area B from the area of the pixel electrode 1] is 0.1 / 0.9 or more and 0.7 / It is preferably within a range of less than 0.3.

If the ratio of the area B to the area A (B / A) is within the above range, the area B constituting the storage capacitor _CST is sufficiently secured, so the area A constituting the pixel capacitor _CLC is reduced. It is preferable in terms of the relationship between a decrease in aperture ratio due to being too high and an improvement in display performance. That is, in the B / A is less than 0.1 / 0.9, not very different from the traditional since the holding capacitor _{C ST} is too relatively small with respect to the pixel capacitance _{C LC,} relative to the pixel capacitance _{C LC} Large charges cannot be stored in the storage capacitor _CST . As a result, for example, in a liquid crystal display device or an electrophoretic display device using a liquid crystal with a large dielectric anisotropy that is likely to fluctuate in pixel voltage or using a ferroelectric liquid crystal having spontaneous polarization, the storage capacitor C _ST As a result, the fluctuation of the pixel voltage cannot be sufficiently suppressed, and it may be insufficient to drive the light control layer 30 made of liquid crystal or the like with a predetermined voltage to keep the display performance constant. On the other hand, when B / A is 0.7 / 0.3 or more, the area B constituting the storage capacitor _CST becomes too large, and as a result, the area A that can drive the light control layer 30 becomes small and the aperture is opened. There is a drawback that the rate decreases. In view of the effect on the loss of the aperture ratio and the storage capacity, it is particularly preferable that B / A is in the range of 0.2 / 0.8 or more and 0.5 / 0.5 or less.

In the matrix type display device 60 of the present invention, as described above, the storage capacitor C _{ST with} respect to the pixel capacitor C _LC is adjusted by adjusting the sizes of the areas A, B, and in the second embodiment, the area C. Can be made relatively large. In the following, a case where a large storage capacitor _CST is required will be described by taking the light control layer 30 as a liquid crystal layer and taking the case of the first embodiment as an example. The same applies to the case.

As a case where a large storage capacitor _CST is necessary, [Case 1] When the liquid crystal has a large spontaneous polarization (for example, when the liquid crystal is a ferroelectric liquid crystal, Japanese Patent Laid-Open No. 2000-122043 and the Journal of the Korean Physical Society , Vol. 42, April, pp. S1391 to S1394 (2003).), [Case 2] Two cases can be illustrated when the liquid crystal has a large dielectric anisotropy. In any of these cases, the apparent dielectric constant (the amount of charge necessary on the electrode when the liquid crystal has spontaneous polarization) differs between the off state and the on state of the liquid crystal. When such a liquid crystal is driven by a TFT, the response time (response speed) of the liquid crystal is usually slower than the on time of the TFT. Therefore, when the TFT is off (that is, a time during which the amount of charge on the pixel electrode 1 does not change), the liquid crystal changes from the off state to the on state, the dielectric constant changes, or the direction of spontaneous polarization changes. The amount of charge changes. This state is expressed by the following equation. Here, Q is the amount of charge accumulated in the pixel electrode, C is the capacitance of the liquid crystal phase when the liquid crystal is on, C ′ is the capacitance of the liquid crystal layer when the liquid crystal is off, and V is the pixel when the liquid crystal is on. The voltage applied to the capacitor, V ′ is the voltage applied to the pixel capacitor when the liquid crystal is off, and Ps is the spontaneous polarization of the liquid crystal layer.

  [Case 1] Q = C × V = C × V ′ + Ps

  [Case 2] Q = C × V = C ′ × V ′

First, the case 1 will be described in more detail. In the initial state (off state), when the liquid crystal molecules are not aligned and spontaneous polarization does not appear, the voltage V is applied to the pixel electrode during the on-time of the TFT, and then the liquid crystal molecules during the off-time of the TFT. When the voltage V ′ after the response is calculated, the charge Q accumulated in the pixel electrode 1 during the on-time of the TFT is expressed by the following equation. Here, C _LC is the capacitance of the liquid crystal layer, C _ST is the storage capacitor formed in parallel with the liquid crystal layer, Ps is the spontaneous polarization of the liquid crystal layer.

Q = (C _LC + C _ST ) × V

  When the on-time of the TFT ends, the charge Q accumulated on the pixel electrode 1 does not change, but the liquid crystal is aligned with a certain response time, and as a result, spontaneous polarization Ps appears. Therefore, when the voltage at that time is V ′, the charge Q accumulated in the pixel electrode 1 during the off time of the TFT is expressed by the following equation.

Q = (C _LC + C _ST ) × V ′ + Ps

  From these equations, V 'is as follows.

V ′ = V−Ps / (C _LC + C _ST )

Therefore, even if the voltage V is applied, the voltage V ′ of [V−Ps / (C _LC + C _ST )] is finally applied. Therefore, the fluctuation value of the voltage is [−Ps / (C _LC + C _ST )].

The numerical values are calculated using a typical 15-inch XGA display as an example. The pixel area is 300 μm × 100 μm, the aperture ratio is 80%, the dielectric constant of the liquid crystal is εr = 6.8, the cell gap is 1.5 μm, and the driving voltage of the liquid crystal the 5V, 60nC / cm ² to spontaneous polarization, in the example in which the gradation display with 16 gray scale, pixel capacitance _{C LC} and the spontaneous polarization Ps can be calculated as follows. Here, the spontaneous polarization was 60nC / cm ² is, Journal of the Korean Physical Society, Vol.42, April, has been reported in pp.S1391~S1394 (2003), spontaneous 60~70nC / cm ² Based on the value of polarization.

C _LC = 100 × 10 ⁻⁶ × 300 × 10 ⁻⁶ × 0.8 × 6.8 × 8.85 × 10 ⁻¹² /1.5×10 ⁻⁶ = 0.56 pF
Ps = 100 × 10 ⁻⁶ × 300 × 10 ⁻⁶ × 0.8 × 60 × 10 ⁻⁹ × 10000 = 14.4 pC

At this time, the allowable voltage fluctuation ΔV can be calculated as ΔV = 5/16 = 0.31V. Accordingly, the storage capacitor _CST is as follows.

Ps / (C _LC + C _ST ) = 0.31V
C _ST = 46.5 pF

Since the storage capacitor C _ST is composed of a pixel electrode 1 and the reference electrode 3, and .epsilon.r the dielectric constant of the insulating film 2 constituting the holding capacitor C _ST, and the thickness of the insulating film 2, d, .epsilon.r / d is as follows.

46.5 pF = 100 × 10 ⁻⁶ × 300 × 10 ⁻⁶ × 0.8 × εr × 8.85 × 10 ⁻¹² / d
εr / d = 2.2 × 10 ⁸

From the above, for example, it is formed at 60nC / cm ^2, the storage capacitor together with a liquid crystal having a spontaneous polarization _{C ST} for example _{Si x N y (εr = 8} ), d is 36nm, and the leakage current is large, the insulation The film is not a realistic film thickness.

However, in the matrix type display device 60 of the present invention, as described above, the reference electrode 3 is formed on the pixel electrode 1 to reduce the pixel capacitance _CLC , and preferably from the pixel electrode 1 to the reference electrode 3. Since the ratio (B / A) to the area A obtained by subtracting the area B is less than 0.1 / 0.9 and less than 0.7 / 0.3, for example, B / A is set to 0.00. When the area of the pixel electrode 1 is substantially halved at 5 / 0.5 (when the area of the reference electrode 3 forming the storage capacitor _CST is the same), only _CLC and Ps are halved in the above equation. Become. As a result, the storage capacitor _{C ST} to form in _{Si x N y (εr = 8} ), the thickness d of the insulating film 2 may be the above times 72nm, and the realistic thickness. Furthermore, in the second embodiment, since the storage capacitor can be further increased, the thickness of the insulating film can be further increased.

Next, a matrix type display device 60 using a liquid crystal having a large dielectric anisotropy as in the case 2 will be described. In general, it is desirable for the matrix display device 60 that the variation in pixel voltage is as small as possible. However, in the matrix type display device 60 using a liquid crystal having a large dielectric anisotropy, the charge V is injected during the on-time of the TFT, and the voltage V between the pixel electrode and the counter electrode is kept constant. It is but a liquid crystal having a dielectric anisotropy the movement is slow, the pixel capacitance C _LC of the liquid crystal layer by the slow motion is changed to a large value.

Thus, when the pixel capacitance _CLC increases, the drive voltage V becomes smaller than Q (charge: constant) = C _LC (pixel capacitance) · V (drive voltage), and the liquid crystal can only be driven at the reduced voltage V ′. The desired display performance cannot be exhibited. The matrix type display device 60 of the present invention solves such a problem by relatively reducing the area B of the counter electrode 21 and further increasing the area C of the reference electrode 3 so as to maintain the storage capacitor C with respect to the pixel capacitor _CLC . _{Since ST} is relatively large, it is possible to store a sufficient charge as the storage capacitor _CST . As a result, even when a liquid crystal having a large dielectric anisotropy is driven, fluctuations in the pixel voltage can be suppressed and the liquid crystal can be driven at a predetermined voltage V.

Next, the case 2 will be described in more detail. In the initial state (off state), the liquid crystal molecules are aligned in the horizontal direction according to the alignment film. However, the liquid crystal molecules are aligned in the vertical direction when a voltage is applied, and have a different dielectric constant from that in the horizontal direction. It becomes. When the voltage V ′ after the TFT applies the voltage V during the on-time and then the liquid crystal molecules respond during the TFT off-time is calculated, the charge Q accumulated in the pixel electrode 1 during the TFT on-time is expressed by the following equation: become that way. Here, C _LC is the capacitance of the liquid crystal layer, C _ST is a holding capacitance formed in parallel to the liquid crystal layer.

Q = (C _LC + C _ST ) × V

  When the on-time of the TFT ends, the charge on the pixel electrode does not change, but the voltage V ′ changes as follows from the change in the dielectric constant due to the orientation of the liquid crystal molecules.

Q = (C ′ _LC + C _ST ) × V ′

Therefore,
V ′ = (C _LC + C _ST ) / (C ′ _LC + C _ST ) × V,
Here, when the dielectric anisotropy of liquid crystal molecules is Δε,
C ′ _LC = C _LC + ε × Δε × S / d,
Because
V ′ = V− (ε × Δε × S / d) / (C ′ _LC + C _ST ) × V
It becomes.

That is, the voltage fluctuation is [(ε × Δε × S / d) / (C ′ _LC + C _ST ) × V].

  Here, as in the case 1, when the numerical values are calculated using a typical 15-inch XGA display as an example, the pixel area is 300 μm × 100 μm, the aperture ratio is 80%, the dielectric constant ε of the liquid crystal is 6.8, In an example in which the rate anisotropy Δε is 23.6, the cell gap is 1.5 μm, the liquid crystal drive voltage is 5 V, and the display gradation is 16 gradations,

(100 × 10 ⁻⁶ × 300 × 10 ⁻⁶ × 0.8 × 23.6 × 8.85 × 10 ⁻¹² /1.5×10 ⁻⁶ ) / (100 × 10 ⁻⁶ × 300 × 10 ⁻⁶ × 0.8 × (23.6 + 6.8) × 8.85 × 10 ⁻¹² /1.5×10 ⁻⁶ + C _ST ) × 5 = 5/16

C _ST = 49.2 pF

It becomes. Here, as the dielectric anisotropy, a value Δε = 23.6 of a fluoronaphthalene liquid crystal described in DIC Technical Review No. 11/2005, page 29, “Development and Industrialization of Liquid Crystal Material” was adopted.

From the above, for example, be formed by [Delta] [epsilon] = 23.6 dielectric storage capacitor with a liquid crystal having anisotropic _{C ST} for example _{Si x N y (εr = 8} ), d is 34nm, and the leakage current However, it is not a realistic film thickness as an insulating film.

However, even in the case 2, in the matrix display device 60 of the present invention, as described above, the reference electrode 3 is formed on the pixel electrode 1 to reduce the pixel capacitance _CLC , which is preferable. Is smaller so that the ratio (B / A) to the area A obtained by subtracting the area B of the reference electrode 3 from the pixel electrode 1 is in the range of 0.1 / 0.9 or more and less than 0.7 / 0.3. For example, when B / A is 0.5 / 0.5 and the area of the pixel electrode 1 is substantially halved (when the area of the reference electrode 3 forming the storage capacitor _CST is the same), Only _CLC and Ps are halved. As a result, the storage capacitor _{C ST} to form in _{Si x N y (εr = 8} ), the thickness d of the insulating film 2 may be the above times 72nm, and the realistic thickness. Furthermore, in the second embodiment, since the storage capacitor can be further increased, the thickness of the insulating film can be further increased.

As described above, according to the matrix display device 60 of the present invention, as can be seen from the equivalent circuit diagram shown in FIG. 4, the pixel capacitance _CLC can be relatively small, and the holding capacitance _CST and the relative ratio of the pixel capacitance _{C LC} and _(C ST _/ C _LC) can be larger than conventional, it may have been stored in the storage capacitor _{C ST} relatively large charge to the pixel capacitance _{C LC} . As a result, for example, even in a liquid crystal display device or an electrophoretic display device using a liquid crystal with a large dielectric anisotropy that is likely to vary in pixel voltage, the storage capacitor C _ST is relatively larger than the conventional one. The fluctuation of the pixel voltage can be suppressed, and the display performance can be kept constant by driving the light control layer 30 made of liquid crystal or the like with a predetermined voltage.

  In such a matrix display device of the present invention, the light control layer 30 is configured to be a liquid crystal layer or an electrophoretic material layer, thereby further increasing the number of gradations of pixels and improving the responsiveness. A high-quality liquid crystal display device or electrophoretic display device can be configured. In these display devices, the allowable value of voltage fluctuation is smaller than before, or the pixel capacitance is increased by reducing the film thickness of the liquid crystal layer, or a ferroelectric liquid crystal having spontaneous polarization is applied. Thus, even when the responsiveness is improved, high-quality display performance can be maintained constant.

  Hereinafter, the present invention will be described in more detail with reference to Examples and Comparative Examples. In addition, this invention is not limited to a following example.

Example 1
A matrix type display device according to the first embodiment of the embodiment shown in FIG. 1 was produced. First, the first substrate 10A was produced. First, a 600 μm thick glass substrate made of an aluminosilicate non-alkali glass was used as the base substrate 4. A chromium film is formed on the base substrate 4 by DC magnetron sputtering so as to have a thickness of 100 nm, and mask exposure, development, etching, and the like are performed to form a gate electrode 5 having a predetermined pattern on the switching element portion 12. At the same time, a scanning line 41 was formed. Next, an ITO film is formed on the base substrate 4 by DC magnetron sputtering so as to have a thickness of 100 nm, and mask exposure, development, etching, and the like are performed to form a pixel electrode 1 having a predetermined pattern in the pixel formation portion 11. Formed. Next, as shown in FIG. 1, the silicon nitride film has a thickness d: 36 nm so as to cover the gate electrode 5 and a part of the pixel electrode 1 (30% of the area of the pixel electrode 1). The insulating film 2 (including the gate insulating film) having a predetermined pattern was formed in the switching element portion 12 and the pixel forming portion 11 by performing a film formation by PECVD and performing mask exposure, development, etching, and the like. Next, a non-doped amorphous silicon (a-Si) film having a thickness of 200 nm and an n ⁺ a-Si film having a thickness of 50 nm doped with phosphorus are successively formed on the insulating film 2 on the gate electrode 5. A semiconductor film 6 having a predetermined pattern was formed on the switching element portion 12 by sputtering film formation, mask exposure, development, etching, and the like. Next, a chromium film is formed by DC magnetron sputtering so as to have a thickness of 200 nm, and mask exposure, development, etching, and the like are performed to form a source electrode 7 and a drain electrode 8 of a predetermined pattern on the switching element portion 12. In addition, the signal line 42 and the reference electrode 3 were formed. Next, a silicon nitride film was formed by PECVD so as to have a thickness of 50 nm, and mask exposure, development, etching, and the like were performed to form a protective film 25 having a predetermined pattern so as to cover the switching element portion 12. Finally, a polyimide film is formed by spin coating so as to have a thickness of 10 nm, and mask exposure, development, etching, and the like are performed so that the liquid crystal alignment film 15 having a predetermined pattern covers the pixel electrode 1 and the reference electrode 3. Formed in the pixel forming portion 11. Thus, the first substrate 10A having the form shown in FIG. 1 was produced.

  Next, the second substrate 20 was produced. First, a 600 μm thick glass substrate made of an aluminosilicate non-alkali glass was used as the transparent substrate 22. A chromium film is formed on the transparent substrate 22 by a DC magnetron sputtering method so as to have a thickness of 50 nm, and mask exposure, development, etching, and the like are performed to form a black matrix layer 24 having a predetermined pattern on the first substrate 10A. It formed so that it might become a position which opposes the switching element part 12. FIG. Next, a photosensitive colored resin film is similarly formed on the transparent substrate 22 by spin coating so as to have a thickness of 500 nm, and mask exposure, development, etching, and the like are performed to form a colored layer 23 having a predetermined pattern on the pixel. It formed in the position facing the formation part 11. Next, an acrylic polymer was deposited by spin coating so as to cover the black matrix layer 24 and the colored layer 23 to a thickness of 200 nm, and a transparent protective film 25 was formed. Next, an ITO film was formed on the entire surface of the transparent protective film 25 by a DC magnetron sputtering method so as to have a thickness of 150 nm, thereby forming a solid counter electrode 21. Thus, the second substrate 20 was produced.

Next, the obtained first substrate 10 and second substrate 20 are bonded together through a spacer for making them face each other at a predetermined interval, and thereafter, a ferroelectric liquid crystal that is a material having high spontaneous polarization (Chisso Corporation). , CS-1030, Ps = 60 nC / cm ² ) to inject a matrix type display device according to Example 1. About the obtained matrix type display device, area A [area obtained by subtracting the above-described overlapping area B from the area of the pixel electrode 1] and area B [planar view of the area of the pixel electrode 1 and the area of the reference electrode 3] The area of the overlapping portion] is shown in Table 1, and further calculated B / A, pixel capacitance C _LC , holding capacitance C _ST , C _ST / C _LC are also shown in Table 1. In Table 1, d represents the thickness of the silicon nitride film that is an insulating film, Ps represents the spontaneous polarization of the liquid crystal layer, and ΔV represents the voltage fluctuation.

(Examples 2 and 3 and Comparative Examples 1 and 2)
In Example 1, except that the formation pattern of the pixel electrode 1 and the reference electrode 3 was changed to change the areas A and B as shown in Table 1, and the film thickness d of the insulating film 2 was changed. In the same manner as the matrix type display device of Example 1, the matrix type display devices of Examples 2 and 3 and Comparative Example 1 were produced. As for Comparative Example 2, in Example 1, the reference electrode 103 was formed simultaneously with the gate electrode 105 so as to have the configuration of FIG. 6, and the areas A and B of the pixel electrode 101 and the reference electrode 103 were as shown in Table 1. A matrix type display device of Comparative Example 1 was fabricated in the same manner as Example 1 except that this was done. However, the area A given here is using the area of the pixel electrode over the entire surface as an area which constitutes the C _LC. Table 1 shows B / A, pixel capacitance C _LC , retention capacitance C _ST , and C _ST / C _LC calculated for the obtained matrix type display device.

(Examples 4 and 5 and Comparative Examples 3 and 4)
Examples 4 and 5 are the same as in Example 1 except that naphthalene liquid crystal (Δε = 7.2) having a large dielectric anisotropy is used as the liquid crystal in Example 1. A matrix type display device was produced. The area A, the area B, and the film thickness d of the insulating film 2 were changed as shown in Table 1. Comparative Examples 3 and 4 were the same as Comparative Example 2 except that naphthalene-based liquid crystal (Δε = 7.2) having a large dielectric anisotropy was used as the liquid crystal, as described above. The calculated B / A, pixel capacitance C _LC , retention capacitance C _ST , C _ST / C _LC are shown in Table 1. In Table 1, Δε represents the dielectric anisotropy of the liquid crystal.

(Example 6)
In Example 1, except that a fluoronaphthalene-based liquid crystal (Δε = 23.69) having a large dielectric anisotropy was used as the liquid crystal, the same as in the matrix type display device of Example 1, A matrix display device was produced. The area A, the area B, and the film thickness d of the insulating film 2 were changed as shown in Table 1. The calculated B / A, pixel capacitance C _LC , retention capacitance C _ST , C _ST / C _LC are shown in Table 1. In Table 1, Δε represents the dielectric anisotropy of the liquid crystal.

Table 1 shows voltage fluctuations and display states in the obtained matrix display device. As can be seen from the results, the matrix type display devices of Examples 1 to 6 according to the present invention exhibited a small voltage fluctuation and good display performance. On the other hand, the matrix type display devices according to Comparative Examples 1 to 5 showed either large voltage fluctuations or poor display performance. As described above, the relative ratio (C _ST / C _LC ) between the storage capacitor C _ST and the pixel capacitor C _LC of the embodiment can be made larger than that of the comparative example, and therefore, relative to the pixel capacitor C _LC . A large charge can be stored in the storage capacitor _CST .

(Example 7)
A matrix type display device according to the second embodiment of the embodiment shown in FIG. 2 was produced. First, the first substrate 10B was produced. First, a 600 μm thick glass substrate made of an aluminosilicate non-alkali glass was used as the base substrate 4. A chromium film is formed on the base substrate 4 by DC magnetron sputtering so as to have a thickness of 100 nm, and mask exposure, development, etching, and the like are performed to form a gate electrode 5 having a predetermined pattern on the switching element portion 12. At the same time, the scanning line 41 and the second reference electrode 13 were formed. Next, a silicon nitride film is formed by PECVD so as to cover the gate electrode 5 and the second reference electrode 13 so as to have a thickness d: 36 nm, and mask exposure, development, etching, and the like are performed to form a predetermined pattern. The second insulating film 14 (including the gate insulating film) was formed on the switching element portion 12 and the pixel electrode forming portion 11. Next, a non-doped amorphous silicon (a-Si) film having a thickness of 200 nm and an n ⁺ a-Si film having a thickness of 50 nm doped with phosphorus are continuously formed by PECVD on the second insulating film 14. The semiconductor film 6 having a predetermined pattern was formed on the switching element portion 12 by performing mask exposure, development, etching and the like. Next, a chromium film is formed by a DC magnetron method so as to have a thickness of 200 nm, and mask exposure, development, etching, and the like are performed to form a source electrode 7 and a drain electrode 8 having a predetermined pattern on the switching element portion 12. A signal line 42 was formed. Next, an ITO film was formed by DC magnetron sputtering so as to have a thickness of 150 nm, and mask exposure, development, etching, and the like were performed to form a pixel electrode 1 having a predetermined pattern in the pixel electrode formation portion 11. Next, as shown in FIG. 1, a silicon nitride film is formed by PECVD so as to have a thickness of 300 nm so as to cover a part of the pixel electrode 1 (30% of the area of the pixel electrode 1). The first insulating film 2 and the protective film 25 having a predetermined pattern were formed by performing exposure, development, etching, and the like. Next, a chromium film is formed by DC magnetron sputtering so as to have a thickness of 200 nm, and mask exposure, development, etching, and the like are performed to form the first reference electrode 3 having a predetermined pattern as the first insulating film of the pixel forming portion 11. 2 was formed. Finally, a polyimide film is formed by spin coating so as to have a thickness of 10 nm, and mask exposure, development, etching, and the like are performed to cover the pixel electrode 1 and the first reference electrode 3 with the liquid crystal alignment film 15 having a predetermined pattern. In this way, the pixel forming portion 11 was formed. Thus, the first substrate 10B having the form shown in FIG. 2 was produced.

The second substrate 20 is manufactured in the same manner as in Example 1, and the obtained first substrate 10 and the second substrate 20 are bonded together via a spacer for making them face each other at a predetermined interval, and then have a high spontaneous polarization. A ferroelectric liquid crystal (Chisso Corporation, CS-1030, Ps = 60 nC / cm ² ) as a material was injected to produce a matrix type display device according to Example 7.

It is typical sectional drawing which shows an example of the single pixel area | region of the matrix type display apparatus which concerns on the 1st form of this invention. It is typical sectional drawing which shows an example of the single pixel area | region of the matrix type display apparatus which concerns on the 2nd form of this invention. It is a typical top view which shows an example of the single pixel area | region of the matrix type display apparatus of this invention. It is a schematic diagram of an equivalent circuit diagram of a single pixel of the matrix type display device of the present invention. It is typical sectional drawing which shows another example of the single pixel area | region of the matrix type display apparatus of this invention. It is typical sectional drawing which shows the prior art example of the single pixel area | region of the liquid crystal display device driven by an active matrix system.

Explanation of symbols

1 Pixel electrode 2 Insulating film (first insulating film)
3 Reference electrode (first reference electrode)
4 base substrate 5 gate electrode 6 semiconductor film 7 source electrode 8 drain electrode 9 protective film 10, 10A, 10B first substrate 11 pixel forming part 12 switching element part 13 second reference electrode 14 second insulating film 15 liquid crystal alignment film 20 first 2 substrates 21 counter electrode 22 transparent substrate 23 colored layer 24 black matrix layer 25 transparent protective film 30 light control layer (liquid crystal layer)
30 'light control layer (electrophoresis layer)
31 Microcapsule 41 Scan line 42 Signal line 50 Backlight etc. 60, 60A, 60B, 60C Matrix type display device C _LC pixel capacitance C _ST holding capacitance C _ST1 first holding capacitance C _ST2 second holding capacitance C _GS parasitic capacitance A pixel Area obtained by subtracting area B from area of electrode B Overlap area in plan view of pixel electrode and first reference electrode C Overlap area in plan view of pixel electrode and second reference electrode

Claims (2)

A first substrate having a base substrate, a pixel formation portion and a switching element portion provided on the base substrate, wherein the pixel formation portion includes a pixel electrode formed on the base substrate, and the pixel An insulating film formed so as to cover a part of the electrode, and a reference electrode formed on the insulating film so that an area of an overlapping portion with the pixel electrode in a plan view is B A first substrate;
A second substrate having a transparent substrate and a counter electrode formed on the entire surface or part of the transparent substrate so as to face the pixel electrode;
A matrix type display device comprising: a light control layer provided between the first substrate and the second substrate, the optical control layer of which optical characteristics are changed by applying a voltage between the pixel electrode and the counter electrode. There,
In each pixel unit, the overlapping portion in plan view of the pixel electrode and the reference electrode composed of the area B constitutes a storage capacitor, and when the area obtained by subtracting the area B from the area of the pixel electrode is A, An overlapping portion in plan view of the pixel electrode having the area A and the counter electrode constitutes a pixel capacitance,
In each pixel unit, the ratio of the area B to the area A (B / A) is in the range of 0.3 / 0.7 or more and less than 0.7 / 0.3,
The matrix type display device, wherein the light control layer is a layer using a liquid crystal having a dielectric anisotropy Δε of 7.2 or more or a ferroelectric liquid crystal having spontaneous polarization.   The matrix type display device according to claim 1, wherein the switching element portion is a thin film transistor portion.

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