JP5604355B2 - Semiconductor chip inspection and sorting apparatus and inspection and sorting method - Google Patents

Description

  The present invention relates to a semiconductor chip inspection and sorting apparatus and an inspection and sorting method.

  Conventionally, when inspecting the electrical characteristics of a semiconductor chip to which a high voltage is applied and a large current flows, such as an IGBT (Insulated Gate Bipolar Transistor), in a testing apparatus, dicing has been performed, for example, as in Patent Document 1 Semiconductor chips are transferred from the wafer to the inspection device one by one using a suction collet or the like. Further, the semiconductor chip after inspection is discharged to a chip tray in a state where the quality is sorted (selected) according to the inspection result. Note that the chip tray is formed with a large number of accommodating portions for accommodating one semiconductor chip.

JP 2010-276477 A

However, since the conventional inspection apparatus inspects semiconductor chips one by one, it takes a lot of time to inspect a large number of semiconductor chips, that is, the inspection efficiency of the semiconductor chips is low.
In addition, in consideration of the processing of the semiconductor chip in the post-inspection process (post-process) (for example, mounting on a substrate, a lead frame, etc.), in a state where non-defective semiconductor chips are stored in all the storage portions of the same tray, It is preferable to supply this tray to a subsequent process. However, the conventional method has a problem that the semiconductor chips after the inspection are sorted one by one in accordance with the inspection result and conveyed to the tray, so that the supply of the semiconductor chips to the subsequent process is delayed.

  The present invention has been made in view of the above-described circumstances, and it is possible to improve the inspection efficiency of a semiconductor chip and the supply speed of a semiconductor chip to a subsequent process, and a semiconductor chip inspection / selection apparatus and method The purpose is to provide.

In order to solve this problem, a semiconductor chip inspection / sorting device according to the present invention inspects the electrical characteristics of a semiconductor chip and sorts the semiconductor chip into a non-defective chip and a defective chip according to the inspection result. A mounting table on which a transport tray in which a large number of housing parts for housing the semiconductor chips are arranged is placed, and is provided at least vertically movable on the mounting table. A plurality of inspection probes capable of simultaneously inspecting at least a plurality of the semiconductor chips among a large number of the accommodated semiconductor chips, and an electrical property inspection by the inspection probes provided at least vertically movable on the mounting table A plurality of discharge nozzles capable of simultaneously discharging a plurality of defective chips determined to be defective from the transport tray, and the defect After discharge of the chip, with respect to the free housing portion of the carrier tray which the defective chips are housed a number of the receiving portion, a replenishment mechanism for accommodating a separate good chips, wherein the replenishment mechanism A replenishment tray in which the individual good chips are accommodated in a plurality of non-defective product storage units, a stocker for installing one or more replenishment trays, and the non-defective chips in the replenishment tray. Conveying means for conveying / accommodating in the empty accommodating portion of the conveying tray arranged on the mounting table, wherein the multiple non-defective product accommodating portions are arranged in the same manner as the numerous accommodating portions of the conveying tray, and the conveying wherein means, said replenishing the separate good chips accommodated in the good receiving portion of a predetermined position of the tray corresponding to the position of the empty housing unit, to be transported to the empty housing unit To.

The semiconductor chip inspection / selection method of the present invention is a semiconductor chip inspection / selection method in which the electrical characteristics of the semiconductor chip are inspected and the semiconductor chip is classified into a non-defective chip and a defective chip according to the inspection result. An inspection step of simultaneously inspecting at least a plurality of the semiconductor chips among the plurality of semiconductor chips on the transport tray in a state where the semiconductor chips are housed in a housing portion formed in a large number on the transport tray. A plurality of defective chips determined to have defective electrical characteristics among a number of semiconductor chips inspected in the inspection step, a plurality of defective chips simultaneously discharged from the transport tray, A replenishment step of accommodating separate non-defective chips with respect to the empty accommodating portion of the transport tray in which the defective chips are accommodated among the accommodating portions; The provided, and before the replenishment step, thereby providing a supplementary tray formed by arranging a number of non-defective receiving portion equal to the number of the receiving portion of the carrier tray, said separately to the plurality of non-defective accommodating portion In the replenishment step, the separate non-defective chips accommodated in the non-defective product accommodating portion at a predetermined position of the replenishment tray corresponding to the position of the empty accommodating portion of the transport tray, It conveys to the said empty accommodation part, It is characterized by the above-mentioned .

According to these inspection / separation apparatus and inspection / separation method, in the inspection process, a plurality of semiconductor chips out of a large number of semiconductor chips accommodated in the transport tray are simultaneously inspected by a plurality of inspection probes. Improvements can be made.
In addition, when there are a plurality of defective chips in the transport tray, these defective chips can be discharged simultaneously by a plurality of discharge nozzles, so that the semiconductor chips in the transport tray are replaced with non-defective chips and defective chips. The time for sorting can be shortened.

Furthermore, in the above-described inspection / separation apparatus and inspection / separation method, after the transport tray is attached to the mounting table of the inspection / separation apparatus, the inspection / sorting / replenishment of the semiconductor chip is completed and the transport tray is removed from the mounting table. The semiconductor chip determined to be a non-defective chip in the inspection process remains accommodated in the accommodating portion of the transport tray. And since the non-defective chips are accommodated only in the empty accommodating portion after the defective chips are discharged, compared with the conventional case where the non-defective chips after the inspection are conveyed one by one to the conveyance tray, It is possible to shorten the time until all the accommodating portions are filled with non-defective chips.
As described above, the time for inspecting the semiconductor chip, the time for sorting the semiconductor chip into a non-defective chip and the non-defective chip, and the time until the transfer tray is filled with only the non-defective chip can be shortened. It is possible to improve the supply speed of the semiconductor chip to the step of mounting the semiconductor chip on the substrate or the lead frame.

Further, in the above-described inspection / separation apparatus and inspection / separation method, after the transport tray is attached to the mounting table of the inspection / separation apparatus, the inspection / sorting / replenishment of the semiconductor chip is completed and the transport tray is removed from the mounting table. Since the non-defective chips are not transported by the suction collet or the like as in the prior art, the non-defective chips can be protected.
Further, in the above-described inspection / separation apparatus and inspection / separation method, even if there are a plurality of empty storage portions of the transport tray, the distance for transferring the non-defective chips from the non-defective product storage portions of the replenishment tray to the empty storage portions of the transport tray is increased. Since all can be set to be equal, transfer control of non-defective chips can be easily performed.

  In the inspection and sorting apparatus, the height position of the upper surface of the transport tray placed on the mounting table is detected, and based on the detection result, from the probe standby position spaced above the semiconductor chip. The downward movement lengths of the plurality of inspection probes that reach the inspection position for contacting the semiconductor chip and inspecting the semiconductor chip are corrected, and spaced apart above the semiconductor chip based on the detection result It is preferable that a correction mechanism for correcting the downward movement lengths of the plurality of discharge nozzles from the nozzle standby position to the suction position for sucking the semiconductor chip is preferably provided.

  In this configuration, even if there is a variation in the thickness of the transport tray, when inspecting the semiconductor chip in the housing portion by the inspection probe or when discharging the defective chip by the discharge nozzle, It is possible to avoid problems that the semiconductor chip in the housing portion is damaged, the semiconductor chip is not inspected, and the defective chip is not discharged.

More specifically, although the depth dimension of the accommodating portion formed in the transport tray by being recessed from the upper surface is formed with high accuracy, the thickness dimension of the transport tray is often different for each transport tray.
Therefore, as in the above configuration, based on the detection result of the height position of the upper surface of the transfer tray placed on the mounting table, the downward movement length from the probe standby position to the inspection position of the plurality of inspection probes is set. By correcting, it is possible to avoid a problem that the semiconductor chip in the housing portion is pressed by the inspection probe with an excessive force, or the inspection probe that has reached the inspection position does not contact the semiconductor chip.

  In addition, based on the detection result of the height position of the upper surface of the transport tray mounted on the mounting table, the suction movement is corrected by correcting the downward movement length from the nozzle standby position to the suction position of the plurality of discharge nozzles. It is possible to avoid a problem that the discharge nozzle that has reached the position contacts or comes into contact with the semiconductor chip in the housing portion, or that a defective chip in the housing portion does not adhere to the discharge nozzle.

Further, in the replenishment step of the inspection and sorting method, when the plurality of empty accommodation portions are adjacent to each other in the same transport tray, the plurality of non-defective chips arranged to be adjacent to each other in the replenishment tray More preferably, it is conveyed to a plurality of the empty accommodation portions at once.
In this method, a plurality of non-defective chips can be accommodated in a plurality of empty accommodation portions in a short time. In addition, a configuration for holding a plurality of non-defective chips at the same time and transporting them to the empty accommodation section can be made compact.

  According to the present invention, it is possible to improve the inspection efficiency of a semiconductor chip and the supply speed of the semiconductor chip to a subsequent process.

It is a schematic top view which shows the state which looked at the test | inspection selection apparatus which concerns on one Embodiment of this invention from upper direction. It is a schematic side view which shows the state which wants to see the test | inspection selection apparatus of FIG. 1 from the side. It is a principal part enlarged view which shows the motion of the probe unit which comprises the test | inspection selection apparatus shown in FIG. It is a principal part enlarged view which shows the motion of the nozzle unit which comprises the test | inspection selection apparatus shown in FIG. It is explanatory drawing which shows typically the 1st Example of the replenishment process in the test | inspection selection method of this invention. It is explanatory drawing which shows typically the 2nd Example of the replenishment process in the test | inspection selection method of this invention.

Hereinafter, an embodiment of the present invention will be described with reference to FIGS.
As shown in FIGS. 1 and 2, the inspection / sorting apparatus 1 according to this embodiment inspects the electrical characteristics of the semiconductor chip 10 and sorts the semiconductor chip 10 into a non-defective chip and a defective chip according to the inspection result. To do.
The semiconductor chip 10 to be inspected in the inspection and sorting apparatus 1 of the present embodiment is a semiconductor element such as a diode or a transistor, for example, and is formed in a rectangular plate shape in plan view as shown in FIG. It has an electrode on the lower surface 10f. Moreover, in the test | inspection selection apparatus 1 of this embodiment, the electrical property of the semiconductor chip 10 is test | inspected in the state which accommodated the semiconductor chip 10 in the accommodating part 14 hollow from the upper surface 13a of the conveyance tray 13 formed in plate shape. It is like that. The transport tray 13 is configured by arranging a large number (or a plurality) of the accommodating portions 14 vertically and horizontally on the upper surface 13 a of the transport tray 13.

As shown in FIGS. 1 and 2, the inspection / selection apparatus 1 includes a mounting base 3 for mounting a transport tray 13 on a single base 2 and a probe for inspecting electrical characteristics of the semiconductor chip 10. A unit 4 and a discharge nozzle unit 5 for discharging defective chips from the transport tray 13 are provided and generally configured.
The mounting table 3 is provided so as to be movable only in one direction (X-axis direction) along the upper surface 2 a of the base 2 by a rail 21 provided on the upper surface 2 a of the base 2. Note that the movement control (such as the length and timing of movement) of the mounting table 3 is performed by the control unit 9 provided in the inspection sorting apparatus 1. A transport tray 13 and a discharge box 31 are placed on the upper surface 3a of the placing table 3.

Here, the transport tray 13 is detachably fixed to the upper surface 3a of the mounting table 3 so that one arrangement direction of the multiple accommodating portions 14 coincides with the moving direction (X-axis direction) of the mounting table 3. ing.
On the other hand, the discharge box 31 is detachably or non-detachably fixed at a position aligned with the transport tray 13 in the moving direction (X-axis direction) of the mounting table 3. The discharge box 31 is formed in a box shape that opens above the upper surface 3a of the mounting table 3 (in the positive Z-axis direction), and stores defective chips discharged from the transport tray 13 by the discharge nozzle unit 5 described later. To do.

The probe unit 4 and the discharge nozzle unit 5 are attached to a beam portion 22 </ b> A of a portal frame 22 that is installed on the base 2 so as to be orthogonal to the moving direction of the mounting table 3.
As shown in FIGS. 1 to 3, the probe unit 4 includes a plurality of inspection probes 41 and a probe holding portion 42 that integrally fixes them, and the vertical direction (Z-axis direction) with respect to the beam portion 22 </ b> A of the portal frame 22. ) Can be moved. Note that the movement control (movement length, timing, etc.) of the probe unit 4 is performed by the control unit 9 similarly to the mounting table 3. In the state in which the probe unit 4 is arranged at the probe standby position 4A on the upper side (see FIGS. 2 and 3), the mounting table 3, the transport tray 13 and the discharge box 31 arranged on this interfere with the probe unit 4. Instead, it is possible to move the mounting table 3 in the X-axis direction so as to pass directly under the probe unit 4.

  Each inspection probe 41 is a well-known one, extends from the probe holding portion 42 so as to protrude downward (Z-axis negative direction), and makes the tip in the extending direction contact the upper surface 10 e of the semiconductor chip 10. Thus, the electrical characteristics of the semiconductor chip 10 can be inspected. Note that, for example, the inspection probe 41 may be attached to the probe holding portion 42 so as to be vertically movable within a predetermined range so that the pressing force of the inspection probe 41 on the semiconductor chip 10 does not become excessive. Alternatively, an urging member such as a coil spring that urges the inspection probe 41 downward with respect to the probe holding portion 42 may be provided between the probe holding portion 42 and the inspection probe 41.

  The plurality of inspection probes 41 fixed to the probe holding unit 42 are arranged in association with the arrangement of the multiple storage units 14 of the transport tray 13. Accordingly, the plurality of inspection probes 41 are moved downward from the probe standby position 4A to the inspection position 4B and brought into contact with the semiconductor chips 10, respectively, so that at least a plurality of the semiconductor chips 10 accommodated in the transport tray 13 are at least a plurality of them. It becomes possible to inspect the electrical characteristics of the semiconductor chips 10 simultaneously.

  More specifically, with reference to FIG. 1, the plurality of inspection probes 41 are arranged in the Y-axis direction on the transport tray 13 on the mounting table 3 in a direction (Y-axis direction) orthogonal to the moving direction of the mounting table 3. An array group of inspection probes 41 arranged in the same number as the plurality of accommodating portions 14 arranged in a row and arranged in a row in the Y-axis direction has a plurality of rows in the X-axis direction (two rows in the illustrated example). They are arranged side by side. As a result, the plurality of semiconductor chips 10 accommodated in the transport tray 13 can be simultaneously inspected in units of a plurality of rows. Further, it is not necessary to move the probe unit 4 in the Y-axis direction when inspecting the semiconductor chip 10.

Note that the number of inspection probes 41 arranged in a line in the Y-axis direction is, for example, arranged in the Y-axis direction on the transport tray 13 so as to be compatible with various transport trays 13 having different numbers of storage units 14 and different arrangement rules. More than the number of the accommodating parts 14 may be set. Further, the number of array groups of the inspection probes 41 arranged in the X-axis direction may be, for example, only one row. In this case, a plurality of semiconductor chips 10 accommodated in the transport tray 13 can be inspected simultaneously in units of one row. it can.
The inspection result of the semiconductor chip 10 to be inspected by the inspection probe 41 provided as described above is stored in the control unit 9 in a state associated with the position of the housing unit 14.

  As in the case of the probe unit 4, the discharge nozzle unit 5 includes a plurality of discharge nozzles 51 and a nozzle holding portion 52 that integrally fixes them, as shown in FIGS. It can be moved in the vertical direction (Z-axis direction) with respect to the beam portion 22A. Note that the movement control (movement length, timing, etc.) of the discharge nozzle unit 5 is performed by the control unit 9 similarly to the mounting table 3 and the probe unit 4. When the discharge nozzle unit 5 is arranged at the upper nozzle standby position 5A (see FIGS. 2 and 4), the mounting table 3, the transport tray 13 and the discharge box 31 are discharged without interfering with the discharge nozzle unit 5. The mounting table 3 can be moved in the X-axis direction so as to pass directly under the nozzle unit 5.

  Each discharge nozzle 51 is formed in a cylindrical shape extending below the nozzle holding portion 52, and the inside thereof is connected to air suction means (not shown) such as a vacuum pump. As a result, the air in the discharge nozzle 51 is sucked by the air suction means at a position where the opening end of the discharge nozzle 51 opening downward is close to the upper surface of the semiconductor chip 10 (suction position 5B). The open end is attracted to the upper surface 10 e of the semiconductor chip 10, and the semiconductor chip 10 is held by the discharge nozzle 51. Each discharge nozzle 51 may be attached so as to be movable in the vertical direction within a predetermined range with respect to the nozzle holding portion 52, for example, as in the case of the inspection probe 41. A biasing member that biases the discharge nozzle 51 downward may be provided between the nozzle 51 and the nozzle 51.

The plurality of discharge nozzles 51 fixed to the nozzle holding unit 52 are arranged in correspondence with the arrangement of the multiple storage units 14 of the transport tray 13 as in the case of the inspection probe 41. Accordingly, at least a plurality of semiconductor chips 10 among a large number of semiconductor chips 10 accommodated in the transport tray 13 can be sucked and held simultaneously by the plurality of discharge nozzles 51.
More specifically, with reference to FIG. 1, the plurality of discharge nozzles 51 are arranged in the Y-axis direction in the transport tray 13 on the mounting table 3 in a direction (Y-axis direction) orthogonal to the moving direction of the mounting table 3. The same number as the plurality of accommodating portions 14 arranged in a row is arranged. As a result, the plurality of semiconductor chips 10 accommodated in the transport tray 13 can be sucked and held simultaneously in units of one row. Further, it is not necessary to move the discharge nozzle unit 5 in the Y-axis direction when holding the semiconductor chip 10 by suction.

  The number of discharge nozzles 51 arranged in a line in the Y-axis direction is, for example, arranged in the Y-axis direction on the transport tray 13 so as to be compatible with various transport trays 13 having different numbers of storage units 14 and arrangement rules. More than the number of the accommodating parts 14 may be set. Further, the plurality of discharge nozzles 51 are arranged in a plurality of rows in the X-axis direction, for example, similarly to the arrangement of the inspection probes 41 shown in FIG. It may be.

Further, the discharge nozzle unit 5 sucks and holds only defective chips of the semiconductor chips 10 accommodated in the transport tray 13 that have been determined to have a poor electrical property inspection result by the inspection probe 41 described above. Above, it is comprised so that a defective chip may be conveyed (discharged) to the discharge box 31 by controlling the movement of the discharge nozzle unit 5 and the mounting table 3 described above.
When sucking and holding defective chips, the discharge nozzle unit 5 is moved downward from the nozzle standby position 5A to the suction position 5B as shown in FIG. The top surface 10e of the accommodated semiconductor chip 10 is approached. That is, the discharge nozzle 51 approaches the semiconductor chip 10 (non-defective chip) determined to be a non-defective product. However, the discharge nozzle 51 controls the air suction means described above and is located immediately above the defective chip. By sucking only the air in 51, only defective chips can be selectively discharged from the transport tray 13.
The discharge control of the defective chip by the discharge nozzle unit 5 is performed by the control unit 9 based on the inspection result stored in the control unit 9.

  Further, as shown in FIG. 2, the inspection / sorting apparatus 1 according to the present embodiment includes a displacement meter 61 that detects the height position of the upper surface 13 a of the transport tray 13 placed on the placing table 3. The displacement meter 61 measures the height dimension of the transport tray 13 with reference to the position of the upper surface 3 a of the mounting table 3. And the detection result in the displacement meter 61 is output to the control part 9, and is memorize | stored.

Based on the detection result of the displacement meter 61, the controller 9 contacts the semiconductor chip 10 from the probe standby position 4A spaced above the semiconductor chip 10 and inspects the semiconductor chip 10 as shown in FIG. The downward movement length L1 of the probe unit 4 reaching the inspection position 4B is corrected.
The correction of the moving length L1 of the probe unit 4 is that the height of the upper surface 10e of the semiconductor chip 10 accommodated in the accommodating portion 14 is too high, and the semiconductor chip 10 in the accommodating portion 14 is excessively increased by the inspection probe 41. This is performed so that the inspection probe 41 does not come into contact with the semiconductor chip 10 due to being pressed by force or because the height position of the upper surface 10e of the semiconductor chip 10 is too low.

Further, in the control unit 9, based on the detection result by the displacement meter 61, as shown in FIG. 4, the suction position 5 </ b> B for sucking the semiconductor chip 10 from the nozzle standby position 5 </ b> A spaced above the semiconductor chip 10. The downward movement length L2 of the discharge nozzle unit 5 is corrected.
The correction of the movement length L2 of the discharge nozzle unit 5 is that the height position of the upper surface 10e of the semiconductor chip 10 accommodated in the accommodating portion 14 is too high, so that the discharge nozzle 51 that has reached the suction position 5B is in the accommodating portion 14. So that the defective chip in the housing portion 14 is not attracted to the discharge nozzle 51 due to contact or contact with the semiconductor chip 10 or the height position of the upper surface 10e of the semiconductor chip 10 is too low. Done.

From the above, in the inspection / separation apparatus 1 of the present embodiment, the semiconductor chip 10 accommodated in the transport tray 13 is not damaged by the probe unit 4 or the discharge nozzle unit 5 by the displacement meter 61 and the control unit 9. A correction mechanism for correcting the movement lengths L1 and L2 of the probe unit 4 and the discharge nozzle unit 5 is configured.
This correction mechanism is provided because the depth dimension of the accommodating portion 14 formed in the transport tray 13 that is recessed from the upper surface 13a is accurately formed, but the thickness dimension of the transport tray 13 is different for each transport tray 13. It has been.

Further, as shown in FIG. 1, the inspection / separation apparatus 1 according to the present embodiment includes a transport tray 13 that stores defective chips out of a large number of storage units 14 after the defective nozzles are discharged by the discharge nozzle unit 5. A replenishment mechanism 7 that accommodates separate non-defective chips 10C is provided for the empty accommodating portion 14A (see FIGS. 5 and 6).
The replenishment mechanism 7 includes a replenishment tray 71 that accommodates non-defective chips 10C in a plurality of non-defective product storage units 72, a stocker 73 that can store a plurality of replenishment trays 71, and a non-defective product in the replenishment tray 71. Conveying means (not shown) for conveying / accommodating the chip 10 </ b> C in the empty accommodating portion 14 </ b> A of the conveying tray 13 arranged on the mounting table 3 is provided. The replenishment tray 71 and the stocker 73 are not limited to the positions in the illustrated example. However, the replenishment tray 71 and the stocker 73 are arranged at positions adjacent to the mounting table 3 so that the transfer distance of the non-defective chips 10C by the transfer means is reduced. preferable.

Similar to the transport tray 13, the replenishment tray 71 is configured by arranging a number of non-defective product storage portions 72 that are recessed from the upper surface 71 a in the vertical and horizontal directions.
The conveyance means may be configured by, for example, a conveyance nozzle (not shown) that can move between the replenishment tray 71 and the conveyance tray 13 and a control unit 9 that controls movement of the conveyance nozzle. Moreover, the conveyance nozzle should just have the structure similar to the discharge nozzle 51, for example, and can move to the up-down direction on the replenishment tray 71 or the conveyance tray 13. FIG. Note that the transport unit may include, for example, a plurality of transport nozzles so that a plurality of non-defective chips 10C can be transported simultaneously, and a plurality of transport nozzles are integrally fixed by a holding unit like the discharge nozzle unit 5. It may be.

Next, an inspection and selection method for the semiconductor chip 10 using the inspection and selection apparatus 1 configured as described above will be described.
When inspecting and sorting the semiconductor chips 10, first, the transport tray 13 containing the semiconductor chips 10 before the inspection is placed on the mounting table 3, and the probe unit 4 and the discharge nozzle unit 5 are vertically moved by the correction mechanism. The movement length L1 is corrected (correction step). The corrected moving length L1 is stored in the control unit 9.

Next, the electrical characteristics of all the semiconductor chips 10 accommodated in the transport tray 13 are inspected (inspection process).
In this inspection process, after the mounting table 3 is moved so that the plurality of semiconductor chips 10 are positioned directly below the plurality of inspection probes 41, the probe unit 4 is corrected from the probe standby position 4A. Move downward by an amount to reach the inspection position 4B. As a result, the plurality of inspection probes 41 come into contact with the upper surface 10e of the semiconductor chip 10, respectively, and the inspection of the plurality of semiconductor chips 10 is performed simultaneously. And this test result is memorize | stored in the control part 9 in the state matched with the position of the accommodating part 14. FIG. After this inspection, the probe unit 4 is raised to the probe standby position 4A.

  In the inspection process, the electrical characteristics of all the semiconductor chips 10 accommodated in the transport tray 13 are inspected by repeating the above operation a plurality of times. However, if the number and arrangement of the inspection probes 41 provided in the probe unit 4 are the same as the number and arrangement of the semiconductor chips 10 accommodated in the transport tray 13, the above-described operation is performed only once. The electrical characteristics of all the housed semiconductor chips 10 are inspected.

After the above-described inspection process, the semiconductor chips 10 accommodated in the transport tray 13 are sorted into non-defective chips and defective chips according to the above-described inspection results (sorting process).
In this step, after the mounting table 3 is moved so that the plurality of semiconductor chips 10 are positioned directly below the plurality of discharge nozzles 51, the discharge nozzle unit 5 is corrected from the nozzle standby position 5A by the movement length L2. It is moved downward by an amount to reach the suction position 5B.

  In this state, all the discharge nozzles 51 are close to the upper surface 10e of the semiconductor chip 10 accommodated in the transport tray 13, but are positioned immediately above the defective chip based on the detection result stored in the control unit 9. By sucking only the air in the discharge nozzle 51, only defective chips are attracted to the corresponding discharge nozzle 51. At this time, if there are a plurality of defective chips facing the discharge nozzle 51, the plurality of defective chips are simultaneously attracted to the respective discharge nozzles 51.

  The discharge nozzle unit 5 is raised to the nozzle standby position 5 </ b> A in a state where the defective chip is sucked and held by the discharge nozzle 51. Further, after moving the mounting table 3 so that the discharge box 31 is positioned directly below the discharge nozzle unit 5, the air suction in the discharge nozzle 51 is released, whereby defective chips are accommodated in the discharge box 31. . That is, the defective chip accommodated in the transport tray 13 is discharged from the transport tray 13.

In this sorting step, all the defective chips housed in the transport tray 13 are transported by performing the above-described operation once or a plurality of times according to the arrangement and number of defective chips housed in the transport tray 13. Only the non-defective chip 10 </ b> A (see FIGS. 5 and 6) remains on the transport tray 13.
In this sorting step, the position information of the storage unit 14 (empty storage unit 14A) of the transport tray 13 after discharging the defective chips may be stored in the control unit 9.

  After the sorting step, as shown in FIGS. 5 and 6, separate non-defective chips with respect to the empty accommodation portion 14 </ b> A of the conveyance tray 13 in which the defective chips are accommodated among the accommodation portions 14 of the conveyance tray 13. By accommodating 10C (replenishment step), the handling of the transport tray 13 in the inspection and sorting apparatus 1 is completed. Prior to the replenishment step (between the correction step and the replenishment step), a replenishment tray 71 that accommodates the non-defective chips 10C in all the non-defective product accommodating portions 72 is prepared in advance. In the present embodiment, one or a plurality of replenishment trays 71 may be installed in the stocker 73.

  In this replenishment step, as in the sorting step, for example, the non-defective chips 10C accommodated in the replenishment tray 71 are sucked and held by the transport nozzle, and the transport nozzle is moved to a position immediately above the empty storage portion 14A of the transport tray 13. Thereafter, the non-defective chip 10 </ b> C may be accommodated in the empty accommodating portion 14 </ b> A of the conveyance tray 13 by releasing the air suction in the conveyance nozzle. The operation of the transfer nozzle may be controlled based on the detection result of the semiconductor chip 10 stored in the control unit 9 and the position information of the empty accommodation unit 14A.

  Hereinafter, a specific example of a method for replenishing the non-defective chip 10C to the empty accommodation portion 14A in this replenishment step will be described with reference to FIGS. 5 and 6, for the purpose of explaining the replenishment method, the number of storage units 14 and non-defective product storage units 72 is schematically described as a total of 16 in 4 rows and 4 columns. However, the number and arrangement of the actual storage units 14 and the non-defective product storage units 72 are not limited to this.

[First Example]
In the first embodiment, as shown in FIG. 5, the replenishment tray 71 in which the number and arrangement of the non-defective product storage sections 72 are the same as the number and arrangement of the storage sections 14 of the transport tray 13 before the refilling process is performed. Are prepared, and the non-defective chips 10C are accommodated in all the non-defective accommodating sections 72. In preparation, the replenishment tray 71 is arranged so that the direction thereof coincides with the direction of the transport tray 13.
In the replenishment process of the first embodiment, the position of the empty accommodation portion 14A of the transport tray 13 in the replenishment tray 71 based on the detection result of the semiconductor chip 10 stored in the control unit 9 and the position information of the empty accommodation portion 14A. The non-defective chip accommodated in the non-defective product accommodating portion 72 at a predetermined position corresponding to the above is conveyed to the empty accommodating portion 14A.

  More specifically, referring to FIG. 5, for example, the empty tray 14 </ b> A (a) at the upper left end (first from the top, first from the left) of the transport tray 13 includes the replenishment tray 71. The non-defective chip 10 </ b> C (A) accommodated in the non-defective article accommodating portion 72 at the upper left end of the left side is conveyed and accommodated. Similarly, for example, in the second empty container portion 14A (b) from the top of the transport tray 13 and from the left, the second non-defective product from the top of the replenishment tray 71 and the third non-defective product from the left. The non-defective chip 10C (B) accommodated in the accommodating portion 72 is conveyed and accommodated.

In the replenishment process of the first embodiment, when a plurality of empty accommodation portions 14A are adjacent to each other in the same transport tray 13, a plurality of non-defective chips 10C arranged so as to be adjacent to each other in the replenishment tray 71 are collectively collected. May be conveyed to a plurality of empty accommodation sections 14A.
More specifically, referring to FIG. 5, when there are two empty storage portions 14 </ b> A (c, d) adjacent to each other in the transport tray 13, the two empty storage portions 14 </ b> A ( The two non-defective chips 10C (C, D) accommodated in the two non-defective containers 72 at predetermined positions corresponding to the positions of c, d) are collectively transferred to the two empty containers 14A (c, d). It only has to be accommodated.

  In addition, what is necessary is just to use the several conveyance nozzle fixed integrally, for example like the discharge nozzle unit 5, for the collective conveyance of the several non-defective chip | tip 10C mentioned above. Further, in the illustrated example, a plurality of adjacent empty accommodation portions 14A are arranged in the arrangement direction (lateral direction) of the transport tray 13 and the replenishment tray 71. For example, in a direction (vertical direction) orthogonal to the arrangement direction. They may be arranged side by side or in an oblique direction.

[Second Example]
In the second embodiment, as shown in FIG. 6, a replenishment tray 71 in which a plurality of (many) non-defective storage units 72 are arranged is prepared before the replenishment step is performed. The chip 10C is accommodated. In the illustrated example, as in the case of the first embodiment, the number and arrangement of the non-defective storage sections 72 of the replenishment tray 71 are the same as the number and arrangement of the storage sections 14 of the transport tray 13. It is not limited to.

  In the replenishment process of the second embodiment, when there are a plurality of empty accommodation portions 14A, based on the detection result of the semiconductor chip 10 stored in the control unit 9 and the position information of the empty accommodation portions 14A, a plurality of empty accommodation portions. With respect to 14A, a plurality of (many) separate non-defective chips 10C arranged in the replenishment tray 71 are conveyed and accommodated in the arrangement order. In other words, regardless of the position of the empty accommodating portion 14A in the transport tray 13, a plurality (large number) of separate good chips 10C arranged in the replenishment tray 71 are taken out from the non-defective item accommodating portion 72 in the arrangement order, and the empty accommodating portion. Transport to 14A.

  More specifically, referring to FIG. 6, for example, when the four empty accommodation portions 14 </ b> A (ad) are randomly located in the same transport tray 13, first, the non-defective product at the upper left end The non-defective chip 10C (A) stored in the storage unit 72 (first non-defective product storage unit 72A) is transferred to the first empty storage unit 14A (a). Next, the non-defective product chip 10C (B) accommodated in the second non-defective product accommodating portion 72B located to the right of the first non-defective product accommodating portion 72A is transported to the second empty accommodating portion 14A (b). Thereafter, in the same manner, the third non-defective chip 10C (C, D) accommodated in the third and fourth non-defective container 72C, 72D positioned next to the right of the second non-defective container 72B, Each is transported to the fourth empty accommodation section 14A (c, d). When the same replenishment process is performed for another transport tray 13 after the replenishment of the non-defective chips 10C to the transport tray 13 illustrated in FIG. 6 is completed, the replenishment process illustrated in FIG. What is necessary is just to take out the non-defective chip | tip 10C arranged in the horizontal direction the 2nd from the top in the tray 71 in order.

Further, in the replenishment process of the second embodiment, as in the case of the first embodiment, when a plurality of empty accommodation portions 14A are adjacent to each other in the same transport tray 13, they are arranged adjacent to each other in the replenishment tray 71. The plurality of non-defective chips 10 </ b> C may be transported to the plurality of empty accommodation portions 14 </ b> A at once.
More specifically, with reference to FIG. 6, when there are two empty storage portions 14 </ b> A (c, d) adjacent to each other in the transport tray 13, the two stored in the two non-defective product storage portions 72. The non-defective chips 10C (C, D) may be transported and accommodated together in the two empty accommodation portions 14A (c, d).

In the illustrated example of the second embodiment, the non-defective chips 10C are taken out in the order arranged in the horizontal direction on the replenishment tray 71. For example, the non-defective chips 10C are taken out in the order arranged in the vertical direction. Also good.
In the replenishment process of the second embodiment, a replenishment method in the case where there are a plurality of empty storage portions 14A on the same transport tray 13 has been described. For example, one empty storage portion 14A is included in the same transport tray 13. It may be the case only. That is, by performing the replenishment step for each of the plurality of transport trays 13 having the empty accommodation portions 14A, the plurality of non-defective chips 10C arranged in the replenishment tray 71 are taken out in the arrangement order.

As described above, according to the inspection / sorting device 1 and the inspection / separation method for the semiconductor chip 10 according to the present embodiment, at least a plurality of semiconductor chips among the multiple semiconductor chips 10 accommodated in the transport tray 13 in the inspection process. Since 10 is simultaneously inspected by a plurality of inspection probes 41, the inspection efficiency of the semiconductor chip 10 can be improved.
Further, when there are a plurality of defective chips in the transport tray 13, the plurality of defective chips can be discharged simultaneously by the plurality of discharge nozzles 51, so that the semiconductor chip 10 in the transport tray 13 is replaced with a non-defective chip. And the time for sorting into defective chips can be shortened.

Furthermore, after the transport tray 13 is attached to the mounting table 3 of the inspection / sorting apparatus 1, the inspection chip / sorting / replenishment process is completed and the transport tray 13 is removed from the mounting table 3 in the inspection process. The semiconductor chip 10 that is determined to remain is housed in the housing portion 14 of the transport tray 13. Since the separate non-defective chips 10C are accommodated only in the empty accommodating portion 14A after the defective chips are discharged, compared with the case where the non-defective chips after the inspection are transported one by one to the transport tray 13 as in the prior art. Thus, it is possible to reduce the time until all the accommodating portions 14 of the transport tray 13 are filled with non-defective chips.
As described above, the time for inspecting the semiconductor chip 10, the time for sorting the semiconductor chip 10 into a non-defective chip and the non-defective chip, and the time until the transport tray 13 is filled with only non-defective chips can be shortened. It becomes possible to improve the supply speed of the semiconductor chip 10 to a subsequent process (for example, a process of mounting the semiconductor chip 10 on a substrate or a lead frame).

Moreover, after attaching the transport tray 13 to the mounting table 3 of the inspection / separation apparatus 1, after the inspection process / sorting process / replenishment process is finished and before the transport tray 13 is removed from the mounting table 3, the non-defective product is used as before. Since the chip is not transported by the suction collet or the like, it is possible to protect the non-defective chip.
Further, since the inspection / separation apparatus 1 of the present embodiment includes a correction mechanism, and the inspection / separation method performs the correction process before the inspection process, even if the thickness of the transport tray 13 varies. In the inspection process and the selection process, the semiconductor chip 10 in the housing unit 14 is damaged by the inspection probe 41 and the discharge nozzle 51, the semiconductor chip 10 is not inspected, and defective chips are not discharged from the transport tray 13. can do.

  In the inspection and sorting method according to the present embodiment, when the replenishment step described in the first example is performed, the non-defective chip 10C is loaded into the replenishment tray even if there are a plurality of empty storage portions 14A in the transport tray 13. Since the distances for transporting 71 from the respective non-defective product storage units 71 to the empty storage units 14A of the transport tray 13 are all equal, the control of the non-defective chips by the control unit 9 (movement control of the transport nozzle) can be easily performed. .

  Further, when the replenishment step described in the second embodiment is performed, all the non-defective chips accommodated in the same replenishment tray 71 can be conveyed to the empty accommodation portion 14 </ b> A of the conveyance tray 13. Therefore, even if the replenishment step is performed on the plurality of transport trays 13, the number of replacements of the replenishment tray 71 can be minimized.

  And in the replenishment process described in the first and second embodiments, if a plurality of non-defective chips 10C are collectively transported to a plurality of adjacent empty accommodation portions 14A, a plurality of non-defective chips 10C are formed in a short time. It can be accommodated in the empty accommodating portion 14A. In addition, a configuration (for example, a configuration in which transport nozzles are integrated together) for simultaneously holding a plurality of non-defective chips 10C and transporting them to the empty accommodation portion 14A can be configured in a compact manner.

As mentioned above, although the detail of this invention was demonstrated by embodiment mentioned above, the technical scope of this invention is not limited to this, In the range which does not deviate from the technical idea of this invention, it can change suitably.
For example, if there is no variation in the thickness dimension of the transport tray 13 mounted on the mounting table 3, it is not necessary to provide a correction mechanism and it is not necessary to perform a correction process.

Further, the mounting table 3 is not limited to moving only in the X-axis direction on the base 2 as in the above embodiment, and may be movable in both the X-axis direction and the Y-axis direction, for example. In this case, the relative displacement in the Y-axis direction between the inspection probe 41 and the discharge nozzle 51 and the semiconductor chip 10 accommodated in the accommodation portion 14 can be corrected in the inspection process and the selection process. If the mounting table 3 is also movable in the Y-axis direction, the semiconductor chip 10 can be inspected even if a large number of accommodating portions 14 are arranged in the transport tray 13 so as to be displaced in the Y-axis direction. Sorting can be performed.
Furthermore, the mounting table 3 is not limited to move in the direction along the upper surface 2a with respect to the base 2, but at least the mounting table 3, the probe unit 4 and the discharge nozzle unit 5 are relatively moved in the direction along the upper surface 2a. Just move. Therefore, for example, the mounting table 3 may be fixed to the base 2 and the probe unit 4 and the discharge nozzle unit 5 may be movable with respect to the mounting table 3 in the X-axis direction and the Y-axis direction.

  Further, the plurality of inspection probes 41 are not limited to be fixed integrally by the probe holding portion 42 but are attached to the beam portion 22A of the portal frame 22 so as to be movable at least in the vertical direction (Z-axis direction). It only has to be. Therefore, for example, the plurality of inspection probes 41 may be individually attached to the portal frame 22, and in this case, the movement of the individual inspection probes 41 may be controlled by the control unit 9. This also applies to the plurality of discharge nozzles 51.

Furthermore, the plurality of inspection probes 41 and the discharge nozzles 51 are not limited to being movable only in the vertical direction (Z-axis direction), and can be moved in a direction (Y-axis direction) orthogonal to the movement direction of the mounting table 3, for example. Also good. In this case, the number of the inspection probes 41 and the discharge nozzles 51 arranged in the Y axis direction may be smaller than the number of the accommodating parts 14 arranged in the Y axis direction, for example.
In the replenishment step of the above embodiment, the non-defective chips are transferred from the replenishment tray 71 to the empty storage portion 14A of the transfer tray 13 by the transfer means. For example, the non-defective chips are transferred manually without using the transfer means. You may convey to the empty accommodating part 14A of the tray 13. FIG.

DESCRIPTION OF SYMBOLS 1 Inspection sorting apparatus 3 Mounting stand 4 Probe unit 4A Probe standby position 4B Inspection position 41 Inspection probe L1 Movement length 5 Discharge nozzle unit 5A Nozzle standby position 5B Adsorption position 51 Discharge nozzle L2 Movement length 7 Replenishment mechanism 71 Replenishment tray 72 , 72A, 72B, 72C, 72D Non-defective product storage portion 73 Stocker 10 Semiconductor chip 10A Non-defective chip 10C Non-defective chip 13 Transport tray 14 Storage portion 14A Empty storage portion 61 Displacement meter

Claims (4)

A semiconductor chip inspection / sorting device for inspecting electrical characteristics of a semiconductor chip and sorting the semiconductor chip into a non-defective chip and a defective chip according to an inspection result,
A mounting table on which a transport tray formed by arranging a plurality of storage units for storing the semiconductor chips is mounted;
A plurality of inspection probes provided at least vertically movable on the mounting table and capable of simultaneously inspecting at least a plurality of the semiconductor chips among the plurality of semiconductor chips accommodated in the transfer tray;
A plurality of discharge nozzles provided at least vertically movable on the mounting table and capable of simultaneously discharging a plurality of defective chips determined to have a poor electrical property inspection result from the inspection probe from the transport tray When,
A replenishment mechanism that stores separate non-defective chips with respect to an empty storage portion of the transport tray in which the defective chips are stored among a large number of the storage sections after the defective chips are discharged;
Equipped with a,
The replenishment mechanism includes a replenishment tray configured to accommodate the separate non-defective chips in a plurality of non-defective product storage units, a stocker for installing one or more replenishment trays, and the replenishment tray in the replenishment tray. Transporting means for transporting / accommodating non-defective chips in the empty storage section of the transport tray disposed on the mounting table,
The plurality of non-defective product storage units are arranged in the same manner as the plurality of storage units of the transport tray;
The semiconductor characterized in that the transport means transports the separate non-defective chips accommodated in the non-defective product accommodating portion at a predetermined position of the replenishment tray corresponding to the position of the empty accommodating portion to the empty accommodating portion. Chip inspection and sorting device. Detecting the height position of the upper surface of the transfer tray placed on the mounting table,
Based on the detection result, the length of the downward movement of the plurality of inspection probes from the probe standby position spaced above the semiconductor chip to the inspection position for contacting the semiconductor chip and inspecting the semiconductor chip is determined. Correct,
And,
A correction mechanism for correcting a downward movement length of the plurality of discharge nozzles from a nozzle standby position spaced above the semiconductor chip to a suction position for sucking the semiconductor chip based on the detection result; The semiconductor chip inspection and sorting apparatus according to claim 1, further comprising: A semiconductor chip inspection / sorting method for inspecting electrical characteristics of a semiconductor chip and sorting the semiconductor chip into a non-defective chip and a non-defective chip according to an inspection result,
An inspection step of simultaneously inspecting at least a plurality of the semiconductor chips out of a large number of the semiconductor chips on the transport tray in a state where the semiconductor chips are housed in a housing portion formed by arranging a large number of the semiconductor chips on the transport tray;
A sorting step of simultaneously discharging a plurality of defective chips determined to be defective in electrical characteristics among a number of semiconductor chips inspected in the inspection step, from the transport tray,
After the sorting step, a replenishment step of storing separate non-defective chips with respect to the empty storage portion of the transport tray in which the defective chips are stored among a number of the storage portions;
Equipped with a,
Before the replenishment step, a replenishment tray is prepared by arranging a large number of non-defective storage units in the same manner as the large number of storage units of the transport tray, and the separate non-defective chips are provided in the large number of non-defective product storage units. Contain
In the replenishing step, the separate non-defective chips accommodated in the non-defective product accommodating portion at a predetermined position of the replenishment tray corresponding to the position of the empty accommodating portion of the transport tray are conveyed to the empty accommodating portion. A semiconductor chip inspection / selection method. In the replenishment step, when a plurality of the empty accommodation portions are adjacent to each other in the same transport tray, the plurality of non-defective chips arranged so as to be adjacent to each other in the replenishment tray are collectively contained in the plurality of empty accommodations. The semiconductor chip inspection / selection method according to claim 3 , wherein the semiconductor chip inspection / selection method is performed.

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