JP5588748B2 - Grinding equipment - Google Patents

Description

  The present invention relates to a grinding apparatus for positioning a semiconductor wafer in a predetermined direction and position with respect to a holding means when grinding the semiconductor wafer.

  A semiconductor chip on which a device such as an IC or LSI is formed is indispensable for downsizing various electronic devices. In this semiconductor chip, the surface of a substantially disk-shaped semiconductor wafer is divided into a plurality of rectangular areas by grid-like division lines (streets), devices are formed in the divided rectangular areas, and then along the division lines. In this way, the rectangular area is divided.

  In such a semiconductor chip manufacturing process, the semiconductor wafer is ground to a predetermined thickness by a grinding apparatus prior to the division of the semiconductor wafer. This grinding apparatus holds a semiconductor wafer before division on a chuck table, and grinds the semiconductor wafer by relative rotation between the chuck table and a grinding wheel. By the way, in the semiconductor wafer, an irregular shape portion such as an orientation flat or a notch showing a crystal orientation is formed on the outer peripheral edge portion, and the orientation is specified by the irregular shape portion. For this reason, in the grinding apparatus, it is necessary to carry the semiconductor wafer in a predetermined direction and position with respect to the chuck table.

  2. Description of the Related Art Conventionally, as a grinding apparatus for adjusting the position and orientation of a semiconductor wafer, one in which an alignment mechanism is provided in detection means for detecting the outer peripheral shape of the semiconductor wafer is known (see, for example, Patent Document 1). The alignment mechanism includes a temporary placement table (supporting portion) having a smaller diameter than the semiconductor wafer and a plurality of pins that are movable in the radial direction around the temporary placement table with respect to the center of the temporary placement table. In the alignment mechanism, when the semiconductor wafer is placed on the temporary placement table, the plurality of pins are brought into contact with the outer peripheral surface of the semiconductor wafer and aligned with the center of the temporary placement table.

  Moreover, the detection means has a light emitting part and a light receiving part which are vertically opposed so as to sandwich the outer peripheral edge of the semiconductor wafer on the temporary placement table. In the detection means, after the semiconductor wafer is aligned with the temporary placement table by the alignment mechanism, the temporary placement table is rotated to receive the light from the light emitting portion through the irregular shape portion of the semiconductor wafer, The orientation of the semiconductor wafer is detected. The semiconductor wafer is loaded into the chuck table by the loading means while being positioned in a predetermined direction and position with respect to the temporary placement table, so that the direction and position of the semiconductor wafer with respect to the chuck table are positioned.

JP 2010-34249 A

  However, in the above-described conventional grinding apparatus, the position of the semiconductor wafer placed on the temporary placement table is adjusted by the positioning mechanism, and the orientation is adjusted based on the detection of the irregularly shaped portion by the detection unit. Therefore, there is a problem that the apparatus configuration becomes complicated and the manufacturing cost of the apparatus increases.

  The present invention has been made in view of such a point, and can reduce the manufacturing cost with a simple apparatus configuration, and can carry in the semiconductor wafer in a desired orientation and position with respect to the holding means. An object of the present invention is to provide a grinding apparatus capable of performing the above.

The grinding apparatus of the present invention comprises a holding means for holding a wafer having an orientation flat in which a circular shape and a part of an arc are cut out in a flat shape so as to be rotatable about a vertical direction as a rotation axis, and the wafer held by the holding means A grinding device having a grinding means for grinding the wafer and a carry-in means for carrying the wafer into the holding means, and a center position of a circle of the wafer having a circular shape before carrying the wafer into the holding means; And detecting means for detecting the position of the orientation flat, wherein the detecting means is an imaging unit arranged so that an imaging range includes a support part for supporting a wafer and the entire wafer supported by the support part. And a calculation unit that processes data captured by the imaging unit and calculates the center position and the orientation flat position. The loading means loads the wafer based on the center position calculated by the calculation unit so that the center position is positioned at a desired position on the holding unit, and the holding unit calculates by the calculation unit. the orientation flat of the orientation flat on the basis of the position adjusting the orientation of said holding means so as to be positioned in a predetermined orientation on said holding means, said wafer and said Rukoto passed to the holding means .
In the above grinding apparatus, the calculation unit calculates a temporary center position of the wafer from data captured by the imaging unit, and the orientation flat is based on a distance from the temporary center position to the outer peripheral position of the wafer. And calculating the center position of the wafer based on the outer peripheral position of the wafer avoiding the temporary position of the orientation flat, and based on the distance from the center position to the outer peripheral position of the wafer. The position of the orientation flat is calculated.

  According to this configuration, the center position of the semiconductor wafer is positioned at a desired position on the holding table by the loading means, and the orientation flat is positioned in a predetermined direction by the holding means. For this reason, the detection means only needs to detect the center position of the semiconductor wafer and the position of the orientation flat, and a semiconductor wafer alignment mechanism with respect to the support portion as in the conventional grinding apparatus becomes unnecessary. In addition, since the center position of the semiconductor wafer and the position of the orientation flat are detected from the data captured by the image pickup unit, it is necessary to provide a mechanism for detecting the center position of the semiconductor wafer and a mechanism for detecting the position of the orientation flat. There is no. Therefore, the manufacturing cost can be reduced by using a simple grinding machine.

  According to the present invention, the manufacturing cost can be reduced with a simple apparatus configuration, and the semiconductor wafer can be carried in a state of being positioned in a desired direction and position with respect to the holding means.

It is a figure which shows embodiment of the grinding device which concerns on this invention, and is an external appearance perspective view of a grinding device. It is a figure which shows embodiment of the grinding apparatus which concerns on this invention, and is explanatory drawing of the calculation process of the temporary center position of a semiconductor wafer. It is a figure which shows embodiment of the grinding device which concerns on this invention, and is explanatory drawing of the calculation process of the temporary formation position of orientation flat. It is a figure which shows embodiment of the grinding apparatus which concerns on this invention, and is a figure which shows an example of a differentiation process. It is a figure which shows embodiment of the grinding apparatus which concerns on this invention, and is explanatory drawing of the calculation process of the center position of a semiconductor wafer. It is a figure which shows embodiment of the grinding device which concerns on this invention, and is explanatory drawing of the calculation process of the formation position of orientation flat. It is a figure which shows embodiment of the grinding apparatus which concerns on this invention, and is explanatory drawing of the positioning operation | movement of the position and direction of a semiconductor wafer with respect to a chuck table. BRIEF DESCRIPTION OF THE DRAWINGS It is a figure which shows embodiment of the grinding device which concerns on this invention, and is the elements on larger scale of the grinding device at the time of pre-operation work. It is a figure which shows embodiment of the grinding apparatus which concerns on this invention, and is explanatory drawing of the correction process at the time of the linear movement of a wafer supply part. It is a figure which shows embodiment of the grinding device which concerns on this invention, and is explanatory drawing of the correction process at the time of the turning movement of a wafer supply part.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 is an external perspective view of a grinding apparatus according to an embodiment of the present invention. In the following description, an example in which the alignment process, which is a characteristic part of the present invention, is applied to a grinding apparatus will be described. However, not only the grinding apparatus but also the orientation and center position of a semiconductor wafer are set on a chuck table (holding means). It is also possible to apply to a processing apparatus for positioning.

  As shown in FIG. 1, the grinding apparatus 1 rotates the chuck table 3 holding the semiconductor wafer W with the back side facing upward and the grinding wheel 59 of the grinding unit (grinding means) 4 relative to each other to rotate the semiconductor. The back surface of the wafer W is ground. The semiconductor wafer W is formed in a substantially disc shape, and is divided into a plurality of regions by unscheduled division lines (not shown) arranged on the surface in a grid pattern. In each region partitioned by the division lines, devices such as IC and LSI are formed in the center of the semiconductor wafer W.

  In addition, the semiconductor wafer W is formed with an orientation flat 66 showing a crystal orientation by cutting a part of the outer peripheral edge into a flat shape. A protective tape is attached to the front surface of the semiconductor wafer W, and the device is protected by this protective tape when the back surface of the semiconductor wafer W is processed. The semiconductor wafer W configured as described above is carried into the grinding apparatus 1 while being accommodated in the cassette 6 on the carry-in side.

  In the present embodiment, a semiconductor wafer W such as a silicon wafer (Si), gallium gallium (GaAs), or silicon carbide (SiC) will be described as an example of the workpiece. However, the present invention is not limited to this configuration. . For example, ceramic, glass, sapphire-based inorganic material substrates, ductile materials such as plate metals and resins, and various processed materials that require flatness on the order of micron to submicron order (TTV: total thickness variation) may be used as the workpiece. . The flatness referred to here indicates the difference between the maximum value and the minimum value among the heights measured in the thickness direction using the surface to be ground of the workpiece as a reference surface.

  The grinding apparatus 1 has a substantially rectangular parallelepiped base 2, and a pair of cassette mounting portions 11 and 12 on which the cassettes 6 and 7 are mounted are provided on the base 2 so as to protrude forward from the front surface 8. It has been. The cassette mounting portion 11 functions as a carry-in port, and the carry-in cassette 6 in which the unprocessed semiconductor wafer W is accommodated is placed. The cassette mounting portion 12 functions as a carry-out port, and the carry-out cassette 7 in which the processed semiconductor wafer W is accommodated is placed.

  On the upper surface of the base 2, a loading / unloading arm 13 for loading and unloading the semiconductor wafer W with respect to the cassettes 6 and 7 is provided facing the cassette mounting portions 11 and 12. On one side of the loading / unloading arm 13, a detection unit (detection means) 14 that detects the center position of the semiconductor wafer W before processing and the orientation flat 66 is provided. A cleaning unit 15 for cleaning the processed semiconductor wafer W is provided on the other side of the loading / unloading arm 13.

  Between the detection unit 14 and the cleaning unit 15, a wafer supply unit (carrying means) 16 that supplies the unprocessed semiconductor wafer W to the chuck table 3 and a wafer that collects the processed semiconductor wafer W from the chuck table 3. A collection unit 17 is provided. Further, on the upper surface of the base 2, a rectangular opening 21 extending in the front-rear direction is formed adjacent to the wafer supply unit 16 and the wafer recovery unit 17, and the grinding unit 4 is disposed behind the opening 21. A supporting column 22 is erected. In addition, a control unit 23 that performs overall control of the grinding device 1 is provided inside the base 2.

  The opening 21 is covered with a movable plate 24 that can move together with the chuck table 3 and a bellows-like dust-proof cover 25. Below the dust cover 25, a ball screw type moving mechanism (not shown) for moving the chuck table 3 in the front-rear direction is provided. The chuck table 3 is reciprocated between a transfer position where the semiconductor wafer W is transferred to the wafer supply unit 16 and the wafer recovery unit 17 and a processing position facing the grinding unit 4 by a moving mechanism.

  The carry-in / out arm 13 includes a multi-node link mechanism 31 having a wide driving area and a holding portion 32 provided at the tip of the multi-node link mechanism 31. The loading / unloading arm 13 drives the multi-node link mechanism 31 to load the semiconductor wafer W accommodated in the loading-side cassette 6 into the detection unit 14, and from the cleaning unit 15 to the loading-side cassette 7. Contains W.

  The detection unit 14 includes a temporary placement table (support unit) 35 on which the semiconductor wafer W is temporarily placed by the loading / unloading arm 13 and an imaging unit 36 that images the semiconductor wafer W temporarily placed on the temporary placement table 35. ing. The temporary placement table 35 is formed in a disk shape having a smaller diameter than the semiconductor wafer W. Further, the periphery of the temporary placement table 35 is a light emitting surface 37, and the semiconductor wafer W temporarily placed on the temporary placement table 35 is irradiated from below.

  The imaging unit 36 is supported above the temporary placement table 35 via an L-shaped support arm 38, and is arranged so that the entire semiconductor wafer W on the temporary placement table 35 falls within the imaging range. The imaging unit 36 reads the outer shape of the semiconductor wafer W by irradiation from the light emitting surface 37 and generates image data of the semiconductor wafer W. The image data picked up by the image pickup unit 36 is output to the control unit 23, and the center position of the semiconductor wafer W and the formation position of the orientation flat 66 are obtained. That is, a calculation unit of the detection unit 14 is configured by a part of the control unit 23.

  The wafer supply unit 16 is provided with a pivot shaft 41 extending in the vertical direction, a swing arm 42 supported by the upper end of the pivot shaft 41, and a suction that holds the semiconductor wafer W by suction. Holding part 43. The rotation shaft 41 is configured to be movable up and down, back and forth, and rotatable. The position of the suction holding portion 43 in the horizontal plane is adjusted by moving the rotating shaft 41 back and forth and rotating, and the position in the height direction is adjusted by moving the rotating shaft 41 up and down.

  The wafer supply unit 16 is driven and controlled by the control unit 23, and the control unit 23 adjusts the amount of movement of the rotation shaft 41 in the vertical direction, the amount of movement in the front-rear direction, and the rotation amount. Then, the wafer supply unit 16 is controlled by the control unit 23, sucks and holds the semiconductor wafer W from the temporary placement table 35, and supplies it to the chuck table 3. At this time, alignment is performed so that the center of the semiconductor wafer W coincides with the center of the chuck table 3.

  The wafer collection unit 17 has substantially the same configuration as the wafer supply unit 16 except that it does not move back and forth. The wafer collection unit 17 is controlled by the control unit 23 to suck and hold the semiconductor wafer W from the chuck table 3 and collect it, and places it on the cleaning table 51 of the cleaning unit 15. At this time, since the center of the chuck table 3 and the center of the cleaning table 51 are located on the turning trajectory of the wafer recovery unit 17, the center of the semiconductor wafer W is aligned with the center of the cleaning table 51.

  The cleaning table 51 is formed in a disk shape having a smaller diameter than the semiconductor wafer W. The cleaning table 51 descends to the base 2 through the opening 52 when the processed semiconductor wafer W is placed. The cleaning table 51 cleans the semiconductor wafer W by being sprayed with cleaning water while rotating at a high speed. Thereafter, the cleaning table 51 is rotated at a high speed, and the spray of cleaning water is stopped to dry the semiconductor wafer W.

  The chuck table 3 is formed in a disk shape, and has a suction surface 27 for sucking and holding the semiconductor wafer W on the upper surface. The suction surface 27 is formed of a porous ceramic material and is connected to a suction source (not shown) disposed in the base 2. Further, the suction surface 27 has a shape in which a portion corresponding to the orientation flat 66 is cut out along the outer shape of the semiconductor wafer W. The orientation of the chuck table 3 is defined by the orientation of the portion corresponding to the orientation flat 66.

  The chuck table 3 is connected to a rotation drive mechanism (not shown) and is configured to be rotatable by the rotation drive mechanism. The chuck table 3 is rotationally driven by a rotational drive mechanism when the semiconductor wafer W is placed by the wafer recovery unit 17, and the orientation of the suction surface 27 is aligned with the orientation of the semiconductor wafer W.

  A grinding unit moving mechanism 54 that moves the grinding unit 4 in the vertical direction is provided on the front surface of the support column 22. The grinding unit moving mechanism 54 includes a pair of parallel guide rails 55 extending in the vertical direction, and a motor-driven Z-axis table 56 slidably installed on the pair of guide rails 55. A nut portion (not shown) is formed on the back side of the Z-axis table 56, and a ball screw 57 is screwed to the nut portion. A drive motor 58 is connected to one end of the ball screw 57, and the ball screw 57 is rotationally driven by the drive motor 58.

  The grinding unit 4 is supported on the front surface of the Z-axis table 56 via a support portion 53. The grinding unit 4 has a grinding wheel 59 that is detachably attached to the lower end of a spindle (not shown). The grinding wheel 59 is made of, for example, a diamond grindstone in which diamond abrasive grains are hardened with a binder such as metal bond or resin bond. Then, the grinding unit 4 is ground and fed in the Z-axis direction while confirming the grinding amount with respect to the semiconductor wafer W moved to the processing position.

  The control unit 23 calculates the center position of the semiconductor wafer W and the position of the orientation flat 66 by the detection unit 14, aligns the semiconductor wafer W by the wafer supply unit 16, and processes the orientation of the semiconductor wafer W by the chuck table 3. Each process is executed. The control unit 23 includes a processor that executes various processes, a memory, and the like. The memory is composed of one or a plurality of storage media such as a ROM (Read Only Memory) and a RAM (Random Access Memory) depending on the application. The memory stores an orthogonal plane coordinate system (see FIG. 7) for image data together with a control program for each process.

  The central position of the circular semiconductor wafer is obtained by preparing two line segments connecting two arbitrary points on the outer peripheral edge and intersecting the perpendicular bisectors of these line segments, but the orientation flat 66 is formed. In addition, the center position of the semiconductor wafer W according to the present embodiment may not be obtained accurately by this method. Further, if the exact center position of the semiconductor wafer W is not obtained, the orientation flat forming position cannot be obtained accurately, and the orientation of the semiconductor wafer W cannot be specified.

  Therefore, the detection unit 14 first obtains a temporary center position that is an approximate center position of the semiconductor wafer W, and determines an orientation flat temporary formation position that is an approximate orientation flat formation position based on the temporary center position. Seeking. Then, the detection unit 14 accurately obtains the center position of the semiconductor wafer W and the formation position of the orientation flat 66 based on the provisional center position of the semiconductor wafer W and the provisional formation position of the orientation flat 66. .

  With reference to FIG. 2 to FIG. 6, the calculation processing of the center position of the semiconductor wafer and the formation position of the orientation flat will be described. First, the process of calculating the temporary center position of the semiconductor wafer will be described. FIG. 2 is an explanatory diagram of the calculation processing of the temporary center position of the semiconductor wafer according to the embodiment of the present invention.

  As shown in FIG. 2A, when the semiconductor wafer W is imaged by the imaging unit 36, the control unit 23 performs edge detection processing of the image data of the semiconductor wafer W, and the semiconductor wafer W is displayed in the orthogonal plane coordinate system. A contour line indicating the outer peripheral edge of is drawn. Next, as shown in FIG. 2B, among the plots constituting the outline of the semiconductor wafer W, all the center coordinates between two points facing each other in the X-axis direction are obtained and plotted, and all the plots are connected. Thus, the line L1 is obtained. Similarly, all the center coordinates between two points facing each other in the Y-axis direction among the plots constituting the outline of the semiconductor wafer W are obtained and plotted, and the line L2 is obtained by connecting all the plots.

  In this case, the line L1 and the line L2 include edge information of the orientation flat 66, and are partially swelled line segments. For this reason, the intersection of the line L1 and the line L2 cannot be used as the center coordinate of the semiconductor wafer W. In addition, although it was set as the structure which calculates all the center coordinates of an X-axis direction and a Y-axis direction from the outline of the semiconductor wafer W, it is not necessarily required to calculate all the center coordinates, and it changes suitably according to calculation accuracy etc. Is possible.

  Next, as shown in FIG. 2C, the average value of the X coordinates of the plot constituting the line L1 is calculated, and an average line L3 passing through this average value and parallel to the Y axis is drawn. Accordingly, a plot having an X coordinate larger than the average value is positioned on the right side of the average line L3, and a plot having an X coordinate smaller than the average value is positioned on the left side of the average line L3. Then, the number of plots located on the right side of the average line L3 is compared with the number of plots located on the left side of the average line L3, and all plots on the side with the smaller number of plots are discarded. In FIG. 2C, all plots on the right side of the average line L3 are discarded.

  Similarly, the average value of the Y coordinates of the plots constituting the line L2 is calculated, and an average line L4 passing through this average value and parallel to the X axis is drawn. Accordingly, a plot having a Y coordinate larger than the average value is positioned above the average line L4, and a plot having a Y coordinate smaller than the average value is positioned below the average line L4. Then, the number of plots positioned above the average line L4 and the number of plots positioned below the average line L4 are compared, and all plots on the side with the smaller number of plots are discarded. In FIG. 2C, all the plots above the average line L4 are discarded.

  Next, as shown in FIG. 2D, the average line L5 is drawn except for the plot discarded from the plot constituting the line L1 again. Then, the number of plots on the left and right of the average line L5 is compared, and all plots on the side with the smaller number of plots (the right side of the average line L5) are discarded. Similarly, the average line L6 is drawn except for the plot discarded from the plot constituting the line L2. Then, the upper and lower plot numbers of the average line L6 are compared, and all plots on the side with the smaller number of plots (the upper side of the average line L6) are discarded.

  As described above, by repeating the calculation process of the average line, the intersection of the average line of the line L1 and the average line of the line L2 approaches the center coordinate of the semiconductor wafer W. In the present embodiment, as shown in FIG. 2E, the intersection of the average lines L7 and L8 after the above process is repeated twice is set as a temporary center position of the semiconductor wafer W.

  Next, the calculation process of the temporary formation position of orientation flat is demonstrated. FIG. 3 is an explanatory diagram of the calculation process of the temporary formation position of the orientation flat according to the embodiment of the present invention.

  When the temporary center position of the semiconductor wafer W is obtained, the distance from the temporary center position of the semiconductor wafer W to the outer peripheral position at each angle is measured. In this case, since the temporary center position of the semiconductor wafer and the actual center position are eccentric, a sin curve W1 as shown in FIG. 3A is obtained. In the sin curve W1, the portion of the orientation flat 66 has a shape that partially falls.

  Next, as shown in FIG. 3B, the sin curve W1 is differentiated to obtain a waveform W2 in which the local change becomes remarkable. In this case, for example, as shown in FIG. 4, calculation data is obtained from the plot constituting the sin curve W1, and the waveform W2 is obtained by plotting the calculation data for each angle. Any method may be used for the differentiation process as long as the local change in the waveform is conspicuous.

  Next, as shown in FIG. 3C, the waveform W2 is further differentiated to obtain a waveform W3 in which a local change becomes remarkable. Also in this case, as shown in FIG. 4, the calculation data is obtained from the plots forming the waveform W2, and the waveform W3 is obtained by plotting the calculation data for each angle. Thus, by repeating the differentiation, the change in the value at the location where the orientation flat 66 is formed becomes significant.

  Here, the shape of the orientation flat 66 is determined by the standard, and by comparing the waveform W3 with the conditions set based on the standard, it is possible to identify the orientation flat 66 by distinguishing it from fine chips. It is. A threshold value T1 in FIG. 3C indicates a threshold value of the local change amount of the outer peripheral edge set based on a known orientation flat. In the waveform W3, a position where a peak value exceeding the threshold value T1 exists is set as an orientation flat edge candidate.

  Angle ranges R1 and R2 in FIG. 3C indicate an upper limit range and a lower limit range of an angle range in which an orientation flat set based on a known orientation flat exists. In the waveform W3, among the peak values exceeding the threshold T1, a pair of peak values that are smaller than the angle range R1 and larger than the angle range R2 is determined as a temporary formation position of the orientation flat 66. In this manner, an approximate angular range where the orientation flat 66 exists is detected as a temporary formation position of the orientation flat 66.

  Next, the calculation process of the center position of the semiconductor wafer W will be described. FIG. 5 is an explanatory diagram of the calculation processing of the center position of the semiconductor wafer according to the embodiment of the present invention.

  As shown in FIG. 5A, three plots A, B, and C are extracted from the outline of the semiconductor wafer W based on the temporary center coordinates of the semiconductor wafer W and the temporary formation position of the orientation flat 66. . The plot A is set on an arc 180 degrees opposite to the temporary formation position (angle range) of the orientation flat 66 with the temporary center position interposed therebetween. Plots B and C are set at positions rotated ± 120 degrees from plot A.

  As described above, three plots are set on the outline of the semiconductor wafer W while avoiding the orientation flat 66. Then, the center position of the semiconductor wafer W is accurately obtained from the intersection of the perpendicular bisector connecting the plot A and the plot B and the perpendicular bisector connecting the plot A and the plot C. . In the present embodiment, plot B and plot C are set at positions rotated ± 120 from plot A, but the present invention is not limited to this. The plot may not be set on the orientation flat 66.

  As shown in FIG. 5B, when two orientation flats 66 and 67 are formed on the semiconductor wafer W, the plot A is set on an arc between the formation positions of the two orientation flats 66 and 67. The plots B and C are set at positions rotated ± 120 degrees from the plot A. As shown in FIG. 5C, when three orientation flats 66, 67, 68 are formed on the semiconductor wafer W, the plot A shows two orientation flats excluding the smallest orientation flat 68. The plots B and C are set on a circular arc between the formation positions of the flats 66 and 67, and the plots B and C are set at positions rotated ± 120 degrees from the plot A. In addition, when a plurality of orientation flats are formed on the semiconductor wafer W, the relative positional relationship of each is also defined by regulations. Therefore, the plot can be extracted while avoiding the orientation flat according to the relative positional relationship defined by the regulations. Moreover, it is good also as a structure which calculates only the temporary formation position of a single orientation flat, and specifies the temporary formation position of the remaining orientation flats.

  Next, a process for calculating the orientation flat forming position will be described. FIG. 6 is an explanatory diagram of the calculation processing of the orientation flat formation position according to the embodiment of the present invention.

  When the center position of the semiconductor wafer W is accurately obtained, the distance from the center position of the semiconductor wafer W to the outer peripheral position at each angle is measured. In this case, a waveform W4 as shown in FIG. In the waveform W4, the orientation flat 66 is partially depressed.

  Next, as shown in FIGS. 6B and 6C, the waveform W4 is differentiated twice and compared with the condition set based on the standard, as in the case where the temporary formation position of the orientation flat 66 is obtained. As a result, the formation position of the orientation flat 66 is detected with high accuracy. In this way, the center position of the semiconductor wafer W and the formation position of the orientation flat 66 are calculated with high accuracy. The orientation of the semiconductor wafer W is detected from the orientation flat formation position (angle range).

  With reference to FIG. 7, the positioning operation of the position and orientation of the semiconductor wafer with respect to the chuck table will be described. FIG. 7 is an explanatory diagram of the positioning operation of the position and orientation of the semiconductor wafer with respect to the chuck table according to the embodiment of the present invention.

  As shown in FIG. 7, in the orthogonal plane coordinate system, the center coordinate P2 of the chuck table 3 stored in advance, the calculated center coordinate P1 of the semiconductor wafer W and the angle θ1 indicating the direction of the semiconductor wafer W are set. Yes. First, based on the difference between the center coordinate P2 of the chuck table 3 and the center coordinate P1 of the semiconductor wafer W, the controller 23 calculates the amount of movement and the amount of rotation of the rotation axis 41 of the wafer supply unit 16 in the front-rear direction. At the same time, the rotation amount of the chuck table 3 is calculated based on the angle θ1 indicating the direction of the semiconductor wafer W.

  Next, the wafer supply unit 16 moves from the state positioned above the temporary placement table 35 and moves the rotation shaft 41 downward, and sucks and holds the semiconductor wafer W by the suction holding unit 43 and moves up. Next, the wafer supply unit 16 drives the rotation shaft 41 according to the movement amount and rotation amount of the rotation shaft 41 in the front-rear direction calculated by the control unit 23 so that the semiconductor wafer W is placed above the chuck table 3. Position. At this time, the center position of the semiconductor wafer W matches the center position of the chuck table 3.

  Next, the chuck table 3 is rotated by an angle θ1 from the initial state where the chuck table 3 is directed in the positive Y-axis direction, and the orientation of the chuck table 3 is made to coincide with the orientation of the semiconductor wafer W. Next, the wafer supply unit 16 moves the rotation shaft 41 downward to release the suction of the suction holding unit 43. In this manner, the center of the semiconductor wafer W is aligned with the center of the chuck table 3 and the direction of the semiconductor wafer W is aligned with the direction of the chuck table 3.

  Thus, since the semiconductor wafer W is aligned with the chuck table 3 in a state where the orientation of the semiconductor wafer W is aligned with the orientation of the chuck table 3, the semiconductor wafer W matches the suction surface 27 of the chuck table 3. Is placed as follows. Accordingly, the orientation flat 66 formed on the semiconductor wafer W and the portion corresponding to the orientation flat 66 on the suction surface 27 coincide with each other, and it is possible to prevent the suction force from being lowered due to the positional deviation between the semiconductor wafer W and the suction surface 27. The

  By the way, in order to carry the wafer supply unit 16 so that the center of the semiconductor wafer W is aligned with the center of the chuck table 3, the orthogonal plane coordinate system used for the operation of the wafer supply unit 16 and the orthogonal plane of the image data of the imaging unit 36 are used. The coordinate system must match. Therefore, in the grinding apparatus 1 according to the present embodiment, adjustment is performed so that the wafer supply unit 16 operates in the orthogonal plane coordinate system used in the imaging unit 36 before operation.

  As shown in FIG. 8, when adjusting the wafer supply unit 16, an adjustment plate 61 is attached instead of the plate provided with the temporary placement table 35 and the light emitting surface 37 used during processing. The adjustment plate 61 is provided with a light emitting surface 62 at a central position facing the imaging unit 36. Also, the wafer supply unit is changed from processing to adjustment for the replacement of the plate. The adjustment wafer supply unit 63 has a through-hole 65 corresponding to the center position of the suction holding unit 64.

  Therefore, above the light emitting surface 62, the light from the light emitting surface 62 is taken into the imaging unit 36 through the through hole 65 of the wafer supply unit 63. Then, the movement locus of the through-hole 65 in the orthogonal plane coordinate system of the imaging unit 36 is obtained by moving the wafer supply unit 63 while being imaged by the imaging unit 36. In the detection unit 14, the correction value of the wafer supply unit 63 in the orthogonal plane coordinate system of the imaging unit 36 is calculated based on the movement trajectory of the through hole 65 in the light emitting surface 62.

  With reference to FIGS. 9 and 10, the correction process of the wafer supply unit will be described. FIG. 9 is an explanatory diagram of a correction process during linear movement of the wafer supply unit according to the embodiment of the present invention. FIG. 10 is an explanatory diagram of a correction process when the wafer supply unit according to the embodiment of the present invention performs a turning movement. Note that the vertical axis and the horizontal axis in FIGS. 9B and 10B respectively indicate the Y axis and the X axis of the orthogonal plane coordinates of the imaging unit.

  As described above, the position of the wafer supply unit 63 is adjusted within the horizontal plane by linear movement and turning movement in the front-rear direction. Accordingly, the linear movement and the turning movement of the wafer supply unit 63 are individually performed, and the correction value is obtained based on each movement locus drawn by the through hole 65. As shown in FIG. 9A, when the wafer supply unit 63 is linearly moved, the through hole 65 is linearly moved within the light emitting surface 62 as indicated by an arrow D1. And the movement locus | trajectory of the center point of the through-hole 65 is acquired by the control part 23 as linear motion imaging data.

  Next, as shown in FIG. 9B, a graph showing the movement locus of the linear movement of the wafer supply unit 63 in the orthogonal plane coordinate system of the imaging unit 36 is obtained from the linear motion imaging data. This graph shows that, in the orthogonal plane coordinate system of the imaging unit 36, the wafer supply unit 16 moves while being displaced in an oblique direction when moving linearly. As described above, the amount of deviation between the linear movement of the wafer supply unit 16 and the Y axis of the orthogonal plane coordinates of the imaging unit 36 is obtained from the linear motion imaging data.

  As shown in FIG. 10A, when the wafer supply unit 63 is pivoted, the through hole 65 is moved in an arc shape in the light emitting surface 62 as indicated by an arrow D2. And the movement locus | trajectory of the center point of the through-hole 65 is acquired by the control part 23 as turning motion imaging data. Next, as shown in FIG. 10B, a graph showing the movement trajectory of the turning motion of the wafer supply unit 16 in the orthogonal plane coordinate system of the imaging unit 36 is obtained from the turning motion imaging data. From this graph, the coordinates of the turning center of the wafer supply unit 16 are obtained.

  The coordinates of the turning center of the wafer supply unit 16 are obtained from, for example, two line segments connecting two plots on the movement locus and the intersection of these perpendicular bisectors. Then, a correction value is calculated based on the shift amount of the linear movement of the wafer supply unit 16 and the turning center in the orthogonal plane coordinates of the imaging unit 36. With this correction value, the orthogonal plane coordinate system used for the operation of the wafer supply unit 16 matches the orthogonal plane coordinate system of the imaging unit 36. The wafer supply unit 16 is driven and controlled based on the correction value, and can be transported so that the center of the semiconductor wafer W is aligned with the center of the chuck table 3 in the orthogonal plane coordinate system of the imaging unit 36.

  Here, the flow of the overall grinding operation by the grinding apparatus will be described. First, the semiconductor wafer W before processing is taken out from the cassette 6 by the loading / unloading arm 13 and temporarily placed on the temporary placement table 35. Next, the semiconductor wafer W is imaged by the imaging unit 36, and the center position of the semiconductor wafer W and the formation position of the orientation flat 66 are calculated based on the captured image data. Next, the center of the semiconductor wafer W is positioned at the center of the chuck table 3 by the wafer supply unit 16 based on the center position of the semiconductor wafer W. In this case, the orthogonal plane coordinate system used for the operation of the wafer supply unit 16 matches the orthogonal plane coordinate system of the imaging unit 36.

  Next, the orientation of the semiconductor wafer W is matched with the orientation of the chuck table 3 based on the orientation flat formation position. The semiconductor wafer W held on the chuck table 3 is ground to a predetermined thickness by the grinding unit 4 at the processing position. Next, the ground semiconductor wafer W is transferred to the cleaning table 51 by the wafer recovery unit 17 at the transfer position. Next, the processed semiconductor wafer W is cleaned by the cleaning table 51, and the semiconductor wafer W is accommodated in the cassette 7 by the loading / unloading arm 13.

  As described above, according to the grinding apparatus 1 according to the present embodiment, the center of the semiconductor wafer W is positioned at the center of the chuck table 3 by the wafer supply unit 16, and the orientation flat 66 is oriented in a predetermined direction by the chuck table 3. Positioned on. For this reason, the detection part 14 should just detect the center position of the semiconductor wafer W and the formation position of the orientation flat 66, and the alignment mechanism with respect to the semiconductor wafer on a temporary placement table like the conventional grinding device becomes unnecessary. Further, since the center position of the semiconductor wafer W and the formation position of the orientation flat 66 are detected from the data captured by the image pickup unit 36, the mechanism for detecting the center position of the semiconductor wafer W and the formation position of the orientation flat 66 are detected. There is no need to provide a separate mechanism. Therefore, the manufacturing cost can be reduced by using the grinding device 1 as a simple device configuration.

  In the above-described embodiment, the provisional center position of the semiconductor wafer is calculated by obtaining the average line in the X-axis direction and the Y-axis direction from the image data of the semiconductor wafer. It is not limited to. The provisional center position of the semiconductor wafer may be calculated by any method as long as it is calculated based on the image data of the semiconductor wafer.

  Further, in the above-described embodiment, the temporary formation position of the orientation flat is calculated by obtaining a local change in the distance from the temporary center position of the semiconductor wafer to the outer peripheral edge. However, the present invention is not limited to this configuration. The temporary formation position of the orientation flat may be calculated by any method as long as it is calculated based on the image data of the semiconductor wafer.

  Further, in the above-described embodiment, the configuration is such that the center of the semiconductor wafer is calculated by extracting any three points on the outer peripheral edge of the semiconductor wafer, but is not limited to this configuration. The center position of the semiconductor wafer may be calculated by any method as long as it is calculated based on the image data of the semiconductor wafer. For example, it is also possible to detect two points from the outline obtained from the image data and set the intersection of the normals from these two points as the center of the semiconductor wafer.

  Further, in the above-described embodiment, the configuration in which the orientation flat forming position is calculated by obtaining a local change in the distance from the center position of the semiconductor wafer to the outer peripheral edge portion is used. It is not limited. The formation position of the orientation flat may be calculated by any method as long as it is calculated based on the image data of the semiconductor wafer.

  Further, in the above-described embodiment, the imaging unit is configured to be disposed so as to fit the entire semiconductor wafer in the imaging range, but is not limited to this configuration. The imaging unit only needs to be able to capture image data of the entire semiconductor wafer, and may be configured to generate image data of the entire semiconductor wafer by combining a plurality of image data.

  In the above-described embodiment, the calculation unit is configured as a part of the control unit, but is not limited to this configuration. The calculation unit may be provided separately from the control unit.

  In the above-described embodiment, the orientation flat has been exemplified and described as the irregularly shaped portion that defines the orientation of the semiconductor wafer. However, the present invention is not limited to this configuration. It is only necessary that the direction of the semiconductor wafer can be specified at the outer peripheral edge of the semiconductor wafer, and a notch may be used instead of the orientation flat.

  In the above-described embodiment, the rotation amount of the chuck table is controlled to match the direction of the semiconductor wafer and the chuck table. However, the present invention is not limited to this configuration. Any configuration is possible as long as the orientation of the semiconductor wafer and the orientation of the chuck table can be matched. For example, the orientation may be matched on the wafer supply unit side.

  The embodiment disclosed this time is illustrative in all respects and is not limited to this embodiment. The scope of the present invention is shown not by the above description of the embodiments but by the scope of the claims, and is intended to include all modifications within the meaning and scope equivalent to the scope of the claims.

  As described above, according to the present invention, the manufacturing cost can be reduced with a simple apparatus configuration, and the semiconductor wafer can be carried in a desired orientation and position with respect to the holding means. In particular, the present invention is useful for a grinding apparatus that positions a semiconductor wafer in a predetermined direction and position with respect to the holding means when grinding the semiconductor wafer.

1 Grinding equipment 2 Base 3 Chuck table (holding means)
4 Grinding unit (grinding means)
14 Detection part (detection means)
16, 63 Wafer supply section (carry-in means)
23 Control unit (calculation unit)
27 Suction surface 35 Temporary table (support)
36 Imaging unit 37, 62 Light emitting surface 38 Support arm 41 Rotating shaft 42 Rotating arm 43, 64 Suction holding unit 59 Grinding wheel 61 Adjustment plate 65 Through hole 66 Orientation flat W Semiconductor wafer (work)

Claims (2)

A holding means for holding a wafer having an orientation flat that is circular and has a portion of an arc cut out in a flat manner so as to be rotatable about the vertical direction as a rotation axis;
Grinding means for grinding the wafer held by the holding means;
Loading means for loading a wafer into the holding means, and a grinding apparatus comprising:
A detecting means for detecting a center position of a circle of the wafer having a circular shape and a position of the orientation flat before carrying the wafer into the holding means;
The detection means includes
A support for supporting the wafer;
An imaging unit arranged so that the entire wafer supported by the support unit is included in the imaging range;
A calculation unit that processes data captured by the imaging unit to calculate the center position and the orientation flat position;
The carrying-in means is
Based on the center position calculated by the calculation unit, the wafer is loaded so that the center position is positioned at a desired position on the holding unit,
The holding means is
The calculating unit the orientation flat on the basis of the orientation flat of the position calculated in the adjusting the orientation of said holding means so as to be positioned in a predetermined orientation on the holding means, the wafer is transferred to said holding means A grinding apparatus characterized by that. The calculation unit calculates a temporary center position of the wafer from data captured by the imaging unit, calculates a temporary position of the orientation flat based on a distance from the temporary center position to the outer peripheral position of the wafer, The center position of the wafer is calculated based on the outer peripheral position of the wafer avoiding the temporary position of the orientation flat, and the position of the orientation flat is calculated based on the distance from the center position to the outer peripheral position of the wafer. The grinding apparatus according to claim 1.

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