JP5573738B2 - Manufacturing method of MEMS switch - Google Patents

Description

The present invention relates to MEMS (m icro e lectro m echanical s ystem) switch manufacturing method. An electromechanical member having a component with dimensions shorter than mm order is called MEMS.

  Silicon processing technology is highly developed with advances in integrated circuits and is suitable for MEMS fabrication. An SOI substrate in which an active Si layer is bonded using a silicon oxide film as an adhesive film (bonding oxide film BOX film) on a supporting Si substrate can reduce the active Si layer and form a dielectric-isolated high-performance Si element. In addition, the silicon oxide film can be selectively removed with dilute hydrofluoric acid or the like, and can be used for manufacturing a MEMS having a movable part. In general, an SOI substrate is manufactured by thermally oxidizing at least one of a pair of Si substrates and thermocompression bonding the pair of Si substrates through a silicon oxide film.

  In order to meet the demand for miniaturization and high performance of radio frequency (RF) parts such as cellular phones, research and development of RF signal change-over switches using MEMS technology have been actively conducted. The MEMS switch is a mechanical switch, can reduce parasitic capacitance, has less loss, has higher insulation, and has better signal distortion characteristics than a switch using a semiconductor element.

  A movable cantilever can be formed by patterning the active silicon layer of the SOI substrate into a cantilever shape and etching away the BOX film below the cantilever. A switch can be formed by forming a movable electrode on the cantilever and a fixed electrode extending above the movable electrode and making the cantilever deformable upward. As means for deforming the cantilever upward, a method using a piezoelectric member, a method using an electrostatic drive electrode, and the like are known.

  Japanese Patent Application Laid-Open No. 2006-261515 forms a switch by forming a movable contact electrode at the tip of a cantilever, and forming a pair of fixed contact electrodes extending from the fixed portions on both sides above the movable contact electrode. Forming a piezoelectric drive unit including a piezoelectric material layer sandwiched between a pair of drive electrodes in a region from the base to the intermediate position, and forming a groove in a cantilever (active Si layer) around the piezoelectric drive unit suggest.

  The fixed contact electrode has a structure having a gap in the lower part and faces the lower movable contact electrode. When a voltage is applied between the opposing electrodes with the same structure, a driving force can be obtained by electrostatic attraction.

  A structure in which an electrostatic drive structure is formed by opposing electrodes and a cantilever is driven by electrostatic drive is known. For example, an RF-MEMS switch can be formed by a movable contact formed on a cantilever and a bridge-shaped fixed electrode formed so as to straddle the movable contact.

  Japanese Patent Laid-Open No. 2007-196303 provides a movable electrode for a switch at the tip of a cantilever, a movable electrostatic drive electrode at the middle of the cantilever, a pair of fixed switch electrodes above the movable electrode for switches, and a bridge above the movable electrostatic drive electrode When a suitable fixed drive voltage is applied to the opposing electrostatic drive electrode, a cantilever is formed by the electrostatic attraction generated between the movable electrostatic drive electrode and the bridge-like fixed electrostatic drive electrode. Discloses a microswitch in which the cantilever returns to its original state and the contact point returns to its original state by elasticity when the switch movable electrode is closed between a pair of fixed switch electrodes and the drive voltage is turned off. ing. Hereinafter, the drawings of the publication will be restored and described.

  12A is a plan view showing a state in which a lower electrode is formed on the surface of the SOI substrate, FIG. 12B is a plan view showing a state in which an upper electrode structure overhanging the lower electrode is formed, and FIG. 12C is a ZC in FIG. 12B. It is sectional drawing which follows the -ZC line. For convenience of illustration, the left and right sides of FIG. 12C are reversed.

  As shown in FIG. 12C, the SOI substrate has a structure in which an active silicon layer AL is coupled to a support silicon substrate SS via a bonding oxide (silicon oxide) film BOX. The active silicon layer AL has a high resistivity of 1000 Ω · cm or more. The thickness of the active silicon layer AL is, for example, 5 μm to 20 μm, and the thickness of the bonding oxide film BOX is, for example, 2 μm to 4 μm. The supporting silicon substrate SS is supplied with a thickness of 400 μm to 600 μm. The supporting silicon substrate SS is a member for providing physical support, and the supporting silicon substrate SS is thinly processed as necessary.

  As shown in FIG. 12A, the lower electrode including the movable contact electrode MCE and the movable drive electrode MDE is formed on the active silicon layer AL. A movable portion of a cantilever beam (cantilever) CL is defined by a slit S penetrating the active silicon layer AL. In this state, the bonding oxide film BOX below the movable portion has not been removed yet.

  The width of the slit S is, for example, 1.5 μm to 2.5 μm, and the length of the cantilever CL is, for example, 700 μm to 1000 μm. The tip and middle portions of the cantilever CL are patterned broadly, and the movable contact electrode MCE and the movable drive electrode MDE are formed thereon. The width of the tip of the cantilever is 100 μm to 200 μm. The movable drive electrode MDE is drawn downward in the figure to define a connection region. These movable electrodes MCE and MDE are formed by stacking, for example, a Cr layer having a thickness of 50 nm and an Au layer having a thickness of 500 nm. The electrode can be patterned by lift-off or etching (milling) using a resist pattern.

  The upper electrode structure is a fixed electrode that is supported by a fixed part outside the movable part and has a shape extending above the lower electrode of the movable part. After the slit S is formed, a sacrificial film is formed on the active silicon layer AL so as to cover the movable electrode, and the sacrificial film is patterned to form a plated bottom structure. A plating base film is formed on the plating bottom structure, a resist pattern is formed thereon, a region for forming the plating layer is defined, and then the exposed plating base film is subjected to electrolytic plating. A fixed electrode defined by the plated bottom structure and the resist pattern is formed. The sacrificial film can be formed of a silicon oxide film, for example. The plating base film is formed by stacking, for example, a Cr film having a thickness of 50 nm and an Au layer having a thickness of 500 nm. The plating layer is, for example, electrolytically plated with gold.

  After plating, the resist pattern is removed, the exposed plating base film is removed, and the sacrificial film is removed. The plating base Cr film exposed by the sacrificial film removal is further removed. The bonding oxide film BOX under the cantilever is removed by etching.

  As shown in FIG. 12B, a pair of fixed contact electrodes FCE extending above the movable contact electrode MCE and a bridge type fixed drive electrode FDE are formed above the movable drive electrode MDE. The pair of fixed contact electrodes FCE is connected to a high frequency RF signal line, and constitutes a high frequency switch for turning on / off the high frequency signal.

  FIG. 12C shows a cross section taken along the line ZC-ZC in FIG. 12B, and shows a spaced-apart relationship between the movable electrode and the fixed electrode. For example, when the fixed drive electrode FDE is grounded and a predetermined potential is applied to the movable drive electrode MDE, an electrostatic attractive force is generated, and the cantilever CL is displaced upward. Along with the cantilever CL, the movable contact electrode MCE is displaced upward to connect the pair of fixed contact electrodes FCE.

A sticking phenomenon in which the movable part sticks to the support part is also known. In order to avoid the sticking phenomenon of the cantilever structure, Japanese Patent Application Laid-Open No. 2007-196303 initially has a shape that leaves a support beam (support beam) that divides the slit and connects a plurality of portions of the cantilever beam to a fixed portion. It is proposed to support the cantilever CL during the BOX film removal process and then remove the support beam by reactive ion etching (RIE) using SF ₆ gas. The support beam has a width of 0.3 μm to 50 μm.

  In the structure described above, the high-frequency movable electrode FCE, the drive electrode MDE to which a predetermined potential is applied, and the ground electrode FDE are disposed on the active silicon layer AL. Even if the active silicon layer AL has a high resistivity, crosstalk or leakage occurs between the high frequency electrode FCE and the drive electrodes FDE and MDE.

JP 2006-261515 A JP 2007-196303 A

  Attempts to adopt a new structure for the microswitch using the cantilever created a new problem. When an SOI substrate is used and a slit for separating the electrode region is formed in the active Si layer, and then a sacrificial film for plating is deposited and the slit is backfilled, the confluence portion of the slit is not easily blocked by the sacrificial film, Problems occur in subsequent processes.

According to one embodiment, a method for manufacturing a MEMS switch includes:
An active Si layer is bonded to the supporting Si substrate through a bonding oxide film, and a cantilever region and an electrode supporting region for supporting the electrode are defined in the active Si layer of the SOI substrate adjacent to the cantilever region;
Forming a plurality of through holes penetrating the active Si layer in the cantilever region;
Etching away the bonding oxide film under the cantilever region through the through hole to form a cavity,
Forming a movable electrode on the cantilever region;
In the slit pattern that defines the cantilever region and the electrode support region, the slit penetrates through the active Si layer leaving a separation wall of the active Si layer separating the slits at a position where a plurality of slits meet. Form the
A sacrificial film is formed on the active Si layer by filling the slit,
Selectively etching the sacrificial film, patterning a bottom structure of the three-dimensional electrode exposing a part of the electrode support region,
Forming a plating underlayer on the patterned sacrificial film and on the exposed electrode support region;
Forming a resist pattern defining the planar shape of the three-dimensional electrode on the plating base layer;
Electrolytic plating is performed on the plating base layer to form a fixed electrode supported by the electrode support region and having a portion overhanging the movable electrode,
Removing the resist pattern and the sacrificial film;
The separation wall of the unnecessary active Si layer is removed.

  By forming the slit and forming the sacrificial film while leaving the separation wall at the slit joining portion, it is possible to reliably close the slit with the sacrificial film. Unnecessary separation walls can be removed to obtain a desired configuration.

FIG. 1A is a plan view schematically showing a microswitch having a new configuration, and FIG. 1B is a cross-sectional view showing a bonding oxide film removing step. FIG. 2A is a plan view showing a planar arrangement in a chip, and FIGS. 2B and 2C are cross-sectional views showing manufacturing steps. FIG. 3A is a plan view showing a pattern of a lower electrode, and FIGS. 3B and 3C are cross-sectional views schematically showing a slit etching process and a sacrificial film forming process. FIGS. 4A, 4B, and 4C are plan views and FIGS. 4D and 4E are cross-sectional views showing sacrificial film deposition at the junction of the slits. 5A and 5B are a plan view and an enlarged view showing a slit pattern according to the embodiment. 6A and 6B are a plan view and a cross-sectional view showing a plating process. 7A, 7B, and 7C are a plan view and a cross-sectional view after the plating process is completed. 8A, 8B, and 8C are plan views and FIGS. 8D and 8E are cross-sectional views of a slit joining portion according to a modification of the embodiment. FIG. 9 is a plan view of a slit pattern according to a modification of the embodiment. FIG. 10 is a plan view of a slit pattern according to a modification of the embodiment. FIG. 11 is a plan view showing a modification of the embodiment. 12A, 12B, and 12C are plan views showing a state in which electrodes are formed on the surface of a known SOI substrate, a plan view showing a state in which a three-dimensional electrode structure is formed on the SOI substrate surface, and a ZC-ZC line in FIG. 12B. FIG.

  FIG. 1A is a plan view schematically showing a microswitch with a new configuration studied by the present inventors. The cantilever CL is basically horizontally long and is supported by two flexible beams FB at both lateral ends. It is expected that the stability of operation can be increased.

  On the cantilever CL, the drive electrode and the switch electrode are arranged in the horizontal direction and are basically displaced by the same amount. The displacement amplification effect cannot be obtained, but the stability of the operation is expected to increase. The micro switch has a structure in which a single movable contact MCE and a single fixed contact FCE are in contact with and separated from each other. A decrease in the failure rate is expected due to the decrease in the number of contacts.

  In the microswitch shown in FIG. 1A, in order to remove the bonding oxide film BOX in the hatched portion, as shown in FIG. 1B, through holes TH are distributedly formed in the active semiconductor (Si) layer in the cantilever region, and bonding oxidation is performed. The film is removed in advance by etching. By forming the through holes TH in a distributed manner, the amount of side etching for removing the BOX film under the cantilever is reduced, and the side etching amount of the bonding oxide film BOX outside the cantilever region can be suppressed. If etching with dilute hydrofluoric acid or the like is performed for a long time, an accident such as electrode peeling may occur, but the probability of occurrence of such an accident can be suppressed by shortening the etching time. An increase in the available area of the active Si layer is also expected.

  In addition to forming a cantilever, a slit S that electrically separates a region supporting each plating electrode (referred to as a plating electrode region) from the surrounding active semiconductor layer is formed through the active semiconductor (Si) layer. It is expected that the electrical separation between the electrodes is improved and the leakage of the RF signal is reduced. In addition, when the slit S is formed so as to surround each plating electrode region, a joining portion J of the slit S is generated.

  First, a description will be given along preliminary experiments conducted by the present inventors based on the above idea. As shown in FIG. 2A, a planar arrangement in the SOI chip is set. In order to realize the functional element as shown in FIG. 1A, the positions of the slit S and the junction J that define the cantilever region CL and other electrode regions are determined. In the SOI substrate, for example, a (100) Si layer having a resistivity of 1000 Ωcm or more and a thickness of 15 μm is bonded to a Si support substrate having a thickness of 300 μm to 600 μm, for example, 525 μm, via a thermal oxide film having a thickness of 4 μm. Is. The dimension of the SOI chip is, for example, about 500 to 800 μm × 600 to 900 μm, the dimension of the rectangular region of the cantilever is, for example, about 120 μm × 450 μm, and the dimension of the flexible beam extending the short side of the rectangle is about 40 μm × 120 μm.

As shown in FIG. 2B, in order to remove the bonding oxide film BOX in the cantilever region CL, a resist pattern PR1 having openings distributed in the cantilever region CL is formed, and the active Si layer AL in the opening is etched to form a through hole. Form TH. Each opening has a size of about 2 μm × about 6 μm, for example. Etching is performed, for example, by deep RIE (deep reactive ion etching) (Bosch process) using SF ₆ as an etching gas and C ₄ F ₈ as a deposition gas.

  The bonding oxide film BOX exposed in the opening is etched with, for example, buffered hydrofluoric acid. The required side etching amount is determined by the distance between the openings. The bonding oxide film BOX in the cantilever region CL is removed, and a void (cavity) CV is formed between the active semiconductor (Si) layer AL and the support substrate SS in the cantilever region CL. Also in the fixing part adjacent to the cavity CV, for example, the bonding oxide film BOX having a width of about 20 μm is removed from the slit position.

  Thereafter, the resist pattern is removed, and as shown in FIG. 2C, a lower electrode layer LE is deposited, a resist pattern PR2 is formed on the lower electrode layer LE, and the exposed lower electrode layer LE is etched to be patterned. To do. The lower electrode LE is formed by, for example, laminating a Cr layer having a thickness of 50 nm and an Au layer having a thickness of 500 nm by sputtering. Even if the lower electrode layer cannot be formed in the opening, the area of each opening is narrow, and the electrode layer patterned around the opening is continuous, and no problem occurs. Thereafter, the resist pattern PR2 is removed. Hereinafter, the opening TH in the active Si layer AL and the lower electrode layer LE is not shown.

  FIG. 3A is a top view of a state in which the lower electrode layer is patterned. The positions of the cross-sectional views of FIGS. 3B and 3C are indicated by a one-dot broken line. A movable contact electrode MCE for switching is formed in the upper part of the cantilever CL region in the figure, and a movable drive electrode MDE is formed in the lower part from the middle part in the figure. Both electrodes pass through the flexible beam FB in the cantilever region CL and extend to the external fixing portion. A lower electrode is also formed in the fixed drive electrode FDE region facing the movable drive electrode MDE. The position of the slit S is indicated by a broken line.

As shown in FIG. 3B, a resist pattern PR3 having an opening in the slit S formation region is formed, and the active Si layer AL exposed in the opening is etched to form a slit S penetrating the active Si layer AL. The slit width is about 2 μm, for example. Etching is performed, for example, by deep RIE using SF ₆ as an etching gas and C ₄ F ₈ as a deposition gas. The bonding oxide film BOX under the active Si layer AL of the cantilever CL has already been removed. The cantilever CL can be displaced vertically by the flexibility of the flexible beam FB. Thereafter, the resist pattern PR3 is removed.

  The fixed electrode is supported by the fixed portion, has a portion that crosses over the slit S and overhangs above the lower electrode. Therefore, it is necessary to form the lower electrode and the slit before forming the fixed electrode. After forming the cavity CV below the active Si layer AL of the cantilever CL and forming the slit S around the cantilever CL, it is preferable to temporarily close the slit S in order to form a fixed electrode crossing the slit S.

  As shown in FIG. 3C, a sacrificial film SF is deposited on the active Si layer AL by chemical vapor deposition (CVD). Also in the slit S, the film deposited on the side wall gradually protrudes, and eventually the slit S is closed. For example, tetraethoxysilane (TEOS) is used as a Si source gas, and a silicon oxide film is deposited to a thickness of about 4 μm by plasma CVD.

  FIG. 4D is a schematic cross-sectional view showing the deposition of the sacrificial film SF in the slit S. The sacrificial film SF is deposited not only on the surface of the active Si layer AL but also on the side wall of the slit S formed in the active Si layer AL. Here, paying attention to the thickness of the sacrificial film deposited on the side wall of the slit S, the upper part is deposited as thick as the upper surface, but the deposited film thickness becomes thinner toward the lower side.

  FIG. 4A is a plan view of the junction J of the slit. A linear slit S1 is formed in the horizontal direction in the figure, and there is a slit S2 that rises vertically from below in the figure and merges with the slit S1 at the junction J. The state of deposition of the sacrificial film SF at the junction J will be described.

  As shown in FIG. 4B, the sacrificial film SF is deposited on the upper surface of the active Si layer AL, and is also deposited on the sidewalls in the slit S so as to gradually close the slit from both sides of the slit S. However, at the junction J of the slits S1 and S2, there is a region where there are no opposing side walls, and it is difficult to block.

  As shown in FIG. 4C, the sacrificial films grown from both sides of the slit S are in contact with each other except for the merged portion J, and an opening AP remains in the merged portion J even if a continuous sacrificial film grows. Further, by depositing the sacrificial film SF, the opening AP gradually becomes smaller and disappears soon.

  FIG. 4E is a cross-sectional view showing a state where the sacrificial films SF grown from both sides are in contact with each other and grow further. The sacrificial film SF is patterned by etching and functions as a layer for making a plating mold. A sacrificial film having a sufficient thickness is grown by continuing the film formation even after the opening AP disappears.

  When the deposition of the sacrificial film SF is completed in a state where the opening AP remains, or in a state where the thickness of the sacrificial film where the opening AP disappeared but the opening is present, the etching process performed subsequently is performed. The opening AP connects the gap below the slit and the outside. In particular, a form in which the narrow opening AP connects the external space and the cavity CV below the active Si layer AL may occur at the junction J at a position in contact with the cantilever CL.

  When the photolithography process is performed in such a state, the resist enters the slit S and the cavity CV from the opening. The resist that has entered the slit or cavity cannot be removed and may remain until the end. It may cause device malfunction. For this reason, the sacrificial film is designed to be thick in order to completely seal the slit with the sacrificial film. When the sacrificial film is thickened, the wafer is warped due to the film stress, resulting in insufficient depth of focus during exposure, which may cause problems. If the confluence portion of the slit is formed in this way, a problem arises in sacrificial film deposition that closes the slit.

  FIG. 5A is a plan view showing an improved slit pattern. The difference from the slit S shown in FIG. 1A will be mainly described. In the slit S of FIG. 5A, the slit shape in the junction part J is changed. In the junction part J, a separation wall is left between two slits to be joined.

  As shown in FIG. 5B, it is assumed that the vertical slit S2 joins the horizontal slit S1 from the lower side. For example, it is assumed that the slits S1 and S2 have a certain width w. The slit S1 is divided into two parts by the slit S2, and the slits S1 are arranged on both sides of the slit S2 through the separation wall PW having a predetermined width. Both the slits S1 and S2 have a constant width w and are initially separated from each other and do not merge. A slit having a constant width can be reliably closed by depositing a sacrificial film having a predetermined thickness.

  Using the slit pattern of FIG. 5A, an etching process for forming the slit S shown in FIG. 3B is performed. In the pattern of the slits S to be formed, as shown in FIG. 5A, there is no junction where two or more slits are directly connected.

  As shown in FIG. 3C, a sacrificial film SF of silicon oxide is deposited on the active Si layer AL by chemical vapor deposition (CVD). For example, tetraethoxysilane (TEOS) is used as a Si source gas, and a silicon oxide film is deposited to a thickness of about 4 μm by plasma CVD. Since the slit S has a constant width of 2 μm, the film deposited on the side wall gradually protrudes and the slit S is reliably closed. In the valley-shaped portion, film formation proceeds from both sides, and the valley is backfilled.

  Thereafter, using the three resist masks, a 3 μm deep etch, a 0.5 μm deep etch, and a 0.5 μm deep etch are selectively performed on the sacrificial film SF having a thickness of 4 μm. The active Si layer AL is exposed in a region that has been etched by a total of 4 μm by three etchings. By etching at 3 μm and 0.5 μm, a hole having a depth of about 3.5 μm is formed in the sacrificial film SF above the movable contact electrode MCE to define the contact of the fixed contact electrode FCE. A recess having a depth of about 3.0 μm is formed in the sacrificial film SF above the movable drive electrode MDE by etching of 3 μm, and defines a bridge portion of the fixed drive electrode MDE. Even when the movable contact electrode MCE is in contact with the contact of the fixed contact electrode FCE, a gap of about 0.5 μm remains between the drive electrode pair MDE and FDE. The fixed electrodes FCE and FDE having a portion extending above the movable electrode are formed by plating.

  As shown in FIGS. 6A and 6B, first, a seed layer SD is formed over the entire surface of the active Si layer AL so as to cover the sacrificial film SF. For example, a Mo layer having a thickness of 50 nm and an Au layer having a thickness of 500 nm are stacked by sputtering to form the seed layer SD. A resist pattern PR5 is formed on the seed layer SD so as to cover a region not to be plated. The region of the resist pattern PR5 is indicated by the hatched portion in FIG. 6A. An Au plating layer PL is formed with a thickness of 15 μm, for example, on the seed layer SD by electrolytic plating. Thereafter, the resist pattern PR5 is removed, the exposed seed layer SD is removed by milling using Ar ions, and the exposed sacrificial film SF is removed by etching with buffered hydrofluoric acid or the like. The Mo layer on the lower surface of the plating layer PL exposed by removing the sacrificial film SF is removed by etching. The slit S provided with the separation wall PW shown in FIGS. 5A and 6A is exposed.

The separation wall PW that has separated the slits at the junction J is removed by RIE using SF ₆ gas. By removing the separation wall PW, the slits to be merged actually merge. By this etching, the entire active Si layer AL is also subject to etching, but the thickness of the active Si layer AL is sufficiently thick with respect to the etching amount, and no problem occurs.

  7A, 7B, 7C show the resulting structure. 7A is a plan view, FIG. 7B is a cross-sectional view taken along line B-B, and FIG. 7C is a cross-sectional view taken along line B-C. The separation wall PW between the slits is removed, the slits have a continuous shape as shown in FIG. 1A, and the cantilever CL can be displaced up and down. The movable contact electrode MCE is disposed below the fixed contact electrode FCE, and the movable drive electrode MDE is disposed below the bridge-shaped fixed drive electrode FDE. When an electrostatic attractive force is generated between the drive electrodes MDE and FDE, the tip of the cantilever CL supported by the pair of flexible beams FB is displaced upward, and the movable electrodes MDE and MCE are displaced upward by the same height. When the movable contact electrode MCE contacts the fixed contact electrode FCE, the switch is turned on. At this time, the movable drive electrode MDE is still at a position away from the fixed drive electrode.

  The plated electrode region on which the high-frequency electrode is formed is surrounded by a slit S (except for the cantilever region CL) and is electrically separated from the periphery. Therefore, the leakage of the high frequency signal is suppressed. A sacrificial film is deposited and a plating layer is formed with the separation wall PW remaining at the junction J of the slit S. After the sacrificial film is removed, the separation wall is etched away by RIE with enhanced isotropicity, thereby removing the cavity. The accident in the department has almost disappeared.

  Note that corner rounding may occur in photolithography and etching processes. When the slits S1 and S2 are formed in a state where they are separated by the separation wall PW, if the rounding occurs, the width of the separation wall PW is not constant.

  FIG. 8A shows a slit pattern that can suppress the influence even when rounding occurs. When the vertical slit S2 is merged with the horizontal slit S1, the vertical slit S2 penetrates the horizontal slit S1 and protrudes to the opposite side, and the vertical slit S2 and the horizontal slit are arranged. A separation wall PW is disposed between S1 and S1. In other words, it can be said that a + -shaped junction is set instead of the T-shaped junction.

  FIG. 8B shows a shape in which rounding occurs in lithography and etching, and corners are rounded. Since the slit S2 is disposed so as to penetrate the slit S1, the narrow portion of the slit S2 is mainly disposed above the slit S1, and the slit S2 has the original width on the center line of the slit S1. The interval between the slit S2 and the slit S1 also maintains the original value.

  FIG. 8C shows a state where the Si active layer having the shape shown in FIG. 8B is etched by RIE to remove the separation wall PW. The separation wall PW is cut by a predetermined amount of etching, and a cantilever structure can be realized.

  FIG. 8D is a cross-sectional view taken along the center line of the slit S2 in the state of FIGS. 8A and 8B. The slit S1 is a slit around the cavity CV, and the bonding oxide film BOX has already been removed. The separation wall PW remains above the cavity CV so as to connect the cantilever CL and the surrounding Si active layer.

  FIG. 8E is a cross-sectional view after the RIE etching shown in FIG. 8C. The separation wall PW having a predetermined width disappears by RIE. Due to the etching of Si, the Si support substrate SS is also etched, and a portion having a small etching amount remains as a projection below the separation wall PW.

  The slit shape that keeps the width of the slit constant while leaving the separation wall at the junction is not limited to the above.

  FIG. 9 shows another example of the slit shape provided with the separation wall PW. The slit S1 around the cavity CV is not divided at the joining point, and a separation wall PW is formed in the joining slit S2. In this case, the cantilever CL can be displaced after the etching of the slit S1 is completed. The cantilever CL is preferably fixed during the processing step, and a support beam SB is formed to connect the cantilever CL and the surrounding Si active layer AL. The support beam SB is also removed by the etching for removing the separation wall PW.

  In order to secure the degree of freedom of displacement of the cantilever CL, the bonding oxide film BOX under the cantilever CL is removed with a margin. The cavity CV from which the bonding oxide film BOX has been removed enters, for example, a fixed portion on the outer side having a width of about 20 μm. When the plating layer exhibits compressive stress, the Si active layer may peel off from the Si support substrate. If the Si active layer in the electrode support region is not completely separated by the slit S and is partly continued to another Si active layer region facing through the slit, it is effective to suppress peeling.

  FIG. 10 shows that a separation wall PW similar to the above-described embodiment is formed on one side of the slit S1 at the junction of the slit S1 and the slit S2, and the width on the opposite side (opposite side) is wider than the separation wall PW. The form which forms the combined beam TB which is not removed by RIE is shown. For example, the width of the separation wall is 2 μm, and the width of the combined beam TB is 5 μm. The separation wall PW is removed by etching with a width of 2 μm or more to secure the degree of freedom of displacement of the cantilever CL, and a part of the combined beam TB remains, and the electrode support region surrounded by the slit is connected to the outer fixed region. To do.

  As mentioned above, although this invention was demonstrated along the Example, this invention is not limited to these. For example, the shape of the cantilever is not limited to one in which two flexible beams FB are formed along the short side of the rectangle. The coupling region may be effective if it has a structure that forms a slit that penetrates the active Si layer so as to surround the electrode region adjacent to the cavity.

  FIG. 11 shows an example of a modification. The slit S defines a horizontally long cantilever CL supported by one flexible beam FB, and a cavity is formed in the hatched portion. A movable drive electrode MDE and a movable contact electrode MCE are formed in the length direction of the cantilever CL. A slit S that penetrates the active Si layer is formed so as to surround the plating electrode regions of the fixed drive electrode FDE and the fixed contact electrode FCE. The sacrificial film deposition, plating, and sacrificial film removal steps are performed with the separation wall PW remaining at the junction of the slits S, and then the separation wall PW removal etching is performed in the same manner as in the above-described embodiment.

  In addition, the exemplified materials and numerical values do not have a limiting meaning. It will be apparent to those skilled in the art that various modifications, substitutions, improvements, combinations, and the like can be made.

Hereinafter, the features of the examples will be added.
(Appendix 1)
An SOI substrate in which an active Si layer is bonded to a supporting Si substrate through a bonding oxide film;
A cantilever defined by a first slit penetrating the active Si layer and supported by a fixed part via a flexible beam;
A cavity that is formed by removing a bonding oxide film between the cantilever and the supporting Si substrate, and that can displace the cantilever;
A movable electrode extending from the cantilever to a fixed portion;
A fixed electrode supported by the fixed part and having a fixed contact above the movable electrode;
A second slit surrounding the support portion of the fixed electrode, penetrating the active Si layer, and joining the first slit;
A groove formed in the supporting Si substrate below the first slit, the groove having a protrusion below the joining portion;
MEMS switch having
(Appendix 2)
The MEMS switch according to appendix 1, further comprising a combined beam traversing the second slit that is continuous with the first slit.
(Appendix 3)
The MEMS switch according to appendix 1 or 2, wherein the groove has a protrusion other than the junction.
(Appendix 4)
4. The MEMS switch according to any one of appendices 1 to 3, wherein the cantilever includes a rectangular region and a flexible beam disposed along both short sides of the rectangle.
(Appendix 5)
The MEMS switch according to any one of appendices 1 to 4, wherein the movable electrode includes a movable contact electrode and a movable drive electrode, and the fixed electrode includes a fixed contact electrode and a fixed drive electrode.
(Appendix 6)
An active Si layer is bonded to the supporting Si substrate through a bonding oxide film, and a cantilever region and an electrode supporting region for supporting the electrode are defined in the active Si layer of the SOI substrate adjacent to the cantilever region;
Forming a plurality of through holes penetrating the active Si layer in the cantilever region;
Etching away the bonding oxide film under the cantilever region through the through hole to form a cavity,
Forming a movable electrode on the cantilever region;
In the slit pattern that defines the cantilever region and the electrode support region, the slit penetrates through the active Si layer leaving a separation wall of the active Si layer separating the slits at a position where a plurality of slits meet. Form the
A sacrificial film is formed on the active Si layer by filling the slit,
Selectively etching the sacrificial film, patterning a bottom structure of the three-dimensional electrode exposing a part of the electrode support region,
Forming a plating underlayer on the patterned sacrificial film and on the exposed electrode support region;
Forming a resist pattern defining the planar shape of the three-dimensional electrode on the plating base layer;
Electrolytic plating is performed on the plating base layer to form a fixed electrode supported by the electrode support region and having a portion overhanging the movable electrode,
Removing the resist pattern and the sacrificial film;
Removing the separation wall of the unnecessary active Si layer;
Manufacturing method of MEMS switch.
(Appendix 7)
The manufacturing method of the MEMS switch according to claim 6, wherein the slit defined including the separation wall has a certain width.
(Appendix 8)
The manufacturing method of the MEMS switch according to claim 6 or 7, wherein the plurality of slits have the same width.
(Appendix 9)
The MEMS switch according to any one of claims 6 to 8, wherein the separation wall has a shape connecting the active Si layer in the cantilever region and the active Si layer in the electrode support region. Manufacturing method.
(Appendix 10)
The separation wall includes a separation wall having a first width and a separation wall having a second width larger than the first width, and has a plurality of types of widths, the active Si layer in the cantilever region, The separation wall connecting the active Si layer in the electrode support region has the first width, and the separation wall connecting the electrode support region and the region other than the cantilever region has the second width. The manufacturing method of the MEMS switch of Claim 4.
(Appendix 11)
The method for manufacturing a MEMS switch according to claim 1, wherein when forming the slit, a support beam for connecting the active Si layer in the cantilever region and the active Si layer in the electrode support region is left.

SS support silicon substrate,
BOX bonding oxide (silicon oxide) film,
AL active silicon layer,
MCE movable contact electrode,
MDE movable drive electrode,
FDE fixed drive electrode,
FCE fixed contact electrode,
S slit,
PW separation wall,
CL cantilever,
LE lower electrode,
FB flexible beam,
TH through-hole,
CV cavity,
PR photoresist,
SF sacrificial film,
SD seed layer,
PL plating layer,
GND ground,
SB support beam,
TB combined beam.

Claims (6)

An active Si layer is bonded to the supporting Si substrate through a bonding oxide film, and a cantilever region and an electrode supporting region for supporting the electrode are defined in the active Si layer of the SOI substrate adjacent to the cantilever region;
Forming a plurality of through holes penetrating the active Si layer in the cantilever region;
Etching away the bonding oxide film under the cantilever region through the through hole to form a cavity,
Forming a movable electrode on the cantilever region;
In the slit pattern that defines the cantilever region and the electrode support region, the slit penetrates through the active Si layer leaving a separation wall of the active Si layer separating the slits at a position where a plurality of slits meet. Form the
A sacrificial film is formed on the active Si layer by filling the slit,
Selectively etching the sacrificial film, patterning a bottom structure of the three-dimensional electrode exposing a part of the electrode support region,
Forming a plating underlayer on the patterned sacrificial film and on the exposed electrode support region;
Forming a resist pattern defining the planar shape of the three-dimensional electrode on the plating base layer;
Electrolytic plating is performed on the plating base layer to form a fixed electrode supported by the electrode support region and having a portion overhanging the movable electrode,
Removing the resist pattern and the sacrificial film;
Removing the separation wall of the unnecessary active Si layer;
Manufacturing method of MEMS switch.   The method of manufacturing a MEMS switch according to claim 1, wherein the slit defined including the separation wall has a certain width.   The method for manufacturing a MEMS switch according to claim 1, wherein the plurality of slits have the same width.   The method for manufacturing a MEMS switch according to claim 1, wherein the separation wall has a shape connecting the active Si layer in the cantilever region and the active Si layer in the electrode support region.   The separation wall includes a separation wall having a first width and a separation wall having a second width larger than the first width, and has a plurality of types of widths, the active Si layer in the cantilever region, The separation wall that connects the active Si layer in the electrode support region has the first width, and the separation wall that connects the region other than the electrode support region and the cantilever region has the second width. 5. A method for manufacturing the MEMS switch according to 4.   2. The method of manufacturing a MEMS switch according to claim 1, further comprising a support beam that connects the active Si layer in the cantilever region and the active Si layer in the electrode support region when the slit is formed. 3.

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