JP5563499B2 - Data analysis device, integrated program generation device, and data analysis system - Google Patents

Description

  The present invention relates to a data analysis device, an integrated program generation device, and a data analysis system, and more particularly, a data analysis device that samples and analyzes analog data collected from sensors, and an integrated program that generates a program used in the data analysis device. The present invention relates to a generation device and a data analysis system in which these devices are integrated.

  Systems for analyzing data collected from sensors are known. For example, Patent Document 1 describes a device that multiplexes digital data of a plurality of sensors, converts the data into serial data, and controls the sensor with commands. Further, Patent Document 2 describes a data analysis apparatus that is directly connected to a sensor and extracts and outputs a feature amount from data output from the sensor.

Japanese Patent Laid-Open No. 09-064795 JP 2002-230677 A

  The following analysis was made by the present inventors.

  In the technology described in the above patent document, the data analysis device is designed according to the number and type of sensors to be connected, so when the sensor node is replaced, or when the sensor is added or deleted It becomes difficult to respond.

  In fact, according to these devices, when the sensor is replaced with a sensor having a high sampling rate or when a sensor node is added, there is a possibility that the data transfer is limited by the bandwidth of the serial line. Moreover, since the processing content in the data analysis apparatus is fixed, it is difficult to replace it with a different type of sensor. Furthermore, it is difficult to change the processing performance (for example, the number of parallel processes and the operating frequency) of the data analysis device according to the number of sensor nodes and the sampling rate.

  Therefore, it becomes a problem to be able to efficiently analyze analog data collected from sensors according to the number and type of sensors.

The data analysis apparatus according to the first aspect of the present invention is:
A sensor connection unit that outputs the analog data received from the connected sensors and identifies the number and type of the connected sensors;
An AD converter that converts analog data output from the sensor connector into digital data;
A serial / parallel converter that converts the digital data output from the AD converter from serial data to parallel data;
A selector unit for selecting data from the parallel data output from the serial-parallel converter;
An arithmetic unit that processes the data selected by the selector unit;
A control unit that controls at least one of the AD conversion unit, the serial / parallel conversion unit, the selector unit, and the calculation unit according to the number and type of sensors identified by the sensor connection unit; I have.
Here, the control unit controls the degree of data parallelism of the serial / parallel conversion unit.
Alternatively, the control unit controls a data selection pattern by the selector unit.

An integrated program generation device according to a second aspect of the present invention is:
A sensor connection state input unit for inputting the number and type of sensors;
An AD converter that converts analog data output from the sensor into digital data, a serial / parallel converter that converts the digital data output from the AD converter from serial data to parallel data, and an output from the serial / parallel converter A data analysis device specification input unit that receives as input a specification of a data analysis device having a selector unit that selects data from the parallel data that has been processed, and an arithmetic unit that processes the data selected by the selector unit;
A program input unit that receives as input a first program that represents the processing content of data output from the sensor;
An integrated program generation unit that generates a second program that operates on the arithmetic unit based on the first program according to the number and type of the input sensors and the specifications of the data analysis device. .

  According to the data analysis device, the integrated program generation device, and the data analysis system in which these devices are integrated according to the present invention, analog data collected from sensors can be efficiently analyzed according to the number and type of sensors. .

It is a block diagram which shows the structure of the data analyzer which concerns on 1st Embodiment. It is a block diagram which shows the structure of the integrated program production | generation apparatus which concerns on 2nd Embodiment. It is a block diagram which shows the structure of the data analysis system which concerns on 3rd Embodiment. It is a block diagram which shows the structure of the data analyzer which concerns on 4th Embodiment. It is a figure for demonstrating the 1st operation example of the data analyzer which concerns on 4th Embodiment. It is a figure for demonstrating the 2nd operation example of the data analyzer which concerns on 4th Embodiment. It is a figure for demonstrating the 3rd operation example of the data analyzer which concerns on 4th Embodiment. It is a block diagram which shows the structure of the data analyzer which concerns on 5th Embodiment. It is a block diagram which shows the structure of the data analyzer which concerns on 6th Embodiment. It is a block diagram which shows the structure of the data analyzer which concerns on 7th Embodiment. It is a block diagram which shows the structure of the data analyzer which concerns on 8th Embodiment. It is a block diagram which shows the structure of the integrated program production | generation apparatus which concerns on 9th Embodiment. It is a figure for demonstrating the operation example of the integrated program production | generation apparatus which concerns on 9th Embodiment.

  First, the outline of the present invention will be described. Note that the reference numerals of the drawings attached to this summary are merely examples for facilitating understanding, and are not intended to limit the present invention to the illustrated embodiment.

  According to the present invention, settings (sensor sampling rate, serial / parallel conversion setting, parallel / serial conversion setting, calculation unit setting) prepared in advance for each sensor connection state (combination of a plurality of sensor types and sampling rates). A data analysis apparatus is provided that performs a program and an operation frequency of a calculation unit and starts data analysis.

  In addition, according to the present invention, the sensor sampling rate, serial / parallel conversion setting, parallel / serial conversion setting, and operation frequency of the calculation unit are determined based on the processing capability of the calculation unit for a new sensor connection state. In addition, an integrated program generation device that generates a calculation unit program that integrates individual sensor programs is provided.

  Furthermore, according to the present invention, the necessary arithmetic unit program is generated by the integrated program generation device according to the type and number of sensors connected to the data analysis device, and is transferred to the data analysis device. A data analysis system for starting a simple data analysis process is provided.

  Referring to FIG. 1, the data analysis device (10) outputs analog data received from connected sensors (90-1, 90-2, 90-3,...), And the number of connected sensors and Sensor connection unit (11) for identifying the type, AD conversion unit (16) for converting analog data output from the sensor connection unit (11) into digital data, and digital data output from the AD conversion unit (16) Serial / parallel conversion section (20) for converting the serial data into parallel data, a selector section (23) for selecting data from the parallel data output from the serial / parallel conversion section (20), and a selector section ( 23) Depending on the number and type of sensors (26) that process the data selected in (23) and the sensors identified by the sensor connector (11) A control unit (15) for controlling at least one of the AD conversion unit (16), the serial / parallel conversion unit (20), the selector unit (23), and the calculation unit (26). preferable.

  The control unit (15) may control the sampling rate of the AD conversion unit (16). Further, the control unit (15) may control the data parallelism of the serial / parallel conversion unit (20). Further, the control unit (15) may control the data selection pattern by the selector unit (23). Moreover, you may make it a control part (15) control the operation | movement of the program performed by the calculating part (26). Furthermore, you may make it a control part (15) control the operating frequency of a calculating part (15).

  Referring to FIG. 4, the serial-to-parallel converter (20) includes a number of shift registers (21-11 to 21-m1,..., 21-1n to 21) corresponding to the maximum number of sensors (for example, n). -Mn), and the selector unit (23) includes a number of selectors (for example, m stages) corresponding to the number of stages (for example, m stages) of the plurality of shift registers (21-11 to 21-m1..., 21-1n to 21-mn). 25-m), and the plurality of selectors (25-1,..., 25-m) respectively include a plurality of shift registers (21-11 to 21-m1,..., 21-1n to 21-mn) may be received. Moreover, a control part (15) selects the data from any one of several sensors (90-1, ..., 90-n) by several selectors (25-1, ..., 25-m). You may make it control.

  The arithmetic unit (26) may be a reconfigurable logic circuit, and the control unit (15) may control the logic configuration of the reconfigurable logic circuit.

  Referring to FIG. 8, the data analysis apparatus includes FIFO units (38-1,..., 38-m) that receive data from the selector unit (23) and output the data to the calculation unit (27-1). Also good.

  Further, referring to FIG. 9, the data analysis apparatus receives data from the selector unit (23) and outputs the data to the arithmetic unit (26) via the internal bus (40-1,..., 40-m). May be provided.

  Referring to FIG. 2, the integrated program generation device (50) includes a sensor connection state input unit (51) that inputs the number and type of sensors, and an AD conversion unit that converts analog data output from the sensor into digital data. A serial / parallel converter that converts digital data output from the AD converter from serial data to parallel data, a selector that selects data from the parallel data output from the serial / parallel converter, and A data analysis device specification input unit (52) that receives as input a specification of a data analysis device that has a calculation unit that processes the data selected by the selector unit, and a first that represents the processing content of the data output from the sensor Program input unit (53) for inputting a program, the number and type of input sensors, and the previous According to the specifications of the data analyzer, based on the first program, it is preferably provided with, an integrated program generation unit for generating (55) a second program operating the operation unit.

  Further, the integrated program generation unit (55) selects the sampling rate of the AD conversion unit, the data parallelism of the serial / parallel conversion unit, and the data selection by the selector unit according to the processing content of the first program and the processing capability of the calculation unit. At least one of the pattern and the operation frequency of the arithmetic unit may be determined, and the second program may be generated based on the determined sampling rate, data parallelism, data select pattern, or operation frequency. .

  Referring to FIG. 3, the data analysis system (60) preferably includes the data analysis device (10) and the integrated program generation device (50).

  Moreover, you may make it a calculating part (26) run the 2nd program produced | generated by the integrated program production | generation apparatus (50).

  Further, the control unit (15), based on the sampling rate, data parallelism, data select pattern or operating frequency determined by the integrated program generation unit (55), the AD conversion unit (16), serial / parallel conversion unit ( 20) At least one of the selector unit (23) and the calculation unit (26) may be controlled.

  According to the data analysis device, the integrated program generation device, and the data analysis system in which these devices are integrated according to the present invention, analog data collected from sensors can be efficiently analyzed according to the number and type of sensors. .

(Embodiment 1)
A data analysis apparatus according to a first embodiment will be described with reference to the drawings. FIG. 1 is a block diagram illustrating an example of the configuration of the data analysis apparatus according to the present embodiment. Referring to FIG. 1, the data analysis apparatus 10 includes a sensor connection unit 11, a sensor connection state input unit 13, a control unit 15, an AD conversion unit 16, a serial / parallel conversion unit 20, a selector unit 23, a calculation unit 26, an external I An / F (interface) unit 31, an integrated program storage unit 32, and an integrated program input unit 33 are provided.

  The sensor connection unit 11 is connected to one or more sensors 90-1 to 90-n, takes in analog data output from the sensors into the data analysis device 10, and sets the number and types of the connected sensors in the sensor connection state. Output to the input unit 13.

  The sensor connection state input unit 13 inputs the number and type of connected sensors. The sensor connection state input unit 13 may directly capture the number and type of connected sensors from the sensor connection unit 11. Further, the number and types of connected sensors may be manually set in the sensor connection state input unit 13 by a switch or the like provided outside the data analysis apparatus 10.

  The integrated program input unit 33 inputs a program to be executed by the data analysis apparatus 10 from the outside of the apparatus and stores it in the integrated program storage unit 32.

  The control unit 15 controls the entire data analysis apparatus 10. Specifically, based on the input from the sensor connection state input unit 13, the control unit 15 reads the process executed by the data analysis device 10 from the integrated program recorded in the integrated program storage unit 32, and the AD conversion unit 16. Then, the serial / parallel conversion unit 20, the selector unit 23, and the external I / F unit 26 are set, the program is loaded into the calculation unit 26, and processing of data collected from the sensor is started.

  The computing unit 26 has parallel performance or an operating frequency capable of processing data collected from the plurality of sensors 90-1 to 90-n, and takes in data from the selector unit 23. Further, the calculation unit 26 designates a data selection pattern to the selector unit 23 as necessary.

  The AD conversion unit 16 converts data of one or more sensors 90-1 to 90-n connected to the sensor connection unit 11 into digital data. The data sampling rate in the AD conversion unit 16 is set by the control unit 15.

  The serial / parallel converter 20 converts the digital data (serial data) output from the AD converter 16 into parallel data using a shift register or the like.

  The selector unit 23 selects digital data from one of the plurality of digital data from the plurality of sensors parallelized by a shift register or the like when the arithmetic unit 26 can process the plurality of data simultaneously.

  The external I / F unit 31 outputs the processing result by the calculation unit 26 to the outside of the data analysis device 10. The output destination of the external I / F unit 31 is not particularly limited here. The output destination may be, for example, a network or an actuator.

(Embodiment 2)
An integrated program generation device according to a second embodiment will be described with reference to the drawings. FIG. 2 is a block diagram illustrating an example of the configuration of the integrated program generation device 50 according to the present embodiment. Referring to FIG. 2, the integrated program generation device 50 includes a sensor connection state input unit 51, a data analysis device specification input unit 52, a program input unit 53, an integrated program generation unit 55, and an integrated program output unit 56. .

  The sensor connection state input unit 51 receives as input the number and type of connections of one or more sensors to be processed by the integrated program to be generated.

  The data analysis device specification input unit 52 receives as input the specification of the target architecture of the integrated program to be generated. Here, as the specifications of the target architecture, AD conversion specifications (sampling rate, etc.), serial / parallel conversion specifications (number of shift registers, operating frequency, etc.), selector specifications (operating frequency, etc.), arithmetic specifications (type and number of arithmetic units) , Connection relationship, number of parallel processes, operating frequency), external I / F specifications (bus protocol, etc.), and the like. These target architecture specifications are preferably stored in the database as data analysis device specifications.

  The program input unit 53 receives as input a program in which processing content for each sensor data is described in a high-level language such as C language. These programs are preferably stored in the database in advance as individual sensor programs.

  The integrated program generation unit 55 preferably operates in the data analysis device from the processing program of each sensor based on the connection state of the sensors, that is, the number and type of the connected sensors, and the specifications of the data analysis device. Generate an integrated program. The integrated program generation unit 55 may generate an integrated program for the purpose of processing the data output from the sensor in a short time according to the specifications of the data analysis device, or may process with less power consumption. For this purpose, an integrated program may be generated. Further, the integrated program generation unit 55 may generate an integrated program so as to preferentially process data output from the sensors with higher priority.

  The integrated program output unit 56 outputs the integrated program generated by the integrated program generating unit 55 to the outside of the integrated program generating device 50.

(Embodiment 3)
A data analysis system according to a third embodiment will be described with reference to the drawings. FIG. 3 is a block diagram showing an example of the configuration of the data analysis system 60 of the present embodiment. Referring to FIG. 3, the data analysis system 60 includes a data analysis device 10 and an integrated program generation device 50.

  The data analysis device 10 and the integrated program generation device 50 are connected to each other. That is, the sensor connection state input unit 51 of the integrated program generation device 50 inputs the number and types of connected sensors from the sensor connection unit 11 of the data analysis device 10. On the other hand, the integrated program storage unit 32 of the data analysis device 10 holds the integrated program output from the integrated program output unit 56 of the integrated program generation device 50.

  Note that the data analysis device 10 and the integrated program generation device 50 do not need to be installed at the same site, and may be provided at remote locations as long as they are connected via a network.

(Embodiment 4)
A data analysis apparatus according to the fourth embodiment will be described with reference to the drawings. The data analysis apparatus according to the present embodiment can be realized by a dedicated HW (hardware, hardware).

  FIG. 4 is a block diagram illustrating an example of the configuration of the data analysis apparatus according to the present embodiment. Referring to FIG. 4, the data analysis apparatus includes a sensor connection unit 11, a control unit 15, an AD conversion unit 16, a serial / parallel conversion unit 20, a selector unit 23, a calculation unit 26, and an integrated program storage unit 32. Yes.

  The sensor connection unit 11 includes connection connectors 12-1 to 12-n, and the connection connectors 12-i (i = 1 to n) are connected to the sensor 90-i.

  The AD conversion unit 16 includes amplifiers 17-1 to 17-n and A / D conversion circuits 18-1 to 18-n. The amplifier 17-i (i = 1 to n) amplifies the analog data received from the sensor 90-i via the connection connector and outputs the amplified analog data to the A / D conversion circuit 18-i.

  The serial / parallel converter 20 includes shift registers 21-1i to 21-mi (i = 1 to n). The output of each stage of the shift register is output to the selector unit 23. The operating frequency of the shift register is determined by dividing the master clock signal by the clock dividing circuit.

  The selector unit 23 includes selectors 25-1 to 25-m. The selector 25-j (j = 1 to m) receives data output from the j-th stage register (or shift circuit) 21-ji (i = 1 to n) of the shift register, and any one of them. Is output to the calculation unit 26. That is, each selector inputs data of the same shift stage number of sensor data as the number of connected sensors, selects one of them, and outputs it to the arithmetic unit. The selection patterns (selection patterns) of the selectors 25-1 to 25-m are designated by the arithmetic unit 26 for each clock cycle as necessary. The operating frequency of the selector unit is the same as the operating frequency of the arithmetic unit.

  The computing unit 26 includes a set of m computing units 27-j that operate independently and a transition control circuit 28-j thereof (referred to as a computing block 35-j). The transition control circuit 28-j (j = 1 to m) designates the operation content of the computing unit 27-j and designates a selection pattern for the selector unit 23 for each clock cycle as necessary. The operating frequency can be set for each computation block 35-j that operates independently. The arithmetic blocks are connected by wires when they have the same operating frequency, and are connected by FIFO or the like when they have different operating frequencies. For example, the arithmetic unit 26 can be realized by a reconfigurable logic circuit (or programmable hardware).

  FIG. 5 is a diagram for explaining a first operation example of the data analysis apparatus according to the present embodiment. Referring to FIG. 5, data from two sensors is processed using two calculation blocks 35-1 and 35-2.

  The selector 25-1 receives data from the first-stage registers 21-11, 21-12 of the two-stage shift registers, selects the data from the first sensor 90-1, and selects the first one. To the computing unit 27-1. On the other hand, the selector 25-2 receives data from the second-stage registers 21-21 and 21-22 of the two-stage shift registers, selects the data from the second sensor 90-2, and selects 2 Output to the first computing unit 27-2. That is, in FIG. 5, the calculation block 35-1 processes data from the first sensor 90-1, and the calculation unit lock 35-2 processes data from the second sensor 90-2. The select pattern of the selector unit 23 is set. In FIG. 5, the operating frequencies of the calculation blocks 35-1 and 35-2 are the same as the sampling frequency in the AD conversion unit 16.

  As shown in FIG. 5, according to the data analysis apparatus of the present embodiment, when data from a plurality of sensors having a large amount of data (or a high sampling rate) is handled, the data from each sensor is individually processed. Even when the amount of data increases, it is possible to prevent the computing unit 26 from being insufficient in computing capacity.

  FIG. 6 is a diagram for explaining a second operation example of the data analysis apparatus according to the present embodiment. Referring to FIG. 6, in this operation example, data from two sensors 90-1 and 90-2 are multiplexed and processed by one calculation block.

  The selector 25-1 receives data from the registers 21-11 and 21-12 of the one-stage shift register, selects data from one sensor, and outputs it to the computing unit 27-1. A selection pattern is input from the transition control unit 28-1 to the selector 25-1 every clock cycle, and data from the two sensors is switched every clock cycle and input to the computing unit 27-1.

  For example, the arithmetic unit 27-1 processes data from the sensor 90-1 in an odd clock cycle, and processes data from the sensor 90-2 in an even clock cycle.

  In this operation example, the operation frequency of the calculation block is twice the sampling frequency in the AD conversion unit 16.

  As shown in FIG. 6, according to the data analysis apparatus of the present embodiment, when handling data from a plurality of sensors having a small data amount (or a low sampling rate), the serial / parallel conversion unit 20 and the selector unit are used. By performing the parallel / serial conversion in accordance with 23, data analysis can be performed with a small number of calculation blocks. Therefore, according to the data analysis apparatus of the present embodiment, the computing unit and other resources in the computing unit 26 can be used effectively. This also makes it possible to analyze data from the sensor with low power consumption.

  FIG. 7 is a diagram for explaining a third operation example of the data analysis apparatus according to the present embodiment. Referring to FIG. 7, in this operation example, data from one sensor 90-1 is processed in parallel by two calculation blocks 35-1 and 35-2.

  The selector 25-1 receives data from the first-stage register 21-11 of the two-stage shift registers 21-11 and 21-22 and outputs the data to the arithmetic unit 27-1. On the other hand, the selector 25-1 receives data from the second-stage register 21-21 of the two-stage shift registers 21-11 and 21-22, and outputs the data to the computing unit 27-2. That is, the selector block 23 is set so that the arithmetic block 35-1 processes the first-stage output, and the arithmetic block 35-2 processes the second-stage output.

  In the calculation unit 26, for example, the calculation block 35-1 may process odd-numbered sampling data, and the calculation block 35-2 may process even-numbered sampling data.

  Since the operation blocks 35-1 and 35-2 process two pieces of sampling data at the same time, the operation frequency of the operation blocks 35-1 and 35-2 is half the sampling frequency in the AD conversion unit 16.

  As shown in FIG. 7, according to the data analysis apparatus of the present embodiment, parallel processing of data can be performed by performing serial / parallel conversion by the serial / parallel conversion unit 20. This makes it possible to reduce the operating frequency of the calculation block. Even when the amount of data increases and data output from one sensor cannot be processed with a single calculation block, the data analysis apparatus according to this embodiment processes data using a plurality of calculation blocks. be able to.

  According to the data analysis apparatus of this embodiment, the following effects are brought about. That is, since the arithmetic block is programmable, the processing content and processing performance (number of parallel processes, operating frequency) for data output from the sensor can be changed according to the number and type of sensors.

  In fact, when handling multiple sensor data with a large amount of data (high sampling rate), it is possible to input individual sensor data to individual computation blocks. This can be prevented (FIG. 5).

  In addition, when handling data from multiple sensors with a small amount of data (low sampling rate), parallel / serial conversion (data multiplexing by the selector unit) can be used to perform operations less than the number of sensors. Data analysis can be performed using blocks (FIG. 6).

  Further, when one sensor block cannot be processed by one calculation block due to an increase in data amount, parallel processing of data can be performed by performing serial / parallel conversion (FIG. 7). In addition, even if the data amount is the same, if there is room in the operation block, serial / parallel conversion can be performed to perform parallel processing of data, and the operation frequency of the operation block can be reduced ( FIG. 7).

(Embodiment 5)
A data analysis apparatus according to a fifth embodiment will be described with reference to the drawings. In the present embodiment, the data analysis apparatus is realized using dedicated hardware (HW).

  FIG. 8 is a block diagram illustrating an example of the configuration of the data analysis apparatus according to the present embodiment. Referring to FIG. 8, the data analysis apparatus includes a sensor connection unit 11, a control unit 15, an AD conversion unit 16, a serial / parallel conversion unit 20, a selector unit 23, a calculation unit 26, an integrated program storage unit 32, and a FIFO unit. 38-1 to 38-m.

  In this embodiment, the selector unit 23 and the calculation unit 26 are connected by a buffer such as a FIFO.

  In addition, a selector control circuit 36 for specifying a selection pattern of each selector is added to the selector unit 36.

  According to the data analysis apparatus of the present embodiment, unlike the data analysis apparatus of the fourth embodiment, the operation frequency of the selector unit 23 and the operation frequency of the calculation unit 26 can be set to other than the integer ratio. As a result, it is possible to set the program (parallel degree, operating frequency, etc.) of the arithmetic unit 26 more flexibly, and a configuration for high throughput and low power consumption can be realized.

(Embodiment 6)
A data analysis apparatus according to the sixth embodiment will be described with reference to the drawings. In the present embodiment, the calculation unit and the control unit 16 of the data analysis apparatus are configured using general-purpose hardware (HW).

  FIG. 9 is a block diagram illustrating an example of the configuration of the data analysis apparatus according to the present embodiment. Referring to FIG. 9, the data analysis apparatus includes a sensor connection unit 11, a control unit 15, an AD conversion unit 16, a serial / parallel conversion unit 20, a selector unit 23, a calculation unit 26, an integrated program storage unit 32, and a buffer unit 40-. 1 to 40-m, and bus I / F units 41-1 to 41-m.

  According to the data analysis apparatus of the fifth embodiment, as described above, the selector unit 23 and the calculation unit 26 can be separated. In the present embodiment, the selector unit 23 and the calculation unit 26 are further separated by employing a general-purpose bus.

  Further, the calculation unit 26 and the control unit 15 for the entire apparatus are mounted on the CPU 42. The CPU 42 may have a plurality of cores. In this case, the CPU 42 can operate as a plurality of calculation blocks.

(Embodiment 7)
A data analysis apparatus according to the seventh embodiment will be described with reference to the drawings. According to the data analysis apparatus of this embodiment, the number of sensor connections can be expanded.

  FIG. 10 is a block diagram showing an example of the data analysis configuration of the present embodiment. Referring to FIG. 10, the data analysis apparatus includes AD conversion units 16a and 16b, serial / parallel conversion units 20a and 20b, selector units 23a and 23b, and a calculation unit 26.

  In the present embodiment, an external input port is provided for each of the selectors 25b-1 to 25b-m of the selector unit 23b. That is, a selection result obtained by selecting sensor data input from another sensor connection unit by the selector 25-j is input to the external input port of the selector 25b-j (j = 1 to m).

  According to the data analysis apparatus of this embodiment, the number of sensors that can be connected to the data analysis apparatus can be increased. In the present embodiment, as an example, a configuration has been described in which the number of sensors that can be connected is increased by a factor of two. However, the number of sensors that can be connected can be increased to an arbitrary multiple by a similar extension.

(Embodiment 8)
A data analysis apparatus according to the eighth embodiment will be described with reference to the drawings. According to the data analysis apparatus of this embodiment, the number of operation blocks can be expanded.

  FIG. 11 is a block diagram illustrating an example of a data analysis configuration according to this embodiment. Referring to FIG. 11, the data analyzing apparatus includes an AD conversion unit 16, serial / parallel conversion units 20a and 20b, selector units 23a and 23b, and calculation units 26a and 26b.

  In this embodiment, an external output port is provided in the last stage of the shift register of the serial / parallel converters 20a and 20b, and an external input port is provided in the first stage. Further, if necessary, an external output port is provided in the last calculation block of the calculation units 26a and 26b, and an external input port is provided in the first calculation block. Further, these input / output ports are connected to each other.

  According to the data analysis apparatus of this embodiment, the number of calculation blocks can be expanded. In the present embodiment, as an example, the configuration in which the number of arithmetic blocks is doubled has been described. However, the number of arithmetic blocks can be increased to an arbitrary multiple by a similar extension.

(Embodiment 9)
An integrated program generation device according to a ninth embodiment will be described with reference to the drawings. The integrated program generation apparatus of this embodiment can be realized using general-purpose hardware (HW).

  FIG. 12 is a block diagram illustrating, as an example, the configuration of a general-purpose computer that implements the integrated program generation apparatus according to the present embodiment. Referring to FIG. 12, the general-purpose computer includes a processing device 70, an input device 83, and an output device 85. The processing device 70 further includes a CPU 71, a main storage device 72, a storage medium 73, a data storage device 75, memory control interface units 76 to 78, I / O interface units 80 and 81, and a bus 82.

  The main storage device 72, the storage medium 73, and the data storage device 75 are connected to the bus 82 via memory control interface units 76 to 78, respectively. The input device 83 and the output device 85 are connected to the bus 82 via the I / O interface units 80 and 81, respectively.

  The sensor connection state input unit 51, the data analysis device specification input unit 52, and the program input unit 53 in FIG. 2 are respectively input from an input device 83 such as a keyboard and a mouse, or a storage medium such as a magnetic disk and a CD-ROM. The number and type of connected sensors, the specifications of the data analysis device, and the individual sensor program are input. The input data analysis device specification and sensor individual program are held in the data storage device 75.

  The integrated program generation unit 55 in FIG. 2 is implemented as a program executed by the CPU 71. This program is input from the input device 83 or the storage medium 73 and held in the data storage device 75. When this program is executed by the CPU 71, it is read out and processed in a high-speed main memory 72 such as a memory. The processing result is held in the data storage device 75.

  The integrated program output unit 56 in FIG. 2 is implemented as a memory control interface unit 77 for the output device 85 or the storage medium 73.

  FIGS. 13A to 13D show an example of the operation of the integrated program generation apparatus according to the present embodiment when a sensor is added.

  For example, when the combination of sensors is changed in the following time series, the integrated program generation device describes a computing unit (PE array (processor element array) in FIG. 13) to be used according to the changed contents. ) Determine the number, operating frequency, and area (number of PEs), and generate an integrated program.

  Referring to FIG. 13A, the data output from the sensor A (90-1) is output to the PE array of the calculation block 35-1 by the selector 25-1. On the other hand, the data output from the sensor B (90-2) is output to the PE array of the calculation block 35-2 by the selector 25-2. At this time, the sampling rate of the data of each sensor and the operating frequency of each PE array are the same.

  Referring to FIG. 13B, the data output from the sensor B (90-2) is processed in parallel by the two PE arrays in the operation blocks 35-2 and 35-3. At this time, the operating frequency of the PE array in the operation blocks 35-2 and 35-3 is lowered by half.

  Referring to FIG. 13C, there is described an example in which the processing speed (operating frequency) of sensor A (90-1) is doubled and processing is performed with half the number of PE arrays (area saving).

  FIG. 13D shows a case where the sensor C (90-3) is added (the sampling rate is tripled). At this time, the data output from the sensor B (90-2) and the sensor C (90-3) are processed in parallel using two PE arrays, so that the calculation blocks 35-2 and 35-3 Data processing is possible by doubling the operating frequency of the PE array at most. Therefore, according to the integrated program generation device of the present embodiment, even when a plurality of sensors having different sampling rates are connected, data is appropriately allocated to a plurality of PE arrays, and the operating frequencies of these PE arrays are appropriately set. By determining, data from the sensor can be processed.

(Embodiment 10)
A data analysis system according to the tenth embodiment will be described. The data analysis system of this embodiment is realized by combining the data analysis apparatus according to the fourth to eighth embodiments and the integrated program generation apparatus according to the ninth embodiment.

  When realizing the data analysis system of the present embodiment by combining the data analysis apparatus according to the fourth, fifth, seventh and eighth embodiments and the integrated program generation apparatus according to the ninth embodiment The data analysis device can be realized by a dedicated HW (hardware, hardware), and the integrated program generation device can be realized by a general-purpose HW.

  On the other hand, when the data analysis system according to the present embodiment is realized by combining the data analysis apparatus according to the sixth embodiment and the integrated program generation apparatus according to the ninth embodiment, The units (for example, the sensor connection unit 11, the AD conversion unit 16, the serial / parallel conversion unit 20, and the selector unit 23) are realized by a dedicated HW, and the rest of the data analysis device (for example, the control unit 15, the calculation unit 26) and The integrated program generation device can be realized by a general-purpose HW.

(Embodiment 11)
A data analysis apparatus according to the eleventh embodiment will be described. Referring to FIG. 1, in this embodiment, the sensors 90-1 to 90-n are controlled from the arithmetic unit 26. Specifically, when there is no change in the data output from the sensor 90-i (i = 1 to n) over a certain period, the sensor 90-i is shifted to the sleep mode, and after a certain period of time, the sleep mode Return from. Further, a sampling rate necessary for data analysis may be dynamically calculated and set (adaptive control).

  According to the data analysis apparatus of this embodiment, power consumption in the sensor and the data analysis apparatus can be reduced.

  It should be noted that the disclosures of the above patent documents are incorporated herein by reference. Within the scope of the entire disclosure (including claims) of the present invention, the embodiments and examples can be changed and adjusted based on the basic technical concept. Various combinations and selections of various disclosed elements are possible within the scope of the claims of the present invention. That is, the present invention of course includes various variations and modifications that could be made by those skilled in the art according to the entire disclosure including the claims and the technical idea.

DESCRIPTION OF SYMBOLS 10 Data analyzer 11 Sensor connection part 12-1-12-n Connection connector 13 Sensor connection state input part 15 Control part 16, 16a, 16b AD conversion part 17-1, ..., 17-n Amplifier 17a-1, ..., 17a-n amplifier 17-1b, ..., 17b-n amplifier 18-1, ..., 18-n A / D conversion circuit 18a-1, ..., 18a-n A / D conversion circuit 18b-1, ..., 18b- n A / D converter circuits 20, 20a, 20b Serial / parallel converters 21-11 to 21-m1, ..., 21-1n to 21-mn Shift registers 21-11, ... 21-mn Each stage 21a of the shift register -11 to 21a-m1,..., 21a-1n to 21a-mn Shift registers 21a-11,..., 21a-mn Each stage 21b-11 to 21b-m1,. 21b-mn Shift register 21b-11, ..., 21b-mn Each stage 22-1 of the shift register, ... 22-n Clock divider 22a-1, ..., 22a-n Clock divider 22b-1, ..., 22b-n clock dividers 23, 23a, 23b selector sections 25-1, ..., 25-m selectors 25a-1, ..., 25a-m selectors 25b-1, ..., 25b-m selectors 26, 26a, 26b arithmetic units 27-1, ..., 27-m arithmetic units 28-1, ..., 28-m transition control units 30-1, ..., 30-m clock divider 31 external I / F unit 32 integrated program storage unit 33 Integrated program input unit 35-1,..., 35-m operation block 35a-1,..., 35a-m operation block 35b-1,..., 35b-m operation block 36 selector control circuit 37 , 38-m FIFO unit 40-1, ..., 40-m buffer 41-1, ..., 41- (m + 1) bus I / F unit 42 CPU
43 Bus I / F unit 45 Storage device 50 Integrated program generation device 51 Sensor connection state input unit 52 Data analysis device specification input unit 53 Program input unit 55 Integrated program generation unit 56 Integrated program output unit 60 Data analysis system 70 Processing device 71 CPU
72 Main storage device 73 Storage medium 75 Data storage device 76, 77, 78 Memory control interface unit 80, 81 I / O interface unit 82 Bus 83 Input device 85 Output device 90-1 to 90-n Sensor

Claims (10)

A sensor connection unit that outputs the analog data received from the connected sensors and identifies the number and type of the connected sensors;
An AD converter that converts analog data output from the sensor connector into digital data;
A serial / parallel converter that converts the digital data output from the AD converter from serial data to parallel data;
A selector unit for selecting data from the parallel data output from the serial-parallel converter;
An arithmetic unit that processes the data selected by the selector unit;
A control unit that controls at least one of the AD conversion unit, the serial / parallel conversion unit, the selector unit, and the calculation unit according to the number and type of sensors identified by the sensor connection unit; Prepared,
The control unit controls data parallelism of the serial-parallel conversion unit ;
A data analysis apparatus characterized by that.
A data analysis device characterized by that. A sensor connection unit that outputs the analog data received from the connected sensors and identifies the number and type of the connected sensors;
An AD converter that converts analog data output from the sensor connector into digital data;
A serial / parallel converter that converts the digital data output from the AD converter from serial data to parallel data;
A selector unit for selecting data from the parallel data output from the serial-parallel converter;
An arithmetic unit that processes the data selected by the selector unit;
A control unit that controls at least one of the AD conversion unit, the serial / parallel conversion unit, the selector unit, and the calculation unit according to the number and type of sensors identified by the sensor connection unit; Prepared,
The control unit controls a select pattern of data by the selector unit ;
A data analysis apparatus characterized by that. The data analysis apparatus according to claim 1 , wherein the control unit controls a sampling rate of the AD conversion unit. 4. The data analysis apparatus according to claim 1 , wherein the control unit controls an operation of a program executed by the calculation unit. 5. The data analysis apparatus according to claim 1 , wherein the control unit controls an operating frequency of the arithmetic unit. The serial-parallel converter includes a number of shift registers corresponding to the maximum number of connections of the sensor,
The selector unit includes a number of selectors corresponding to the number of stages of the plurality of shift registers,
6. The data analysis apparatus according to claim 1 , wherein each of the plurality of selectors receives data output from each stage of the plurality of shift registers. 7. The data analysis apparatus according to claim 6 , wherein the control unit controls which of the plurality of sensors is selected by the plurality of selectors. The arithmetic unit is a reconfigurable logic circuit,
The data analysis apparatus according to claim 1 , wherein the control unit controls a logical configuration of the reconfigurable logic circuit. 9. The data analysis apparatus according to claim 1 , further comprising a FIFO unit that receives data from the selector unit and outputs the data to the arithmetic unit. 8. The data analysis apparatus according to claim 1 , further comprising a buffer unit that receives data from the selector unit and outputs the data to the arithmetic unit via an internal bus.

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