JP5561811B1 - Etching method, LSI device manufacturing method, and 3D integrated LSI device manufacturing method - Google Patents

Abstract

One of the problems of the present invention is that even if the hole provided in the substrate to be processed is a narrow and deep hole, the etching is surely performed without breaking the hole pattern by allowing the processing liquid to quickly enter and fill the hole. An etching method that can be used.
Another problem is to provide an etching method that can efficiently form an exposed portion of a through electrode portion to a desired size when manufacturing a 3D integrated LSI device.
(A) When the lower limit of “Se · h / Sue · h” is “1”, 5 μm <h and the upper limit of “Se · h / Sue · h” is 300
(B) When h ≦ 5 μm, 0 <Se · h / Sue · h ≦ 800,
S ₀ = Se + Sue
And 1 ≦ h / L
1 ≦ h / L (n)
Etching to satisfy the relationship.
The above symbols are defined in the specification.

Description

  The present invention relates to an etching method by wet etching, an LSI device manufacturing method, and a 3D integrated LSI device manufacturing method.

  In the semiconductor field, high integration has been promoted by miniaturizing a transistor which is one of basic electronic active devices (basic electronic devices). However, due to the stagnation of the exposure technology, which is one of the basic technologies, a limit theory has begun to be stated for high integration by miniaturization. In addition, miniaturization of basic electronic elements has potential problems of device temperature rise and electron leakage when an LSI device is formed. Recently, high integration technology development that does not depend on miniaturization has begun. One of them is the technology of three-dimensional LSI (3DI: 3 Dimensional Integration). One of the technologies necessary for realizing this technology is TSV (Through Silicon Via) technology. Unlike package-level 3D integrated LSI devices that use wire bonding technology, 3D integrated LSI devices that use this technology can also dramatically improve the electrical interconnection characteristics between each integrated device. It is expected to be a promising next-generation highly integrated device.

  The depth of the through hole required for TSV is a thin and deep hole with a aspect ratio of 10 or more (high aspect ratio hole). For the formation of such holes, it has been proposed to employ a dry etching method, which has been recently employed for forming a microcircuit pattern of half micron to quarter micron, and an oxygen plasma ashing method for resist removal. However, in such a dry etching method, a polymer deposited due to dry etching gas, resist, etc. is generated in the periphery of the hole to be formed and remains in and around the hole, resulting in high resistance and electrical short circuit. It causes a decrease in invited yield. Also, wet cleaning is required to remove the remaining deposited polymer and clean the inside of the hole. Therefore, the expectation for the conventional wet etching / cleaning method is increasing also in TSV.

FIG. 8E is a schematic explanatory diagram for explaining a part of the process process of Via Last (Front via) as an example of creation of a 3D integrated LSI device.
The first substrate 800 made of silicon (Si) or the like is provided with a through electrode 801 in the surface layer portion so as to be electrically connected to the device region 804 and the device region 804. The base body 800 is bonded to a second base body 806 made of Si or the like via an adhesive layer 805. A barrier layer 807 is provided between the through electrode 801 and the etching stop layer 803 in order to prevent a material such as copper (Cu) constituting the through electrode portion 808 from diffusing. The barrier layer 807 is used for reliably and densely burying the bottom of the deep groove when copper or the like is embedded in the deep groove (deep hole) in which the through electrode 801 is provided by a sputtering method, a plating method, or both methods. It is desirable to form with the material which has a seed function. When the barrier layer 807 does not have such a function or the function is not sufficient, it is desirable to further provide a seed layer having such a function inside the barrier layer 807. The minute through electrodes are provided with a density (array density) of about 1000 / mm ² at a pitch of about 10 μm and a pitch of 25 μm, for example. In order to directly and reliably electrically connect a large number of densely penetrating electrodes simultaneously and accurately, it is required to expose the exposed portion 802 of the penetrating electrode portion 808 by about 10 to 20 μm. As the etching stop layer 803, a silicon oxide (SiO ₂ ) film having a thickness of about 500 nm made of TEOS or the like is generally used. However, when the exposed portion 802 of the through electrode portion 808 is exposed to about 10 to 20 μm. The etching selection ratio between silicon (Si) and SiO ₂ is required to be at least about 200: 1. Moreover, when the first substrate 800 is etched by about 10 to 20 μm, an etching solution having a high etching speed is required to increase the production efficiency. In addition, in order to form the through electrode 801, it is necessary to form pores (holes) having a depth of Kaya (high aspect ratio pores) in the first substrate 800.

  In this case, according to examinations and experiments by the present inventors, the following has become apparent, and it has been found that wet etching and cleaning by the conventional method are insufficient. That is, when etching the bottom of a high-aspect ratio hole or cleaning the inside of a hole, if a conventional processing solution is used, the processing solution (etching solution, cleaning solution, etc.) enters the hole because the hole is thin and deep. Sometimes it doesn't go. For this reason, a situation occurs in which etching and cleaning cannot be performed as expected. As a solution to this problem, it has been practiced conventionally, and it is conceivable that a surfactant is mixed in the treatment liquid to improve the wettability with the inner wall of the hole to solve the previous problem.

  However, there is a proposal to achieve the purpose by improving the wettability while ensuring sufficient function of the processing liquid, but the current situation is that the appropriate processing liquid preparation is not suitable for either etching or cleaning . Furthermore, when the processing liquid is supplied from the surface of the object to be processed to the holes, atmospheric gas bubbles may be formed in the holes, which may cause a phenomenon that prevents the processing liquid from entering the holes. This phenomenon is remarkably observed in a cylindrical hole.

A technique has been proposed in which pressure reduction and pressurization are repeatedly performed when polycrystalline silicon for solar cells having a plurality of complicated and fine holes is cleaned using ultrasonic vibration (see Patent Document 1). However, since the technique disclosed in Patent Document 1 uses ultrasonic vibration, in a high aspect ratio hole pattern such as TSV that is the subject of this case, the wall thickness of the wall surface constituting member forming the hole is Since the height of the wall is extremely high, there arises a problem that the wall surface constituting member collapses (pattern collapse) due to ultrasonic vibration. This problem becomes more prominent as the aspect ratio of the hole becomes higher and the hole pattern becomes finer.
As described above, when a 3D integrated LSI device is actually manufactured, there are a problem for each process and a problem common to each process in some steps of the manufacturing process.

JP 2012-598 A

  The present invention has been made by diligent research in view of the above points, and one of the objects of the present invention is to solve the above-described problems all at once. Another object of the present invention is to perform etching without breaking the hole pattern by allowing the processing liquid to quickly enter and fill the hole even if the hole provided in the substrate to be processed is a narrow and deep hole. It is providing the etching method which can be performed. Another object of the present invention is to provide an etching method capable of efficiently forming an exposed portion of a through-electrode portion provided for bumpless bonding to a desired size when manufacturing a 3D integrated LSI device. It is. Still another object of the present invention is to provide an LSI device component manufacturing method used for manufacturing a 3D integrated LSI device and a 3D integrated LSI device manufacturing method in which the components are integrated.

One aspect of the present invention is an etching method for etching a portion to be etched of a member to be etched by wet etching.

(A) When the lower limit of “Se · h / Sue · h” is “1”, 5 μm <h and the upper limit of “Se · h / Sue · h” is 300
(B) When h ≦ 5 μm, 0 <Se · h / Sue · h ≦ 800,
S ₀ = Se + Sue
And 1 ≦ h / L
1 ≦ h / L (n)

The etching method is characterized in that the etching is performed while satisfying the above relationship.

The definition is as follows.

S ₀ : Area of the surface of the member to be etched to which the etching solution is applied
Se: Total area of the etched surface of the etched portion
Sue (n): Area of the nth non-etched surface
Sue: Total area of the non-etched surface of the member to be etched (“= ΣSue (n)”)
h: Depth of etching groove
Se · h: Total volume of the etched part
Sue · h: Total volume of the non-etched part of the member to be etched
L (n): Diameter of the nth non-etched surface
L: Average diameter of the non-etched surface (“= ΣL (n) / n”)

Another aspect of the present invention provides a plurality of electronic device region portions provided on the surface layer portion, a surface to which a processing liquid is applied, and a through hole provided between the electronic device region portions having an opening in the surface. It has a micro vacancy for electrode formation inside, and the aspect ratio (l / r) of the micro vacancy is 5 or more or the aspect ratio is less than 5 and V / S (V: volume of micro vacancy, S : The area of the opening) is reduced to a depressurizable processing space in which the first substrate is installed, and then the processing liquid is introduced into the depressurized processing space, thereby the inner wall surface of the micro-vacancy The first step of processing,
A second step of forming a penetrating electrode portion by embedding a penetrating electrode material up to the opening in the micro-vacancy through the first step;
A third step of forming an LSI device pre-part by bonding a second base to the opening side of the first base through the second step;
When exposing a part of the through electrode portion by etching the LSI device pre-part,
Area of surface of member to be etched to which etchant is applied (S ₀ )
Total area of the etched surface (Se)
nth non-etched surface area ("Sue (n)")
Total area of non-etched surface (“= ΣSue (n)”) (“Sue (n)”)
Etching groove depth (h)
Total volume of the etched parts (Se · h)
Total volume of non-etched parts of the member to be etched (Sue · h)
nth non-etched surface diameter ("L (n)")
Average diameter of non-etched surface (L) ("= ΣL (n) / n")

Then,

(A) When the lower limit of “Se · h / Sue · h” is “1”, 5 μm <h and the upper limit of “Se · h / Sue · h” is 300
(B) When h ≦ 5 μm, 0 <Se · h / Sue · h ≦ 800,
S ₀ = Se + Sue
And 1 ≦ h / L
1 ≦ h / L (n)

A fourth step of etching to satisfy the relationship of
An LSI device (LSID) manufacturing method characterized by comprising:
According to still another aspect of the present invention, there is provided a 3D integrated LSI, wherein the LSI device (LSID) is used as a component, and a plurality of layers are stacked so that electrical contacts of the LSI devices (LSID) are electrically connected. There is a method for manufacturing a device.

  According to the present invention, even if the hole is narrow and deep, etching and cleaning can be performed reliably by the treatment liquid quickly entering and filling the hole. Further, according to the present invention, when manufacturing the 3D integrated LSI device, the exposed portion of the through electrode portion provided to ensure electrical connection can be efficiently formed to a desired size. Furthermore, according to the present invention, electrical bonding can be reliably performed in the manufacture of 3D integrated LSI devices.

FIG. 1 is a schematic explanatory view for explaining a situation in which bubbles exist in a narrow and deep hole (hole) provided in an SOI substrate and the processing liquid does not penetrate to the bottom of the hole. FIG. 2 is a schematic configuration diagram for explaining an example of a suitable manufacturing system for embodying the present invention. FIG. 3 is a schematic configuration diagram of a part of the production line shown in FIG. 2. FIG. 4 is a schematic explanatory view for explaining a preferred configuration of a processing (medicine) liquid supply system provided in the medicine basket 302. FIG. 5 is a schematic configuration diagram of the vacuum waste liquid collector 207. FIG. 6 is a schematic configuration diagram for explaining another preferable processing chamber. FIG. 7 is a schematic top view for explaining the arrangement and ejection direction of nitrogen (N ₂ ) gas ejection ports provided on the inner wall surface of the processing chamber 501 in FIG. 6. FIG. 8A illustrates a step (a) of providing a fine deep hole for forming a through electrode in a first Si substrate on which a device is already formed in the surface layer portion. FIG. FIG. 8B is a schematic explanatory view for explaining a step (b) for forming the through electrode. FIG. 8C is a schematic explanatory diagram for explaining the step (c) of attaching the second Si substrate. FIG. 8D is a schematic explanatory diagram for explaining a step (d) of thinning the first Si substrate. FIG. 8E is a schematic explanatory view for explaining a step (e) of exposing a part of the through electrode portion. FIG. 8F illustrates the step (f) of providing a protective film for preventing the penetration electrode forming material from diffusing inside the substrate and preventing erosion of the penetration electrode when the head surface of the penetration electrode is exposed. Schematic explanatory drawing for doing. FIG. 8G is a schematic explanatory view for explaining a step (g) of exposing the head surface of the through electrode. FIG. 8H is a schematic explanatory diagram for explaining one of the features of the present invention using FIG. 8E. FIG. 8I is a top view of FIG. 8H. FIG. 8J is a schematic explanatory diagram for explaining an example in which LSI devices are integrated. FIG. 9 is a graph showing a saturated vapor pressure curve of water.

  FIG. 1 is a schematic explanatory diagram for explaining a situation in which bubbles exist in a narrow and deep hole (hole) provided in an SOI substrate and the processing liquid does not penetrate to the bottom of the hole.

In FIG. 1, reference numeral 100 is an SOI substrate, 101 is a Si (silicon) semiconductor substrate, 102 is a SiO ₂ (silicon oxide) layer, 103 is a Si layer (103-1, 103-2), 104 is a hole, and 105 is a bubble. , 106 is a treatment liquid, 107 is a gas-liquid interface, 108 is an inner wall surface (108-1, 108-2), 109 is an inner bottom wall surface, and 110 is an opening.

  When the processing liquid is supplied to the surface of the SOI substrate 100 under an atmospheric pressure atmosphere, there is a situation where the inside of the hole 104 (micro space) is not sufficiently filled with the processing liquid even though the wettability to the inner wall surface of the Si layer 103 is good. (An example is schematically shown in FIG. 1). When the state in which the inside of the hole 104 is not filled with the processing liquid is observed well, the bubbles 105 are present in the hole 104. The bubble 105 remains in the hole 104 in a state of being blocked by the processing liquid 106 when the SOI substrate 100 is kept stationary. When ultrasonic vibration is applied to the SOI substrate 100 in the state where the bubbles 105 exist, gas-liquid exchange occurs in the hole 104, and the hole 104 is quickly filled with the processing liquid. Alternatively, when the processing liquid is supplied onto the surface of the SOI substrate 100 while applying ultrasonic vibrations to the SOI substrate, the formation of bubbles is relatively prevented, and the bubbles 104 tend not to be formed. However, if the ultrasonic vibration is too large or intense, the formed or formed pattern, for example, is destroyed. Therefore, it is not preferable to use the ultrasonic vibration in the present invention. Even if it is adopted, it is desirable to moderate the ultrasonic vibration within a range in which pattern collapse does not occur.

  If the opening diameter of the hole 104 is “r” and the depth from the opening position of the hole 104 to the inner bottom wall surface 109 is “l”, the so-called aspect ratio is represented by “l / r”. The conditions under which the bubbles 105 are formed in the holes 104 are the surface tension, viscosity, liquid composition, surface smoothness of the side wall surface 108, wettability of the processing liquid used, and the size and aspect of “r” and “l”. There are many parameters such as ratio, and it is difficult to discuss them in general.

  The inventors first formed various holes in the SOI substrate of the structural material as shown in FIG. 1 without limiting the inner structure of the hole 104 to a cylinder, and formed bubbles by using ultrapure water as a treatment liquid. I tried to verify the trend. The inner structure of the hole 104 is not limited to a cylindrical shape, but is a purse shape (the lower part of the opening extends in a bag shape or a tapered shape), a rectangular shape (a square shape such as a square, rectangle, or rhombus opening), a triangular shape It was created in various sizes as hexagonal, elliptical, super-elliptical, and star-shaped. As a result, assuming that the area of the opening 110 of the hole 104 is “S” and the internal volume is “V”, it is easy for bubbles of any shape to form bubbles when the value of “V / S” is around “3”. It turns out that it tends to advance rapidly. Among them, when the inner wall surface of the hole 104 is a curved surface (such as a cylinder or an ellipse) and when there is a corner (such as a rectangle), bubbles are more formed in the curved surface. I also found it easier. The reason is that it does not go out of speculation, but if there are corners on the inner wall, the bubbles tend to become spheres, so it is difficult for the corners to be occupied by bubbles, and the liquid reaches the inner bottom wall 109 through the corners. As a result, gas-liquid exchange is likely to occur, and the hole space is considered to be filled with the liquid.

Therefore, the SiO ₂ layer 102 constituting the inner bottom wall surface 109 was etched using hydrofluoric acid and buffered hydrofluoric acid, respectively, instead of ultrapure water. As a result, in the case of hydrofluoric acid, even when the value of “V / S” was near “3”, the formation of bubbles was relatively small (the value of 300 holes with the value of “V / S” being “3”). Among them, about 15 bubbles were formed), but in the case of buffered hydrofluoric acid, bubbles were formed at a rate of 80% (240), and etching was not sufficient. Therefore, the present inventors performed the above-mentioned verification under a reduced pressure (30 Torr) by preparing a processing chamber capable of reducing the pressure. As a result, both the aqueous hydrofluoric acid solution (FH was 1 to 20%) and the buffered hydrofluoric acid (ammonium fluoride: 20%, HF: 1 to 20%) were completely etched at a rate of 100%. The effect of this depressurization depends to some extent on the degree of depressurization, but if the pressure is reduced too much, the boiling point of the treatment liquid at that pressure will be exceeded, so it is convenient for the design of the apparatus to reduce the pressure so that it does not exceed the boiling point desirable.

  In the present invention, the inner space of the hall is hereinafter referred to as a “micro vacancy”. In the present invention, the value of “r” in the case of a structure in which the micro vacancy is not a cylinder (referred to as “non-cylindrical”) is based on the non-cylindrical “S” by regarding the micro vacancy as a cylinder. Ask. In this case, “l” is a depth (maximum depth) from the position of the opening to the position of the inner wall surface of the back of the micro-vacancy. The effect of decompression in the present invention is that the aspect ratio (l / r) is 5 or more, or the aspect ratio is less than 5 and V / S (V: volume of micro vacant space, S: area of opening) is 3 or more. Become noticeable in the case. In particular, when the treatment liquid is buffered hydrofluoric acid and the object to be treated is an SOI substrate, a more remarkable effect can be obtained.

  In the present invention, when the value of “l / r” is 5 or more, the effect of decompression is remarkably obtained without depending on the value of “V / S”. When the value of “l / r” is less than 5, depending on the value of “V / S”, if “V / S” <3, the effect of decompression is hardly obtained, and bubbles remain inside. The percentage of holes increases. In the present invention, when the value of “l / r” is less than 5, the value of “V / S” is more preferably 3.5 or more.

FIG. 8A to FIG. 8G are schematic process explanatory views for explaining one of typical examples of the formation process of the through electrode provided for the purpose of electrical conduction when stacking LSI device components.
8A to 8G sequentially show seven steps (a) to (g).
FIG. 8A is a schematic diagram for explaining a step (a) of providing a fine deep hole for forming a through electrode in a first substrate on which a device is already formed in the surface layer portion. FIG.
FIG. 8B is a schematic explanatory diagram for explaining the step (b) for forming the through electrode.
FIG. 8C is a schematic explanatory diagram for explaining the step (c) of attaching the second substrate.
FIG. 8D is a schematic explanatory diagram for explaining a step (d) of thinning the first substrate.
FIG. 8E is a schematic explanatory diagram for explaining a step (e) of exposing a part of the through electrode portion.
FIG. 8F is a view for explaining a step (f) of providing a protective film for preventing the penetration electrode forming material from diffusing inside the substrate and preventing erosion when the head surface of the penetration electrode is exposed. It is a typical explanatory view.
FIG. 8G is a schematic explanatory diagram for explaining the step (g) of exposing the head of the through electrode.

First, in the step (a), a plurality of electronic elements such as a transistor, a capacitor element, a resistance element and the like constituting an electronic circuit such as a logic circuit, a memory circuit, an A / D / D / A conversion circuit, and a control circuit are formed. A deep hole 809 for forming a through electrode at a predetermined position of a first substrate 800 made of, for example, a silicon (Si) wafer, in which a region (device region) 804 in which a formed device is formed is formed in a surface layer portion. Is formed in a predetermined number. In forming the TSV, the first substrate 800 is thinned to a thickness of 50 μm or less during the manufacturing process. As the 3D integrated LSI device becomes lighter and more compact, the first substrate 800 is increasingly thinned to become a paper like paper, making normal wafer handling difficult. Therefore, as will be described in detail in the description of the subsequent steps, a temporary bonding technique is used in which handling is performed while temporarily bonded to a hard support substrate (second substrate) such as silicon or glass. However, it is also preferable in order to ensure reliable handling and not produce defective products.
This technique is called TB / DB (Temporary Bonding / Debonding) or the like together with the process of peeling the thinned first substrate 800 from the support substrate after the process is completed.

  The present invention can also be applied to the manufacture of MEMS devices. However, in the case of MEMS devices, as in the case of 3D integrated LSI devices, a final device is obtained by being bonded to a glass substrate (second substrate) or the like. The peeling process may not be performed.

The predetermined number of deep holes 809 are formed using a suitable etchant and cleaning solution in accordance with the conditions previously described in connection with FIG. The surface of the device region 804 extending over the inner wall surface of the deep hole 809 is covered with a coating film (stop layer) 803 such as a silicon oxide (SiO ₂ ) film by, for example, a TEOS method. The coating film (stop layer) 803 plays a role of etching stop at the time of etching in a later process. As the coating film 803, silicon nitride, silicon nitride (Si ₃ N ₄ ), silicon oxynitride, or the like can be selected and used according to the purpose as appropriate. In this case, an appropriate cleaning liquid is selected as necessary.

In the step (b), an electrode forming material such as copper (Cu) is embedded in the deep hole 809 by a PVD method such as a plating method, a vapor deposition method or a sputtering method, a CVD method or the like to form a through electrode 801. Is done. At this time, a barrier layer 807 is provided between the through electrode 801 and the etching stop layer (coating film) 803 in order to prevent diffusion of materials such as copper (Cu) constituting the through electrode 801. Is desirable. For example, when copper (Cu) is selected as the electrode material, the covering layer (stop layer) 803 is preferably composed of TEOS-SiO ₂ . When the through electrode 801 and the coating film (stop layer) 803 and the barrier layer 807 provided on the side surface and the bottom surface thereof are provided, the barrier layer 807 and the barrier layer 807 are hereinafter referred to as the through electrode portion 206 for convenience. The barrier layer 807 is used for reliably and densely burying the bottom of the deep groove when copper or the like is embedded in the deep groove (deep hole) in which the through electrode 801 is provided by a sputtering method, a plating method, or both methods. It is desirable to form with the material which has a seed function. When the barrier layer 807 does not have such a function or the function is not sufficient, it is desirable to further provide a seed layer having such a function inside the barrier layer 807. Therefore, when this seed layer is separately provided inside the barrier layer 807, this seed layer is also referred to as the through electrode portion 206 for convenience hereinafter unless otherwise specified. The minute through electrodes 801 are provided with a density of about 1000 pieces / mm ² with a diameter of about 10 μm and a pitch of 25 μm, for example.

In the step (c), the first substrate 800 that has undergone the step (b) has a second substrate 806 made of, for example, a silicon (Si) wafer in order to delete a predetermined portion (deleted portion) 810. A predetermined surface is bonded to each other through an adhesive layer 805 formed by using an appropriate adhesive. In the description of FIG. 8C, the second substrate 806 is described as a Si substrate for convenience of description. However, the second substrate 806 is not limited to the Si substrate, and a material is appropriately selected according to the purpose. Can be used. In particular, in the case where a thin large-sized substrate is used as the first substrate 800 in order to increase the production efficiency of the device, the second substrate may be Si in terms of reinforcing the strength of the first substrate 800. In addition to a wafer, a substrate made of a material having high strength such as glass or hard plastic may be appropriately selected according to the purpose of use.
In the case of a glass substrate, it is desirable to use a sodium (Na) -less glass plate in consideration of diffusion of sodium (Na) into the device region. In the case where a sodium (Na) -containing glass plate such as cheap blue plate glass is used from the viewpoint of cost or the like, it is preferable to previously provide a sodium (Na) diffusion preventing film on the surface of the sodium (Na) -containing glass plate. . As the adhesive used for bonding the substrates, an adhesive of an appropriate material is selected and used in accordance with the material of the substrate used.
Adhesives that are appropriately selected and used in the present invention include temperature and pressure reduction during the manufacturing process, types of chemicals such as etching solution used, and the second substrate is peeled off after a predetermined process. Whether or not to do so is selected as appropriate according to the purpose. In particular, adhesives used in TB / DB include resistance to chemicals and heat used in the process, hardness to protect the pattern formed on the bonded surface from stress applied during back grinding, and when peeled It is preferable to use it by appropriately selecting from those that do not leave a residue on the surface. The adhesive used in the present invention can be appropriately selected from adhesives usually used in the semiconductor field and electrical / electronic parts field. In the present invention, examples of the adhesive preferably used include thermosetting, photocurable, one-component, two-component, aqueous, and solvent-based ones, and particularly preferable is a semiconductor. It is an adhesive liquid and an adhesive sheet / film used in the manufacturing field. In particular, it is desirable to select from those in which no release gas is generated under reduced pressure after curing, or in which release gas is not generated under reduced pressure below the temperature around the process temperature including at least the allowable range. In the present invention, two substrates may be bonded together using an adhesive, or may be bonded using a double-sided adhesive sheet / film. In the present invention, the tape / sheet / adhesive used for bonding the two substrates, in addition to the above-mentioned conditions, in addition to the high vacuum state and the heat generated in the process, the physical treatment such as the cleaning process performed in each process. In the case of a system that does not cause alteration or performance deterioration even under severely and chemically severe conditions, and in the case of a system that finally peels off two substrates, it has characteristics that can easily peel off two substrates. It is desirable to have. Such materials are specifically selected from the Acris resin adhesive, urethane resin adhesive, epoxy resin adhesive, and silicone adhesive depending on the purpose. In the case of silicone adhesives, a two-component addition-curing adhesive is preferable because it has a high curing rate and does not generate free gas.

Further, when removing a predetermined removal portion of the substrate 806, in the steps (c) and (d), the first substrate 800 has a predetermined back side portion with respect to the side where the device region 804 is provided. It is removed to a thickness.
In order to increase the production efficiency, the removed portion is a remaining portion 812 that is divided into a portion (removed portion) 810 to be deleted by physical polishing with a high grinding speed such as CMP, and a portion (removed portion) 811 that needs to be removed delicately by wet etching. Is left from the physical polishing at a thickness such that the through electrode portion 808 is not damaged by the physical polishing.

  In step (e), wet etching is applied in accordance with the present invention or the structural conditions relating to the main part thereof to expose a part of the through electrode part 808 and form an exposed part 802.

In the step (f), when the top of the through electrode 801 is exposed in the subsequent step (g), if the surface of the first substrate 800 is exposed, the top of the through electrode 801 is exposed. In this case, a potential difference may occur between the surface of the first base 800 and the exposed surface 813 of the through electrode 801. When the potential difference occurs, erosion occurs on the exposed surface of the through electrode 801, and the through electrode 801 is damaged. Further, when the surface of the through electrode 801 is exposed by CMP, a cutting residue of the through electrode forming material may diffuse into the first base body 800, causing a device failure. In order to prevent these points, a protective film 812 is provided in step (f). The protective film 812 is preferably electrically insulating. As the protective film 812 for forming an electrically insulating material, for _{example, TEOS-SiO 2, SiCN,} SiON, SiOCN, such as _Si 3 _{N 4} are mentioned as preferred. Films of these materials are formed by a CVD method or a sputtering method.

After providing the protective film 812 in the step (f), a part of the top region of the through-electrode portion 808 is removed by CMP to expose the surface 814 (“step (g)”) (see FIG. 8G).
The recessed surface 819 between the through electrode portions 808 and the exposed surface of the base body 800 outside the array region of the through electrode portions may be left as they are. However, in some cases, the same surface as the surface 814 may be made of an insulating resin or the like. It is preferable to embed so that it becomes. Then, if necessary, the adhesive layer 805 is removed by dissolution or the like, and the second body 806 is separated.

In the present invention, one of the preferred technologies used for TB / DB is the “ZoneBOND ^™ ( ^{TM from} Brewer Science Inc.)” technology. The “ZoneBOND ^™ ” technology uses a type of adhesive that dissolves with chemicals when peeling, and always cleans the substrate after the peeling process. This is because no residue is left around a structure such as a bump formed on the surface of the first substrate 800. In the case of an adhesive that is removed with a chemical solution, a harder resin can be used, so that the mechanical strength of the thinned first substrate 800 can be further increased. It is desirable that the adhesive has a low adhesion layer at the center of the substrate so that the adhesive can be easily peeled off even with a weak force. However, if the entire surface of the substrate is kept in low contact, it will lead to defects in the outer periphery due to grinding. Therefore, it is preferable that the outer periphery is in close contact with the center. In this way, by changing the adhesion strength between the central portion and the outer peripheral portion of the substrate and dissolving the adhesive on the outer peripheral portion with a chemical solution, the low adhesion layer at the central portion can be mechanically peeled with a weak force. In addition, if the outer periphery of the second substrate is provided with pores for infiltrating the chemical solution, the penetration of the chemical solution into the adhesive layer can be accelerated and the production efficiency can be dramatically improved.

Next, the features of the present invention when the removed portion 811 is removed by wet etching in the steps (d) and (e) will be described with reference to FIGS. 8H and 8I.
FIG. 8H shows the same state as the process diagram of FIG. 8E.
FIG. 8I is a schematic top view of FIG. 8H.

One of the features of the present invention is that when the etched portion of the member to be etched 815 is etched by wet etching,

S ₀ : Area of the surface of the member to be etched to which the etching solution is applied
Se: Total area of the etched surface of the etched portion
Sue (n): Area of the nth non-etched surface
Sue: Total area of the non-etched surface of the member to be etched (“= ΣSue (n)”)
h: Depth of etching groove
Se · h: Total volume of the etched part
Sue · h: Total volume of the non-etched part of the member to be etched
L (n): Diameter of the nth non-etched surface
L: Average diameter of the non-etched surface (“= ΣL (n) / n”)
Se ・ h ／ Sue ・ h ・ ・ ・ Volume sum ratio

Defined as

(A) When the lower limit of “Se · h / Sue · h” is “1”, 5 μm <h and the upper limit of “Se · h / Sue · h” is 300
(B) When h ≦ 5 μm, 0 <Se · h / Sue · h ≦ 800,
S ₀ = Se + Sue
And 1 ≦ h / L
1 ≦ h / L (n)

This is to satisfy the above relationship and perform etching.

As the member to be etched 815, for example, a Si (silicon) wafer (for example, the first base body 800) in which a device is provided on the surface layer portion and a large number of device chips are formed, or a device cut out by dicing Chip.
In addition, a substrate in which a plurality of MEMS devices are built, a MEMS device chip, or the like also corresponds. In FIG. 8I, for convenience, 3 × 3 through electrode portions 808 are simply described. However, for generalization, hereinafter, the one through electrode portion 808 will be referred to as an n th through electrode portion. To do. The area Sue (n) shape of the top surface (nth non-etched surface) of the nth through-electrode portion 808n is circular in FIG. 8I, but is not limited to a circle in the present invention. Rather, it may be any shape as desired, such as a rectangle, a regular square, or an ellipse. Further, the shape and / or area of the top surface of all the through electrode portions 808 may not be the same.

In the present invention, when the non-etched surface of the through electrode portion 808n is circular, the diameter is the diameter L (n). In the case of the non-circular shape, the non-circular area is converted into the area of the circle. Thus, the diameter of the circle of the area is regarded as the diameter L (n). If the member to be etched is a wafer such as a Si (silicon) wafer, the area S ₀ of the surface of the member to be etched is the surface on which the device of the wafer is formed (the surface on which etching is applied with the etching solution) In the case where the member to be etched is a device chip, it indicates the area of the surface of the device chip on which the etching solution is applied and etched. FIG. 8I shows a state in which the through electrode portions 808 are arranged in a matrix of 3 × 3 for convenience. However, in the present invention, the arrangement of the through electrode portions 808 is not limited to this, The arrangement may be regular, irregular, or random.

  A 3D integrated LSI device is created by laminating LSI device components created through the above-described processes. An example is shown in FIG. 8J. FIG. 8J is a schematic explanatory diagram for explaining a preferred example of a 3D integrated LSI device 816 formed by stacking two LSI device components (817, 818).

The first LSI device component 817 and the second LSI device component 818 created through the step (g) are stacked such that the corresponding through electrodes are directly electrically connected to each other, and the 3D integrated LSI device 8164 is formed. It is formed (joint surface 819).
In order to directly bond the corresponding through electrodes to each other, for example, the LSI device components are stacked so that the bonding surfaces of the corresponding through electrodes face each other, and then, the appropriate temperature is applied while applying an appropriate pressure. When exposed to a thermal atmosphere for an appropriate period of time, the corresponding through electrodes are in close contact with each other. This tight bonding can be performed more effectively and reliably if the material of the through electrode is the same.

In the present invention, the volume sum ratio (Se · h / Sue · h) is usually preferably in the above range. The reason is that if the condition of “(a)” or “(b)” is not satisfied, the expected effect of the present invention cannot be obtained.

The volume sum ratio (Se · h / Sue · h) is
(C) When the lower limit of “Se · h / Sue · h” is “1”, 5 μm <h, and the upper limit of “Se · h / Sue · h” is preferably 100, more preferably 50, optimally 10,
(D) When h ≦ 5 μm,
Preferably, 0 <Se · h / Sue · h ≦ 500,
More preferably, 0 <Se / Sue ≦ 300,
Optimally, 0 <Se · h / Sue · h ≦ 100
It is desirable that
The values of “h / L” and “h / L (n)” are preferably “1” or more as described above.
If the values of “h / L” and “h / L (n)” are less than “1”, the effect of the present invention may not be expected.
The values of “h / L” and “h / L (n)” are more preferably “1.5” or more, and most preferably “2.0” or more.

As the etching solution used in the present invention, a chemical solution having a high etching selectivity is desirable. Such a chemical solution usually has a selection ratio of 50 times or more, preferably 100 times or more, more preferably 150 times or more, and most preferably 200 times or more, depending on the exposed height of the exposed portion of the through electrode. A chemical is desirable.
Specifically, for example, in the case of a substrate or device chip in which a semiconductor region in which a semiconductor device such as a transistor such as a Si substrate or an SOI substrate is formed is mainly composed of silicon (Si) or silicon (Si), Preferable examples include the following chemical solutions.

(1) Alkaline chemicals (A) Main agent
KOH (potassium hydroxide)
NaOH (sodium hydroxide)
TMAH (4 methyl ammonium hydroxide)
EDP (ethylenediamine pyrocatechol)
N ₂ H ₄・ H ₂ O (hydrazine hydrate)
NH ₃ + H ₂ O (ammonia water)
Any one or more of (B) additive
NH ₂ OH hydroxylamine
IPA 2-propanol

Any one or more additives (B) may be added to the main agent (A).

(2) Acid chemical solution (C) Main agent
HNO ₃ + HF (nitric acid + hydrofluoric acid)
(D) Additive
NH ₄ F (ammonium fluoride)
CH ₃ COOH (acetic acid)
H ₂ SO ₄ (sulfuric acid)
HCl (hydrochloric acid)
H ₂ O ₂ (hydrogen peroxide)
H ₃ PO ₄ (phosphoric acid)
EG (ethylene glycol)
DEG (diethylene glycol)

Any one or more additives (D) may be added to the main agent (C).

In the present invention, although the film constituting the stop layer 803 depends on the material of the substrate or device chip, it is preferably used although the etching selectivity with the substrate or device chip is large.
Specifically, for example, in the case of a substrate or device chip in which a semiconductor region in which a semiconductor device such as a transistor such as a Si substrate or an SOI substrate is formed is mainly composed of silicon (Si) or silicon (Si), The following materials are preferable.

(A) SiO _x (0 <X ≦ 2) film (silicon oxide)
How to make:
CVD (LPCVD, plasma CVD, etc.), sputtering using thermal oxidation, plasma oxidation, TEOS, etc. as raw materials

A SiO ₂ stoichiometric composition is optimal.

(B) Si _X N _Y film (silicon nitride)
How to make:
Thermal nitriding, plasma nitriding, CVD (LPCVD, plasma CVD, etc.), sputtering

A Si ₃ N ₄ stoichiometric composition is optimal.

(C) SiON film (silicon oxynitride)
How to make:
Plasma CVD, LPCVD, etc.

(D) SiCN film (silicon carbonitride)
Creation method, plasma CVD, LPCVD, etc.

(E) SiC film (silicon carbide)
How to make:
Plasma CVD, LPCVD, etc.

(F) AlN film (aluminum nitride film)
How to make:
Sputtering, anodizing, etc.

In addition, when TSV is formed in the post-process (after the device is created), when using a metal having a relatively low melting point such as Cu for the wiring, the wiring may be melted. It is desirable to apply the following process.

薬液１：HNO₃ 28% HF 30% Siのエッチングレート約1000μm/min
薬液２：KOH24％ HDA10％ Siのエッチングレート約3μm/min
薬液３：TMAH10％ HDA10％ Siのエッチングレート約1μm/min
注）∞とは選択比が大きすぎて測定ができないことを示す（選択比50000以上）Table 1 shows preferable examples of the etching selectivity.
Table 1
Selection ratio of various STOP films (when Si etching rate is 1)

Chemical solution 1: Etching rate of HNO ₃ 28% HF 30% Si about 1000μm / min
Chemical solution 2: KOH24% HDA10% Si etching rate approx. 3μm / min
Chemical solution 3: TMAH 10% HDA 10% Si etching rate about 1μm / min
Note) “∞” indicates that the selection ratio is too large to be measured (selection ratio of 50000 or more).

Furthermore, in the present invention, in order to further bring out the effect, it is desirable that the array density (AD) of the through electrode portions is 100 / mm ² or more. More desirably, it is 500 pieces / mm ² or more, and most desirably 800 pieces / mm ² or more. Furthermore, it is preferable that the area penalty (AP) is specified depending on the size, arrangement method, arrangement density, and arrangement position of the through electrodes. In particular, when the exposed surface of the base body 800 outside the arrangement region of the through electrode portions is not embedded with resin or the like, it is preferable to specify an area penalty (AP) for stable fixation of the stacked LSI devices. . Here, the area penalty (AP) is the area of the exposed surface of the first substrate (the surface on the side where the through electrode is provided) by providing the first substrate 800 with a through electrode. What percentage of “Se” corresponds to the total area (corresponding to “Sue”) of the exposed upper surface area (corresponding to “Sue (n)”) of the through electrode 808 It is a numerical value that represents.
Generally, it is expressed in% (“(Se / Sue) X100 = Se / (S0−Se) X100”).
In the present invention, it is displayed as a ratio, not as a% table.
In the present invention, the area penalty (AP) is
(A) When the lower limit of “Se / Sue” is “1”, 5 μm <h, and the upper limit of “Se / Sue” is preferably 100, more preferably 50, optimally 10,
(B) When h ≦ 5μm,
Preferably, 0 <Se / Sue ≦ 500,
More preferably, 0 <Se / Sue ≦ 300,
Optimally, 0 <Se / Sue ≦ 100
It is desirable to be specified.

FIG. 2 is a schematic configuration diagram for explaining an example of a suitable manufacturing system for embodying the present invention. FIG. 3 is a schematic configuration diagram of a part of the production line shown in FIG. 2 and 3, reference numeral 200 denotes a processing system, 201 denotes a decompression processing chamber (room), 202 denotes a target object installation table, 202-1 denotes a rotating shaft for the target object installation table, 203 denotes a target object, 204 Is an atmosphere gas supply line, 205 is a processing (chemical) liquid supply line, 206 is a recovery hood, 207 is a vacuum waste liquid tank, 208 is an air or N ₂ supply line, 209 is a drainage line, 210 is a recovery line, 211,212 Is an exhaust line, 213 is an exhaust pump, 214 to 221 are valve, 222 is a supply amount variable nozzle for processing liquid, 301 is a spinner, 302 is a cartridge case, and 303 is an aluminum frame.

The processing system 200 includes a reduced-pressure processing chamber (room) 201 and a reduced-pressure waste liquid tank 207, and the inside thereof is configured to be depressurized to a predetermined value by an exhaust pump 213. An atmosphere gas such as N ₂ is supplied to the decompression processing chamber 201 from the outside via an atmosphere gas supply line 204, and a processing (chemical) solution is supplied to the decompression processing chamber 201 via a processing liquid supply line 205. They are supplied in fixed quantities. In the middle of the atmospheric gas supply line 204, an open / close valve having a flow rate adjusting function is provided. In the reduced pressure processing chamber 201, a processing object installation table 202 is fixed and installed on a rotating shaft body 201-1 for the processing object installation table. A target object 203 is installed on the target object installation table 202. The atmospheric gas supplied into the reduced pressure processing chamber 201 via the atmospheric gas supply line 204 is indicated by an arrow B, and the treatment supplied via the recovery liquid 206 via the treatment liquid supply line 205 is indicated by an arrow B, as indicated by an arrow A. In the same manner, each is recovered from the recovery line 210 into the vacuum waste liquid tank 207 through the recovery hood 206. An opening / closing valve 217 is provided in the middle of the recovery line 210.

A supply line 208 and an exhaust line 211 are coupled to the vacuum waste liquid tank 207. Supply line 208 is a supply line for atmospheric or _{N 2.} The waste liquid 223 in the vacuum waste liquid tank 207 is discharged out of the vacuum waste liquid tank 207 through the drain line 209. The vacuum waste liquid tank 207 can be returned to atmospheric pressure by supplying air or N ₂ from the supply line 208 as necessary. An open / close valve 215 is provided in the supply line 208. An opening / closing valve 216 is provided in the middle of the drain line 209. The decompression processing chamber 201 is decompressed by the pump 213 via the exhaust line 212 and the waste liquid tank 207 is decompressed by the pump 213. Valves 218 and 219 are installed in the middle of the exhaust line 211, and valves 220 and 221 are installed in the middle of the exhaust line 212, respectively. The valves 219 and 221 are open / close valves provided with a flow rate variable mechanism. The exhaust pump 213 is a moisture-resistant pump. For example, a diaphragm type chemical dry vacuum pump, specifically, DTC-120 (manufactured by ULVAC) is preferably employed.

  As shown in FIG. 4, the processing chamber 201 and the waste liquid tank 207 are attached to an aluminum frame 303, for example. A spinner 301 provided for rotating the rotary shaft 202-1 is also attached to the frame 303. A chemical basket 302 in which processing liquid is stored is connected to the upstream end of the processing (chemical) liquid supply line 205.

  FIG. 4 is a schematic explanatory view for explaining a preferred configuration of a processing (medicine) liquid supply system provided in the medicine basket 302. In FIG. 4, 400 is a nitrogen pressure feed process (chemical) liquid supply system, 401 is a canister, 402 is a process liquid supply line, 403 and 411 are stop valves, 404 is a flow control valve, 405 is a flow meter, and 406 is a mist trap. , 407 and 408 are nitrogen gas supply lines, 409 is a vent (exhaust) valve, 410 is a shunt joint, 412 is a regulator, 413 is a joint, and 414 and 415 are quick connectors.

  A processing (chemical) supply system 400 using a nitrogen pressure feeding system has a processing liquid supply line 402 in which a canister 401 is provided with a 3/8 inch line on the upstream side and a 1/4 inch line on the downstream side via a joint 413. Are connected to each other via a quick connector 414 and a 1/4 inch nitrogen gas supply line 407 via a quick connector 415. In the middle of the processing liquid supply line 402, a stop valve 403, a flow rate adjustment valve 404, and a flow meter 405 are provided. The downstream portion of the processing liquid supply line 402 on the stop valve 403 side is connected to the processing liquid supply line 205. A vent (exhaust) valve 409 and a diversion joint 410 are provided in the middle of the nitrogen gas supply line 407. The vent (exhaust) valve 409 is for exhausting the nitrogen gas in the canister 401 and the nitrogen gas supply line 407 to the outside. The downstream side of the nitrogen gas supply line 407 is inserted into the mist trap 406. Nitrogen gas is introduced into the mist trap 406 through the regulator 412, the stop valve 411, and the nitrogen gas supply line 408. The mist trap 406 is provided to prevent the processing liquid from flowing back to the upstream side.

  FIG. 5 is a schematic configuration diagram of the vacuum waste liquid collector 207. In FIG. 5, 501 is a drain flange, 502 is a decompression flange, 503 is a waste liquid introduction flange, 504 is a gas introduction flange, 505 is a vacuum gauge, 506 is a flow meter, and 507 is a liquid level. An observation window is shown.

  The vacuum waste liquid tank 207 includes a drain line 209 via a drain flange 501, a drain line 211 via a vacuum flange 502, and a recovery line 210 via a waste liquid introduction flange 503. A supply line 208 is connected via 504. The vacuum gauge 505 measures the pressure in the waste liquid tank 207. In the upper part of the waste liquid tank 207, a liquid level observation window 504 made of a transparent member for waste liquid is provided in order to observe the water level of the waste liquid in the waste liquid tank 207.

  FIG. 6 is a schematic configuration diagram for explaining another suitable processing chamber. In FIG. 6, 600 is a decompression processing chamber, 601 is a chamber structure, 602 is an upper lid, 603 is a stage for setting the object to be processed, 604 is a rotating shaft body, 605 is a magnetic fluid seal, and 606 is a special processing (medicine) solution. Supply line, 607 is ozone water supply line, 608 is ultrapure water supply line, 609, 610, 611 and 618 are flowmeters, 612, 613, 614, 617, 621 and 624 are valves, 615 is a gas introduction line, 619 Is a gas discharge line, 616, 620, and 623 are flanges, 622 is a waste liquid line, 625 is an observation window (625-1, 625-2), and 626 is a vacuum gauge.

  The vacuum processing chamber 600 shown in FIG. 6 is different from the vacuum processing chamber 201 shown in FIG. 2 in that three supplies of a special processing (chemical) liquid supply line 606, an ozone water supply line 607, and an ultrapure water supply line 608 are provided. It has a line. The rest is basically the same as the reduced pressure processing chamber 201 except for another difference. Another difference is that a gas introduction line 615 and a gas discharge line 619 are attached to the decompression processing chamber 600. The atmospheric gas in the reduced pressure processing chamber 600 is introduced through the gas introduction line 615. The gas introduction line 615 is attached to the vacuum processing chamber 600 by a flange 616. An opening / closing valve 617 and a flow meter 618 are provided in the middle of the gas introduction line 615. The gas discharge line 619 is attached to the decompression processing chamber 600 by a decompression flange 620. An opening / closing valve 621 is provided in the middle of the gas discharge line 615. A downstream side of the gas discharge line 615 is connected to a pump (not shown) similar to the vacuum pump 213. The decompression processing chamber 600 is configured such that the interior is maintained in a decompressed state by the chamber structure 601 and the upper lid 602. The upper lid 602 is provided with two observation windows 625-1 and 625-2 for observing the inside of the chamber 600. Inside the reduced pressure processing chamber 600 is provided a stage 603 for installing the target object on which the target object is set. A rotating shaft 604 for rotating the stage 603 is fixed to the stage 603 in a removable state. The rotating shaft body 604 is sealed with a magnetic fluid seal 605 and joined to a rotating shaft body of a spinner installed outside the decompression processing chamber 600. A flow meter 609 and a valve 612 are provided in the middle of the special processing (chemical) liquid supply line 606. A flow meter 610 and a valve 613 are provided in the middle of the ozone water supply line 607. A flow meter 611 and a valve 614 are provided in the middle of the ultrapure water supply line 608. A waste liquid line 622 is attached to the vacuum processing chamber 600 by a flange 623 at the bottom of the vacuum processing chamber 600. An opening / closing valve 624 is provided in the middle of the waste liquid line 622. A vacuum gauge 626 for measuring the pressure in the reduced pressure processing chamber 600 is attached to the side surface of the reduced pressure processing chamber 600.

FIG. 7 is a schematic top view for explaining the arrangement and ejection direction of nitrogen (N ₂ ) gas ejection ports provided on the inner wall surface of the processing chamber 601 in FIG. In FIG. 7, reference numeral 701 denotes a gas jet inner wall pipe, and 702 denotes a gas jet outlet.

  A gas ejection inner wall tube 701 coupled to the gas introduction line 615 is attached to the inner wall of the decompression processing chamber 600. The gas ejection inner wall pipe 701 is provided with a predetermined number of gas ejection ports 702 whose ejection direction is directed to the central axis of the inner space of the decompression processing chamber 600. The ejection diameter and the number of the gas ejection ports 702 are designed to be a predetermined gas ejection flow rate.

In the present invention, the gas jetting (blowing) flow rate from the gas jetting port 702 is determined in advance at the time of design so as not to cause a stirring action or a turbulent action in the processing chamber as much as possible by the gas jetting. It is desirable to determine the optimum value in the preliminary experiment of gas ejection. The degree of stirring action or turbulent action by gas ejection depends on the gas exhaust speed, and in the present invention, preferably 0.1 to 5.0 m / sec, more preferably 0.5 to 3.0 m. / sec, optimally around 2.0 m / sec. For example, when 20 nozzle holes 702 having a diameter of 2 mm are provided on the semicircular circumference as shown in the drawing, it is desirable to flow N ₂ gas into the reduced pressure processing chamber 600 at an amount of 200 cc / min. At this time, the flow rate of the N ₂ gas is 2.0 m / sec. In the present invention, it is preferable that the treatment liquid is sufficiently deaerated beforehand in order to enhance the gas absorption ability. Furthermore, it is desirable to use a resin-made laminated tube (manufactured by Nichias Co., Ltd.) whose oxygen permeability is suppressed for the processing liquid supply line. In the description so far, N ₂ gas or atmospheric gas has been exemplified as the atmospheric gas. However, if CO ₂ gas is used instead of these gases, the amount dissolved in the treatment liquid can be reduced. Since it can increase, it is preferable.

  FIG. 9 is a graph showing a saturated vapor pressure curve of water. The horizontal axis indicates temperature (° C.), and the vertical axis indicates pressure (Torr). In the present invention, the processing solution is introduced while reducing the pressure in the processing chamber. The degree of the pressure reduction is preferably set to 30 Torr in order to avoid boiling of the processing solution. If pressure is applied after supplying the treatment liquid onto the surface of the substrate to be treated under reduced pressure, even if bubbles remain in the tail hole, it is desirable because the volume of the bubble is reduced by pressurization and easily escapes from the hole. For example, when the pressure is increased from 30 Torr to 760 Torr, the volume of the bubbles becomes about 1/25. Therefore, in the present invention, it is also a preferred embodiment that the processing liquid is sufficiently supplied after depressurization and then pressurized. Furthermore, this pressure reduction and pressurization may be repeated.

  Although the present invention has been specifically described above, the technology of the present invention is not limited to TSV, and can be applied to technical fields such as MEMS as long as it requires a high aspect ratio hole. .

100 · · · SOI substrate 101 · · · Si (silicon) semiconductor substrate 102 · · · SiO ₂ (silicon oxide) layer 103 · · · Si layer (103-1, 103-2)
104 ... Hole 105 ... Bubble 106 ... Processing liquid 107 ... Gas-liquid interface 108 ... Inner wall surface (108-1, 108-2)
109 ... inner bottom wall surface 110 ... opening 200 ... treatment system 201 ... decompression treatment chamber (room)
202 ... Object to be processed installation table 202-1 ... Rotating shaft 203 for object to be processed installation table ... Object to be processed 204 ... Atmospheric gas supply line 205 ... Process (chemical) liquid supply Line 206 ... Recovery hood 207 ... Depressurized waste liquid tank 208 ... Atmosphere or N ₂ supply line 209 ... Drain line 210 ... Recovery lines 211, 212 ... Exhaust line 213 ... Exhaust Pumps 214, 215, 216, 217, 218, 219, 220, 221... Valve 222... Supply amount variable nozzle for processing liquid 301... Spinner 302. ..Nitrogen pressure feed processing (chemical) liquid supply system 401... Canister 402... Processing liquid supply line 403, 411. Adjusting valve 405 ... Flow meter 406 ... Mist trap 407, 408 ... Nitrogen gas supply line 409 ... Vent (exhaust) valve 410 ... Shunt joint 412 ... Regulator 413 ... Joint 414 415 ... Quick connector 501 ... Drain flange 502 ... Depressurization flange 503 ... Waste liquid introduction flange 504 ... Gas introduction flange 505 ... Vacuum gauge 506 ... Flow meter 507 ... Liquid level observation window 600 ... Decompression treatment chamber 601 ... Chamber structure 602 ... Upper lid 603 ... Stage 604 for installing the object to be processed ... Rotating shaft 605 ... Magnetic fluid seal 606 ... Special treatment (chemical) liquid supply line 607 ... Ozone water supply line 608 ... Ultrapure water supply line 609 610, 611, 618 ... Flowmeters 612, 613, 614, 617, 621, 624 ... Valve 615 ... Gas introduction line 619 ... Gas discharge lines 616, 620, 623 ... Flange 622 ..Waste liquid line 625 ... Observation windows (625-1, 625-2)
626... Vacuum gauge 701... Gas ejection inner wall tube 702... Gas ejection outlet 800... First substrate 801 .. Through electrode 802 ... Exposed portion 803 ... Stop layer 804. Device region 805 ... Adhesive layer 806 ... Second substrate 807 ... Barrier layer 808 ... Through electrode portion 809 ... Deep hole (deep groove)
810: removed portion 811 ... removed portion 812 ... remaining portion 813 ... protective film 814 ... exposed surface 815 ... member to be etched (first substrate)

Claims (3)

In an etching method for etching a portion to be etched of a member to be etched by wet etching,
(A) When the lower limit of “Se · h / Sue · h” is “1”, 5 μm <h and the upper limit of “Se · h / Sue · h” is 300
(B) When h ≦ 5 μm, 0 <Se · h / Sue · h ≦ 800,
S ₀ = Se + Sue
And 1 ≦ h / L
1 ≦ h / L (n)
Features and to Rue etching method to etch satisfy the relationship.
In the above, it defines as follows.
S ₀ : Area of the surface of the member to be etched to which the etching solution is applied
Se: Total area of the etched surface of the etched portion
Sue (n): Area of the nth non-etched surface
Sue: Total area of the non-etched surface of the member to be etched (“= ΣSue (n)”)
h: Depth of etching groove
Se · h: Total volume of the etched part
Sue · h: Total volume of the non-etched part of the member to be etched
L (n): Diameter of the nth non-etched surface
L: Average diameter of non-etched surface A plurality of electronic device region portions provided on the surface layer portion, a surface to which a processing solution is applied, and a micro-vacancy for forming a through electrode provided between the electronic device region portions having an opening on the surface The aspect ratio (l / r) of the micro vacancy is 5 or more, or the aspect ratio is less than 5, and V / S (V: volume of the micro vacancy, S: area of the opening) is 3 or more. A first step of processing the inner wall surface of the micro-vacancy by depressurizing a depressurizable processing space in which a first base is installed, and then introducing the processing liquid into the depressurized processing space;
A second step of forming a penetrating electrode portion by embedding a penetrating electrode material up to the opening in the micro-vacancy through the first step;
A third step of forming an LSI device pre-part by bonding a second base to the opening side of the first base through the second step;
When exposing a part of the through electrode portion by etching the LSI device pre-part,
Area of surface of member to be etched to which etchant is applied (S ₀ )
Total area of the etched surface (Se)
nth non-etched surface area ("Sue (n)")
Total area of non-etched surface (“= ΣSue (n)”) (“Sue (n)”)
Etching groove depth (h)
Total volume of the etched parts (Se · h)
Total volume of non-etched parts of the member to be etched (Sue · h)
nth non-etched surface diameter ("L (n)")
Average diameter of non-etched surface (L)
Then,
(A) When the lower limit of “Se · h / Sue · h” is “1”, 5 μm <h and the upper limit of “Se · h / Sue · h” is 300
(B) When h ≦ 5 μm, 0 <Se · h / Sue · h ≦ 800,
S ₀ = Se + Sue
And 1 ≦ h / L
1 ≦ h / L (n)
A fourth step of etching to satisfy the relationship of
A method for manufacturing an LSI device (LSID), comprising: A method of manufacturing a 3D integrated LSI device, comprising stacking a plurality of LSI devices (LSIDs) according to claim 2 so that the electrical contacts of the LSI devices (LSIDs) are electrically joined.

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