JP5560114B2 - Schottky barrier diode and manufacturing method thereof - Google Patents

Description

  The present invention relates to a Schottky barrier diode and a method for manufacturing the same.

Conventionally, a Schottky barrier diode (SBD) using a Schottky barrier generated at this interface by bonding a semiconductor and a metal is known (see, for example, Patent Document 1).
This SBD preferably has a small voltage drop when a predetermined voltage is applied in the forward direction and a small leakage current when a predetermined voltage is applied in the reverse direction.

FIG. 7 is a cross-sectional view showing a conventional trench structure type Schottky barrier diode (SBD) 1. A trench 3 is formed on a surface (one main surface) 2 a of a silicon substrate (semiconductor substrate) 2. An insulating film 4 made of a silicon oxide film is formed on the inner surface of the semiconductor substrate, and a conductor 5 made of polycrystalline silicon is buried in the trench 3. The surface 2 a of the silicon substrate 2, the uppermost surface 4 a of the insulating film 4, and the conductive film are formed. The upper surface 5 a of the body 5 is flush with the barrier metal layer 6 and the electrode metal layer 7 so as to cover the silicon substrate 2, the insulating film 4 and the conductor 5.
This SBD 1 has a trench 3 formed on the surface 2 a of the silicon substrate 2, an insulating film 4 is formed on the inner surface of the trench 3, and a conductor 5 made of polycrystalline silicon in the trench 3 surrounded by the insulating film 4. And the barrier metal layer 6 and the electrode metal layer 7 are laminated so as to cover the silicon substrate 2, the insulating film 4 and the conductor 5.

JP 2008-282839 A

  By the way, the conventional SBD 1 is very sensitive to stress such as tensile stress from the electrode metal layer 7. For example, when stress is applied from the electrode metal layer 7 to a bent portion of the barrier metal layer 6, that is, a region on the insulating film 4 or a region on the peripheral portion of the conductor 5 in the barrier metal layer 6, this stress is applied to the barrier metal layer 6. There is a problem in that it concentrates locally on a part of the layer 6 and as a result, the reverse current (IR) increases, and in the worst case, the silicon substrate 2 may be cracked.

  The present invention has been made to solve the above-described problem, and even when a stress such as a tensile stress from the electrode metal layer acts on the barrier metal layer, the barrier metal layer is dispersed by dispersing the stress. It is an object of the present invention to provide a Schottky barrier diode and a method for manufacturing the same, which can alleviate local concentration in the semiconductor device and, therefore, can reduce a reverse current (IR).

  As a result of intensive studies to solve the above problems, the inventor has formed a trench on one main surface of a semiconductor substrate, an insulating film is formed on the inner surface of the trench, and a conductor is formed in the trench. In a Schottky barrier diode in which a barrier metal layer and an electrode metal layer are laminated on the conductor, a part of the barrier metal layer on the conductor, on the vicinity of the peripheral edge of the conductor If the buffer layer extending in the thickness direction of the barrier metal layer is provided in any one or more of the above region and the region on the insulating film, this buffer layer allows the electrode metal layer to be formed. It has been found that stresses such as tensile stress that are generated are dispersed, so that the local concentration of the stress on the barrier metal layer is alleviated, and as a result, the reverse current (IR) is suppressed and reduced. Invention This has led to the formation.

That is, in the Schottky barrier diode according to claim 1 of the present invention, a trench is formed on one main surface of a semiconductor substrate, an insulating film is formed on the inner surface of the trench, and a conductor is embedded in the trench, In a Schottky barrier diode in which a barrier metal layer and an electrode metal layer are laminated on the conductor, a part of the barrier metal layer on the conductor, a region on the periphery of the conductor, A buffer layer which is an air layer extending in the thickness direction of the barrier metal layer is provided in any one or more of the regions on the insulating film.

  In this Schottky barrier diode, a barrier metal layer is formed in one or more regions of a part of a barrier metal layer on a conductor, a region in the vicinity of a peripheral portion of the conductor, and a region on an insulating film. By providing a buffer layer extending in the thickness direction, when the stress such as tensile stress generated in the electrode metal layer acts on the barrier metal layer, the buffer layer disperses the stress generated from the electrode metal layer. , To relieve the concentration of this stress locally on the barrier metal layer. Thereby, an increase in reverse current (IR) due to the concentration of stress on the barrier metal layer is suppressed.

In this Schottky barrier diode, by stress stress such tensile buffer layer from the electrode metal layer and propagates hardly air layer, the air layer, stress generated from the electrode metal layer is propagated to the barrier metal layer To prevent this stress from being concentrated locally on the barrier metal layer. This further suppresses an increase in reverse current (IR) due to stress concentration on the barrier metal layer.

The Schottky barrier diode according to claim 2 is the Schottky barrier diode according to claim 1 , wherein a region of the barrier metal layer on the insulating film is selectively removed, and the buffer layer is provided in the region. It is characterized by.
In this Schottky barrier diode, a buffer layer is provided in a region on the insulating film, which is a region where stress such as tensile stress generated in the electrode metal layer of the barrier metal layer is most easily concentrated. The stress generated in the metal layer is prevented from propagating to the barrier metal layer, and this stress is prevented from being concentrated locally on the barrier metal layer. This further suppresses an increase in reverse current (IR) due to stress concentration on the barrier metal layer.

4. The method of manufacturing a Schottky barrier diode according to claim 3 , wherein a trench is formed on one main surface of the semiconductor substrate, an insulating film is formed on the inner surface of the trench, and a conductor is formed in the trench in which the insulating film is formed. In the method for manufacturing a Schottky barrier diode in which a barrier metal layer and an electrode metal layer are stacked on the conductor, the embedding depth of the conductor is set to a part of the barrier metal layer on the conductor. Set according to the shape of the buffer layer, which is an air layer to be formed in one or more of the region, the region in the vicinity of the peripheral edge of the conductor, and the region on the insulating film. A barrier metal layer is formed on the conductor having a depth, and at the same time, the buffer layer is formed in the barrier metal layer.

  In this Schottky barrier diode manufacturing method, the buried depth of the conductor layer is set such that a part of the barrier metal layer is a region on the conductor, a region near the peripheral edge of the conductor, and a region on the insulating film. It is set according to the shape of the buffer layer to be formed in any one or more regions, and a barrier metal layer is formed on the conductor layer having the set depth, and at the same time, the buffer layer is formed in the barrier metal layer. Form. As a result, a buffer layer is formed in the barrier metal layer to relieve stress concentrated on the barrier metal layer by dispersing the stress generated in the electrode metal layer. As described above, an increase in reverse current (IR) due to stress concentration on the barrier metal layer is suppressed.

5. The method of manufacturing a Schottky barrier diode according to claim 4 , wherein a trench is formed on one main surface of the semiconductor substrate, an insulating film is formed on the inner surface of the trench, and a conductor is formed in the trench in which the insulating film is formed. In the method for manufacturing a Schottky barrier diode, in which a barrier metal layer and an electrode metal layer are stacked on the conductor, a part of the barrier metal layer on the conductor, in the vicinity of the peripheral edge of the conductor At least one of the upper region and the region on the insulating film is selectively removed, and a metal is deposited in the selectively removed region at a deposition rate different from the deposition rate of the barrier metal layer. A buffer layer that is an air layer is formed between the deposited metal layer and the remaining barrier metal layer.

  In this Schottky barrier diode manufacturing method, one or more of a region on the conductor, a region near the periphery of the conductor, and a region on the insulating film are selected from the barrier metal layer. The metal is deposited at a deposition rate different from the deposition rate of the barrier metal layer in the selectively removed region, and a buffer layer is formed between the deposited metal layer and the remaining barrier metal layer. . As a result, a buffer layer is formed in the barrier metal layer to relieve stress concentrated on the barrier metal layer by dispersing the stress generated in the electrode metal layer. As described above, an increase in reverse current (IR) due to stress concentration on the barrier metal layer is suppressed.

  According to the Schottky barrier diode of the first aspect of the present invention, any one of a part of the barrier metal layer on the conductor, a region in the vicinity of the peripheral portion of the conductor, and a region on the insulating film. Since the buffer layer extending in the thickness direction of the barrier metal layer is provided in the region above the location, the buffer layer disperses the stress generated from the electrode metal layer, and this stress is concentrated locally on the barrier metal layer. Can be alleviated. Therefore, an increase in reverse current (IR) due to this stress concentration can be suppressed.

According to the Schottky barrier diode of claim 1, since the buffer layer is an air layer , it is possible to prevent the propagation of stress such as tensile stress generated from the electrode metal layer by the air layer , This stress can be prevented from concentrating locally on the barrier metal layer. Therefore, the reverse current (IR) resulting from this stress concentration can be efficiently suppressed.

According to the Schottky barrier diode of claim 2, since the region on the insulating film of the barrier metal layer is selectively removed and the buffer layer is provided in the region, the stress generated from the electrode metal layer by the buffer layer Can be prevented from propagating to the barrier metal layer, and this stress can be prevented from being concentrated locally on the barrier metal layer. Therefore, an increase in reverse current (IR) due to the concentration of stress on the barrier metal layer can be further suppressed.

According to the manufacturing method of the Schottky barrier diode according to claim 3, the embedded depth of the conductor is set to a part of the barrier metal layer on the conductor, a region in the vicinity of the peripheral edge of the conductor, or the insulation. At the same time as forming the barrier metal layer on the conductor having the set depth, which is set in accordance with the shape of the buffer layer which is an air layer to be formed in any one or more of the regions on the film Since the buffer layer is formed in the barrier metal layer, a buffer layer that relaxes local concentration of the stress on the barrier metal layer by dispersing the stress generated from the electrode metal layer in the barrier metal layer. It can be formed easily and inexpensively. Therefore, the reverse current (IR) due to this stress concentration can be suppressed.

According to the method for manufacturing a Schottky barrier diode according to claim 4, any one of a part of the barrier metal layer on the conductor, a region near the periphery of the conductor, and a region on the insulating film. One or more regions are selectively removed, a metal is deposited on the selectively removed region at a deposition rate different from the deposition rate of the barrier metal layer, and the deposited metal layer and the remaining barrier metal layer Since a buffer layer that is an air layer is formed between them , a buffer layer that relaxes local concentration of the stress on the barrier metal layer by dispersing the stress generated from the electrode metal layer in the barrier metal layer. It can be formed easily and inexpensively. Therefore, the reverse current (IR) due to this stress concentration can be suppressed.

1 is a cross-sectional view illustrating a trench structure type Schottky barrier diode (SBD) according to a first embodiment of the present invention. It is process drawing which shows the manufacturing method of trench structure type SBD of the 1st Embodiment of this invention. It is process drawing which shows the manufacturing method of trench structure type SBD of the 1st Embodiment of this invention. It is sectional drawing which shows the trench structure type Schottky barrier diode (SBD) of the 2nd Embodiment of this invention. It is process drawing which shows the manufacturing method of trench structure type SBD of the 2nd Embodiment of this invention. It is sectional drawing which shows the trench structure type Schottky barrier diode (SBD) of the 3rd Embodiment of this invention. It is sectional drawing which shows the conventional Schottky barrier diode (SBD) of a trench structure type.

A mode for carrying out the Schottky barrier diode and the manufacturing method thereof of the present invention will be described.
This embodiment is specifically described for better understanding of the gist of the invention, and does not limit the present invention unless otherwise specified.

[First Embodiment]
FIG. 1 is a sectional view showing a trench structure type Schottky barrier diode (SBD) according to a first embodiment of the present invention. In FIG. 1, the same components as those in FIG. It is.
In FIG. 1, reference numeral 11 denotes a Schottky barrier diode (SBD), and a trench 3 having a rectangular cross section is formed on a surface (one main surface) 2 a of a silicon substrate (semiconductor substrate) 2. An insulating film 12 made of a silicon oxide film is formed, and a conductor 13 made of polycrystalline silicon is buried in the trench 3 in which the insulating film 12 is formed.

The upper surface of the conductor 13 is a concave surface 13a that is curved from the peripheral edge toward the center, and the uppermost surface of the insulating film 12 is directed from the side wall upper surface 3a of the trench 3 toward the concave surface 13a of the conductor 13. The inclined surface 12a is inclined.
As a result, a step corresponding to the difference in height is formed between the surface 2 a of the silicon substrate 2 and the concave surface 13 a of the conductor 13.
A barrier metal layer 14 is formed so as to cover the surface 2 a of the silicon substrate 2, the inclined surface 12 a of the insulating film 12, and the concave surface 13 a of the conductor 13. The barrier metal layer 14 is made of, for example, a metal material whose main component is a metal such as Mo, Pt, or Ti.

  In the barrier metal layer 14, a buffer layer 15 having a wedge-shaped cross section extending in the thickness direction of the barrier metal layer 14 is formed in the vicinity of the peripheral edge portion of the concave surface 13 a of the conductor 13. An electrode metal layer 16 is laminated on the barrier metal layer 14 including 15.

The buffer layer 15 may be any layer as long as it can relieve stress such as tensile stress generated in the electrode metal layer 16 and prevent the stress from acting on the barrier metal layer 14. Any of the metal layers whose main component is a metal such as Al, Cu, Pd or the like having a higher expansion coefficient than the barrier metal layer 14 is suitable.
In particular, the air layer can easily block the stress generated in the electrode metal layer 16 and prevent the stress from acting on the barrier metal layer 14.

  Thus, even when a stress such as a tensile stress is generated in the electrode metal layer 16, the buffer layer 15 relaxes this stress, thereby preventing the stress from being locally concentrated on the barrier metal layer. It is possible. Therefore, an increase in reverse current (IR) due to concentration of stress on the barrier metal layer 14 is efficiently suppressed.

Next, the manufacturing method of SBD11 is demonstrated based on FIG.2 and FIG.3.
First, as shown in FIG. 2A, the surface 2a of the silicon substrate 2 is thermally oxidized to form a silicon oxide film 21 serving as a trench formation mask.
Next, a resist 22 is applied on the silicon oxide film 21, and exposure and development are performed to form an opening 22a at a position corresponding to the trench of the resist 22.
Next, the silicon oxide film 21 is anisotropically etched using hydrofluoric acid using the resist 22 in which the opening 22a is formed as a mask, and the opening 21a is formed at a position corresponding to the trench of the silicon oxide film 21.

  Next, the resist 22 is removed, and a mixed gas obtained by adding oxygen gas to argon gas is applied to the surface 2a of the silicon substrate 2 using the silicon oxide film 21 in which the opening 21a is formed as a mask, as shown in FIG. The used anisotropic etching is performed to form a trench 3 having a rectangular cross section on the surface 2 a of the silicon substrate 2. Thereafter, the silicon oxide film 21 is removed using hydrofluoric acid.

Next, as shown in FIG. 2C, the entire surface 2 a of the silicon substrate 2 including the inner surface of the trench 3 is thermally oxidized, and an insulating film 23 made of a silicon oxide film is formed in the surface 2 a of the silicon substrate 2 and the trench 3. Form.
Next, a conductor made of polycrystalline silicon is deposited on the insulating film 23 by a thermal CVD method. As a result, the conductor 24 made of polycrystalline silicon is deposited on the entire surface of the insulating film 23 including the inside of the trench 3.

Next, as shown in FIG. 2D, the conductor 24 is etched by anisotropic etching using plasma to expose a portion other than the trench 3, that is, the insulating film 23 in the mesa portion, and also in the trench 3. The embedding depth of the conductor 24 is adjusted in accordance with the shape of the buffer layer 15 to be formed in the region near the peripheral edge of the concave surface 13a of the conductor 13.
Thereby, the embedding depth of the conductor 24 in the trench 3 is set according to the shape of the buffer layer 15 to be formed in the region near the peripheral edge of the concave surface 13 a of the conductor 13. The remaining conductor 24 becomes the conductor 13.

Next, as shown in FIG. 3A, the insulating film 23 is etched by anisotropic etching using plasma. As a result, the portion other than the inside of the trench 3, that is, the insulating film 23 in the mesa portion is removed, and only the insulating film 23 in the trench 3 remains.
Next, the uppermost surface 23a of the insulating film 23 in the trench 3 is etched by isotropic etching using hydrofluoric acid.

In this way, by performing isotropic etching on the uppermost surface 23 a of the insulating film 23 in the trench 3, the insulating film 23 in the trench 3 is directed from the side wall upper surface 3 a of the trench 3 toward the concave surface 13 a of the conductor 13. The insulating film 12 has the inclined surface 12a that is inclined.
In this way, a step is generated between the surface 2 a of the silicon substrate 2 and the concave surface 13 a of the conductor 13.

Next, as shown in FIG. 3B, a metal such as chromium is deposited by vapor deposition so as to cover the surface 2a of the silicon substrate 2, the inclined surface 12a of the insulating film 12, and the concave surface 13a of the conductor 13. Layer 25 is formed.
Since the metal layer 25 deposited in this way has a step between the surface 2a of the silicon substrate 2 and the concave surface 13a of the conductor 13, the metal layer 25a deposited on the surface 2a of the silicon substrate 2 and A gap resulting from the above step is formed between the conductive layer 13 and the metal layer 25b deposited so as to cover the conductor 13, and the buffer layer 15 made of an air layer is formed by the gap.

Thus, the barrier metal layer 14 including the buffer layer 15 is formed on the surface 2 a of the silicon substrate 2, the inclined surface 12 a of the insulating film 12, and the concave surface 13 a of the conductor 13.
Next, as shown in FIG. 3C, an electrode metal such as aluminum is deposited on the barrier metal layer 14 including the buffer layer 15 by vapor deposition to form the electrode metal layer 16.
As described above, the trench structure type SBD 11 of this embodiment can be manufactured.

  According to the trench structure type SBD 11 of this embodiment, the barrier metal layer 14 is formed so as to cover the step formed between the surface 2a of the silicon substrate 2 and the concave surface 13a of the conductor 13, and the step corresponds to this step. Since the buffer layer 15 extending in the thickness direction of the barrier metal layer 14 is formed in a region in the barrier metal layer 14 and the electrode metal layer 16 is laminated on the barrier metal layer 14 including the buffer layer 15, The buffer layer 15 can disperse the stress generated from the electrode metal layer 16, and can alleviate the local concentration of the stress on the barrier metal layer 14. Therefore, an increase in reverse current (IR) due to this stress concentration can be suppressed.

  Further, since a step corresponding to the difference in height is formed between the surface 2 a of the silicon substrate 2 and the concave surface 13 a of the conductor 13, the barrier metal layer 14 and the electrode metal layer laminated on these steps are formed. A concave surface having a shape similar to that of the concave surface 13a is formed at a position corresponding to the concave surface 13a of the sixteen conductors 13. Therefore, by forming a concave surface on the electrode metal layer 16, the electrode metal layer 16 and solder or the like are formed. The electrical connection between the two materials can be made more reliable.

  According to the manufacturing method of the trench structure type SBD 11 of this embodiment, the surface 2a of the silicon substrate 2 and the conductive layer are sequentially formed by performing anisotropic etching using plasma and isotropic etching using hydrofluoric acid. A step is generated between the concave surface 13a of the body 13 and a metal is deposited so as to cover the gap, so that a gap caused by the step between the surface 2a of the silicon substrate 2 and the concave surface 13a of the conductor 13 is removed from the air. Since the barrier metal layer 14 is formed as the buffer layer 15 made of a layer, the stress generated from the electrode metal layer 16 can be relieved from being locally concentrated on the barrier metal layer 14, and thus the concentration of the stress is reduced. An increase in reverse current (IR) due to the can be suppressed.

[Second Embodiment]
FIG. 4 is a sectional view showing a trench structure type Schottky barrier diode (SBD) 31 according to the second embodiment of the present invention. The difference between the SBD 31 of this embodiment and the SBD 11 of the first embodiment is that In the SBD 11 of the first embodiment, the barrier metal layer 14 is formed so as to cover the step formed between the surface 2a of the silicon substrate 2 and the concave surface 13a of the conductor 13, and the barrier metal layer 14 corresponding to the step is formed. Whereas the buffer layer 15 extending in the thickness direction of the barrier metal layer 14 is formed in the inner region, in the SBD 31 of this embodiment, the surface 2a of the silicon substrate 2 and the insulating film 32 that are flush with each other are formed. A barrier metal layer 34 is formed so as to cover the upper surface 32a and the upper surface 33a of the conductor 33, and the barrier metal layer 34 is formed in a region near the peripheral edge of the upper surface 33a of the conductor 33 in the barrier metal layer 34. 4 rectangular cross section of the buffer layer 35 extending in the thickness direction of the formed, a point obtained by laminating an electrode metal layer 16 on the barrier metal layer 34 including the buffer layer 35.

Like the buffer layer 15 of the first embodiment, the buffer layer 35 can relieve stress such as tensile stress generated in the electrode metal layer 16 and prevent this stress from acting on the barrier metal layer 34. Any metal layer mainly composed of a metal such as Al, Cu, Pd or the like having an expansion coefficient higher than that of the air layer or the barrier metal layer 34 is suitable.
In particular, the air layer can easily block the stress generated in the electrode metal layer 16 and prevent the stress from acting on the barrier metal layer 34.

  Also in this SBD 31, as in the case of the SBD 11 of the first embodiment, even when a stress such as a tensile stress is generated in the electrode metal layer 16, the buffer layer 35 relaxes this stress so that the stress is transferred to the barrier metal layer. 34 can be prevented from being concentrated locally. As a result, an increase in reverse current (IR) due to stress concentration on the barrier metal layer 34 is efficiently suppressed.

Next, the manufacturing method of SBD31 is demonstrated based on FIG.
Here, from the step of forming the silicon oxide film 21 on the surface 2a of the silicon substrate 2 to the step of depositing the conductor 24 on the entire surface of the insulating film 23 including the inside of the trench 3, the SBD 11 of the first embodiment shown in FIG. Since it is the same as that of the manufacturing method of, description is abbreviate | omitted.

Next, as shown in FIG. 5A, the conductor 24 is etched by anisotropic etching using plasma, and the conductor 24 in portions other than the trench 3 is removed, thereby remaining in the trench 3. The conductor 24 becomes the conductor 33.
Next, the silicon oxide film 23 is etched by anisotropic etching using plasma. As a result, only the silicon oxide film 23 in the trench 3 remains and becomes the insulating film 32.

Next, as shown in FIG. 5B, a metal such as chromium is deposited by vapor deposition so as to cover the surface 2a of the silicon substrate 2, the insulating film 32, and the conductor 33, thereby forming a metal layer 41.
Next, by wet etching, portions of the metal layer 41 corresponding to the upper surface 33a of the conductor 33 and the region near the peripheral edge of the upper surface 33a are selectively removed, and the upper surface 33a of the conductor 33 is opened to the metal layer 41. Opening 41a is formed.

Next, as shown in FIG. 5C, a metal such as chromium is deposited in the opening 41 a at a vapor deposition rate different from that of the metal layer 41 by vapor deposition.
In this deposition process, a metal such as chromium is deposited at a different evaporation rate from that of the metal layer 41, so that the deposited metal layer 42 has a crystal structure having a lattice constant different from that of the metal layer 41. The layer 42 does not adhere to the metal layer 41 due to lattice mismatch with the metal layer 41, and forms a gap between the layer 42 and the metal layer 41. A gap 43 formed between the metal layer 42 and the metal layer 41 deposited in this way becomes a buffer layer 35 made of an air layer.

The shape and size of the buffer layer 35 can be varied by changing the matching rate when the metal layer 42 is deposited.
Thus, the barrier metal having the buffer layer 35 on the surface 2a of the silicon substrate 2, the uppermost surface 32a of the insulating film 32 and the upper surface 33a of the conductor 33, and in the region near the peripheral edge of the upper surface 33a of the conductor 33. Layer 34 is formed.

Next, as shown in FIG. 5D, an electrode metal such as aluminum is deposited on the barrier metal layer 34 including the buffer layer 35 to form the electrode metal film 16.
As described above, the trench structure type SBD 31 of this embodiment can be manufactured.
Moreover, since the shape and size of the buffer layer 35 can be changed by changing the matching rate during metal deposition, the stress relaxation is optimized according to the stress generated in the electrode metal layer 16 and the shape of the SBD 31. Is possible.

Also in the trench structure type SBD 31 of the present embodiment, the same operations and effects as the SBD 11 of the first embodiment can be achieved.
In addition, since the buffer layer 35 is formed in the barrier metal layer 34 in the vicinity of the peripheral portion of the upper surface 33a of the conductor 33, the stress generated from the electrode metal layer 16 in the barrier metal layer 34 is easily concentrated. Thus, the buffer layer 35 is formed. Therefore, the stress generated from the electrode metal layer 16 can be efficiently dispersed, and the concentration of this stress on the barrier metal layer 14 can be further alleviated. Therefore, an increase in reverse current (IR) due to this stress concentration can be further suppressed.

Also in the manufacturing method of the trench structure type SBD 31 of the present embodiment, the same operations and effects as the manufacturing method of the SBD 11 of the first embodiment can be achieved.
In addition, since the shape and size of the buffer layer 35 can be arbitrarily changed by changing the matching rate at the time of depositing the metal layer 42, the buffer layer 35 can be easily adapted to various specifications required for the SBD 31. Moreover, it can be formed at low cost.

In the trench structure type SBD 31 of this embodiment, the surface 2a of the silicon substrate 2, the uppermost surface 32a of the insulating film 32, and the upper surface 33a of the conductor 33 are flush with each other, and a barrier including the buffer layer 35 thereon. Although the metal layer 34 is formed, a step is formed between the surface 2a of the silicon substrate 2 and the surface 2a of the silicon substrate 2 and the upper surface 33a of the conductor 33, as in the SBD 11 of the first embodiment. The barrier metal layer 34 including the buffer layer 35 may be formed on the surface 2a of the silicon substrate 2 and the upper surface 33a of the conductor 33.
With such a configuration, the stress generated from the electrode metal layer 16 can be more efficiently dispersed, and the concentration of this stress locally on the barrier metal layer 14 can be further alleviated.

[Third Embodiment]
FIG. 6 is a cross-sectional view showing a trench structure type Schottky barrier diode (SBD) 51 according to the third embodiment of the present invention. The difference between the SBD 51 of this embodiment and the SBD 31 of the second embodiment is that In the SBD 31 of the second embodiment, a buffer layer 35 having a rectangular cross section extending in the thickness direction of the barrier metal layer 34 is provided in a region near the peripheral edge of the upper surface 33 a of the conductor 33 in the barrier metal layer 34. In contrast to this, in the SBD 51 of this embodiment, the buffer layer 52 having a rectangular cross section extending in the thickness direction of the barrier metal layer 34 is formed in the region on the insulating film 32 of the barrier metal layer 34. It is.

Like the buffer layer 35 of the second embodiment, the buffer layer 52 relieves stress such as tensile stress generated in the electrode metal layer 16 and prevents this stress from acting on the barrier metal layer 34. Any metal layer mainly composed of a metal such as Al, Cu, Pd or the like having an expansion coefficient higher than that of the air layer or the barrier metal layer 34 is suitable.
In particular, the air layer can easily block the stress generated in the electrode metal layer 16 and prevent the stress from acting on the barrier metal layer 34.

  In order to manufacture this SBD 51, in the manufacturing method of the SBD 31 of the second embodiment, after the metal layer 41 is formed, a region on the insulating film 32 in the metal layer 41 is selectively removed by wet etching, and the metal layer 41 An opening that opens the upper surface of the insulating film 32 is formed in 41, and a metal such as chromium may be deposited in the opening at a vapor deposition rate different from that of the metal layer 41.

Also in the trench structure type SBD 51 of the present embodiment, the same operations and effects as the SBD 31 of the second embodiment can be achieved.
In addition, since the buffer layer 52 is formed in the barrier metal layer 34 in the region on the insulating film 32, the buffer layer 52 is formed in the barrier metal layer 34 in a region where stress generated from the electrode metal layer 16 is likely to concentrate. Therefore, the stress generated from the electrode metal layer 16 can be efficiently dispersed, and the stress can be further alleviated from being locally concentrated on the barrier metal layer 14. Therefore, an increase in reverse current (IR) due to this stress concentration can be further suppressed.

11 Schottky barrier diode (SBD)
2 Silicon substrate (semiconductor substrate)
2a Surface (one main surface)
3 Trench 3a Side wall top surface 12 Insulating film 12a Top surface 13 Conductor 13a Concave surface 14 Barrier metal layer 15 Buffer layer 16 Electrode metal layer 21 Silicon oxide film 21a Opening 22 Resist 22a Opening 23 Insulating film 23a Top surface 24 Conductors 25, 25a, 25b Metal layer 31 Schottky barrier diode (SBD)
32 Insulating film 32a Top surface 33 Conductor 33a Upper surface 34 Barrier metal layer 35 Buffer layer 41 Metal layer 41a Opening 42 Metal layer 43 Gap

Claims (4)

A trench is formed on one main surface of the semiconductor substrate, an insulating film is formed on the inner surface of the trench, a conductor is embedded in the trench, and a barrier metal layer and an electrode metal layer are stacked on the conductor. In the Schottky barrier diode,
The thickness of the barrier metal layer in any one or more of the regions of the barrier metal layer on the conductor, the region on the periphery of the conductor, and the region on the insulating film. A Schottky barrier diode comprising a buffer layer that is an air layer extending in a direction. 2. The Schottky barrier diode according to claim 1 , wherein a region on the insulating film of the barrier metal layer is selectively removed, and the buffer layer is provided in the region. A trench is formed on one main surface of a semiconductor substrate, an insulating film is formed on the inner surface of the trench, a conductor is embedded in the trench formed with the insulating film, and a barrier metal layer and an electrode metal layer are formed on the conductor. In the manufacturing method of the Schottky barrier diode to laminate
The embedded depth of the conductor is set to one or more of a part of the barrier metal layer on the conductor, a region in the vicinity of the peripheral edge of the conductor, and a region on the insulating film. Set according to the shape of the buffer layer, which is an air layer to be formed in the region, and form the barrier metal layer on the conductor having the set depth, and simultaneously form the buffer layer in the barrier metal layer A method for manufacturing a Schottky barrier diode. A trench is formed on one main surface of a semiconductor substrate, an insulating film is formed on the inner surface of the trench, a conductor is embedded in the trench formed with the insulating film, and a barrier metal layer and an electrode metal layer are formed on the conductor. In the manufacturing method of the Schottky barrier diode to laminate
The barrier metal layer is selectively removed by selectively removing one or more of a region on the conductor, a region on the periphery of the conductor, and a region on the insulating film. A metal is deposited in the formed region at a deposition rate different from the deposition rate of the barrier metal layer, and a buffer layer which is an air layer is formed between the deposited metal layer and the remaining barrier metal layer. A method for manufacturing a Schottky barrier diode.

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