JP5548443B2 - Image processing apparatus and control method thereof - Google Patents

Description

The present invention relates to an image processing apparatus and a control method thereof.

  An image processing apparatus capable of photographing such as a digital camera or a digital video camera includes a plurality of analog data input units, an analog data processing unit that processes analog data input from the analog data input unit, and a digital signal processing unit. Here, signals are transferred between the processing units such that a signal output from the analog data processing unit is input to the digital signal processing unit. In the image processing apparatus, the video signal input from the imaging unit and the audio signal input from the audio input unit are recorded on a recording medium of the apparatus, and the video / audio signal recorded on the recording medium is recorded from the recording medium. Read and play.

  In such an image processing apparatus, there is a possibility that a problem occurs during shooting, causing a malfunction in operation control, and as a result, a shooting opportunity may be missed. Meta-stable can be cited as such a failure factor. As a method for avoiding this meta-stable, there is a method in which the output signal from the analog processing unit is received by two stages of flip-flops at the subsequent digital signal processing unit at the boundary between the analog data processing unit and the digital signal processing unit. There is also a method of increasing the amount of clock delay with respect to the subsequent digital signal processing unit at the boundary between the analog data processing unit and the digital signal processing unit. In addition, a technique (Patent Document 1) that prevents malfunction caused by meta-stable by extending the clock edge according to the frequency ratio between different clocks has been proposed.

JP 2007-150385 A

  However, even with the above avoidance method, although the probability of misrecognition of transfer failure due to metastable can be reduced, misrecognition of transfer failure cannot be eliminated. Further, when a dedicated erroneous recognition determination circuit is provided separately, there is a problem that the circuit scale increases.

  Therefore, an object of the present invention is to provide a technique for avoiding a malfunction of a device due to a data transfer failure due to a meta stable without increasing the circuit scale.

The present invention for solving the above problems
A / D conversion means for selecting any one of a plurality of channels of analog data and converting the analog data of the selected channels into digital data;
Means for holding digital data output from the A / D conversion means, first holding means for holding digital data of two consecutive cycles for each channel ;
Second holding means for holding digital data output from the A / D conversion means ;
And updating means for updating the digital data that is held in said second holding means,
The A / D is selected so that analog data of a first type of channel is selected in a first cycle, and analog data of a second type of channel is selected in a second cycle longer than the first cycle. An image processing apparatus comprising: a control unit that controls the conversion unit and controls the update unit so as to update the digital data held by the second holding unit in accordance with the conversion by the A / D conversion unit. There,
Based on the digital data held by the first holding means, the control means determines a difference between two consecutive periods of digital data of one channel of the first type held in the first holding means. If it is determined that the value is larger than the threshold value, the updating unit controls the digital data held in the second holding unit not to be updated for the one channel, and selects analog data of the second type of channel. The A / D conversion means is controlled to select the analog data of the one channel instead of the analog data of the second type of channel and convert it to digital data again at the timing of The digital data of the one channel output by the D conversion means converting again is held in the second holding means. And controlling the updating means so that.

  The present invention can provide a technique for avoiding a malfunction of an apparatus due to a data transfer failure due to meta-stable without increasing the circuit scale.

1 is a diagram illustrating a configuration example of an image processing apparatus according to an embodiment. The figure which shows an example of the data processing timing which concerns on embodiment. The flowchart which shows an example of the process which concerns on embodiment. FIG. 4 is a diagram illustrating an example of data processing timing when data transfer is defective according to the first embodiment. FIG. 6 is a diagram showing an example of normal data transfer according to the embodiment. The figure which shows the example at the time of the data transfer defect which concerns on embodiment. The figure which shows the example of a data transfer when there exists a change in the actual data which concerns on embodiment. FIG. 10 is a diagram illustrating an example of data processing timing when data transfer is defective according to the second embodiment.

Embodiments of the invention will be described below with reference to the accompanying drawings. The present invention described in each embodiment relates to a malfunction prevention technique when a data transfer failure occurs due to a meta-stable factor or the like at the boundary between an analog unit and a digital unit in an image processing system. Specifically, the determination and suppresses a malfunction the quality of data transfer.

[Embodiment 1]
FIG. 1 shows a configuration example of an image processing apparatus according to the first embodiment. The image processing apparatus according to this embodiment may be any apparatus as long as it can capture an image, and includes a digital camera, a digital video camera, a personal computer, a mobile phone, a form information terminal, and the like.

  In FIG. 1, the image processing apparatus includes an A / D conversion unit 101, a digital signal processing unit 102, and a CPU 107. The A / D conversion unit 101 performs analog-digital conversion processing on the data for N channels to generate digital data. The digital signal processing unit 102 controls the A / D conversion unit 101 and processes various data.

  The digital signal processing unit 102 includes the following configuration. First, the selection unit 103 outputs the digital output signal from the A / D conversion unit 101 to the first data holding unit 104 and the update unit 109. The first data holding unit 104 holds digital data for N channels. The selective reading unit 105 selectively reads the data held by the first data holding unit 104 and outputs it to the comparison determination unit 106. The comparison determination unit 106 performs a comparison determination process according to the setting from the CPU 107 based on the output data from the selective reading unit 105. The A / D control unit 108 outputs a control signal to the A / D conversion unit 101 based on the comparison result of the comparison determination unit 106. The update unit 109 controls whether to update the data output from the selection unit 103 based on the comparison determination result in the comparison determination unit 106. The second data holding unit 110 holds the digital data output from the updating unit 109 as data for subsequent processing. The data held in the second data holding unit 110 is input to a signal processing circuit in the subsequent stage (not shown).

  In the image processing apparatus 100 of FIG. 1, each block may be configured by hardware using a dedicated logic circuit or a memory. Alternatively, the processing program stored in the memory may be executed by the CPU so as to be configured as software.

  Hereinafter, the operation of the image processing apparatus will be described. Analog data for a plurality of channels (N channels) is input to the A / D converter 101 from a plurality of control mechanisms such as a focus lens, a zoom lens, a distance measuring sensor, and a temperature sensor of the camera. The A / D conversion unit 101 processes the analog data for N channels one by one in order, and outputs the processing result to the digital signal processing unit 102 every time the processing is completed.

  The digital signal processing unit 102 first selects digital data for each channel by the selection unit 103 and holds the digital data in the first data holding unit 104. The first data holding unit 104 is configured to hold data for at least two cycles per channel. The selection reading unit 105 selects data for at least two cycles of any channel from the first data holding unit 104 and reads the data to the comparison determination unit 106. The comparison / determination unit 106 compares the data for at least two cycles input from the selective reading unit 105 and determines whether the data difference is larger than the threshold set by the CPU 107.

  The determination result in the comparison determination unit 106 is output to the A / D control unit 108 and the update unit 109. The A / D control unit 108 instructs the A / D conversion unit 101 to perform reconversion in order to reprocess the channel for which the comparison determination unit 106 has determined that the difference exceeds the threshold value.

  The A / D control unit 108, in order to instruct the A / D conversion unit 101 to convert, a CH select signal for selecting a channel for A / D conversion, an ADC clock as a clock signal for A / D conversion, and processing An AD conversion start signal instructing the start of is supplied. When reprocessing is performed, a CH select signal, an ADC clock, and an AD conversion start signal for the corresponding channel are supplied. In addition, a data update signal for notifying the update unit 109 of whether or not the data of the second data holding unit 110 can be updated is output.

  The update unit 109 holds the data output of each channel from the selection unit 103, and in accordance with the data update signal from the A / D control unit 108, the update unit 109 outputs the held data to the second data holding unit 110 for the corresponding channel. Output to.

  Next, the processing timing of analog data in this embodiment will be described with reference to FIG. In this embodiment, analog data processing timing for 20 channels will be described as an example. Of the 20 channels, channels 1 to 5 are assigned the first type of signal that needs to be processed in a high-speed cycle corresponding to a specific frequency as the first type of channel. For example, the focus lens, the zoom lens, or the distance measuring sensor can be controlled in any one of channel 1 to channel 5. Therefore, the focus control signal, the zoom control signal, and the distance measuring sensor signal are assigned to any one of channel 1 to channel 5 as the first type of signal. On the other hand, 15 channels from channel 6 to channel 20 other than the channel need not be processed at the high speed cycle as the second type channel, and it is sufficient to perform the processing at the low speed cycle. Assign to. Therefore, the temperature sensor signal is assigned to one of the channels 6 to 20 as the second type of signal. In an image processing apparatus such as a digital camera or a digital video camera, the temperature around the apparatus does not change frequently, so there is no problem even with low-cycle processing. If the focus lens process is assigned to channel 4 and the temperature sensor process is assigned to channel 6, the focus lens process is performed once every six times, and the temperature sensor process is performed once every 90 times. 2 periods.

  That is, in this embodiment, if the unit of data transmission of one channel is called “slot”, data transfer is performed by repeating six slots in the first cycle, which is a high-speed cycle. Channel assignment is fixed for 5 slots among the 6 slots, while different channels are assigned to the remaining 1 slot every cycle. Therefore, data transfer of each channel allocated in the first period is performed for the five slots, and a slower second period is determined for the remaining one slot depending on the number of channels to be allocated to the slot. Note that the number of slots used as a repetition unit does not need to be six slots, and the number of slots in which channel assignment is fixed among the slots of the repetition unit is not limited to five.

  Hereinafter, processing in the present embodiment will be described. In this embodiment, a problem at the time of data transfer of the image processing apparatus due to the meta stable is dealt with. At the time of data transfer from the analog circuit to the digital circuit in the A / D conversion unit 101 in FIG. 1, data transfer may not be performed normally due to the influence of meta stable. If data is transmitted to a subsequent signal processing circuit without normal data transfer, a parameter value for controlling the operation of the image processing apparatus may be erroneously transmitted. For example, when erroneous data transfer is performed for the focus lens processing, a malfunction occurs that the focus suddenly becomes out of focus, contrary to the user's intention while using an imaging device such as a digital camera or a digital video camera. there is a possibility. In order to avoid such a malfunction, in this embodiment, when there is a possibility that a data transfer failure has occurred, the data transfer is performed again to determine whether the data transfer is good or bad.

  Here, the flow of processing in the present embodiment will be described with reference to the flowchart of FIG. In FIG. 3, a process after data of a specific channel is input from the selection unit 103 to the first data holding unit 104 will be described.

  When the data (Dn2) of the selected channel (channel n) by the selection unit 103 is held in the corresponding data holding unit n (104), Dn2 is sent from the selection reading unit 105 together with the data (Dn1) of the previous cycle in S301. The data is output to the comparison determination unit 106. The comparison determination unit 106 calculates an absolute value difference between the data Dn1 and Dn2 acquired in S302, and determines whether the absolute value difference is larger than a threshold value Th set by the CPU 107. If it is determined that the value is larger than the threshold Th (“YES” in S302), the process proceeds to S305. On the other hand, if it is equal to or less than the threshold Th (“NO” in S302), the process proceeds to S303.

  First, in S <b> 303, the A / D control unit 108 outputs a data update signal to the update unit 109. In S304, the update unit 109 receives the data (Dn2) of the selected channel n acquired from the selection unit 103 based on the determination result in the comparison determination unit 106 and the data update signal from the A / D control unit 108. The data is output to the corresponding second data holding unit n (110). Thereafter, this process is terminated.

  On the other hand, in S305, the determination result of the comparison determination unit 106 is notified to the A / D control unit 108, and according to the determination result, the A / D control unit 108 performs the reprocessing of A / D conversion specifying the channel n again. / D conversion unit 101 to execute. The timing of the reprocessing execution instruction here will be described with reference to FIG.

  FIG. 4 shows a case where the selected channel n is channel 4. For the channel 4, when the acquired current data (above Dn2) has an absolute value difference equal to or greater than a threshold value with the data acquired before one cycle (above Dn1), the transfer data allocation is not fixed at the sixth slot (the second slot). Channel 4 is assigned again to 6 slots). The channel 6 originally assigned to the sixth slot may be assigned to the next sixth slot, or this transmission may be omitted.

  Returning to the description of FIG. 3, in S306 following S305, the data (Dn3) of channel n obtained by reprocessing is read out to the comparison determination unit 106 in the same procedure as in S301. At this time, data Dn2 one cycle before is also read out.

  In S307, the comparison / determination unit 106 calculates an absolute value difference between Dn2 and Dn3, and determines whether or not the absolute value difference is greater than a threshold value Th. Dn3 obtained by reprocessing is basically the result of A / D conversion of the same analog data as the original analog data of Dn2. Therefore, if Dn2 is an irregular value based on meta-stable, the difference between Dn2 and Dn3 is considered to change beyond the threshold value. On the other hand, if the actual data has actually changed significantly, Dn2 and Dn3 match.

  In any case, since Dn3 obtained by reconversion is valid, the A / D control unit 108 outputs a data update signal to the update unit 109 in S308 regardless of the determination result. In S309, the update unit 109 that has received the data update signal outputs Dn3 as data of channel n to the second data holding unit 110n to perform data update.

  Next, a specific example of the above process will be described with reference to FIGS. First, FIG. 5 shows determination processing when there is no data transfer failure and re-determination is not performed. In FIG. 5, a case is considered in which data of channel 4 is acquired at times CH4-0, CH4-1, and CH4-2 and held by the data holding unit 4 (104). Here, when there is no data transfer failure and re-determination is not performed, each data “10” → “15” → “10” processed at the timings CH4-0, CH4-1, and CH4-2 is second in order. The data is stored in the data holding unit 110 as channel 4 data. Here, the change is from “10” to “15”. However, if there is a sudden data change that changes from “10” to “100”, there is a possibility of data transfer failure. If the data transfer is defective, the data value “100” is affected, and the image processing apparatus may malfunction.

  Next, FIG. 6 shows a specific example when re-determination is performed when there is a possibility of data transfer failure. First, the data “10” acquired at time CH4-0 is processed without being reprocessed. On the other hand, the data “100” acquired at time CH4-1 has a difference of “90” from the data of the previous cycle. If the threshold is “10”, it is larger than the threshold, and there is a possibility of data transfer failure. is there. Therefore, reprocessing is performed at time CH4-1 ′ before the next time CH4-2. When the reprocessing is performed, the data update signal is not input from the A / D control unit 108, so the update unit 109 suppresses the update of the second data holding unit 110. Then, after reprocessing and re-determination at time CH4-1 ′, the second data holding unit 110 is updated. In the case of FIG. 6, the data acquired at time CH4-1 ′ is “10”, which matches the data acquired at time CH4-0. Therefore, the data update signal is input from the A / D control unit 108, and the update unit 109 updates the second data holding unit 110 with the data acquired at time CH4-1 ′.

  Next, FIG. 7 shows another specific example when re-determination is performed when there is a possibility of data transfer failure. FIG. 7 shows a determination process in the case where there is a fluctuation in which the actual data exceeds the threshold value as a result of the re-determination, not the data transfer failure. Data at time CH4-0 is processed normally. On the other hand, the data “100” acquired at time CH4-1 has a difference of 90 from the data of the previous cycle. If the threshold is “10”, it is larger than the threshold and there is a possibility of data transfer failure. Therefore, before the next time CH4-2, the reprocessing is performed at the time CH4-1 ′ as in the case of FIG. After reprocessing and redetermination at time CH4-1 ′, the second data holding unit 110 is updated. In the case of FIG. 6, since the data acquired at time CH4-1 ′ is “100”, it matches the data acquired at time CH4-1. Therefore, the data update signal is input from the A / D control unit 108, and the update unit 109 updates the second data holding unit 110 with the data acquired at time CH4-1 ′. In this case, the result of processing in CH4-1 matches the result of processing in CH4-1 ′, so that a data transfer failure has not occurred, and actual data has changed abruptly. Therefore, it is possible to update the second data holding unit 110 with the data of the time CH4-1 ′ before the timing of CH4-2 and perform the subsequent processing.

  The data values in FIGS. 5 to 7 are described as examples only. That is, the value varies depending on the type of data actually processed, and the threshold value set by the CPU 107 is also set for each type of data.

  In addition, if it is considered that two or more data transfer failures occur in one transmission cycle (six slots), retransmission processing is performed for a channel in which the transmission order is assigned to the earliest slot. .

  As described above, in the present embodiment, when there is a possibility of data transfer failure in a channel that requires high-speed processing, the corresponding channel is re-processed using a slot to which sufficient channels are allocated in low-speed processing. . Thereby, malfunction can be prevented. In addition, since it is not necessary to add a new channel for reprocessing, the above-described effect can be achieved while suppressing an increase in the determination circuit scale.

[Embodiment 2]
Next, the operation of the second embodiment will be described. In the first embodiment described above, when it is determined that there is a possibility that a data transfer failure has occurred in a channel that requires high-speed processing, the channel is reassigned to a slot dedicated to a sufficient channel by low-speed processing, and reprocessing is performed. Went. In this case, the update timing of the channel is delayed than usual. Therefore, in the present embodiment, a case will be described in which the retransmission processing of data of a channel that may have a data transfer failure is performed using the immediately following slot.

  FIG. 8 is a diagram illustrating the timing of reprocessing corresponding to the present embodiment. For example, when it is determined that the focus lens processing of channel 4 assigned to the fourth slot is defective in transfer, the data of channel 4 is retransmitted in the slot to which data for zoom control processing of channel 5 is assigned. As a result, it is possible to perform processing using an accurate data value with a delay of one slot than usual. At this time, the zoom control processing data for channel 5 originally assigned to the fifth slot is transmitted in the sixth slot to which data for low speed processing is assigned.

  In the above description, the case where a data transfer failure has occurred for channel 4 has been described. However, if data transfer has occurred for channel 1, channel 2 and the subsequent channels may be sequentially lowered. In this case, if the channel assignment from the first slot to the fifth slot is made so that the channel with the higher priority comes first, the high priority channel is given priority over the low priority channel for retransmission. be able to. In addition, the channel immediately after the channel in which the transfer failure has occurred may be assigned to the sixth slot.

  In this way, for channels that may have a data transfer failure, the channel that needs to be processed in a high-speed cycle is preferentially processed by retransmitting data using the immediately following slot, and due to a data transfer failure. It becomes possible to prevent malfunction.

(Other examples)
The present invention can also be realized by executing the following processing. That is, software (program) that realizes the functions of the above-described embodiments is supplied to a system or apparatus via a network or various storage media, and a computer (or CPU, MPU, or the like) of the system or apparatus reads the program. It is a process to be executed.

Claims (4)

A / D conversion means for selecting any one of a plurality of channels of analog data and converting the analog data of the selected channels into digital data;
Means for holding digital data output from the A / D conversion means, first holding means for holding digital data of two consecutive cycles for each channel;
Second holding means for holding digital data output from the A / D conversion means;
Updating means for updating the digital data held in the second holding means;
The A / D is selected so that analog data of a first type of channel is selected in a first cycle, and analog data of a second type of channel is selected in a second cycle longer than the first cycle. And a control means for controlling the updating means so as to update the digital data held by the second holding means in accordance with the conversion by the A / D conversion means.
Based on the digital data held by the first holding means, the control means determines a difference between two consecutive periods of digital data of one channel of the first type held in the first holding means. If it is determined that the value is larger than the threshold value, the updating unit controls the digital data held in the second holding unit not to be updated for the one channel, and selects analog data of the second type of channel. The A / D conversion means is controlled to select the analog data of the one channel instead of the analog data of the second type of channel and convert it to digital data again at the timing of The digital data of the one channel output by the D conversion means converting again is held in the second holding means. The image processing apparatus characterized by controlling the updating means so that. A / D conversion means for selecting any one of a plurality of channels of analog data and converting the analog data of the selected channels into digital data;
Means for holding digital data output from the A / D conversion means, first holding means for holding digital data of two consecutive cycles for each channel;
Second holding means for holding digital data output from the A / D conversion means;
Updating means for updating the digital data held in the second holding means;
The A / D is selected so that analog data of a first type of channel is selected in a first cycle, and analog data of a second type of channel is selected in a second cycle longer than the first cycle. And a control means for controlling the updating means so as to update the digital data held by the second holding means in accordance with the conversion by the A / D conversion means.
Based on the digital data held by the first holding means, the control means determines a difference between two consecutive periods of digital data of one channel of the first type held in the first holding means. When it is determined that the threshold value is larger than the threshold value, the updating unit controls the digital data held in the second holding unit for the one channel so as not to update, and among the plurality of channels of the first type, at a timing for selecting the analog data of the channels to be converted in one channel to the next, the place of the analog data of the channels to be converted next, again converted into digital data by selecting the analog data of said one channel , The second type channel at the timing of selecting the analog data of the second type channel. The place of the analog data, the controls the A / D conversion means so as to select the analog data of the channels to be converted next, the A / D conversion means the one that is output by converting again An image processing apparatus for controlling the updating means so that digital data of a channel is held in the second holding means. A / D conversion means for selecting any one of a plurality of channels of analog data and converting the analog data of the selected channels into digital data;
Means for holding digital data output from the A / D conversion means, first holding means for holding digital data of two consecutive cycles for each channel;
Second holding means for holding digital data output from the A / D conversion means;
Updating means for updating the digital data held in the second holding means;
The AD conversion means selects analog data of a first type of channel in a first cycle and selects analog data of a second type of channel in a second cycle longer than the first cycle. And a control means for controlling the updating means so as to update the digital data held by the second holding means in accordance with the conversion by the A / D conversion means. Because
Based on the digital data held by the first holding means, it is determined that the difference between two consecutive periods of digital data of one channel of the first type held in the first holding means is larger than a threshold value. When the control means,
Controlling the updating means not to update the digital data held in the second holding means for the one channel;
The timing is such that analog data of the second type of channel is selected, and instead of the analog data of the second type of channel, the analog data of the one channel is selected and converted into digital data again. Controlling the A / D conversion means;
And a step of controlling the updating means so that the digital data of the one channel output by the A / D conversion means being converted again is held in the second holding means. A method for controlling a processing apparatus. A / D conversion means for selecting any one of a plurality of channels of analog data and converting the analog data of the selected channels into digital data;
Means for holding digital data output from the A / D conversion means, first holding means for holding digital data of two consecutive cycles for each channel;
Second holding means for holding digital data output from the A / D conversion means;
Updating means for updating the digital data held in the second holding means;
The A / D is selected so that analog data of a first type of channel is selected in a first cycle, and analog data of a second type of channel is selected in a second cycle longer than the first cycle. And a control unit that controls the updating unit so as to update the digital data held by the second holding unit in accordance with the conversion by the A / D conversion unit. A control method,
Based on the digital data held by the first holding means, the control means has a difference between two consecutive digital data of one channel of the first type held in the first holding means. If the update means determines that the digital data held in the second holding means is not updated for the one channel when it is determined that it is greater than a threshold;
At the timing when the control means selects analog data of a channel to be converted next to the one channel among the plurality of channels of the first type, instead of the analog data of the channel to be converted next, The analog data of the one channel is selected and converted to digital data again. At the timing of selecting the analog data of the second type of channel, the analog data of the second type of channel is replaced with the next data. Controlling the A / D conversion means to select analog data of a channel to be converted to
And a step of controlling the updating means so that the second holding means holds the digital data of the one channel output by the A / D conversion means converting again. A method for controlling an image processing apparatus.

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