JP5528554B2 - ブロックベースの非透過的キャッシュ - Google Patents

ブロックベースの非透過的キャッシュ Download PDF

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Publication number
JP5528554B2
JP5528554B2 JP2012519776A JP2012519776A JP5528554B2 JP 5528554 B2 JP5528554 B2 JP 5528554B2 JP 2012519776 A JP2012519776 A JP 2012519776A JP 2012519776 A JP2012519776 A JP 2012519776A JP 5528554 B2 JP5528554 B2 JP 5528554B2
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Japan
Prior art keywords
memory
transparent
block
address
control unit
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JP2012519776A
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Japanese (ja)
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JP2012533124A (ja
Inventor
ジェイムズ ワン
ゾンジャン チェン
ジェイムズ ビー ケラー
ティモシー ジェイ ミレット
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Apple Inc
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Apple Inc
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/25—Using a specific main memory architecture
    • G06F2212/251—Local memory within processor subsystem
    • G06F2212/2515—Local memory within processor subsystem being configurable for different purposes, e.g. as cache or non-cache memory
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP2012519776A 2009-07-10 2010-07-09 ブロックベースの非透過的キャッシュ Expired - Fee Related JP5528554B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/500,810 2009-07-10
US12/500,810 US8219758B2 (en) 2009-07-10 2009-07-10 Block-based non-transparent cache
PCT/US2010/041570 WO2011006096A2 (en) 2009-07-10 2010-07-09 Block-based non-transparent cache

Publications (2)

Publication Number Publication Date
JP2012533124A JP2012533124A (ja) 2012-12-20
JP5528554B2 true JP5528554B2 (ja) 2014-06-25

Family

ID=43428348

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2012519776A Expired - Fee Related JP5528554B2 (ja) 2009-07-10 2010-07-09 ブロックベースの非透過的キャッシュ

Country Status (6)

Country Link
US (1) US8219758B2 (de)
EP (1) EP2452265B1 (de)
JP (1) JP5528554B2 (de)
KR (1) KR101389256B1 (de)
CN (1) CN102483719B (de)
WO (1) WO2011006096A2 (de)

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US8244981B2 (en) 2009-07-10 2012-08-14 Apple Inc. Combined transparent/non-transparent cache
US9239793B2 (en) * 2011-12-13 2016-01-19 Ati Technologies Ulc Mechanism for using a GPU controller for preloading caches
US9430391B2 (en) 2012-03-29 2016-08-30 Advanced Micro Devices, Inc. Managing coherent memory between an accelerated processing device and a central processing unit
US9373182B2 (en) * 2012-08-17 2016-06-21 Intel Corporation Memory sharing via a unified memory architecture
US10585801B2 (en) * 2012-11-26 2020-03-10 Advanced Micro Devices, Inc. Prefetch kernels on a graphics processing unit
JP2014149765A (ja) * 2013-02-04 2014-08-21 Toshiba Corp コンパイラ、オブジェクトコード生成方法、情報処理装置及び情報処理方法
EP3936226A3 (de) 2013-06-11 2022-03-16 Waters Technologies Corporation Chromatografiesäulen und trennvorrichtungen mit einem oberflächlich porösen material und verwendung davon zur chromatografie überkritischer fluide und andere chromatografie
WO2015130314A1 (en) 2014-02-28 2015-09-03 Hewlett-Packard Development Company, L.P. Mapping mode shift
US9547553B1 (en) 2014-03-10 2017-01-17 Parallel Machines Ltd. Data resiliency in a shared memory pool
US9781027B1 (en) 2014-04-06 2017-10-03 Parallel Machines Ltd. Systems and methods to communicate with external destinations via a memory network
US9477412B1 (en) 2014-12-09 2016-10-25 Parallel Machines Ltd. Systems and methods for automatically aggregating write requests
US9690713B1 (en) 2014-04-22 2017-06-27 Parallel Machines Ltd. Systems and methods for effectively interacting with a flash memory
US9529622B1 (en) 2014-12-09 2016-12-27 Parallel Machines Ltd. Systems and methods for automatic generation of task-splitting code
US9501420B2 (en) * 2014-10-22 2016-11-22 Netapp, Inc. Cache optimization technique for large working data sets
US9639473B1 (en) 2014-12-09 2017-05-02 Parallel Machines Ltd. Utilizing a cache mechanism by copying a data set from a cache-disabled memory location to a cache-enabled memory location
US9690705B1 (en) 2014-12-09 2017-06-27 Parallel Machines Ltd. Systems and methods for processing data sets according to an instructed order
US9753873B1 (en) 2014-12-09 2017-09-05 Parallel Machines Ltd. Systems and methods for key-value transactions
US9781225B1 (en) 2014-12-09 2017-10-03 Parallel Machines Ltd. Systems and methods for cache streams
WO2016159930A1 (en) 2015-03-27 2016-10-06 Hewlett Packard Enterprise Development Lp File migration to persistent memory
US10684954B2 (en) 2015-04-02 2020-06-16 Hewlett Packard Enterprise Development Lp Page cache on persistent memory
US9356602B1 (en) * 2015-05-14 2016-05-31 Xilinx, Inc. Management of memory resources in a programmable integrated circuit
JP2019046199A (ja) * 2017-09-01 2019-03-22 株式会社半導体エネルギー研究所 プロセッサ、および電子機器
US11281589B2 (en) * 2018-08-30 2022-03-22 Micron Technology, Inc. Asynchronous forward caching memory systems and methods
KR102795964B1 (ko) * 2018-11-08 2025-04-16 삼성전자주식회사 저장 장치, 저장 장치의 동작 방법 및 저장 장치를 제어하는 호스트의 동작 방법
US12536050B2 (en) * 2021-09-30 2026-01-27 Advanced Micro Devices, Inc. Cache resizing based on processor workload
JP2023152817A (ja) 2022-03-31 2023-10-17 株式会社半導体エネルギー研究所 半導体装置

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US5913224A (en) 1997-02-26 1999-06-15 Advanced Micro Devices, Inc. Programmable cache including a non-lockable data way and a lockable data way configured to lock real-time data
JP3506024B2 (ja) * 1998-12-10 2004-03-15 日本電気株式会社 情報処理装置
US6484237B1 (en) 1999-07-15 2002-11-19 Texas Instruments Incorporated Unified multilevel memory system architecture which supports both cache and addressable SRAM
JP2001166990A (ja) * 1999-12-06 2001-06-22 Fujitsu Ltd 計算機とその制御方法
US6732234B1 (en) 2000-08-07 2004-05-04 Broadcom Corporation Direct access mode for a cache
JP2003044358A (ja) 2001-07-31 2003-02-14 Mitsubishi Electric Corp キャッシュメモリ制御装置
US7000077B2 (en) * 2002-03-14 2006-02-14 Intel Corporation Device/host coordinated prefetching storage system
JP2003330795A (ja) * 2002-05-10 2003-11-21 Matsushita Electric Ind Co Ltd キャッシュメモリ制御装置
US6986010B2 (en) 2002-12-13 2006-01-10 Intel Corporation Cache lock mechanism with speculative allocation
KR100463205B1 (ko) * 2003-02-13 2004-12-23 삼성전자주식회사 시퀀셜 버퍼를 내장하여 디에스피의 데이터 억세스 성능을향상시키는 컴퓨터 시스템 및 그 컴퓨터 시스템의 데이터억세스 방법
JP4100256B2 (ja) * 2003-05-29 2008-06-11 株式会社日立製作所 通信方法および情報処理装置
JP2006092124A (ja) * 2004-09-22 2006-04-06 Fujitsu Ltd 記憶装置、記憶制御方法および記憶制御プログラム
US7318114B1 (en) 2004-10-29 2008-01-08 Sun Microsystems, Inc. System and method for dynamic memory interleaving and de-interleaving
JP2008234074A (ja) * 2007-03-16 2008-10-02 Fujitsu Ltd キャッシュ装置
US20100011165A1 (en) 2008-07-11 2010-01-14 Telefonaktiebolaget Lm Ericsson (Publ) Cache management systems and methods
US8244981B2 (en) * 2009-07-10 2012-08-14 Apple Inc. Combined transparent/non-transparent cache

Also Published As

Publication number Publication date
EP2452265B1 (de) 2018-10-24
CN102483719A (zh) 2012-05-30
JP2012533124A (ja) 2012-12-20
EP2452265A2 (de) 2012-05-16
US8219758B2 (en) 2012-07-10
KR20120037971A (ko) 2012-04-20
WO2011006096A3 (en) 2011-04-07
CN102483719B (zh) 2014-11-19
KR101389256B1 (ko) 2014-04-24
US20110010520A1 (en) 2011-01-13
WO2011006096A2 (en) 2011-01-13

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