JP5517694B2 - Semiconductor device - Google Patents
Semiconductor device Download PDFInfo
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- JP5517694B2 JP5517694B2 JP2010074078A JP2010074078A JP5517694B2 JP 5517694 B2 JP5517694 B2 JP 5517694B2 JP 2010074078 A JP2010074078 A JP 2010074078A JP 2010074078 A JP2010074078 A JP 2010074078A JP 5517694 B2 JP5517694 B2 JP 5517694B2
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- connection
- semiconductor device
- solder
- layer
- compound
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 239000004065 semiconductor Substances 0.000 title claims description 67
- 229910000679 solder Inorganic materials 0.000 claims description 64
- 230000004888 barrier function Effects 0.000 claims description 17
- 150000001875 compounds Chemical class 0.000 claims description 16
- 229910020888 Sn-Cu Inorganic materials 0.000 claims description 4
- 229910019204 Sn—Cu Inorganic materials 0.000 claims description 4
- 239000000463 material Substances 0.000 description 56
- 239000010410 layer Substances 0.000 description 47
- 238000007747 plating Methods 0.000 description 25
- 229910018471 Cu6Sn5 Inorganic materials 0.000 description 24
- 229910017755 Cu-Sn Inorganic materials 0.000 description 18
- 229910017927 Cu—Sn Inorganic materials 0.000 description 18
- -1 Cu—Sn compound Chemical class 0.000 description 16
- 238000012360 testing method Methods 0.000 description 16
- 239000002184 metal Substances 0.000 description 14
- 229910052751 metal Inorganic materials 0.000 description 14
- 239000000203 mixture Substances 0.000 description 14
- 230000005496 eutectics Effects 0.000 description 12
- 239000011888 foil Substances 0.000 description 11
- 230000007246 mechanism Effects 0.000 description 11
- 238000010406 interfacial reaction Methods 0.000 description 10
- 230000035882 stress Effects 0.000 description 10
- 238000006243 chemical reaction Methods 0.000 description 9
- 229910000765 intermetallic Inorganic materials 0.000 description 9
- 238000000034 method Methods 0.000 description 9
- 239000011800 void material Substances 0.000 description 8
- 230000015572 biosynthetic process Effects 0.000 description 7
- 230000000052 comparative effect Effects 0.000 description 7
- 239000000758 substrate Substances 0.000 description 7
- 230000008859 change Effects 0.000 description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- 230000007613 environmental effect Effects 0.000 description 4
- 238000003780 insertion Methods 0.000 description 4
- 230000037431 insertion Effects 0.000 description 4
- 238000005304 joining Methods 0.000 description 4
- 229910052759 nickel Inorganic materials 0.000 description 4
- 239000002244 precipitate Substances 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 229910045601 alloy Inorganic materials 0.000 description 3
- 239000000956 alloy Substances 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 230000007423 decrease Effects 0.000 description 3
- 230000003247 decreasing effect Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 229910052709 silver Inorganic materials 0.000 description 3
- 238000003860 storage Methods 0.000 description 3
- 239000002344 surface layer Substances 0.000 description 3
- 229910018082 Cu3Sn Inorganic materials 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 2
- 229910018104 Ni-P Inorganic materials 0.000 description 2
- 229910018100 Ni-Sn Inorganic materials 0.000 description 2
- 229910018536 Ni—P Inorganic materials 0.000 description 2
- 229910018532 Ni—Sn Inorganic materials 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 229910002056 binary alloy Inorganic materials 0.000 description 2
- 239000002131 composite material Substances 0.000 description 2
- 238000001816 cooling Methods 0.000 description 2
- KUNSUQLRTQLHQQ-UHFFFAOYSA-N copper tin Chemical group [Cu].[Sn] KUNSUQLRTQLHQQ-UHFFFAOYSA-N 0.000 description 2
- 230000007797 corrosion Effects 0.000 description 2
- 238000005260 corrosion Methods 0.000 description 2
- 230000002349 favourable effect Effects 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 229910052739 hydrogen Inorganic materials 0.000 description 2
- 239000001257 hydrogen Substances 0.000 description 2
- 229910052749 magnesium Inorganic materials 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 239000000155 melt Substances 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 238000010587 phase diagram Methods 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 229920002379 silicone rubber Polymers 0.000 description 2
- 239000004945 silicone rubber Substances 0.000 description 2
- 229910052718 tin Inorganic materials 0.000 description 2
- 229910052725 zinc Inorganic materials 0.000 description 2
- 229910017482 Cu 6 Sn 5 Inorganic materials 0.000 description 1
- 229910001374 Invar Inorganic materials 0.000 description 1
- 229910001182 Mo alloy Inorganic materials 0.000 description 1
- 229910020220 Pb—Sn Inorganic materials 0.000 description 1
- 229940125773 compound 10 Drugs 0.000 description 1
- BERDEBHAJNAUOM-UHFFFAOYSA-N copper(I) oxide Inorganic materials [Cu]O[Cu] BERDEBHAJNAUOM-UHFFFAOYSA-N 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- KRFJLUBVMFXRPN-UHFFFAOYSA-N cuprous oxide Chemical compound [O-2].[Cu+].[Cu+] KRFJLUBVMFXRPN-UHFFFAOYSA-N 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000007667 floating Methods 0.000 description 1
- 230000004907 flux Effects 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- ZLVXBBHTMQJRSX-VMGNSXQWSA-N jdtic Chemical compound C1([C@]2(C)CCN(C[C@@H]2C)C[C@H](C(C)C)NC(=O)[C@@H]2NCC3=CC(O)=CC=C3C2)=CC=CC(O)=C1 ZLVXBBHTMQJRSX-VMGNSXQWSA-N 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 238000009736 wetting Methods 0.000 description 1
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Description
本発明は、半導体装置用はんだ材、これを用いた半導体装置、およびその製造方法に関し、さらに詳しくは、交流発電機の交流出力を直流出力に変換する車載用交流発電機(オルタネーター)に使用される半導体装置に関するものである。 The present invention relates to a solder material for a semiconductor device, a semiconductor device using the same, and a method for manufacturing the same, and more specifically, used for an on-vehicle AC generator (alternator) that converts an AC output of an AC generator into a DC output. The present invention relates to a semiconductor device.
車両用交流発電機に用いられる半導体装置は、例えば特許文献1に示されるように、厳しい温度サイクルに耐えるよう半導体素子と電極との熱膨張率の差に基づく熱応力を低減するような構造をしている。またエンジン近傍に設置されることから半導体装置に対して
200℃の耐熱温度が要求される。そのため、半導体素子の接続には例えば固相線が300℃付近の高Pbはんだ(例えば95重量%のPbと5重量%のSnを含む固相線300℃液相線314℃のPb−Sn合金)が接続に使用される。
A semiconductor device used in an automotive alternator has a structure that reduces thermal stress based on a difference in thermal expansion coefficient between a semiconductor element and an electrode so as to withstand severe temperature cycles, as disclosed in, for example,
しかしながら、環境保護の観点から、環境負荷が大きいPbを排除した接続材料を使用した半導体装置が要求されるようになってきている。Pbを含まず高Pbはんだに近い融点を有するPbフリーはんだ材料としては、Au-20Sn(共晶、280℃)、Au-12Ge(共晶、356℃)Au-3.15Si(共晶、363℃)等のAu系材料があるが、極めて高コストである。またAu含有率が比較的少ないAu-20Snの場合、硬はんだであるため、大面積の接続では十分な応力緩衝ができず、半導体素子が破損しやすい欠点がある。 However, from the viewpoint of environmental protection, a semiconductor device using a connection material from which Pb having a large environmental load is removed has been demanded. Pb-free solder materials that do not contain Pb and have a melting point close to high Pb solder include Au-20Sn (eutectic, 280 ° C), Au-12Ge (eutectic, 356 ° C), Au-3.15Si (eutectic, 363 ° C) ) Etc., but it is very expensive. Further, in the case of Au-20Sn having a relatively small Au content, since it is a hard solder, there is a disadvantage that a sufficient stress cannot be buffered by a large area connection and the semiconductor element is easily damaged.
他のPbフリーはんだ材料としては、融点200℃以上のSn-3Ag-0.5Cu等のSn系中温はんだがあり、部品を基板に実装するために広く用いられ、150℃以下では良好な接続信頼性を有する。しかしながら、200℃以上の使用環境で長時間保持するような場合には接続界面で界面反応が進み、ボイドの形成および金属間化合物層の成長等により、接続信頼性が低下する問題がある。 Other Pb-free solder materials include Sn-based medium-temperature solders such as Sn-3Ag-0.5Cu with a melting point of 200 ° C or higher, which are widely used for mounting components on substrates, and good connection reliability at 150 ° C or lower Have However, when it is kept for a long time in an environment of use at 200 ° C. or higher, the interface reaction proceeds at the connection interface, and there is a problem that the connection reliability decreases due to the formation of voids and the growth of the intermetallic compound layer.
この問題に対し、Sn系はんだの界面反応を抑制する手法としては、例えば特許文献2のように、Cu:0.1〜2重量%、Ni:0.002〜1重量%、残部SnからなるSn系はんだを使用することによって、Cuの添加により被接続材のCu食われを抑止すると同時に、Ni添加により接続界面におけるCu6Sn5、Cu3Sn等の金属間化合物の成長を抑制することが可能であることが報告されている。また、特許文献3には、はんだバンプ形成において、被接続材表面に、Sn系はんだと反応して金属間化合物を形成する2種類の金属層を設けて、そこにSn系はんだボールを接続することで、接続界面にSnを含む2〜3種の元素からなる金属間化合物層を薄く形成することにより、界面反応を抑制することが可能であることが報告されている。
As a technique for suppressing the interfacial reaction of Sn-based solder with respect to this problem, for example, as disclosed in
しかし、従来技術においては、以下のような問題があり、界面反応抑制が十分とはいえず、接続信頼性が低い。特に、高温下で使用される車載用交流発電機(オルタネータ)用半導体装置には従来技術で界面反応を抑制することは困難であることがわかった。 However, the conventional technology has the following problems, and the interface reaction is not sufficiently suppressed, and the connection reliability is low. In particular, it has been found that it is difficult to suppress the interfacial reaction in a conventional semiconductor device for an on-vehicle AC generator (alternator) used at high temperatures.
すなわち、上記特許文献2の場合、Ni添加により界面反応の抑制は多少期待できるが、Cu6Sn5、Cu3Snの化合物が常にCu及びSn系はんだと接しているため、200℃以上の高温下では界面反応がすすんでしまう。これにより、Cu-Sn化合物が成長しつづけ、その界面でボイド等が発生し、結果、接続信頼性の低下を招く。
In other words, in the case of the above-mentioned
一方、上記特許文献3の場合は、はんだ最近接に形成された金属間化合物がSn系はんだと金属層との間でバリア層となるため、界面反応抑制効果は大きいと考えられるが、被接続材に予め第1の金属層と第2の金属層との2層を設ける必要があり、めっき工程の増加する、選択的に局所めっきをすることで高コストになる、電極を設けることができない構造の場合金属層形成が困難等の問題がある。また、接続面最表面に形成された金属層を接続時にSn系はんだと反応させてバリア層とする必要があるため、最表面に形成された金属層が厚いと、接続時に未反応の最表面金属層が残存してしまいバリア層の効果が十分に得られない、完全に最表面金属層を反応させるのに接続時間を長くする等のプロセスの調整が必要となるといった問題が生じる可能性がある。一方、最表面の金属層が薄い場合、界面反応を抑制するためのバリア層が薄くなり、200℃以上の高温下では十分に界面反応を抑制できないおそれがある。更に、図2のように、Sn系はんだとの反応において接続面最表面層に形成された層(例えばCu層)15の未反応部分が残存・露出する場合には、その露出部分からの酸化、腐食が起こり問題となる。一方、図3のように、接続面最表面層の残存を回避するため、仮に局所めっき等をして接続面最表面層を局所的に設けた場合、今度はSn系はんだがその下層にある金属層(例えばNi層)11まで濡れ広がるおそれが生じる。この場合、これらの間で金属間化合物(例えばNi-Sn化合物)16が形成され、この部分で界面反応がすすみ、体積変化に伴うボイドが生じてしまうおそれがある。
On the other hand, in the case of the above-mentioned
本発明の目的は、環境負荷が小さく低コストで、200℃以上の高温で長時間使用しても接続信頼性を維持できる半導体素子の接続材料を提供するとともに、その接続材料を用いた半導体装置および車載用交流発電機を提供することにある。 An object of the present invention is to provide a connection material for a semiconductor element that can maintain connection reliability even when used at a high temperature of 200 ° C. or higher for a long time at a low cost with a low environmental load, and a semiconductor device using the connection material Another object is to provide an on-vehicle AC generator.
上記目的を達成するために、本願発明では、半導体素子と、被接続部材と、前記被接続部材を接続するはんだである接続部材とを備えた半導体装置において、前記被接続部材は、前記接続部材に接続される表面にNi層が形成されており、前記接続部材は、Cu6−Sn5化合物と、Cu6−Sn5以外を主成分とするSn系はんだ相とを含むSn系はんだであり、前記Ni層の前記接続部材に接続される領域が、前記Cu6−Sn5化合物により覆われており、前記Cu6-Sn5化合物は、一方を前記Sn系はんだ相に接続されるともに、他方を、前記Ni層を介して前記被接続部材に接続されていることを特徴とする半導体装置を提供する。 In order to achieve the above object, in the present invention , in a semiconductor device including a semiconductor element, a connected member, and a connecting member that is solder for connecting the connected member, the connected member is the connecting member. A Ni layer is formed on the surface to be connected, and the connecting member is a Sn-based solder containing a Cu6-Sn5 compound and a Sn-based solder phase mainly composed of other than Cu6-Sn5, and the Ni layer The region to be connected to the connecting member is covered with the Cu6-Sn5 compound, and the Cu6-Sn5 compound is connected to the Sn-based solder phase on one side, and the other side through the Ni layer. The semiconductor device is connected to the member to be connected.
本発明によれば、環境負荷が小さくまた200℃以上の耐熱性がある半導体装置を提供することができる。 According to the present invention, it is possible to provide a semiconductor device having a small environmental load and heat resistance of 200 ° C. or higher.
まず、本発明の接続材料及び接続機構について図4により説明する。 First, the connection material and connection mechanism of the present invention will be described with reference to FIG.
本発明の接続材料の一例は、室温から200℃においてCu-Sn化合物(例えばCu6Sn5)の相10を含有するSn系はんだ箔17である。このはんだ箔17を用いて、Ni系めっき11を施した被接続材12を接続することにより、はんだ箔17中に相として浮いていたCu6Sn5相10がNi系めっき11上に析出あるいは移動し、Cu-Sn化合物を主体とする化合物層10が形成される。その結果、200℃以上の高温下に長時間さらされても、Cu-Sn化合物を主体とした化合物層10がNi系めっき11とSn系はんだのバリア層となり、接続界面反応による化合物層の成長及びそれに伴うボイドの形成を抑制することができる。
An example of the connection material of the present invention is an Sn-based
本発明の接続機構では、被接続材に少なくともNi、Ni-P、Ni-B等のNiめっきを1層設けておけばよいため、少ない工程数での接続が可能となる。また、本発明の接続機構では、形成されるバリア層の厚さは、はんだ箔に含まれるCu-Sn化合物相の量に依存するため、Cu-Sn化合物量の増減によりバリア厚の調節が可能となる。さらに、図1に示すように、はんだが濡れた接続界面にはんだ中のCu-Sn化合物10がNi系めっき11上に能動的に析出あるいは移動し、Cu-Sn化合物のバリア層が形成されるため、接続後の接続部では上記した図2及び図3での問題は生じない。
In the connection mechanism of the present invention, it is only necessary to provide at least one layer of Ni plating such as Ni, Ni-P, Ni-B, etc. on the material to be connected, so that connection with a small number of steps is possible. In the connection mechanism of the present invention, the thickness of the formed barrier layer depends on the amount of the Cu-Sn compound phase contained in the solder foil. Therefore, the barrier thickness can be adjusted by increasing or decreasing the amount of Cu-Sn compound. It becomes. Furthermore, as shown in FIG. 1, the Cu—
ここで、本発明の接続材料のように、Cu-Sn化合物が相として含まれる状態、室温から200℃においてCu6Sn5を含有するSn系はんだの状態となる条件について、Sn-Cu2元系状態図を示す図14を用いて説明する。 Here, as in the connection material of the present invention, a state in which a Cu—Sn compound is included as a phase, a condition that becomes a state of a Sn-based solder containing Cu6Sn5 from room temperature to 200 ° C., is a Sn—Cu binary phase diagram. It demonstrates using FIG. 14 shown.
Sn-0.9CuよりCu含有量の少ない組成では、はんだが溶融して凝固する際に、共晶組成より多く含まれるSnが初晶としてまず析出し、最後にSnとCu6Sn5が共晶組織として凝固する。そのとき、Cu6Sn5は接続内部の粒界等に分散して析出するため、Ni系めっき上にバリア層状に析出しない。そのため、耐熱性が得られない。一方、Sn-0.9CuよりCu含有量が多い組成では、はんだが溶融して凝固する際に、まずCu6Sn5相が析出する。その際、Cu6Sn5がNi系めっき上に優先的に析出するために、Cu-Sn化合物のバリア層が形成される。そして、最後にSnとCu6Sn5が共晶組織として凝固する。上記のような機構でCu-Sn化合物のバリア層が形成される。 In a composition with less Cu content than Sn-0.9Cu, when the solder melts and solidifies, Sn contained more than the eutectic composition first precipitates as the primary crystal, and finally Sn and Cu6Sn5 solidify as the eutectic structure. To do. At this time, since Cu6Sn5 is dispersed and precipitated at the grain boundaries and the like inside the connection, it does not precipitate in the form of a barrier layer on the Ni-based plating. Therefore, heat resistance cannot be obtained. On the other hand, in a composition having a higher Cu content than Sn-0.9Cu, when the solder melts and solidifies, the Cu6Sn5 phase is first precipitated. At this time, since Cu6Sn5 is preferentially deposited on the Ni-based plating, a Cu-Sn compound barrier layer is formed. Finally, Sn and Cu6Sn5 solidify as a eutectic structure. The barrier layer of the Cu—Sn compound is formed by the mechanism as described above.
すなわち、本発明の接続材料としては、共晶組成よりCu6Sn5相の含有量が多い組成を選択すればよい。Sn-Cu2元系であれば、Cuが0.9wt%以上あればよいことになるが、他元素が含まれる場合には合金系によって共晶組成が異なるため、いずれの場合でも、共晶組成よりCu6Sn5相の含有量が多い組成の接続材料を選択すればよい。なお、これにより通常使用されるSn-3Ag-0.5CuやSn-0.7Cuの場合では、共晶組成に比べてCu6Sn5相が少ないため、Ni系めっき上にはバリア層が形成されない。 That is, as the connection material of the present invention, a composition having a higher Cu6Sn5 phase content than the eutectic composition may be selected. If it is Sn-Cu binary system, Cu should be 0.9wt% or more, but when other elements are included, the eutectic composition differs depending on the alloy system. A connection material having a composition containing a large amount of Cu6Sn5 phase may be selected. In this case, in the case of Sn-3Ag-0.5Cu or Sn-0.7Cu, which is usually used, the Cu6Sn5 phase is less than the eutectic composition, so that no barrier layer is formed on the Ni-based plating.
以上のように、本発明の接続材料及びその接続機構について説明したが、接続材料の供給形態は箔にこだわらず、図6及び図7に示すように、ペーストやワイヤ等のいずれの形状で供給されても、接続後にNi系めっき上にCu-Sn化合物のバリア層が形成される。適宜、接続環境に応じた供給方法を選択することが可能である。 As described above, the connection material of the present invention and the connection mechanism thereof have been described. However, the connection material is supplied in any shape such as paste or wire as shown in FIGS. Even after the connection, a barrier layer of Cu—Sn compound is formed on the Ni-based plating after connection. It is possible to select a supply method according to the connection environment as appropriate.
なお、室温から200℃においてCu6Sn5相を含有するSn系はんだは、良好な濡れを得るために、好ましくは液相線温度が接続温度以下となる組成を選択すればよい。 In order to obtain good wetting, Sn-based solder containing a Cu6Sn5 phase from room temperature to 200 ° C. should preferably be selected so that the liquidus temperature is equal to or lower than the connection temperature.
次に、本発明の接続材料を用いた半導体装置及びその製造方法の一形態について、車載用交流発電機用の半導体装置を示す図8、図9を用いて説明する。 Next, one embodiment of a semiconductor device using the connection material of the present invention and a manufacturing method thereof will be described with reference to FIGS. 8 and 9 showing a semiconductor device for an on-vehicle AC generator.
図8に示す半導体装置は、半導体素子1と、半導体素子1の第一の面と本発明の接続材料を用いて形成された接続部材2を介して接続される接続部にNi系めっきを施したリード電極体7と、半導体素子1の第二の面と本発明の接続材料を用いて接続された接続部材4を介して接続される接続部にNi系めっきを施した熱膨張率差緩衝材5と、熱膨張率差緩衝材5の他方の面と本発明の接続材料を用いて接続された接続部材6を介して接続される接続部にNi系めっきを施した支持電極体3とを有する。
The semiconductor device shown in FIG. 8 performs Ni-based plating on a
本発明の接続材料を用いて接続することにより、高温下での使用でも界面反応を抑制し、接続信頼性のある半導体装置を提供することができる。なお、すべての接続部で本発明の接続材料を用いず、一部他の材料の使用も可能だが、接続信頼性の観点からすべての接続部で本発明の接続材料を用いることが好ましい。この際、共晶組成よりCu6Sn5相の含有量が多い組成の接続材料であればいかなるものでもよく、各接続部で異なる材料であっても構わない。 By using the connection material of the present invention for connection, an interface reaction can be suppressed even when used at high temperatures, and a semiconductor device having connection reliability can be provided. In addition, although not using the connection material of this invention in all the connection parts, the use of a part of other materials is also possible, but it is preferable to use the connection material of this invention in all the connection parts from a viewpoint of connection reliability. At this time, any connection material having a composition having a higher Cu6Sn5 phase content than the eutectic composition may be used, and different materials may be used for each connection portion.
ここで、熱膨張率差緩衝材5としては、Al、Mg、Ag、Zn、Cu、Niのうちのいずれかを用いることができる。これらは降伏応力が小さい金属であり、惰性変形しやすい。そこで、接続部にこれらの金属を付与することにより、接続後の冷却時および温度サイクル時に接続部に被接続材の熱膨張率差により発生する応力を緩衝することができる。このとき、図5に示すように、降伏応力が75MPa以下であることが好ましい。降伏応力が100MPa以上の場合、応力を充分に緩衝できず、半導体素子に割れが発生する場合がある。厚さは、30〜500μmにすることが好ましい。厚さが、30μm以下の場合、応力を充分に緩衝できず、半導体素子および金属間化合物にクラックが発生する場合がある。厚さが、500μm以上の場合、Al、Mg、Ag、ZnはCu製の電極より熱膨張率が大きいため、熱膨張率の効果が大きくなり、信頼性の低下につながる場合がある。
Here, as the thermal expansion coefficient
また、熱膨張率差緩衝材5としては、Cu/インバー合金/Cu複合材、Cu/Cu2O複合材Cu-Mo合金、Ti、Mo、Wのいずれかを用いることができる。この熱膨張率差緩衝材5により、半導体素子とCu電極との間の熱膨張率差から生じる温度サイクル時及び接続後の冷却時の接続に発生する応力を緩衝することができる。このとき、厚さが薄すぎると応力を十分に緩衝できず、半導体素子および金属間化合物にクラックが発生する場合があるので、その厚さを30μm以上にすることが好ましい。
Moreover, as the thermal expansion coefficient
なお、Sn系はんだは高鉛はんだに比べて熱伝導率が高いため、半導体装置の低抵抗化および高放熱化の可能であり、図9のように熱膨張率緩衝材5を省略することも可能だが、高鉛はんだよりも硬いSn系はんだを使用しても十分な接続信頼性を得るべく、挿入する方が好ましい。
Since Sn-based solder has higher thermal conductivity than high-lead solder, it is possible to reduce the resistance and heat dissipation of the semiconductor device, and the thermal expansion
各被接続材に設けるNi系めっきとしては、上記の通り、Ni、Ni-P、Ni-B等を用いればよいが、そのめっき上に更にAuめっき、Agめっきを施しても構わない。これにより、濡れ性を向上させることができる。その場合、Au、Agといっためっき層は接続時にはんだ内部に全て拡散させることにより、下地のNi系めっき上にCu-Sn化合物のバリア層を形成することができる。 As described above, Ni, Ni—P, Ni—B or the like may be used as the Ni-based plating provided on each connected material, but Au plating or Ag plating may be further applied on the plating. Thereby, wettability can be improved. In that case, a Cu—Sn compound barrier layer can be formed on the underlying Ni-based plating by diffusing all the plating layers such as Au and Ag into the solder at the time of connection.
次に、半導体装置の製造方法について説明する。図8に示すような部材および接続部材の順序で、すなわち支持電極体3の上に、室温から200℃においてCu6Sn5相を含有するSn系はんだ箔6、熱膨張係数が11×10−6/℃の直径6.8mm、厚さ0.6mmのNiめっきCIC(Cu/Inver/Cu)クラッド材の熱膨張率差緩衝材5、室温から200℃においてCu6Sn5相を含有するSn系はんだ箔4、直径6mm厚さ0.2mmのNiめっき半導体素子1、室温から200℃においてCu6Sn5相を含有するSn系はんだ箔2、直径4.5mm厚さ0.2mmのCu板付Cuリード電極体7を積み重ね、位置合わせ治具内に置き、熱処理炉にて、窒素に水素50%を混合した還元性雰囲気で、380℃、1分の温度条件で接続し、続いて接続部周辺にシリコーンゴム8を注入後硬化させて、半導体装置を製造する。なお、接続工程は220〜450℃、還元性雰囲気で行えば、フラックスを使用しないで良好な接続を行うことができる。
Next, a method for manufacturing a semiconductor device will be described. In the order of the members and connecting members as shown in FIG. 8, that is, on the
この半導体装置の温度サイクル試験および高温放置試験後の半導体素子および各部材間の接続強度を実際測定した結果を表1に示す。
初期接続強度の80%以上の強度を有している場合を○、80%未満の強度の場合を×で表記した。実施例1〜6の全てにおいて、−40℃(30min.)/200℃(30min.)500サイクルの温度サイクル試験後、初期接続強度の80%以上の強度を維持することを確認した。また、210℃1000hの高温放置試験後も、実施例1−6の全てにおいて初期接続強度の80%以上の強度を維持することを確認した。更に、これらについては、試験前と試験後で熱抵抗変動が10%以内であることも確認した。図12に、一例としてSn-5Cuはんだを用いて接続したサンプルを210℃1000h高温放置したときの接続界面の断面を示す。Cu-Sn化合物のバリア層により、高温放置後もNi層が消失せず残存しており、体積変化に伴うボイド形成も観察されない。 A case where the strength is 80% or more of the initial connection strength is indicated by ○, and a case where the strength is less than 80% is indicated by ×. In all of Examples 1 to 6, it was confirmed that a strength of 80% or more of the initial connection strength was maintained after a temperature cycle test of 500 cycles of −40 ° C. (30 min.) / 200 ° C. (30 min.). In addition, it was confirmed that the strength of 80% or more of the initial connection strength was maintained in all of Examples 1-6 after the high temperature standing test at 210 ° C. for 1000 hours. Further, for these, it was also confirmed that the thermal resistance fluctuation was within 10% before and after the test. FIG. 12 shows, as an example, a cross section of the connection interface when a sample connected using Sn-5Cu solder is left at a high temperature of 210 ° C. for 1000 hours. Due to the barrier layer of Cu-Sn compound, the Ni layer does not disappear even after being left at high temperature, and void formation due to volume change is not observed.
なお、上記では全体構造を同時に室温から200℃においてCu6Sn5相を含有するSn系はんだで接続するプロセスについて述べたが、熱膨張率差緩衝材5の上に、半導体素子1およびCu板付リード電極体3を室温から200℃においてCu6Sn5相を含有するSn系はんだで接続したものを作製し、続いてこれを支持電極3の上に室温から200℃においてCu6Sn5相を含有するSn系はんだで接続するなど、いくつかの部品に分けて接続しても良い。
In the above description, the process of connecting the entire structure simultaneously with Sn-based solder containing Cu6Sn5 phase from room temperature to 200 ° C. has been described. On the thermal expansion coefficient
図9に示すような部材および接続部材の順序で、すなわち支持電極体3の上に、室温から200℃においてCu6Sn5相を含有するSn系はんだ箔の接続部材4、直径6mm厚さ0.2mmのNiめっき半導体素子1、室温から200℃においてCu6Sn5相を含有するSn系はんだ箔の接続部材2、直径4.5mm厚さ0.2mmのCu板付Cuリード電極体7を積み重ね、位置合わせ治具内に置き、熱処理炉にて、窒素に水素50%を混合した還元性雰囲気で、450℃、5分の温度条件で接続し、続いて接続部周辺にシリコーンゴム8を注入後硬化させて半導体装置を作製する。
In the order of the members and connecting members as shown in FIG. 9, that is, on the
この半導体装置の温度サイクル試験および高温放置試験後の半導体素子および各部材間の接続強度を実際測定した結果を表1に示す。初期接続強度の80%以上の強度を有している場合を○、80%未満の強度の場合を×で表記した。実施例7〜12の全てにおいて、−40℃(30min.)/200℃(30min.)500サイクルの温度サイクル試験後、初期接続強度の80%以上の強度を維持することを確認した。また、210℃1000hの高温放置試験後も、実施例7−12の全てにおいて初期接続強度の80%以上の強度を維持することを確認した。更に、これらについては、試験前と試験後で熱抵抗変動が10%以内であることも確認した。 Table 1 shows the results of actual measurement of the connection strength between the semiconductor element and each member after the temperature cycle test and the high temperature storage test of this semiconductor device. A case where the strength is 80% or more of the initial connection strength is indicated by ○, and a case where the strength is less than 80% is indicated by ×. In all of Examples 7 to 12, after a temperature cycle test of −40 ° C. (30 min.) / 200 ° C. (30 min.) 500 cycles, it was confirmed that the strength of 80% or more of the initial connection strength was maintained. Further, it was confirmed that the strength of 80% or more of the initial connection strength was maintained in all of Examples 7-12 even after the high temperature standing test at 210 ° C. for 1000 hours. Further, for these, it was also confirmed that the thermal resistance fluctuation was within 10% before and after the test.
次に、比較例として、共晶組成よりCu6Sn5相の含有量が多くならない組成の接続材料に
ついて測定した結果を以下説明する。
Next, as a comparative example, the results of measuring a connection material having a composition in which the Cu6Sn5 phase content does not increase from the eutectic composition will be described below.
接続構造は、実施例1−6と同じである。その結果は表1に示す通り、初期接続強度の80%以上の強度を有している場合を○、80%未満の強度の場合を×で表記した。比較例1、2において、-40℃(30min.)/200℃(30min.)500サイクルの温度サイクル試験後、初期接続強度の80%以上の強度を維持することを確認した。しかしながら、210℃1000hの高温放置試験後では、比較例1、2ともに初期接続強度の80%未満の強度となった。接続断面を観察すると、図10,11のようなボイド14が接続界面に形成されていた。高温放置により界面反応が進み、化合物層の成長に伴う体積変化で生じたボイド形成により、接続強度が低下したと考えられる。図13に、一例としてSn-3Ag-0.5Cuはんだで接続したサンプルを210℃で1000h高温放置したときの接続界面の断面を示す。Cu-Sn化合物のバリア層が形成されないため、SnとNiが反応してNi層が完全に消失し、更に下地のCuまでもSnと反応しCu-Sn化合物層が厚く形成されている。その結果、大きな体積変化が生じボイドが形成され、良好な接続状況を維持することができなくなる。 The connection structure is the same as that of Example 1-6. As shown in Table 1, the results are indicated by ○ when the strength is 80% or more of the initial connection strength and by × when the strength is less than 80%. In Comparative Examples 1 and 2, after a temperature cycle test of -40 ° C. (30 min.) / 200 ° C. (30 min.) 500 cycles, it was confirmed that the strength of 80% or more of the initial connection strength was maintained. However, after the high-temperature standing test at 210 ° C. for 1000 hours, both Comparative Examples 1 and 2 had a strength of less than 80% of the initial connection strength. When the connection cross section was observed, voids 14 as shown in FIGS. 10 and 11 were formed at the connection interface. It is considered that the interfacial reaction progressed by leaving at high temperature, and the connection strength decreased due to void formation caused by the volume change accompanying the growth of the compound layer. FIG. 13 shows, as an example, a cross section of the connection interface when a sample connected with Sn-3Ag-0.5Cu solder is left at 210 ° C. for 1000 hours. Since the Cu—Sn compound barrier layer is not formed, Sn and Ni react to completely disappear the Ni layer, and even the underlying Cu reacts with Sn to form a thick Cu—Sn compound layer. As a result, a large volume change occurs, voids are formed, and a good connection state cannot be maintained.
比較例3、4においては、-40℃(30min.)/200℃(30min.)500サイクルの温度サイクル試験後、210℃1000hの高温放置試験後ともに、比較例1、2ともに初期接続強度の80%未満の強度となった。接続断面を観察すると、図10,11のようなボイド14が接続界面に形成されていた。高温放置により界面反応が進み、化合物層の成長に伴う体積変化で生じたボイド形成により、接続強度が低下したと考えられる。 In Comparative Examples 3 and 4, the initial connection strength of both Comparative Examples 1 and 2 was observed after a temperature cycle test of 500 cycles of −40 ° C. (30 min.) / 200 ° C. (30 min.) And after a high temperature storage test of 210 ° C. for 1000 hours. The strength was less than 80%. When the connection cross section was observed, voids 14 as shown in FIGS. 10 and 11 were formed at the connection interface. It is considered that the interfacial reaction progressed by leaving at high temperature, and the connection strength decreased due to void formation caused by the volume change accompanying the growth of the compound layer.
なお、比較例5は高鉛フリーはんだによる比較例であり、いずれも良好な結果となって
いる。
In addition, the comparative example 5 is a comparative example by a high lead free solder, and all have a favorable result.
次に、本発明の接続材料を用いた半導体装置の他の形態について、図15を用いて説明する。 Next, another embodiment of a semiconductor device using the connection material of the present invention will be described with reference to FIGS.
図15はプリント基板への部品実装の例であり、プリント基板102と、前記プリント基板102と本発明の接続材料を用いて接続され、実装された表面実装部品101と、前記プリント基板102と本発明の接続材料を用いて接続され、実装されたチップ部品103と、前記プリント基板102と本発明の接続材料を用いて接続され、実装された挿入実装部品104とを有する。図示しないが、接続される各面にはNi系めっきが施される。本発明の接続機構を用いて実装することにより、高温下でも界面反応を抑制し、接続信頼性の高い半導体装置を提供することができる。
FIG. 15 shows an example of component mounting on a printed circuit board. The printed
なお、図15は表面実装部品101、チップ部品103、挿入実装部品104の全てが実装されているが、いずれか一つ又は二つだけであっても構わない。また、一部の接続においてSn-3Ag-0.5Cu等の他のはんだ材料を用いても構わない。
In FIG. 15, all of the
次に、本発明の接続材料を用いた半導体装置の他の形態について、図16を用いて説明する。 Next, another embodiment of a semiconductor device using the connection material of the present invention will be described with reference to FIGS.
図16に示す半導体装置は、半導体素子1と、半導体素子1と本発明の接続材料を用いて接続されたフレーム105と、半導体素子1に設けられた電極(図示しない)とワイヤ108により電気的に接続された外部リード107と、半導体素子1を覆うように設けられたモールド樹脂とを有する。図示しないが、接続される各面にはNi系めっきが施される。本発明の接続機構を用いることにより、高温下でも界面反応を抑制し、接続信頼性の高い半導体装置を提供することができる。
The semiconductor device shown in FIG. 16 is electrically connected by the
他の半導体装置の形態について、図17を用いて説明する。 Another semiconductor device mode is described with reference to FIGS.
図17に示す半導体装置は、RFモジュール等に代表される構造であり、モジュール基板109と、モジュール基板に本発明の接続材料を用いて接続された表面実装部品101と、モジュール基板に本発明の接続材料を用いて接続された半導体素子1と、モジュール基板に本発明の接続材料を用いて接続されたチップ部品と、モジュール基板1の裏面に設けられたはんだボール110とを有する。図示しないが、接続される各面にはNi系めっきが施される。本発明の接続機構を用いることにより、高温下でも界面反応を抑制し、接続信頼性の高い半導体装置を提供することができる。
The semiconductor device shown in FIG. 17 has a structure typified by an RF module or the like, and includes a
なお、図15は表面実装部品101、チップ部品103、挿入実装部品104の全てが実装されているが、いずれか一つ又は二つだけであっても構わない。また、一部の接続においてSn-3Ag-0.5Cu等の他のはんだ材料を用いても構わない。
In FIG. 15, all of the
以上、半導体装置の実施形態についていくつか説明したが、本発明はこれらの形態に限定されるものではなく、その要旨を逸脱しない範囲で種々変更可能であることはいうまでもない。例えば、パワートランジスタ、パワーIC、IGBT基板、RFモジュール等のフロントエンドモジュール、自動車用パワーモジュール等のダイボンディング等に用いても構わない。また、接続に用いる本発明の接続材料は、共晶組成よりCu6Sn5相の含有量が多い組成のSn系はんだであれば、その供給形態は問わず、プリント基板へのレベリング処理、部品へのディップ、印刷、箔、ワイヤ等いずれの方法でも構わない。 Although several embodiments of the semiconductor device have been described above, the present invention is not limited to these embodiments, and it goes without saying that various modifications can be made without departing from the scope of the invention. For example, it may be used for die bonding of a power transistor, a power IC, an IGBT substrate, a front end module such as an RF module, an automobile power module, or the like. In addition, if the connection material of the present invention used for connection is Sn-based solder having a composition containing more Cu6Sn5 phase than the eutectic composition, leveling treatment to the printed circuit board, dip to the component, regardless of its supply form Any method such as printing, foil, and wire may be used.
1 半導体素子、2,4,6 接続部材、3 支持電極体、5 熱膨張率差緩和材、7 リード電極、8 シリコーンゴム、10 Cu-Sn化合物、11 Niめっき、12 被接続材、13 金属間化合物、14 ボイド、15 Cu層、16 Ni-Sn化合物、17 はんだ箔、18 はんだペースト、19 はんだワイヤ、101 表面実装部品、102 プリント基板、103 チップ部品、104 挿入実装部品、105 フレーム、106 モールド樹脂、107 リード、108 ワイヤ、109 モジュール基板、110 はんだボール。
DESCRIPTION OF
Claims (7)
被接続部材と、
前記被接続部材を接続するはんだである接続部材とを備えた半導体装置において、
前記被接続部材は、前記接続部材に接続される表面に前記Ni層が形成されており、
前記接続部材は、Cu6−Sn5化合物と、Cu6−Sn5以外を主成分とするSn系はんだ相とを含むSn-Cu2元系はんだであり、
前記Sn系はんだ相は、Cuが3〜7wt%のSn-Cu系はんだであり、
前記Ni層の前記接続部材に接続される領域が、前記Cu6−Sn5化合物により覆われており、
前記Cu6-Sn5化合物は、一方を前記Sn系はんだ相に接続されるともに、他方を前記Ni層を介して前記被接続部材に接続されていることを特徴とする半導体装置。 A semiconductor element;
A connected member;
In a semiconductor device provided with a connecting member that is solder for connecting the connected member,
The connected member has the Ni layer formed on a surface connected to the connecting member,
The connecting member is a Sn-Cu binary solder containing a Cu6-Sn5 compound and a Sn-based solder phase mainly composed of other than Cu6-Sn5,
The Sn-based solder phase is Sn-Cu solder with 3-7 wt% Cu,
A region connected to the connection member of the Ni layer is covered with the Cu6-Sn5 compound,
One of the Cu6-Sn5 compounds is connected to the Sn-based solder phase, and the other is connected to the connected member via the Ni layer.
前記被接続部材の前記接続部材に接続される領域の全部が、前記Ni層及び前記Cu6−Sn5化合物との積層により覆われていることを特徴とする半導体装置。 In claim 1,
A semiconductor device characterized in that the entire region of the connected member connected to the connecting member is covered with a stack of the Ni layer and the Cu6-Sn5 compound.
前記被接続部材の前記接続部材と接続される領域の全部が、前記Ni層により覆われていることを特徴とする半導体装置。 In claim 1,
2. A semiconductor device according to claim 1, wherein an entire region of the connected member connected to the connecting member is covered with the Ni layer.
前記Cu6-Sn5化合物は、前記Ni層及び前記被接続部材を前記Sn系はんだ相から保護するバリア層であることを特徴とする半導体装置。 In claim 1,
The semiconductor device, wherein the Cu6-Sn5 compound is a barrier layer that protects the Ni layer and the connected member from the Sn-based solder phase.
前記接続部材は、前記被接続部材と、前記半導体素子とを接続していることを特徴とする半導体装置。 In claim 1,
The semiconductor device according to claim 1, wherein the connecting member connects the connected member and the semiconductor element.
前記被接続部材は、Cu製であることを特徴とする半導体装置。 Oite to claim 5,
The semiconductor device is characterized in that the connected member is made of Cu.
前記被接続部材は、電極であることを特徴とする半導体装置。 Oite to claim 5,
The semiconductor device according to claim 1, wherein the connected member is an electrode.
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US9659892B2 (en) | 2014-10-30 | 2017-05-23 | Toyota Jidosha Kabushiki Kaisha | Semiconductor device and method of manufacturing semiconductor device |
US9824994B2 (en) | 2014-10-30 | 2017-11-21 | Toyota Jidosha Kabushiki Kaisha | Semiconductor device in which an electrode of a semiconductor element is joined to a joined member and methods of manufacturing the semiconductor device |
EP3266558A1 (en) | 2016-07-05 | 2018-01-10 | Napra Co., Ltd. | Multi-layer preform sheet |
US10312211B2 (en) | 2015-11-16 | 2019-06-04 | Toyota Jidosha Kabushiki Kaisha | Method of manufacturing semiconductor device |
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CN102244022A (en) * | 2011-04-26 | 2011-11-16 | 哈尔滨工业大学 | Manufacturing method of single intermetallic compound micro-interconnecting structure of flip chip |
CN106735663B (en) * | 2017-01-17 | 2019-05-28 | 大连理工大学 | The preparation method and structure of compound thin space microbonding point between a kind of all-metal |
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JP2002305213A (en) * | 2000-12-21 | 2002-10-18 | Hitachi Ltd | Solder foil, semiconductor device, and electronic device |
JP3910363B2 (en) * | 2000-12-28 | 2007-04-25 | 富士通株式会社 | External connection terminal |
JP2002222708A (en) * | 2001-01-24 | 2002-08-09 | Toko Inc | Small coil using lead-free solder |
JP2005095977A (en) * | 2003-08-26 | 2005-04-14 | Sanyo Electric Co Ltd | Circuit device |
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- 2010-03-29 JP JP2010074078A patent/JP5517694B2/en active Active
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US9659892B2 (en) | 2014-10-30 | 2017-05-23 | Toyota Jidosha Kabushiki Kaisha | Semiconductor device and method of manufacturing semiconductor device |
US9824994B2 (en) | 2014-10-30 | 2017-11-21 | Toyota Jidosha Kabushiki Kaisha | Semiconductor device in which an electrode of a semiconductor element is joined to a joined member and methods of manufacturing the semiconductor device |
US10312211B2 (en) | 2015-11-16 | 2019-06-04 | Toyota Jidosha Kabushiki Kaisha | Method of manufacturing semiconductor device |
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US9950496B2 (en) | 2016-07-05 | 2018-04-24 | Napra Co., Ltd. | Multi-layer preform sheet |
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