JP5511564B2 - Regulator device - Google Patents

Description

  The present invention relates to a regulator device as a high breakdown voltage DC-DC converter.

  There exists a thing of a nonpatent literature 1 as a regulator apparatus. This is a standby mode when the STB terminal (standby mode setting terminal) is set to 0.5 V or less, and a slave mode that operates other than the oscillator of the control circuit when set to a voltage in the range of 2.4 V to 2.6 V. If it is set to 3.0 V or higher, the master mode (normal operation mode) in which the entire control circuit including the oscillator is operated can be set. In this regulator device, when two of them are used to exert the master / slave function, the reference voltage VREF (2.5 V) generated by the master side regulator device is input to the STB terminal of the slave side regulator device.

ROHM Co., Ltd. BD9842FV Technical Note

  However, in order to exhibit the master / slave function using two regulator devices, it is necessary to input the reference voltage VREF specifically to the STB terminal of the slave regulator device as described above. Further, when this regulator device is used as a single unit, it is activated by applying a voltage to the STB terminal. Therefore, in the slave mode in which the oscillator is stopped, the reference voltage VREF is not generated before the activation and cannot be activated. .

  An object of the present invention is to provide a regulator device that can be started without an external voltage input and that also has a function of stopping an oscillator in a control circuit.

In order to achieve the above object, a regulator device according to a first aspect of the present invention includes a first threshold voltage applied to an enable terminal (2) by one or more series-connected diodes (MN2, MN3) to which a constant current is supplied. A constant voltage generation circuit (4) that applies a higher constant voltage, and operates when a voltage equal to or higher than the first threshold voltage is applied to the enable terminal (2), and outputs a voltage obtained by stepping down the input voltage A regulator circuit (5) that outputs as a voltage, and a control circuit (6) that includes an oscillator (62) inside and that outputs the output voltage of the regulator circuit (5) as an operating voltage. The control circuit (6) When the voltage higher than the second threshold voltage higher than the first threshold voltage is applied to the enable terminal (2), the whole operates, and the enable terminal (2) is less than the second threshold voltage. When pressure is applied, characterized in that the oscillator (62) stops operating.
According to a second aspect of the present invention, in the regulator device according to the first aspect, the constant voltage generating circuit (4) is set by a first Zener diode (ZD2) and the first Zener diode (ZD2). A first transistor (MND1) that is operated by the selected voltage, and a second transistor (MN1) that is connected in series to the first transistor (MND1), generates the constant current, and supplies the constant current to the diodes (MN2, MN3). It is characterized by providing.
The invention according to claim 3 is the regulator device according to claim 1 or 2, wherein the regulator circuit (5) operates when a voltage equal to or higher than the first threshold voltage is applied to the enable terminal (2). The third transistor (MND2), the fourth transistor (MPD1) that operates when the third transistor (MND2) operates, and causes a current to flow through the second Zener diode (ZD3), and the second Zener And a fifth transistor (MND3) that operates by a voltage set by a diode (ZD3) to step down the input voltage and generate the output voltage.

  According to the first aspect of the present invention, when the enable terminal is connected to the ground, a voltage lower than the first threshold voltage is applied to the enable terminal, and the regulator circuit stops operating. If the enable terminal is opened, the constant voltage generated in the constant voltage generation circuit is applied to the enable terminal, and the regulator circuit operates to generate a predetermined output voltage. Operate. Furthermore, if a voltage equal to or higher than the second threshold voltage is applied to the enable terminal, the entire control circuit also operates. In other words, the circuit portion excluding the oscillator of the regulator circuit and the control circuit operates without inputting a voltage from the outside to the enable terminal. Therefore, this regulator device can be activated independently. Further, when two regulator devices are used to exert the master / slave function, it is not necessary to input a special voltage to the slave side. According to the second and third aspects of the invention, when the transistor of the present invention is used in a constant voltage generation circuit or a regulator circuit, a transistor having a lower breakdown voltage than that of the transistor of the present invention is used as a transistor connected in series to the transistor. Can be used.

1 is a circuit diagram of a regulator device according to a first embodiment of the present invention. It is a circuit diagram of the regulator apparatus of the 2nd Example of this invention. It is a circuit diagram of the buffer circuit 51 of the regulator apparatus of FIG. It is use explanatory drawing of the regulator apparatus of FIG. 1 and FIG.

<First embodiment>
FIG. 1 shows a regulator device according to a first embodiment of the present invention. 1 is a power supply terminal to which a high potential input voltage VDD is input, 2 is an enable terminal to which an enable signal EN is input, 3 is an output terminal of an output voltage Vout, 4 is a constant voltage that generates a constant voltage and applies it to the enable terminal 2 A generation circuit 5 is a regulator circuit that generates a desired output voltage Vout by stepping down the input voltage VDD when the enable terminal 2 is equal to or higher than the first threshold voltage, and 6 is a control circuit that operates according to the output voltage Vout of the regulator circuit 5. is there. The control circuit 6 includes an oscillator 62 that generates a triangular wave or the like in the control circuit body 61, and a comparator 63 that operates the oscillator 62 when the enable terminal 2 is equal to or higher than a second threshold voltage higher than the first threshold voltage. Prepare.

  The constant voltage generation circuit 4 includes an input protection Zener diode ZD1, resistors R1 and R2, an N-type enhancement high voltage MOS transistor MND1, a Zener diode ZD2, an N-type depletion low voltage MOS transistor MN1, and two diode-connected N Type enhancement low breakdown voltage MOS transistors MN2 and MN3. The number of diode-connected transistors is not limited to two, and one or three or more series-connected transistors may be used.

  Here, when the transistor MND1 biased by the Zener voltage Vzd2 generated in the Zener diode ZD2 becomes conductive, the node N1 becomes a low voltage (Vzd2-Vgsmnd1). Vgsmnd1 is a gate-source voltage of the transistor MND1. Thereby, low breakdown voltage transistors can be used for the transistors MN1 to MN3. The transistor MN1 functions as a constant current source, and a constant voltage (Vgsmn2 + Vgsmn3) higher than a first threshold voltage to be described later is generated in the enable terminal 2 when the constant current flows through the diode-connected transistors MN2 and MN3. Vgsmn2 and Vgsmn3 are gate-source voltages of the transistors MN2 and MN3. The variation of the constant voltage due to the temperature can be reduced by the current temperature characteristic of the depletion transistor MN1 and the threshold voltage temperature characteristic of the enhancement transistors MN2 and MN3.

  The regulator circuit 5 includes an N-type depletion low voltage MOS transistor MN4, an N-type enhancement high voltage MOS transistor MND2, MND3, a P-type enhancement high voltage MOS transistor MPD1, and a P-type enhancement low voltage MOS transistor that function as a constant current source. MP1, resistors R3, R4, and R5, and Zener diodes ZD3 and ZD4 are included. The transistor MND2 operates when the enable terminal 2 is equal to or higher than the first threshold voltage.

  Here, when the voltage of the enable terminal 2 becomes equal to or higher than the first threshold voltage, the transistor MND2 is turned on. Therefore, the transistor MP1 is turned on by the voltage generated in the resistor R3, and a bias current flows through the transistors MND2 and MN4. The potential of the node N2 is lowered to make the transistor MPD1 conductive, and a current flows there. This current is Vgsmp1 / R3. Vgsmp1 is a gate-source voltage of the transistor MP1. The gate voltage (node N2) of the transistor MPD1 is an added value (= Vr3 + Vgsmpd1) of the voltage drop Vr3 of the resistor R3 and the gate-source voltage Vgsmpd1 of the transistor MPD1. Therefore, the transistors MPD1 and MP1 can be operated without exceeding the gate breakdown voltage of the transistor MPD1 and the breakdown voltage of the transistor MP1. Further, since the depletion transistor is one element, the element area in the layout can be minimized. Thus, the constant voltage Vzd3 is generated in the Zener diode ZD3 and applied to the gate of the transistor MND3, the internal resistance of the transistor MND3 is controlled, and a desired output voltage Vout is generated and supplied to the control circuit 6. The output voltage Vout is Vout = Vzd3−Vgsmnd3. Vgsmnd3 is a gate-source voltage of the transistor MND3.

  The Zener diode ZD4 is a diode for protecting the transistor MP1. The resistor R4 is a gate pull-up resistor for forcibly turning off the transistor MPD1 when the transistor MND2 is turned off. Furthermore, the resistor R5 is a gate pull-down resistor for forcibly turning off the transistor MND3 when the transistor MPD1 is turned off.

  The control circuit body 61 of the control circuit 6 operates by inputting the output voltage Vout of the regulator circuit 5, for example, compares an externally input signal (not shown) with a triangular wave signal generated by the oscillator 62 and outputs a PWM signal. Performs processing to generate or other signal processing. The oscillator 62 is stopped by the comparator 63 when the voltage at the enable terminal 2 is less than the second threshold voltage (Vref), but operates when the voltage exceeds the second threshold voltage.

  As shown in FIG. 4A, when the enable terminal 2 is connected to the ground GND, the transistor MND2 of the regulator circuit 5 is cut off because its gate becomes the ground potential and becomes the first threshold voltage or less. . Therefore, in the regulator circuit 5, the transistor MPD1 is cut off, no current flows through the Zener diode ZD3, and the transistor MND3 is pulled down to the ground GND by the resistor R5, so that the transistor MND3 is cut off. Therefore, the output voltage Vout becomes zero and the control circuit 6 does not operate.

  Further, as shown in FIG. 4B, when the enable terminal 2 is opened, the gate-source voltage addition value (Vgsmn2 + Vgsmn3) of the transistors MN2 and MN3 is connected to the enable terminal 2 in the constant voltage generation circuit 4. Therefore, the transistor MND2 of the regulator circuit 5 is turned on when the gate potential exceeds the first threshold voltage, and the transistors MPD1 and MND3 are turned on to output the desired output voltage Vout. As a result, the control circuit 6 is in an operating state by the output voltage Vout. However, if the value of the second threshold voltage (Vref) of the comparator 63 of the control circuit 6 is set to Vref> (Vgsmn2 + Vgsmn3), the output of the comparator 63 becomes low level. The oscillator 62 stops operating.

  Further, as shown in FIG. 4C, the voltage Va is applied to the enable terminal 2, or as shown in FIG. 4D, the voltage Va is connected to the power supply terminal 1 via the resistor R6. When a voltage exceeding the second threshold voltage (Vref) is applied to the enable terminal 2, the regulator circuit 5 operates, the output of the comparator 63 of the control circuit 6 becomes high level, and the oscillator 62 Operate. That is, the control circuit main body 61 is completely operated. In the cases shown in FIGS. 4C and 4D, the drain voltage of the transistor MN1 becomes high, and the threshold value of the transistor MN1 becomes high due to the substrate effect, so that the current flowing through the enable terminal 2 is the same as that shown in FIG. This is less than the cases (a) and (b).

<Second embodiment>
FIG. 2 shows a regulator device according to a second embodiment of the present invention. In this regulator device, an N-type enhancement high voltage MOS transistor MND4 having a drain and a gate connected in common is connected between a Zener diode ZD2 and a resistor R2, and further, between the enable terminal 2 and the gate (node N3) of the transistor MND2. Is connected to the buffer circuit 51, and the voltage of the node N1 is supplied as the power supply voltage of the buffer circuit 51. When a voltage exceeding the first threshold voltage is applied to the enable terminal 2, the voltage of the node N1 is supplied from the buffer circuit 51 to the node N1. Is output to the node N3 and input to the gate of the transistor MND2.

  Here, since the gate-source voltage of the transistor MND1 is canceled by the gate-source voltage of the transistor MND4, the voltage of the node N1 becomes equal to the Zener voltage Vzd2 of the Zener diode ZD2, which is the case of the first embodiment. Get higher. Therefore, when the enable terminal 2 is open or a voltage equal to or higher than the second threshold voltage is applied to the enable terminal 2, the voltage of the node N1 is applied to the gate of the transistor MND2, and the transistor MND2 is reliably turned on, and the regulator circuit 5 is operated stably.

  FIG. 3 shows an internal circuit of the buffer circuit 51. The buffer circuit 51 includes a first threshold voltage setting unit including an N-type enhancement low breakdown voltage MOS transistor MN11 and a resistor R11, and a CMOS inverter including an N-type enhancement low breakdown voltage MOS transistor MN12 and a P-type enhancement low breakdown voltage MOS transistor MP11. It is configured.

  In the buffer circuit 51, when the voltage of the enable terminal 2 becomes equal to or higher than the first threshold voltage, the transistor MN11 is turned on, the transistor MP11 is turned on, and the voltage of the node N1 is output to the node N3. That is, the Zener voltage Vzd2 of the Zener diode ZD2 applies the gate of the transistor MND2, and the conduction of the transistor MND2 is ensured.

1: power supply terminal 2: enable terminal 3: output terminal 4: constant voltage generation circuit 5: regulator circuit, 51: buffer circuit 6: control circuit, 61: control circuit body, 62: oscillator, 63: comparator

Claims (3)

A constant voltage generation circuit that applies a constant voltage higher than the first threshold voltage to the enable terminal by one or two or more series-connected diodes supplied with a constant current;
A regulator circuit that operates when a voltage equal to or higher than the first threshold voltage is applied to the enable terminal and outputs a voltage obtained by stepping down the input voltage as an output voltage;
An internal oscillator, and a control circuit for inputting the output voltage of the regulator circuit as an operating voltage.
The control circuit operates as a whole when a voltage equal to or higher than a second threshold voltage higher than the first threshold voltage is applied to the enable terminal, and a voltage lower than the second threshold voltage is applied to the enable terminal. The regulator device characterized in that the operation of the oscillator is stopped when it is in operation. The regulator device according to claim 1,
The constant voltage generating circuit includes a first Zener diode, a first transistor that operates with a voltage set by the first Zener diode, and a series connection of the first transistor to generate the constant current. And a second transistor that supplies the diode. In the regulator device according to claim 1 or 2,
The regulator circuit operates when a voltage equal to or higher than the first threshold voltage is applied to the enable terminal, and operates when the third transistor operates to supply current to the second Zener diode. A regulator device comprising: a fourth transistor that flows; and a fifth transistor that operates by a voltage set by the second Zener diode and that steps down the input voltage to generate the output voltage.

Images