JP5504606B2 - Semiconductor wafer quality inspection system - Google Patents

Semiconductor wafer quality inspection system Download PDF

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JP5504606B2
JP5504606B2 JP2008272396A JP2008272396A JP5504606B2 JP 5504606 B2 JP5504606 B2 JP 5504606B2 JP 2008272396 A JP2008272396 A JP 2008272396A JP 2008272396 A JP2008272396 A JP 2008272396A JP 5504606 B2 JP5504606 B2 JP 5504606B2
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semiconductor wafer
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wafer
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shielding cover
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JP2010103258A (en
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真理子 竹下
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Sumco Corp
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この発明は半導体ウェーハの品質検査装置、詳しくは半導体ウェーハの外周部に対して高精度なフーリエ変換分光分析が可能な半導体ウェーハの品質検査装置に関する。   The present invention relates to a quality inspection apparatus for semiconductor wafers, and more particularly to a quality inspection apparatus for semiconductor wafers capable of high-accuracy Fourier transform spectroscopic analysis with respect to the outer periphery of the semiconductor wafer.

シリコンウェーハ(半導体ウェーハ)は、チョクラルスキー法により引き上げられたシリコン単結晶インゴットに、ブロック切断、外径研削、スライス、ラッピング、面取り、エッチングを順次行い、さらにその表面を鏡面に仕上げる研磨工程を施して製造される。   For silicon wafers (semiconductor wafers), a silicon single crystal ingot pulled up by the Czochralski method is sequentially subjected to block cutting, outer diameter grinding, slicing, lapping, chamfering, etching, and a polishing process to finish the surface to a mirror surface. Manufactured.

シリコンウェーハには、面取り後から製品出荷されるまでの間に、抵抗率、酸素濃度(格子間酸素濃度)、炭素濃度、エピタキシャル膜厚などに関した品質の検査が行われる。
例えば、シリコンウェーハ中の酸素濃度を測定する場合には、図8に示すように、シリコンウェーハ100の表面から裏面へ垂直に透過した赤外光をモニタリングし、その測定値(インターフェログラムなど)をフーリエ変換することにより、赤外吸収スペクトルを測定するフーリエ変換赤外分光光度計(FTIR;Fouerier Transform Infrared Spectrometer)を用いた酸素濃度の測定が行われている。
The silicon wafer is inspected for quality in terms of resistivity, oxygen concentration (interstitial oxygen concentration), carbon concentration, epitaxial film thickness, etc., after chamfering until product shipment.
For example, when measuring the oxygen concentration in a silicon wafer, as shown in FIG. 8, infrared light transmitted perpendicularly from the front surface to the back surface of the silicon wafer 100 is monitored, and the measured value (interferogram, etc.) Is measured by using a Fourier transform infrared spectrophotometer (FTIR; Fourier Transform Infrared Spectrometer) that measures an infrared absorption spectrum.

特開2004−253726号公報JP 2004-253726 A

しかしながら、図8に示すように、シリコンウェーハ100の外周部には、鏡面仕上げのウェーハ表面に比べて表面粗さが大きい(粗い)面取り面101aを有した面取り部101が存在する。面取り面101aは、曲面を含む仕上げ精度が低い多角面からなる。そのため、面取り部101への赤外線の光束aの入射角度が、その入射位置によって大きく異なり、面取り面101aで光の散乱が発生し易い。これが、赤外線の減光および検出器への迷光入射の原因となり、測定不良が発生し易かった。   However, as shown in FIG. 8, a chamfered portion 101 having a chamfered surface 101 a having a larger surface roughness (rougher) than the mirror-finished wafer surface exists on the outer peripheral portion of the silicon wafer 100. The chamfered surface 101a is a polygonal surface including a curved surface with low finishing accuracy. Therefore, the incident angle of the infrared light beam a on the chamfered portion 101 varies greatly depending on the incident position, and light scattering is likely to occur on the chamfered surface 101a. This caused the attenuation of infrared rays and the incidence of stray light on the detector, which was likely to cause measurement failures.

一般に、屈曲率がn1(AIR=1.0)の物質に対して、入射角θで入射した光は、屈曲率がn2(Si=3.42)の物質2に入射した際、θtだけ屈曲する。
スネルの法則; n1sinθ=n2sinθt
そのため、多角面の面取り面101aでは、シリコンウェーハ100の透過光が多方向へ散乱し、測定不良が発生していた。特に、赤外線をウェーハ表面へ直角入射して格子間酸素の定量測定を行う場合には、鏡面での多重反射を考慮した計算式(理論式)が利用される。しかしながら、面取り面101aのように多角面からの光の場合は、単純な計算式をあてはめることはできない。
In general, light incident at an incident angle θ with respect to a material having a bending rate of n1 (AIR = 1.0) is bent by θt when incident on a material 2 having a bending rate of n2 (Si = 3.42). To do.
Snell's law; n1sinθ = n2sinθt
Therefore, on the polygonal chamfered surface 101a, the transmitted light of the silicon wafer 100 is scattered in multiple directions, resulting in measurement failure. In particular, when infrared light is incident at right angles on the wafer surface and quantitative measurement of interstitial oxygen is performed, a calculation formula (theoretical formula) that takes into account multiple reflections on the mirror surface is used. However, in the case of light from a polygonal surface such as the chamfered surface 101a, a simple calculation formula cannot be applied.

そこで、発明者は、鋭意研究の結果、シリコンウェーハの外周部において、測定光の減光や検出器への測定光の迷光入射の原因となる面取り部(面取り面)を、光吸収材からなる遮光カバーにより被えば、面取り部への測定光の入射が遮られ、ウェーハ外周部に対する高精度なフーリエ変換分光分析を行うことができることを知見し、この発明を完成させた。   Therefore, as a result of earnest research, the inventor has a chamfered portion (chamfered surface) that causes measurement light dimming and stray light incidence of the measurement light to the detector at the outer peripheral portion of the silicon wafer. The present invention has been completed by discovering that the measurement light can be prevented from entering the chamfered portion when covered by the light shielding cover, and that high-accuracy Fourier transform spectroscopic analysis can be performed on the outer peripheral portion of the wafer.

この発明は、半導体ウェーハの外周部に対する高精度なフーリエ変換分光分析を行うことができる半導体ウェーハの品質検査装置を提供することを目的としている。   An object of the present invention is to provide a semiconductor wafer quality inspection apparatus capable of performing high-accuracy Fourier transform spectroscopic analysis on the outer peripheral portion of a semiconductor wafer.

請求項1に記載の発明は、半導体ウェーハの表面から裏面へ向かって、該半導体ウェーハの表面に対して直角に測定光を照射し、該測定光のうち、前記半導体ウェーハを透過した赤外光、または前記半導体ウェーハから反射した赤外光から、前記測定光のスペクトルを測定するフーリエ変換分光分析を行う半導体ウェーハの品質検査装置において、前記測定光を吸収する光吸収材からなり、かつ前記半導体ウェーハの表面を正対視して、該半導体ウェーハの中央部を露出する一方、該半導体ウェーハの面取り部を被う遮光カバーを備え、前記測定光は、前記半導体ウェーハの表面を正対視して、該半導体ウェーハの一端部からその中央部を経てその他端部へ向かってスキャンし、前記遮光カバーは、前記測定光が照射される前記半導体ウェーハの面取り部に配設され、該面取り部の表裏面を被う断面横U字形状の部材である半導体ウェーハの品質検査装置である。 The invention according to claim 1 irradiates measurement light perpendicularly to the surface of the semiconductor wafer from the front surface to the back surface of the semiconductor wafer, and among the measurement light, infrared light transmitted through the semiconductor wafer. Or a semiconductor wafer quality inspection apparatus for performing Fourier transform spectroscopic analysis for measuring a spectrum of the measurement light from infrared light reflected from the semiconductor wafer, comprising a light absorbing material that absorbs the measurement light, and the semiconductor The semiconductor wafer is provided with a light-shielding cover that covers the chamfered portion of the semiconductor wafer while exposing the central portion of the semiconductor wafer while facing the front surface of the wafer. Scanning from one end portion of the semiconductor wafer to the other end portion through the central portion thereof, and the light shielding cover includes the semiconductor wafer irradiated with the measurement light. Disposed chamfer, a quality inspection apparatus for a semiconductor wafer is a member of the cross-section transverse U-shape covering the front and back surfaces of the chamfer.

請求項1に記載の発明によれば、半導体ウェーハの面取り部を遮光カバーにより被い、この状態でウェーハ外周部のフーリエ変換分光分析を行う。すなわち、半導体ウェーハの外周部に測定光(赤外線など)を入射させ、このときウェーハの表面から裏面へ垂直に透過した光または半導体ウェーハから反射した光をモニタリングし、その測定値をフーリエ変換することで、スペクトルを測定する。
このとき、半導体ウェーハの面取り部には、測定光の面取り部への入射路の途中に、光吸収材製の遮光カバーが存在する。そのため、光源から照射された光は、面取り部に入射されない。その結果、ウェーハ面取り部内での測定光の減光や検出器への測定光の迷光入射が発生せず、面取り部を除く半導体ウェーハの外周部に対して、高精度なフーリエ変換分光分析を行うことができる。
According to the first aspect of the present invention, the chamfered portion of the semiconductor wafer is covered with the light shielding cover, and in this state, Fourier transform spectroscopic analysis of the outer peripheral portion of the wafer is performed. That is, measuring light (infrared rays, etc.) is incident on the outer periphery of the semiconductor wafer, and at this time, the light transmitted vertically from the front surface to the back surface of the wafer or the light reflected from the semiconductor wafer is monitored, and the measured value is Fourier transformed. Measure the spectrum.
At this time, in the chamfered portion of the semiconductor wafer, there is a light shielding cover made of a light absorbing material in the middle of the incident path to the chamfered portion of the measurement light. Therefore, the light irradiated from the light source is not incident on the chamfered portion. As a result, the measurement light is not diminished in the wafer chamfered part, and no stray light is incident on the detector, and high-precision Fourier transform spectroscopic analysis is performed on the outer periphery of the semiconductor wafer excluding the chamfered part. be able to.

半導体ウェーハとしては、単結晶シリコンウェーハ、エピタキシャルシリコンウェーハなどを採用することができる。通常、フーリエ変換分光分析は、半導体ウェーハの表裏面を水平にして行われる。
半導体ウェーハの面取り部とは、ウェーハ表面のデバイスが形成される平坦度適用領域を除く、ウェーハの周辺部(外周部)除外領域をいう。面取り部の面取り面(露出面)は、鏡面仕上げされたウェーハ表面に比べて仕上げ精度が低く、かつ曲面を含む多角面からなる。
As the semiconductor wafer, a single crystal silicon wafer, an epitaxial silicon wafer, or the like can be employed. Usually, Fourier transform spectroscopic analysis is performed with the front and back surfaces of a semiconductor wafer being horizontal.
A chamfered portion of a semiconductor wafer refers to a peripheral portion (outer peripheral portion) exclusion region excluding a flatness application region where devices on the wafer surface are formed. The chamfered surface (exposed surface) of the chamfered portion is a polygonal surface that has a lower finishing accuracy than a mirror-finished wafer surface and includes a curved surface.

フーリエ変換分光分析により測定されるのは、例えば測定光が赤外線の場合には、半導体ウェーハの抵抗率、酸素濃度、炭素濃度、エピタキシャル膜厚である。
光吸収材としては、例えば、測定光が赤外線の場合には窒化アルミニウム、ミタニライト(日本アルミナ加工社製)、黒アルマイト処理をしたアルミニウムなどを採用することができる。
ここでいう「正対視」とは、半導体ウェーハの表面に真正面から相対し、この状態で、この表面を視ることをいう。
遮光カバーにより被われるのは、面取り部のうち、平面視した一部でもその全部でもよい。また、遮光カバーは、少なくとも面取り部の表面のみを外方から被えればよい。すなわち、面取り部の表面のみでも、面取り部の表面と裏面のみでも、面取り部の全域でもよい。
例えば、半導体ウェーハの面取り部のうち、半導体ウェーハの中心点を中心とした点対称位置に一対配置してもよい。また、半導体ウェーハの全域に配置してもよい。遮光カバーの形状としては、例えば板片形状、ドーナツ形状などを採用することができる。
What is measured by Fourier transform spectroscopic analysis is, for example, the resistivity, oxygen concentration, carbon concentration, and epitaxial film thickness of the semiconductor wafer when the measurement light is infrared.
As the light absorbing material, for example, when the measurement light is infrared, aluminum nitride, Mitanilite (manufactured by Nippon Alumina Processing Co., Ltd.), aluminum subjected to black alumite treatment, or the like can be used.
Here, “facing to the front” means to face the surface of the semiconductor wafer from the front and to view the surface in this state.
A part or all of the chamfered portion may be covered with the light shielding cover. Further, the light shielding cover only needs to cover at least the surface of the chamfered portion from the outside. That is, only the surface of the chamfered portion, only the front and back surfaces of the chamfered portion, or the entire area of the chamfered portion may be used.
For example, a pair of chamfered portions of the semiconductor wafer may be arranged at point-symmetrical positions around the center point of the semiconductor wafer. Moreover, you may arrange | position to the whole region of a semiconductor wafer. As the shape of the light shielding cover, for example, a plate piece shape, a donut shape or the like can be adopted.

さらに、測定光が照射される半導体ウェーハの面取り部に配設されているため、半導体ウェーハの面取り部のうち、測定光による最小限のスキャン領域のみを被うことができる。その結果、遮光カバーの製作が容易となり、かつ遮光カバーの低コスト化が図れる。
また、遮光カバーを、半導体ウェーハの面取り部の表裏面を連続して被うような断面横U字形状(キャップ形状)の部材としたので、入射光,透過光,散乱光を遮断するという効果が得られる。また、迷光入射を完全に遮断することもできる。
Furthermore, since the semiconductor wafer is disposed in the chamfered portion of the semiconductor wafer to which the measurement light is irradiated, only the minimum scan area by the measurement light can be covered in the chamfered portion of the semiconductor wafer. As a result, the manufacture of the light shielding cover is facilitated and the cost of the light shielding cover can be reduced.
In addition, since the light shielding cover is a member having a U-shaped cross section (cap shape) that continuously covers the front and back surfaces of the chamfered portion of the semiconductor wafer, the effect of blocking incident light, transmitted light, and scattered light Is obtained. Further, stray light incidence can be completely blocked.

請求項1に記載の発明によれば、半導体ウェーハの面取り部を遮光カバーにより被い、この状態でウェーハ外周部のフーリエ変換分光分析を行うので、ウェーハ外周部に照射された測定光は、面取り部に入射されない。その結果、ウェーハ面取り部内での測定光の減光や検出器への測定光の迷光入射が発生せず、面取り部を除く半導体ウェーハの外周部に対して、高精度なフーリエ変換分光分析を行うことができる。   According to the first aspect of the present invention, the chamfered portion of the semiconductor wafer is covered with the light shielding cover, and the Fourier transform spectroscopic analysis of the outer peripheral portion of the wafer is performed in this state. It is not incident on the part. As a result, the measurement light is not diminished in the wafer chamfered part, and no stray light is incident on the detector, and high-precision Fourier transform spectroscopic analysis is performed on the outer periphery of the semiconductor wafer excluding the chamfered part. be able to.

さらに、測定光が照射される半導体ウェーハの面取り部に配設されているため、半導体ウェーハの面取り部のうち、測定光による最小限のスキャン領域のみを被うことができる。その結果、遮光カバーの製作が容易となり、かつ遮光カバーの低コスト化が図れる。
また、遮光カバーを、半導体ウェーハの面取り部の表裏面を連続して被うような断面横U字形状(キャップ形状)の部材としたので、入射光,透過光,散乱光を遮断するという効果が得られる。また、迷光入射を完全に遮断することもできる。
Furthermore, since the semiconductor wafer is disposed in the chamfered portion of the semiconductor wafer to which the measurement light is irradiated, only the minimum scan area by the measurement light can be covered in the chamfered portion of the semiconductor wafer. As a result, the manufacture of the light shielding cover is facilitated and the cost of the light shielding cover can be reduced.
In addition, since the light shielding cover is a member having a U-shaped cross section (cap shape) that continuously covers the front and back surfaces of the chamfered portion of the semiconductor wafer, the effect of blocking incident light, transmitted light, and scattered light Is obtained. Further, stray light incidence can be completely blocked.

以下、この発明の実施例を具体的に説明する。   Examples of the present invention will be specifically described below.

この発明の実施例1に係る半導体ウェーハの品質検査装置を説明する。ここでは、以下の工程を経て作製されたシリコンウェーハ(半導体ウェーハ)の酸素濃度を、赤外線(測定光)の照射を伴うフーリエ変換赤外分光光度計を利用した検査装置により測定する。すなわち、シリコンウェーハは、チョクラルスキー法により引き上げられた直径300mmのシリコン単結晶インゴットに対して、ブロック切断、外径研削、スライス、面取り、ラッピング、エッチングおよびウェーハ表面の鏡面研磨の各工程を順次施して得られたウェーハである。   A semiconductor wafer quality inspection apparatus according to Embodiment 1 of the present invention will be described. Here, the oxygen concentration of the silicon wafer (semiconductor wafer) manufactured through the following steps is measured by an inspection apparatus using a Fourier transform infrared spectrophotometer accompanied by irradiation with infrared rays (measurement light). That is, for silicon wafers, each process of block cutting, outer diameter grinding, slicing, chamfering, lapping, etching, and mirror polishing of the wafer surface is sequentially performed on a 300 mm diameter silicon single crystal ingot pulled up by the Czochralski method. It is the wafer obtained by performing.

検査装置は、シリコンウェーハを真空吸着する水平配置されるウェーハ保持板を有している。ウェーハ保持板は中央部がくり抜かれ、シリコンウェーハの中心部の測定ができるように構成されている。ウェーハ保持板の一端部の上方には、赤外線の光源と、光源から水平に照射された赤外線を、シリコンウェーハの表面に対して直角(垂直)に入射させる上方ミラーとが配置されている。さらに、ウェーハ保持板の一端部の下方には、常に上方ミラーの直下に配置され、かつシリコンウェーハを透過した透過光(干渉光)を水平方向に反射させる下方ミラーと、下方ミラーに反射した透過光を受光する検出器とを有している。検出器へ入射した透過光は、シリコンウェーハから反射した干渉光とともにモニタリングされ、その測定値が検査装置の制御部に設けられたフーリエ変換赤外分光回路によりフーリエ変換され、干渉光に応じた赤外線スペクトルが測定される。これにより、シリコンウェーハの酸素濃度を測ることができる。   The inspection apparatus has a horizontally disposed wafer holding plate that vacuum-sucks a silicon wafer. The wafer holding plate is configured such that the center portion is cut out and the center portion of the silicon wafer can be measured. Above one end of the wafer holding plate, there are arranged an infrared light source and an upper mirror for making the infrared light irradiated horizontally from the light source incident at a right angle (perpendicular) to the surface of the silicon wafer. Further, below one end of the wafer holding plate, a lower mirror that is always disposed directly below the upper mirror and reflects the transmitted light (interference light) transmitted through the silicon wafer in the horizontal direction, and a transmitted light reflected by the lower mirror. And a detector for receiving light. The transmitted light incident on the detector is monitored together with the interference light reflected from the silicon wafer, and the measured value is Fourier-transformed by a Fourier transform infrared spectroscopic circuit provided in the control unit of the inspection apparatus, and infrared light corresponding to the interference light. A spectrum is measured. Thereby, the oxygen concentration of a silicon wafer can be measured.

図1および図2に示すように、この実施例1の半導体ウェーハの品質検査装置の特徴は、シリコンウェーハ10の面取り部11を、赤外線を吸収する光吸収材からなる遮光カバー12により被い、この状態でシリコンウェーハ10の外周部のフーリエ変換赤外分光分析を行う点である。
遮光カバー12は黒メッキ処理(黒クロメート処理など)を施したアルミニウム(光吸収材)製で、厚さ1mmの平面視して矩形状をした合計4枚の表裏面が平坦な板片からなる。各遮光カバー12は、シリコンウェーハ10の面取り部11のうち、ウェーハの中心点を中心とした点対称位置のウェーハ上方と下方とに一対ずつ配置されている。すなわち、ウェーハ上方に配置された両遮光カバー12同士およびウェーハ下方に配置された両遮光カバー12同士は、その長さ方向をウェーハ直径方向に向けるとともに、ウェーハ10の中心点を中心とした各対向側の辺を、ウェーハ面取り部11の基端縁の直上に配置している。そのため、面取り部の基端縁の部分には、赤外線の断面円形状をした通常の光束aが照射されず、断面半円形の光束bが照射される。遮光カバー12を黒メッキを施したアルミニウム製としたので、光を遮断するという効果が得られる。
As shown in FIG. 1 and FIG. 2, the semiconductor wafer quality inspection apparatus according to the first embodiment is characterized in that the chamfered portion 11 of the silicon wafer 10 is covered with a light shielding cover 12 made of a light absorbing material that absorbs infrared rays. In this state, the Fourier transform infrared spectroscopic analysis of the outer peripheral portion of the silicon wafer 10 is performed.
The light shielding cover 12 is made of aluminum (light absorbing material) that has been subjected to black plating treatment (black chromate treatment, etc.), and is composed of a flat plate with a total of four front and back surfaces that are rectangular when viewed in plan with a thickness of 1 mm. . A pair of each light shielding cover 12 is disposed above and below the wafer at a point-symmetrical position around the center point of the wafer in the chamfered portion 11 of the silicon wafer 10. That is, the light shielding covers 12 disposed above the wafer and the light shielding covers 12 disposed below the wafer have their length directions in the wafer diameter direction and are opposed to each other with the center point of the wafer 10 as the center. The side edge is arranged immediately above the base edge of the wafer chamfer 11. Therefore, the base edge of the chamfered portion is not irradiated with a normal light beam a having a circular cross section of infrared rays but is irradiated with a light beam b having a semicircular cross section. Since the light shielding cover 12 is made of aluminum plated with black, an effect of blocking light can be obtained.

なお、各遮光カバー12に代えて、前記ウェーハの中心点を中心とした各対向側の辺部分12aを、上下に対向配置された遮光カバー12側(ウェーハ面取り部11側)へ直角に屈曲させた別の遮光カバー12Aとしてもよい。この形状にすれば、より入射光を確実に遮断するという効果が得られる(図3)。また、各遮光カバー12に代えて、シリコンウェーハ10の面取り部11の表裏面を連続して被うような断面横U字形状(キャップ形状)の、また別の遮光カバー12Bとしてもよい(図4)。キャップ形状とすれば、入射光,透過光,散乱光を遮断するという効果が得られる。その他、遮光カバー12に代えて、シリコンウェーハ10の面取り部11のうち、ウェーハの中心点を中心とした点対称位置だけでなく、シリコンウェーハ10の面取り部11の全域を覆う環状の遮光カバー12Cを採用してもよい(図5)。このように、環状の遮光カバー12Cとすることで、赤外線によるシリコンウェーハ(面取り部11)10のスキャン位置を、ウェーハ周方向の任意位置とすることができる。   Instead of each light shielding cover 12, each side portion 12a on the opposite side centered on the center point of the wafer is bent at a right angle to the light shielding cover 12 side (wafer chamfered portion 11 side) arranged to face each other vertically. Another light shielding cover 12A may be used. With this shape, the effect of more reliably blocking incident light can be obtained (FIG. 3). Further, instead of each light shielding cover 12, another light shielding cover 12B having a U-shaped cross section (cap shape) that continuously covers the front and back surfaces of the chamfered portion 11 of the silicon wafer 10 may be used (see FIG. 4). If the cap shape is adopted, an effect of blocking incident light, transmitted light, and scattered light can be obtained. In addition, in place of the light shielding cover 12, an annular light shielding cover 12 </ b> C that covers not only the point-symmetrical position around the center point of the wafer but also the entire area of the chamfered portion 11 of the silicon wafer 10 in the chamfered portion 11 of the silicon wafer 10. May be adopted (FIG. 5). Thus, by using the annular light shielding cover 12C, the scan position of the silicon wafer (chamfered portion 11) 10 by infrared rays can be set to an arbitrary position in the wafer circumferential direction.

次に、この検査装置を用いたシリコンウェーハの酸素濃度の品質測定方法(半導体ウェーハの品質測定方法)を説明する。
図1および図2に示すように、シリコンウェーハ10の面取り部11を各遮光カバー12により被い、この状態でシリコンウェーハ10の表面のフーリエ変換赤外分光分析を行う。すなわち、シリコンウェーハ10の外周部に、赤外線を、その表面から裏面へ向かってシリコンウェーハ10の表面に対して直角に透過させながら、ウェーハ半径方向の一端から他端へ向かってスキャンし、赤外線吸収スペクトルを測定する。
このとき、ウェーハ外周部において、赤外線の上方ミラーと面取り部11との間、および、赤外線の下方ミラーと面取り部11との間には、赤外線を遮断する黒メッキ処理を施したアルミニウム製の遮光カバー12が存在する。そのため、ウェーハ面内において、赤外線の減光や受光部(検出器)への迷光入射の原因となるウェーハ面取り部11の多角面である面取り面11aへの赤外線の照射が行われない。
Next, a method for measuring the quality of oxygen concentration in a silicon wafer (a method for measuring the quality of a semiconductor wafer) using this inspection apparatus will be described.
As shown in FIGS. 1 and 2, the chamfered portion 11 of the silicon wafer 10 is covered with each light shielding cover 12, and in this state, the Fourier transform infrared spectroscopic analysis of the surface of the silicon wafer 10 is performed. That is, the infrared ray is scanned from one end to the other end in the radial direction of the wafer while transmitting the infrared ray to the outer peripheral portion of the silicon wafer 10 from the front surface to the back surface at a right angle to the surface of the silicon wafer 10. Measure the spectrum.
At this time, in the outer periphery of the wafer, between the infrared upper mirror and the chamfered portion 11 and between the infrared lower mirror and the chamfered portion 11, an aluminum light-shielding that has been subjected to black plating processing that blocks infrared rays. Cover 12 is present. Therefore, in the wafer surface, infrared irradiation is not performed on the chamfered surface 11a which is a polygonal surface of the wafer chamfered portion 11 which causes infrared light attenuation and stray light incidence to the light receiving portion (detector).

すなわち、従来のように多角面である面取り面11aに赤外線が照射されれば、面取り部11内で赤外線が多方向へ散乱し、測定不良が発生していた(図6のグラフ)。特に、赤外線をウェーハ表面へ直角入射して格子間酸素の定量測定を行う場合には、鏡面での多重反射を考慮した計算式(理論式)が利用される。しかしながら、面取り部11のように多角面からの光の場合は、単純な計算式をあてはめることはできない。   That is, if infrared rays are irradiated onto the chamfered surface 11a which is a polygonal surface as in the prior art, the infrared rays are scattered in multiple directions within the chamfered portion 11 and a measurement failure occurs (graph in FIG. 6). In particular, when infrared light is incident at right angles on the wafer surface and quantitative measurement of interstitial oxygen is performed, a calculation formula (theoretical formula) that takes into account multiple reflections on the mirror surface is used. However, in the case of light from a polygonal surface as in the chamfered portion 11, a simple calculation formula cannot be applied.

赤外吸収法を用いたフーリエ変換赤外分光法による酸素濃度の測定では、検査されるシリコンウェーハ10の表面状態(特に光沢度)が異なってもウェーハ(シリコン単結晶)中の酸素濃度は変わらない。それにもかかわらず、測定される値が変化する。これは、ウェーハ10の表面状態によりウェーハ内部で発生する多重反射の仕方が異なるためである。
多重反射とは、ウェーハ10に入射した赤外線がウェーハ内部の表面側および裏面側で繰り返し反射し、そのとき一定の割合で光が吸収および透過する現象をいう。
In the measurement of oxygen concentration by Fourier transform infrared spectroscopy using the infrared absorption method, the oxygen concentration in the wafer (silicon single crystal) changes even if the surface state (especially glossiness) of the silicon wafer 10 to be inspected is different. Absent. Nevertheless, the measured value changes. This is because the way of multiple reflection generated inside the wafer differs depending on the surface state of the wafer 10.
Multiple reflection refers to a phenomenon in which infrared light incident on the wafer 10 is repeatedly reflected on the front side and the back side inside the wafer, and light is absorbed and transmitted at a certain rate.

そこで、シリコンウェーハ10の外周部において、赤外線の減光や受光部への迷光入射の原因となる面取り部11を、光吸収材からなる遮光カバー12によって被うようにした。これにより、シリコンウェーハ10の外周部に対する高精度なフーリエ変換赤外分光分析を行うことができる(図7のグラフ)。
また、遮光カバー12がシリコンウェーハ10の面取り部11のうち、平面視して、ウェーハの中心点を中心とした点対称位置に対配置したので、シリコンウェーハ10の面取り部11のうち、赤外線による最小限のスキャン領域のみを被うことができる。その結果、遮光カバー12の製作が容易となり、かつ遮光カバー12の低コスト化が図れる。
Therefore, the chamfered portion 11 that causes infrared light attenuation and stray light incidence on the light receiving portion is covered with a light shielding cover 12 made of a light absorbing material on the outer peripheral portion of the silicon wafer 10. Thereby, the highly accurate Fourier-transform infrared spectroscopy analysis with respect to the outer peripheral part of the silicon wafer 10 can be performed (graph of FIG. 7).
In addition, since the light shielding cover 12 is arranged in a point-symmetrical position with the center point of the wafer as a center in the chamfered portion 11 of the silicon wafer 10 in plan view, the light shielding cover 12 is infrared rays. Only a minimal scan area can be covered. As a result, the manufacture of the light shielding cover 12 is facilitated, and the cost of the light shielding cover 12 can be reduced.

この発明の実施例1に係る半導体ウェーハの品質検査装置によるウェーハ外周部での酸素濃度の測定状態を示す要部縦断面図である。It is a principal part longitudinal cross-sectional view which shows the measurement state of the oxygen concentration in the wafer outer peripheral part by the semiconductor wafer quality inspection apparatus which concerns on Example 1 of this invention. この発明の実施例1に係る半導体ウェーハの品質検査装置によるウェーハの酸素濃度の測定状態を示す平面図である。It is a top view which shows the measurement state of the oxygen concentration of the wafer by the quality inspection apparatus of the semiconductor wafer concerning Example 1 of this invention. この発明の実施例1に係る別の半導体ウェーハの品質検査装置によるウェーハ外周部での酸素濃度の測定状態を示す要部縦断面図である。It is a principal part longitudinal cross-sectional view which shows the measurement state of the oxygen concentration in the wafer outer peripheral part by the quality inspection apparatus of another semiconductor wafer which concerns on Example 1 of this invention. この発明の実施例1に係るまた別の半導体ウェーハの品質検査装置によるウェーハ外周部での酸素濃度の測定状態を示す要部縦断面図である。It is a principal part longitudinal cross-sectional view which shows the measurement state of the oxygen concentration in the wafer outer peripheral part by the quality inspection apparatus of another semiconductor wafer which concerns on Example 1 of this invention. この発明の実施例1に係るさらに別の半導体ウェーハの品質検査装置によるウェーハ外周部での酸素濃度の測定状態を示す要部縦断面図である。It is a principal part longitudinal cross-sectional view which shows the measurement state of the oxygen concentration in the wafer outer peripheral part by the quality inspection apparatus of another semiconductor wafer concerning Example 1 of this invention. 従来手段に係る半導体ウェーハの品質測定方法によるウェーハ外周部の酸素濃度の測定結果を示すグラフである。It is a graph which shows the measurement result of the oxygen concentration of the wafer outer peripheral part by the quality measuring method of the semiconductor wafer which concerns on the conventional means. この発明の実施例1に係る半導体ウェーハの品質測定方法によるウェーハ外周部の酸素濃度の測定結果を示すグラフである。It is a graph which shows the measurement result of the oxygen concentration of the wafer outer peripheral part by the quality measuring method of the semiconductor wafer concerning Example 1 of this invention. 従来手段に係る半導体ウェーハの品質測定方法によるウェーハ外周部での酸素濃度の測定状態を示す要部縦断面図である。It is a principal part longitudinal cross-sectional view which shows the measurement state of the oxygen concentration in the wafer outer peripheral part by the quality measuring method of the semiconductor wafer which concerns on the conventional means.

10 シリコンウェーハ(半導体ウェーハ)、
11 面取り部、
11a 面取り面、
12 遮光カバー。
10 Silicon wafer (semiconductor wafer),
11 Chamfered part,
11a chamfered surface,
12 Shading cover.

Claims (1)

半導体ウェーハの表面から裏面へ向かって、該半導体ウェーハの表面に対して直角に測定光を照射し、該測定光のうち、前記半導体ウェーハを透過した赤外光、または前記半導体ウェーハから反射した赤外光から、前記測定光のスペクトルを測定するフーリエ変換分光分析を行う半導体ウェーハの品質検査装置において、
前記測定光を吸収する光吸収材からなり、かつ前記半導体ウェーハの表面を正対視して、該半導体ウェーハの中央部を露出する一方、該半導体ウェーハの面取り部を被う遮光カバーを備え
前記測定光は、前記半導体ウェーハの表面を正対視して、該半導体ウェーハの一端部からその中央部を経てその他端部へ向かってスキャンし、
前記遮光カバーは、前記測定光が照射される前記半導体ウェーハの面取り部に配設され、該面取り部の表裏面を被う断面横U字形状の部材である半導体ウェーハの品質検査装置。
Irradiation of measurement light perpendicularly to the surface of the semiconductor wafer from the front surface to the back surface of the semiconductor wafer, and infrared light transmitted through the semiconductor wafer or red light reflected from the semiconductor wafer. In the semiconductor wafer quality inspection apparatus that performs Fourier transform spectroscopic analysis to measure the spectrum of the measurement light from outside light,
A light-absorbing cover that covers the chamfered portion of the semiconductor wafer, comprising a light-absorbing material that absorbs the measurement light, and exposing the central portion of the semiconductor wafer while facing the surface of the semiconductor wafer .
The measurement light is viewed from the front surface of the semiconductor wafer, scanned from one end portion of the semiconductor wafer to the other end portion through the central portion,
The said light shielding cover is a quality inspection apparatus of the semiconductor wafer which is arrange | positioned in the chamfer part of the said semiconductor wafer irradiated with the said measurement light, and is a cross-sectional horizontal U-shaped member which covers the front and back of this chamfer part .
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Publication number Priority date Publication date Assignee Title
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US11043437B2 (en) * 2019-01-07 2021-06-22 Applied Materials, Inc. Transparent substrate with light blocking edge exclusion zone

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0462457A (en) * 1990-07-02 1992-02-27 Canon Inc Surface state inspecting device
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JPH04188746A (en) * 1990-11-21 1992-07-07 Canon Inc Surface state inspecting device, surface state inspecting system and aligner
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JPH10261682A (en) * 1997-03-19 1998-09-29 Toshiba Corp Method and device for evaluating film property
JP3589856B2 (en) * 1998-03-26 2004-11-17 日本アビオニクス株式会社 Optical integrator
JP3996728B2 (en) * 2000-03-08 2007-10-24 株式会社日立製作所 Surface inspection apparatus and method
WO2002041380A1 (en) * 2000-11-16 2002-05-23 Shin-Etsu Handotai Co.,Ltd. Wafer shape evaluating method and device and device producing method, wafer and wafer selecting method
JP2002236101A (en) * 2001-02-07 2002-08-23 Advantest Corp Method and device for measuring surface state
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20160142060A (en) * 2015-06-02 2016-12-12 주식회사 케이씨텍 Chemical mechanical polishing apparatus
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