JP5477148B2 - Semiconductor optical wiring device - Google Patents

Description

  The present invention relates to a semiconductor optical wiring device in which electronic circuits such as LSIs are simultaneously mounted so that they can be connected by optical signals.

  With the spread of the Internet, the amount of information handled by devices such as servers and routers has increased rapidly, and the transmission capacity of signals exchanged between semiconductor components such as LSIs that make up these devices will continue to increase. It is expected to continue to increase rapidly. On the other hand, as LSI miniaturization advances, problems such as signal transmission delay, signal line reliability, signal interference, and power consumption increase have become apparent in the conventional electrical wiring technology. In order to solve these problems, it has been studied to perform signal transmission between LSI chips and within chips by optical wiring.

  For example, Patent Document 1 discloses an optical wiring structure in which an optical device and a CMOS electric device are integrated on a common SOI layer using an SOI (Silicon on Insulator) substrate. Non-Patent Document 1 discloses an example in which an optical wiring structure in which an optical wiring chip using an SOI substrate and an LSI chip are bonded together is used for signal transmission in the LSI chip. Non-Patent Document 2 discloses an optical wiring structure in which an SOI substrate is used, SiGe is epitaxially grown on the SOI layer, and a light receiver and an electroabsorption optical modulator can be formed simultaneously. In the optical wiring structure using these SOI substrates, a high-performance light receiver is configured by using a buried oxide layer as a lower clad of the Si waveguide and epitaxially growing Ge or SiGe on the SOI layer. There is.

  Non-Patent Document 3 discloses a structure in which a modulator using an electro-optic polymer and a photodiode using polycrystalline Ge are integrated on top of a chip on which electronic circuits are integrated. If the integration technique disclosed in Non-Patent Document 3 is used, it is not always necessary to use an SOI substrate, and an optical wiring structure can also be fabricated on a bulk Si substrate. Patent Document 2 discloses a structure in which an optical waveguide and a light receiving element or a light emitting element are end-face coupled. In addition, a structure is disclosed in which the waveguide loss is reduced by cutting the semiconductor layer below the optical waveguide.

JP-T-2006-525677 JP 2000-298218 A

2007 Semiconductor MIRAI Project Results Report p. 82. J. Liu, et al., "Design of monolithically integrated GeSi electro-absorption modulators and features on an SOI platform", Opt. Express, vol.15, no.2, pp.623-628, 2007. B.A.Block, et al., "Electro-optic polymer cladding ring resonator modulators", Opt. Express, vol.16, no.22, pp.18326-18333, 2008.

  However, in the optical wiring structures disclosed in Patent Document 1, Non-Patent Document 1, and Non-Patent Document 2, since the SOI substrate used is more expensive than the bulk Si substrate, the cost of manufacturing the optical circuit is low. There was a problem of increasing the cost. In addition, when an SOI substrate is used, since a buried oxide layer exists between the device and the substrate, it is not easy to exhaust heat to the substrate side, and a special heat removal mechanism is used, which also increases the cost. There was a problem of inviting.

  In the optical wiring structure disclosed in Non-Patent Document 3, although the cost can be reduced by using a bulk Si substrate, it is not possible to use epitaxially grown Ge or SiGe. A vessel is formed. The light receiving device using polycrystalline Ge has a higher dark current than a Ge light receiving device epitaxially grown on Si, so that the receiving sensitivity is low. As a result, the technique of Non-Patent Document 3 has a problem that the characteristics of the optical circuit as a whole are lower than when an SOI substrate is used.

  Further, in the optical wiring structure disclosed in Patent Document 2, since the metal electrode is provided above the light receiving element or the light emitting element, the light is absorbed by the metal electrode, the loss increases, and the characteristics cannot be improved. was there. In addition, when forming a metal electrode on the top of the element, it is difficult to form a sufficiently large electrode pad on a flat portion, and it is difficult to mount an LSI chip on top of the optical wiring chip. It was. Furthermore, since there is a difference in refractive index at the coupling portion between the optical waveguide and the light receiving element or the light emitting element, there is a problem that the efficiency is lowered due to reflection or scattering, and the characteristics of the entire optical circuit are lowered. .

  The present invention has been made to solve the above-described problems. Signal transmission between LSI chips or within chips can be easily implemented without causing an increase in cost or a decrease in characteristics. The purpose of this is to enable the optical wiring.

A semiconductor optical wiring device according to the present invention includes an optical waveguide region provided on a substrate made of silicon, an element formation region connected to the optical waveguide region and provided on the substrate, and silicon in the element formation region An optical element formed in an element formation region with a semiconductor layer formed thereon by epitaxial growth as a light absorption layer, a groove formed in an optical waveguide region, and a lower portion made of an insulating material filled in the groove A clad layer, a core formed on the lower clad layer and optically connected to the optical element, an upper clad layer formed on the core, and a direction perpendicular to the optical waveguide direction of the optical waveguide comprising the core An electrode pad portion formed on a substrate on a side of the element formation region and connected to the optical element through an electrode lead portion, and the lower clad layer is a light propagating through an optical waveguide composed of a core Is in the range of layer thicknesses does not leak to the substrate, the electrode lead-out portion of the side perpendicular direction of the element forming region in the optical waveguide direction of the optical waveguide, the insulating material is placed over the groove filled Yes.

  As described above, according to the present invention, signal transmission between LSI chips and within chips can be performed by optical wiring in an easy-to-mount state without causing an increase in cost or a decrease in characteristics. An excellent effect is obtained.

FIG. 1 is a plan view (a) and sectional views (b) and (c) showing the configuration of the semiconductor optical wiring device according to the first embodiment of the present invention. FIG. 2 is a cross-sectional view (a) and a plan view (b) showing the configuration of the semiconductor optical wiring device according to the second embodiment of the present invention. FIG. 3 is an explanatory diagram for explaining an example of a method of manufacturing the semiconductor optical wiring device according to the second embodiment of the present invention. FIG. 4 is a cross-sectional view showing the configuration of the semiconductor optical wiring device according to the third embodiment of the present invention. FIG. 5 is a sectional view showing the configuration of the semiconductor optical wiring device according to the fourth embodiment of the present invention. FIG. 6 is a cross-sectional view showing the configuration of the semiconductor optical wiring device according to the fifth embodiment of the present invention. FIG. 7 is a cross-sectional view (a) and a plan view (b) showing the configuration of the semiconductor optical wiring device according to the sixth embodiment of the present invention. FIG. 8 is a cross-sectional view showing a configuration of another semiconductor optical wiring device according to the sixth embodiment of the present invention. FIG. 9 is a cross-sectional view showing a configuration of another semiconductor optical wiring device according to the sixth embodiment of the present invention. FIG. 10 is a plan view showing a configuration of another semiconductor optical wiring device according to the sixth embodiment of the present invention. FIG. 11 is a cross-sectional view showing the configuration of the semiconductor optical wiring device according to the seventh embodiment of the present invention. FIG. 12 is a cross-sectional view showing the configuration of the semiconductor optical wiring device according to the eighth embodiment of the present invention. FIG. 13 is a cross-sectional view showing the configuration of the semiconductor optical wiring device according to the ninth embodiment of the present invention. FIG. 14 is a cross-sectional view showing the configuration of the semiconductor optical wiring device according to the tenth embodiment of the present invention. FIG. 15 is a cross-sectional view showing the configuration of the semiconductor optical wiring device according to the eleventh embodiment of the present invention.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

[Embodiment 1]
First, Embodiment 1 of the present invention will be described. FIG. 1 is a plan view (a) and sectional views (b) and (c) showing the configuration of the semiconductor optical wiring device according to the first embodiment of the present invention. In FIG. 1, each configuration is shown in a simplified manner. The semiconductor optical wiring device includes an optical waveguide region 121 provided on a substrate 101 made of silicon, and an element formation region 122 provided on the substrate 101 connected to the optical waveguide region 121.

  In addition, the semiconductor optical wiring device according to the present embodiment includes an optical element 123 formed in the element formation region 122 with a semiconductor layer formed by epitaxial growth on silicon in the element formation region 122 as a light absorption layer, and an optical waveguide region. A groove 101a formed in 121, a lower cladding layer 102 formed by filling the groove 101a, a core 103 formed on the lower cladding layer 102 and optically connected to the optical element 123, and on the core 103 Formed on the substrate 101 on the side of the element formation region 122 in the direction perpendicular to the optical waveguide direction of the optical waveguide made of the core 103 and the formed upper clad layer 104, and is connected to the optical element 123 via the electrode lead-out portion 105. And an electrode pad portion 106 to be connected.

  In the present embodiment, a groove 124 filled with the same insulating material as that of the lower cladding layer 102 is provided on the side of the element formation region 122 in the direction perpendicular to the optical waveguide direction of the optical waveguide made of the core 103. The electrode lead-out part 105 is disposed on the groove part 124. The lower clad layer 102 only needs to have a layer thickness within a range in which light propagating through the optical waveguide including the core 103 does not leak into the substrate 101.

  According to the present embodiment described above, the so-called bulk silicon substrate 101 is used, and the cost can be reduced as compared with the case where an SOI (Silicon on Insulator) substrate is used. Further, since the optical element 123 which is an optical device is formed in contact with the substrate 101, heat can be efficiently exhausted to the substrate side. In addition, according to the present embodiment, for example, the optical element 123 is configured by the light absorption layer formed by epitaxially growing a semiconductor such as Ge or SiGe on the silicon in the element formation region 122. Compared with the case of using the dark current, the dark current is reduced, and excellent characteristics such as high speed and efficiency can be obtained.

  In addition, according to the present embodiment, the electrode pad portion 106 is formed on the substrate 101 on the side of the element formation region 122 in the direction perpendicular to the optical waveguide direction on the plane of the substrate 101, and the electrode lead portion 105 is formed. Therefore, the absorption loss due to the electrode pad portion 106 made of, for example, metal can be reduced. As is well known, the electrode pad portion 106 is formed to have a large area as much as possible. Therefore, if the electrode pad portion 106 is arranged in the vicinity of the optical element 123, such as above the optical element 123, the absorption loss of the guided light May be invited. On the other hand, in the present embodiment, since the electrode pad portion 106 can be arranged away from the light receiving element, the absorption loss can be reduced.

  In this embodiment, since the electrode lead-out portion 105 is disposed on the groove portion 124 filled with the insulating material, the high frequency characteristics can be improved. Since the substrate 101 other than the groove is flat and the electrode pad portion 106 is provided in such a region, an LSI chip can be easily mounted on the semiconductor optical wiring device in this embodiment. It becomes possible.

[Embodiment 2]
Next, a second embodiment of the present invention will be described. FIG. 2 is a cross-sectional view (a) and a plan view (b) showing the configuration of the semiconductor optical wiring device according to the second embodiment of the present invention. In FIG. 2, each configuration is shown in a simplified manner. In this semiconductor optical interconnection device, first, an optical waveguide region 221 provided on a substrate 201 made of silicon, and element formation regions 222 a and 222 b provided on the substrate 201 connected to the optical waveguide region 221 are provided. Prepare.

  Further, the semiconductor optical wiring device according to the present embodiment includes a light receiving layer 223 formed in the element formation region 222a with a semiconductor layer formed by epitaxial growth on silicon in the element formation region 222a as a light absorption layer, and an element formation region. An optical modulator 225 formed in the element formation region 222b with a semiconductor layer formed by epitaxial growth on the silicon 222b as a light absorption layer, a groove 201a formed in the optical waveguide region 221, and a groove 201a filled The lower clad layer 202 formed, the waveguide core 203 formed on the lower clad layer 202 and optically connected to the light receiver 223 and the optical modulator 225, and the upper clad layer formed on the waveguide core 203 204. As shown in FIG. 2, incident light is introduced from the end of the waveguide core 203.

  An electrode pad formed on the substrate 201 on the side of the element formation region 222a in the direction perpendicular to the optical waveguide direction of the optical waveguide made of the waveguide core 203 and connected to the light receiver 223 via the electrode lead-out portion 205 Part 206 and electrode pad part 208 formed on substrate 201 on the side of element formation region 222b in the direction perpendicular to the optical waveguide direction of the optical waveguide and connected to optical modulator 225 via electrode lead-out part 207 Is provided. Each electrode lead-out portion is formed so that absorption loss due to these is minimized.

  The electrode lead-out portion 205 is connected to an electrode 223 a formed on the side of the light receiver 223, and the electrode lead-out portion 207 is connected to an electrode 225 a formed on the side of the optical modulator 225. Further, in the present embodiment, a groove portion in which an insulating material similar to that of the lower cladding layer 202 is filled in the side portions of the element formation regions 222a and 222b in the direction perpendicular to the optical waveguide direction of the optical waveguide made of the waveguide core 203. Is provided. An electrode lead portion 205 and an electrode lead portion 207 are disposed on the groove portion. As described above, the high-frequency characteristics can be improved by disposing the insulating material on the insulating material.

  Incident light is introduced from the end of the waveguide core 203, the optical signal is converted into an optical signal by the optical modulator 225, and the optical signal is converted into an electrical signal by the light receiver 223. Incident light may be introduced from an optical fiber or a polymer waveguide (not shown) outside the semiconductor optical wiring device. Alternatively, a light source (not shown) may be mounted on the semiconductor optical wiring device, and an optical coupler (not shown) or the like may be used to introduce incident light into the optical waveguide composed of the waveguide core 203.

  The shape of the waveguide core 203 may be a thin wire type or a rib type, and can be appropriately selected in consideration of a desired propagation loss, a minimum bending radius, and the like. The lower clad layer 202 preferably has a sufficient thickness so that light propagating through the optical waveguide composed of the waveguide core 203 does not leak into the substrate 201. More specifically, when the wavelength of the incident light is λ, the refractive index of the lower cladding layer 202 is n, and the thickness of the lower cladding layer 202 is T, the groove depth T> 2λ / n is more satisfied. preferable. For example, when the lower cladding layer 202 is made of silicon oxide, the thickness of the lower cladding layer 202 may be about 2 μm or more for a wavelength of 1.55 μm.

In order to prevent light propagating through the optical waveguide from leaking, it is preferable that there is a sufficient distance between the waveguide core 203 and the side surface of the groove 201a. More specifically, it is more preferable that W1> 2λ / n is satisfied when the interval between the waveguide core 203 and the side portion of the groove 201a is W1. The material for forming the optical waveguide is not particularly limited, and an optimal material can be appropriately selected according to incident light and application. More specifically, the lower clad layer 202 and the upper clad layer 204 are made of any one of SiO ₂ , SiN _x , SiON, or a combination thereof, which can be manufactured by a general semiconductor process to obtain a stable film. Preferably formed. For the lower clad layer 202 and the upper clad layer 204, a low-k material having a low dielectric constant can also be used. In addition, the temperature characteristics of the waveguide can be stabilized by using a material having a negative temperature coefficient of refractive index for the lower cladding layer 202 and the upper cladding layer 204.

The waveguide core 203 is preferably formed from amorphous silicon, polycrystalline silicon, SiN _x , or SiON having a higher refractive index than the lower clad layer 202 and the upper clad layer 204, or a combination thereof. More preferably, amorphous silicon or polycrystalline silicon is used. Silicon has a relatively high refractive index, and by using silicon to form a core, a strong light confinement effect can be obtained and high-density optical circuit integration can be achieved.

The light receiver 223 can be composed of a PIN type or MSM (Metal-Semiconductor-Metal) type photodiode. The material forming the light receiver 223, but are not particularly limited, Ge on a silicon is epitaxially be grown, Si _x Ge _1-x, either _{Si x Ge 1-xy Sn y} , or these It is preferably formed from a combined material. As for the coupling structure between the optical receiver 223 and the optical waveguide (waveguide core 203), FIG. 2 shows a butt coupling structure in which light is incident from the end of the optical receiver 223, but is not necessarily limited thereto. Instead, an evanescent coupling type structure in which light is incident from an optical waveguide formed on the top of the light receiver 223 may be used.

The optical modulator 225, Ge epitaxially grown on a silicon substrate _{201, Si x Ge 1-x} , Si x Ge 1-xy Sn electro-absorption light used either become more semiconductor layer (light absorbing layer) of _y It can be configured using a modulator. The optical modulator 225 may be an optical modulator using the carrier plasma effect of a light absorption layer made of Si _x Ge _1-x epitaxially grown on silicon of a substrate 201 made of bulk silicon. At this time, it is preferable that the light absorption edge of Si _x Ge _1-x is on the short wave side with respect to the wavelength of the incident light. Further, the optical modulator 225 can be formed by utilizing the carrier plasma effect of amorphous silicon or polycrystalline silicon directly deposited on the lower cladding layer 202.

  The resistivity of the substrate 201 is not particularly limited and can be appropriately selected according to the application. However, it is preferable to use a high-resistance substrate so that the optical modulator 225 or the light receiver 223 can operate at high speed.

  Further, by combining optical elements such as an optical multiplexer / demultiplexer, an optical branching element, an optical switch, etc., it is possible to realize a more sophisticated optical wiring device. It is also possible to integrate higher-density optical circuits by integrating optical waveguides (optical waveguide cores) in multiple layers. By using wavelength multiplexing, it is also possible to perform higher-density information transmission.

  In the case where the semiconductor optical wiring device in the present embodiment described above is used as a simple optical signal receiving device, the optical modulator 225 is not necessarily required, but the light receiver 223, the lower cladding layer 202, the waveguide core 203, the upper cladding. The layer 204 may be provided as long as it has a function of converting an optical signal into an electric signal. Similarly, when used as a simple optical signal transmission device, the light receiver 223 is not necessarily required, and includes the optical modulator 225, the lower cladding layer 202, the waveguide core 203, and the upper cladding layer 204, and an electric signal is transmitted. What is necessary is just to have the function to convert into an optical signal.

  According to the semiconductor optical wiring device in the present embodiment described above, a so-called bulk silicon substrate 201 is used, and the cost can be reduced as compared with the case where an SOI substrate is used. In addition, since the optical receiver 223 and the optical modulator 225 which are optical devices are formed in contact with the substrate 201, heat can be efficiently exhausted to the substrate side. Further, according to this embodiment, for example, the light receiver 223 and the light modulator 225 are configured by a light absorption layer formed by epitaxially growing a semiconductor such as Ge or SiGe on silicon in the element formation regions 222a and 222b. As a result, the dark current is smaller than when a polycrystalline semiconductor is used, and excellent characteristics such as high speed and efficiency can be obtained.

  In addition, according to the present embodiment, each electrode pad portion is formed on the substrate 201 on the side of the element formation regions 222a and 222b in the direction perpendicular to the optical waveguide direction on the plane of the substrate 201, and each electrode lead-out is formed. Since the connection is made via the part, the absorption loss due to the electrode pad part made of metal, for example, can be reduced as in the first embodiment.

  In this embodiment, since the electrode lead portion is disposed on the groove portion filled with the insulating material, the high frequency characteristics can be improved. Further, since the substrate 201 other than the groove is flat and the electrode pad portion is provided in such a region, an LSI chip can be easily mounted on the semiconductor optical wiring device in the present embodiment. It becomes.

  Next, a method for manufacturing a semiconductor optical wiring device in the embodiment of the present invention will be described. First, as shown in FIG. 3A, a substrate 201 made of bulk silicon is prepared. Next, as shown in FIG. 3B, the substrate 201 in the optical waveguide region 221 for producing the waveguide is processed by a known photolithography technique and dry etching technique to form the groove 201a. Next, the lower clad layer 202 is formed as shown in FIG. 3C by filling the groove 201a with, for example, silicon oxide.

  Next, for example, amorphous silicon is deposited to form a silicon film, and this silicon film is patterned by a known photolithography technique and dry etching technique, so that the waveguide core 203 is formed as shown in FIG. Then, the upper clad layer 204 is formed by depositing silicon oxide thereon. Amorphous silicon can be deposited by, for example, chemical vapor deposition and sputtering. Silicon oxide can be deposited by chemical vapor deposition, sputtering, sol-gel, or the like.

  Next, as shown in FIG. 3E, an opening 331 is formed in the upper cladding layer 204 of the element formation regions 222a and 222b by a known photolithography technique and dry etching technique. By forming the opening 331, the silicon surface of the substrate 201 is exposed in this region.

Next, for example, Ge is epitaxially grown on the silicon surface exposed at the bottom of the opening 331 to form a light absorption layer, whereby the light receiver 223 and the light modulator 225 are formed as shown in FIG. Form. For example, Ge can be selectively epitaxially grown on the exposed silicon surface by setting the substrate temperature to about 600 ° C. by CVD using GeH ₄ as a source gas. Thereafter, by filling the openings above the light receiver 223 and the optical modulator 225 with silicon oxide, the upper clad layer is also formed on the light receiver 223 and the optical modulator 225 as shown in FIG. Assume that 204 is formed.

[Embodiment 3]
Next, a third embodiment of the present invention will be described. FIG. 4 is a cross-sectional view showing the configuration of the semiconductor optical wiring device according to the third embodiment of the present invention. In FIG. 4, each configuration is shown in a simplified manner.

  In this semiconductor optical interconnection device, first, an optical waveguide region 421 provided on a substrate 401 made of silicon, and element formation regions 422a and 422b provided on the substrate 401 connected to the optical waveguide region 421 are provided. Prepare.

  In addition, the semiconductor optical wiring device according to the present embodiment includes a light receiving layer 423 formed in the element formation region 422a by including a semiconductor layer formed by epitaxial growth on silicon in the element formation region 422a as a light absorption layer, and an element formation region. A semiconductor layer formed by epitaxial growth on silicon 422b is provided as a light absorption layer, an optical modulator 425 formed in the element formation region 422b, a groove 401a formed in the optical waveguide region 421, and a groove 401a filled. Lower clad layer 402 formed, waveguide core 403 formed on lower clad layer 402 and optically connected to light receiver 423 and optical modulator 425, and upper clad layer formed on waveguide core 403 404. As shown in FIG. 4, incident light is introduced from the end of the waveguide core 403.

  Also, an electrode pad formed on the substrate 401 on the side of the element formation region 422a in the direction perpendicular to the optical waveguide direction of the optical waveguide made of the waveguide core 403 and connected to the light receiver 423 via the electrode lead-out portion 405 An electrode pad portion 408 formed on the substrate 401 on the side of the element formation region 422b in a direction perpendicular to the optical waveguide direction of the optical waveguide and connected to the optical modulator 425 via the electrode lead portion 407 Is provided.

  In addition, the light receiver 423 introduces an impurity into the surface of the substrate 401 to make a p-type p-silicon layer 431, an i-Ge layer 432 made of non-doped Ge, and an n-type made of n-type Ge. A Ge layer 433, an n-electrode 434, and a p-electrode 435 are provided. In this case, the light receiver 423 has a PIN diode structure, and the i-Ge layer 432 serves as a light absorption layer.

  In addition, the optical modulator 425 includes a p-silicon layer 451 that is made p-type by introducing impurities into the surface of the substrate 401, an i-Ge layer 452 made of non-doped Ge, and n made of n-type Ge. A -Ge layer 453, an n-electrode 454, and a p-electrode (not shown) are provided. The p electrode is formed in the same manner as the p electrode 435. In this case, the optical modulator 425 is a PIN diode structure, and is an electroabsorption optical modulator in which the i-Ge layer 452 serves as a light absorption layer.

  By modulating the voltage applied between the n-electrode and the p-electrode, the amount of light absorption can be modulated, and the electrical signal can be converted into an optical signal. Since Ge has a higher refractive index than Si, it can function as a waveguide type light receiver and can convert an optical signal into an electric signal. The n-electrode and the p-electrode may be made of metal, or may be made of polycrystalline Si placed so as to reduce light absorption loss.

[Embodiment 4]
Next, a fourth embodiment of the present invention will be described. FIG. 5 is a sectional view showing the configuration of the semiconductor optical wiring device according to the fourth embodiment of the present invention. In FIG. 5, each configuration is shown in a simplified manner.

  In this semiconductor optical interconnection device, first, an optical waveguide region 521 provided on a substrate 501 made of silicon, and element formation regions 522a and 522b provided on the substrate 501 connected to the optical waveguide region 521 are provided. Prepare.

  Further, the semiconductor optical wiring device according to the present embodiment includes a light receiving layer 523 formed in the element forming region 522a by including a semiconductor layer formed by epitaxial growth on silicon in the element forming region 522a as a light absorption layer, and an element forming region. An optical modulator 525 provided in the element formation region 522b with a semiconductor layer formed by epitaxial growth on silicon 522b as a light absorption layer, a groove 501a formed in the optical waveguide region 521, and a groove 501a filled Lower clad layer 502 formed, waveguide core 503 formed on lower clad layer 502 and optically connected to light receiver 523 and optical modulator 525, and upper clad layer formed on waveguide core 503 504. As shown in FIG. 5, incident light is introduced from the end of the waveguide core 503.

  Also, an electrode pad formed on the substrate 501 on the side of the element formation region 522a in the direction perpendicular to the optical waveguide direction of the optical waveguide made of the waveguide core 503 and connected to the light receiver 523 via the electrode lead portion 505. Part 506 and an electrode pad part 508 formed on the substrate 501 on the side of the element formation region 522b in the direction perpendicular to the optical waveguide direction of the optical waveguide and connected to the optical modulator 525 via the electrode lead part 507 Is provided.

  The light receiver 523 includes an i-Ge layer made of non-doped Ge formed on the surface of the substrate 501 and two metal electrodes 531 formed thereon. In this case, the light receiver 423 has an MSM type diode structure, and the i-Ge layer serves as a light absorption layer. The light receiver 523 configured as described above has a feature that the manufacturing process is easy as compared with the PIN type structure.

  In addition, the optical modulator 525 includes a p-type silicon layer 451 that is made p-type by introducing impurities into the surface of the substrate 501, an i-Ge layer 452 made of non-doped Ge, and an n-type made of n-type Ge. A -Ge layer 453, an n-electrode 454, and a p-electrode (not shown) are provided. The p electrode is formed in the same manner as the p electrode 435. In this case, the light modulator 525 has a PIN diode structure, and is an electroabsorption light modulator in which the i-Ge layer 452 serves as a light absorption layer.

  As is apparent from the above description, in the present embodiment, the light receiver 523 has an MSM type diode structure, and other configurations are the same as those in the third embodiment.

[Embodiment 5]
Next, a fifth embodiment of the present invention will be described. FIG. 6 is a cross-sectional view showing the configuration of the semiconductor optical wiring device according to the fifth embodiment of the present invention. In FIG. 6, each configuration is shown in a simplified manner. In this semiconductor optical interconnection device, first, an optical waveguide region 621 provided on a substrate 601 made of silicon, and element formation regions 622a and 622b provided on the substrate 601 connected to the optical waveguide region 621 are provided. Prepare.

  In addition, the semiconductor optical wiring device according to the present embodiment includes a light receiving layer 623 formed in the element forming region 622a by including a semiconductor layer formed by epitaxial growth on silicon in the element forming region 622a as a light absorption layer, and an element forming region. A semiconductor layer formed by epitaxial growth on 622b silicon is provided as a light absorption layer, an optical modulator 625 formed in the element formation region 622b, a groove 601a formed in the optical waveguide region 621, and a groove 601a filled. Lower clad layer 602 formed, waveguide core 603 formed on lower clad layer 602 and optically connected to light receiver 623 and optical modulator 625, and upper clad layer formed on waveguide core 603 604. As shown in FIG. 6, incident light is introduced from the end of the waveguide core 603.

  Further, it is formed on the substrate 601 on the side of the element forming region 622a in the direction perpendicular to the optical waveguide direction of the optical waveguide composed of the waveguide core 603, and is connected to the light receiver 623 via an electrode lead portion (not shown). And an electrode lead portion (not shown) formed on the substrate 601 on the side of the element forming region 622b in the direction perpendicular to the optical waveguide direction of the optical waveguide. And an electrode pad portion (not shown) to be connected. The above configuration is the same as that of the second embodiment described above.

  In addition, in this embodiment, an inclined structure portion 623a is provided in the optical coupling portion between the waveguide core 603 and the light receiver 623, and similarly, an inclined structure is provided in the optical coupling portion between the waveguide core 603 and the optical modulator 625. A portion 625a is provided. The inclined structures 623a and 625a are light incident / exit end faces, and the incident / exit end faces are at an angle with respect to a plane perpendicular to the light guiding direction. For example, the incident / exit end face is inclined 45 ° toward the substrate 601 from the plane perpendicular to the light guiding direction. By doing so, reflection and scattering at the optical coupling portion can be reduced, and high coupling efficiency can be obtained.

[Embodiment 6]
Next, a sixth embodiment of the present invention will be described. FIG. 7 is a cross-sectional view (a) and a plan view (b) showing the configuration of the semiconductor optical wiring device according to the sixth embodiment of the present invention. In FIG. 7, each configuration is shown in a simplified manner. In this semiconductor optical interconnection device, first, an optical waveguide region 721 provided on a substrate 701 made of silicon, and element formation regions 722a and 722b provided on the substrate 701 connected to the optical waveguide region 721 are provided. Prepare.

  In addition, the semiconductor optical wiring device according to the present embodiment includes a light receiving layer 723 formed in the element formation region 722a with a semiconductor layer formed by epitaxial growth on silicon in the element formation region 722a as a light absorption layer, and an element formation region. An optical modulator 725 formed in the element formation region 722b with a semiconductor layer formed by epitaxial growth on 722b silicon as a light absorption layer, a groove 701a formed in the optical waveguide region 721, and a groove 701a filled Lower clad layer 702 formed, waveguide core 703 formed on lower clad layer 702 and optically connected to light receiver 723 and optical modulator 725, and upper clad layer formed on waveguide core 703 704. As shown in FIG. 7, incident light is introduced from the end of the waveguide core 703.

  In the present embodiment, a plurality of optical waveguides including the waveguide core 703, the light receiver 723, and the optical modulator 725 described above are provided. Further, it is formed on the substrate 701 on the side of the element forming region 722a in the direction perpendicular to the optical waveguide direction of the optical waveguide composed of each waveguide core 703, and is connected to the light receiver 723 via the electrode lead portion 705. The electrode pad portion 706 and the electrode pad portion formed on the substrate 701 on the side of the element forming region 722b in the direction perpendicular to the optical waveguide direction of the optical waveguide and connected to the optical modulator 725 via the electrode lead portion 707 708. The electrode lead portion and the electrode pad are provided in each light receiver 723 and each light modulator 725.

  The electrode lead-out portion 705 is connected to an electrode (not shown) formed on the side portion of the light receiver 723, and the electrode lead-out portion 707 is connected to an electrode (not shown) formed on the side portion of the optical modulator 725. Connected. These configurations are the same as those in the second embodiment described above. In the present embodiment, the groove portion in which the insulating material similar to that of the lower clad layer 702 is filled in the side portions of the element formation regions 722a and 722b in the direction perpendicular to the optical waveguide direction of the optical waveguide made of the waveguide core 703. Is provided. A groove is also provided for each optical waveguide. In addition, an electrode lead portion 705 and an electrode lead portion 707 are disposed on the groove portion.

  In this embodiment, an LSI chip 709 is mounted on the upper clad layer 704. The LSI chip 709 has a plurality of processor cores including a processor core (electronic element) 732 and a processor core (electronic element) 752. The processor core 732 is connected to the electrode pad 706 of the light receiver 723 by the electric wiring 731, and the processor core 752 is connected to the electrode pad 708 of the optical modulator 725 by the electric wiring 751. The electrical wiring 731 and the electrical wiring 751 are provided in through vias formed in the upper cladding layer 704. The electrical wiring 731 and the electrical wiring 751 are arranged at positions different from the cross section shown in FIG.

  In this way, information transmission between a plurality of processor cores can be performed via an optical waveguide (optical wiring) made of the waveguide core 703. Further, since a plurality of optical waveguides are used, it is possible to transmit information with a larger capacity.

  Here, when the smallest interval between adjacent waveguide cores 703 is W2, it is more preferable that W2> 2λ / n is satisfied. Here, λ is the wavelength of incident light that is guided through the optical waveguide. Further, the number of processor cores is not limited to two. By constructing an on-chip optical network by combining optical switches and the like, information transmission between three or more processor cores can be efficiently performed using an optical waveguide. In the plan view shown in FIG. 7B, the positions of the light receiver 723 and the light modulator 725 may be switched in the second and fourth waveguide cores 703 from the top.

  Incidentally, the light source may be introduced by optically coupling the light emitted from the light source 710 with an optical coupler 703a provided at the light incident portion of the waveguide core 703, as shown in FIG. As the light source 710, for example, a front emission type or a back emission type photodiode or a semiconductor laser may be used. Further, an edge-emitting light source can be used by matching the height of the light source and the waveguide.

  In FIG. 8, a back emission type light source 710 is disposed on an upper clad layer 704 corresponding to an upper portion of an optical coupler 703a made of a grating. In this way, the overall size of the opto-electric hybrid module can be reduced. The optical coupler 703a is not limited to the grating coupler, and may be configured by a photonic crystal, a mirror, or a combination thereof.

  Further, as shown in FIG. 9, the light source 710a may be provided on the substrate 701 at the bottom of the groove 701a. In this manner, by mounting the light source 710 a on the substrate 701, heat generated from the light source 702 can be released to the substrate 701 side.

  In addition, as shown in FIG. 10, light emitted from one light source 710b may be distributed to each waveguide core 703 from the light introduction waveguide core 703a. By increasing the number of transmission channels by distributing to a plurality of waveguides, it is possible to transmit information with a larger capacity. In addition, the same code | symbol is the same as that of FIG.

[Embodiment 7]
Next, a seventh embodiment of the present invention will be described. FIG. 11 is a cross-sectional view showing the configuration of the semiconductor optical wiring device according to the seventh embodiment of the present invention. In FIG. 11, each configuration is shown in a simplified manner. In this semiconductor optical interconnection device, first, an optical waveguide region 1121 provided on a substrate 1101 made of silicon, and element formation regions 1122a and 1122b provided on the substrate 1101 connected to the optical waveguide region 1121. Prepare.

  In addition, the semiconductor optical wiring device according to the present embodiment includes a light receiving layer 1123 formed in the element formation region 1122a by including a semiconductor layer formed by epitaxial growth on silicon in the element formation region 1122a as a light absorption layer, and an element formation region. An optical modulator 1125 formed in the element formation region 1122b having a semiconductor layer formed by epitaxial growth on the silicon 1122b as a light absorption layer, a groove 1101a formed in the optical waveguide region 1121, and a groove 1101a filled Lower clad layer 1102 formed, waveguide core 1103 formed on lower clad layer 1102 and optically connected to light receiver 1123 and optical modulator 1125, and upper clad layer formed on waveguide core 1103 1104. As shown in FIG. 11, incident light is introduced from the end of the waveguide core 1103.

  It should be noted that the substrate 1101 on the side of the element forming region 1122a in the direction perpendicular to the optical waveguide direction of the optical waveguide composed of each waveguide core 1103 is connected to the light receiver 1123 via an electrode lead portion (not shown). An electrode pad portion (not shown) is formed on the substrate 1101 on the side of the element formation region 1122b in a direction perpendicular to the optical waveguide direction of the optical waveguide, and is connected to the optical modulator 1125 via an electrode lead portion (not shown). And an electrode pad portion (not shown) to be connected. The electrode lead-out portion is connected to an electrode (not shown) formed on the side portion of the light receiver 1123, and the electrode lead-out portion 1107 is connected to an electrode (not shown) formed on the side portion of the optical modulator 1125. doing. These configurations are the same as those in the second embodiment described above.

  In the present embodiment, the groove portion in which the insulating material similar to that of the lower cladding layer 1102 is filled in the side portions of the element formation regions 1122a and 1122b in the direction perpendicular to the optical waveguide direction of the optical waveguide made of the waveguide core 1103. Is provided. An electrode lead portion 1105 and an electrode lead portion 1107 are disposed on the groove portion.

  In the present embodiment, an LSI chip (electronic element) 1132 and an LSI chip (electronic element) 1152 are mounted on the upper clad layer 1104. The LSI chip 1132 is connected to the electrode pad (not shown) of the light receiver 1123 by the electric wiring 1131, and the LSI chip 1152 is connected to the electrode pad (not shown) of the optical modulator 1125 by the electric wiring 1151. The electrical wiring 1131 and the electrical wiring 1151 are provided in through vias formed in the upper cladding layer 1104. Note that the electrical wiring 1131 and the electrical wiring 1151 are arranged at positions different from the cross section shown in FIG.

  In this way, information transmission between a plurality of LSI chips can be performed via an optical waveguide (optical wiring) including the waveguide core 1103. Further, the number of LSI chips is not limited to two. By constructing an optical network by combining optical switches or the like, information transmission between three or more LSI chips can be efficiently performed using an optical waveguide.

[Embodiment 8]
Next, an eighth embodiment of the present invention will be described. FIG. 12 is a cross-sectional view showing the configuration of the semiconductor optical wiring device according to the eighth embodiment of the present invention. In FIG. 12, each configuration is shown in a simplified manner. In this semiconductor optical wiring device, the LSI chip 1132 (FIG. 11) in the above-described embodiment is used as a stacked memory 1132a. Other configurations are the same as those of the seventh embodiment described above.

  According to the present embodiment, information transmission between the LSI chip 1152 and the stacked memory 1132a can be performed via the optical waveguide (optical wiring) including the waveguide core 1103. Further, the number of LSI chips and stacked memories is not limited to one each. By constructing an optical network by combining optical switches and the like, information transmission between a plurality of LSI chips and stacked memories can be efficiently performed using an optical waveguide.

[Embodiment 9]
Next, a ninth embodiment of the present invention will be described. FIG. 13 is a cross-sectional view showing the configuration of the semiconductor optical wiring device according to the ninth embodiment of the present invention. In FIG. 13, each configuration is shown in a simplified manner. In this semiconductor optical interconnection device, the stacked memory 1132a and the stacked memory 1152a are stacked on the LSI chip 1132 and the LSI chip 1152 in the seventh embodiment. Other configurations are the same as those of the seventh embodiment described above.

  According to the present embodiment, information transmission between the LSI chips can be performed via the optical waveguide (optical wiring) including the waveguide core 1103. Further, the number of LSI chips and stacked memories is not limited to two each. By constructing an optical network by combining optical switches and the like, information transmission between a plurality of LSI chips and stacked memories can be efficiently performed using an optical waveguide.

[Embodiment 10]
Next, an embodiment 10 of the invention will be described. FIG. 14 is a cross-sectional view showing the configuration of the semiconductor optical wiring device according to the tenth embodiment of the present invention. In FIG. 14, each configuration is shown in a simplified manner. In this semiconductor optical interconnection device, first, an optical waveguide region 1421 provided on a substrate 1401 made of silicon, and element formation regions 1422a and 1422b provided on the substrate 1401 connected to the optical waveguide region 1421 are provided. Prepare.

  In addition, the semiconductor optical wiring device according to the present embodiment includes a light receiving layer 1423 formed in the element formation region 1422a by including a semiconductor layer formed by epitaxial growth on silicon in the element formation region 1422a as a light absorption layer, and an element formation region. An optical modulator 1425 formed in the element formation region 1422b with a semiconductor layer formed by epitaxial growth on silicon 1422b as a light absorption layer, a groove 1401a formed in the optical waveguide region 1421, and a groove 1401a filled Lower clad layer 1402 formed, waveguide core 1403 formed on lower clad layer 1402 and optically connected to light receiver 1423 and optical modulator 1425, and upper clad layer formed on waveguide core 1403 1404. The waveguide core 1403 is arranged at a position different from the cross section shown in FIG. As shown in FIG. 14, incident light is introduced from the end of the waveguide core 1403.

  Note that the substrate 1401 on the side of the element formation region 1422a in the direction perpendicular to the optical waveguide direction of the optical waveguide composed of each waveguide core 1403 is connected to the light receiver 1423 via an electrode lead-out portion (not shown). An electrode pad portion (not shown) is formed on the substrate 1401 on the side of the element formation region 1422b in a direction perpendicular to the optical waveguide direction of the optical waveguide, and is connected to the optical modulator 1425 via an electrode lead portion (not shown). And an electrode pad portion (not shown) to be connected. The electrode lead-out portion is connected to an electrode (not shown) formed on the side portion of the light receiver 1423, and the electrode lead-out portion 1407 is connected to an electrode (not shown) formed on the side portion of the optical modulator 1425. doing. These configurations are the same as those in the second embodiment described above.

  In this embodiment, a transimpedance amplifier circuit 1409 and an optical modulator driver circuit 1410 are provided at the bottom of the groove 1401a formed in the optical waveguide region 1421.

  The transimpedance amplifier circuit 1409 is connected to the light receiver 1423 through a wiring 1409a. In addition, the transimpedance amplifier circuit 1409 is connected to the LSI chip 1432 mounted on the upper cladding layer 1404 by an electrical wiring 1431 that penetrates the lower cladding layer 1402 and the upper cladding layer 1404.

  The optical modulator driver circuit 1410 is connected to the optical modulator 1425 through a wiring 1410a. The optical modulator driver circuit 1410 is connected to an LSI chip 1452 mounted on the upper clad layer 1404 by an electrical wiring 1451 that penetrates the lower clad layer 1402 and the upper clad layer 1404.

  The optical modulator 1425 is driven by the electrical signal sent from the LSI chip 1452 to the optical modulator driver circuit 1410 via the electrical wiring 1451, and the sent electrical signal is converted into an optical signal. In addition, the optical signal is converted into an electrical signal in the light receiver 1423, and the electrical signal amplified by the transimpedance amplifier circuit 1409 is sent to the LSI chip 1432 as a transmission partner via the electrical wiring 1431.

  In this way, information transmission between a plurality of LSI chips can be performed via an optical waveguide (optical wiring) including the waveguide core 1403. Further, since the electronic circuit is integrated at the bottom of the groove 1401a, the substrate surface area can be used effectively, and higher density photoelectric integration can be achieved. Various types of electronic circuits can be integrated, and passive elements such as capacitors, inductors, and resistors can be integrated, as well as the optical element driving circuits described above. Since the electronic circuit is sufficiently thin as compared with the layer thickness of the lower cladding layer 1402, the electronic circuit can be integrated without interfering with each other. Needless to say, electronic circuits can also be integrated on the surface of the substrate 1401 where grooves are not formed.

[Embodiment 11]
Next, an eleventh embodiment of the present invention will be described. FIG. 15 is a cross-sectional view showing the configuration of the semiconductor optical wiring device according to the eleventh embodiment of the present invention. In FIG. 15, each configuration is shown in a simplified manner. In this semiconductor optical wiring device, the stray light absorption layer 1501 is provided on the semiconductor optical wiring device of the seventh embodiment described above. The stray light absorption layer 1501 can be made of amorphous Ge, for example. Other configurations are the same as those of the seventh embodiment described above.

  In a semiconductor optical wiring device, light reflection or scattering may occur due to surface roughness of the optical waveguide or impedance mismatch between the optical waveguide and the optical element. If these become stray light and enter the LSI chip 1132, for example, the electronic circuit of the LSI chip 1132 may malfunction. On the other hand, malfunction can be prevented by providing the stray light absorption layer 1501 that absorbs the stray light described above. The stray light absorbing layer 1501 only needs to be made of a material having a sufficient absorption coefficient at the wavelength of the optical signal used. For example, it is particularly preferable to use amorphous Ge or polycrystalline Ge that has good compatibility with the Si process, is relatively easy to manufacture, and provides a sufficient light absorption coefficient.

It should be noted that the present invention is not limited to the embodiment described above, and that many modifications can be implemented by those having ordinary knowledge in the art within the technical idea of the present invention. It is obvious. For example, the upper clad layer is not limited to a solid material such as SiO ₂ , SiN _x , and SiON. For example, the upper clad layer may be in a gas or vacuum state such as air, or may be composed of a liquid. Good.

  DESCRIPTION OF SYMBOLS 101 ... Board | substrate, 101a ... Groove part, 102 ... Lower clad layer, 103 ... Core, 104 ... Upper clad layer, 106 ... Electrode pad part, 121 ... Optical waveguide area, 122 ... Element formation area, 123 ... Optical element, 124 ... Groove part .

Claims (7)

An optical waveguide region provided on a substrate made of silicon;
An element forming region provided on the substrate connected to the optical waveguide region;
An optical element formed in the element formation region with a semiconductor layer formed by epitaxial growth on silicon in the element formation region as a light absorption layer;
A groove formed in the optical waveguide region;
A lower clad layer made of an insulating material filled in the groove, and
A core formed on the lower cladding layer and optically connected to the optical element;
An upper cladding layer formed on the core;
An electrode pad portion formed on the substrate at a side of the element formation region in a direction perpendicular to the optical waveguide direction of the optical waveguide made of the core, and connected to the optical element via an electrode lead portion. ,
The lower cladding layer has a layer thickness in a range where light propagating through the optical waveguide made of the core does not leak into the substrate ,
The semiconductor optical wiring, wherein the electrode lead portion is disposed on a groove portion filled with the insulating material at a side portion of the element forming region in a direction perpendicular to the optical waveguide direction of the optical waveguide apparatus The semiconductor optical wiring device according to claim 1,
A semiconductor optical wiring device comprising an inclined structure provided in an optical coupling portion between the core and the optical element. The semiconductor optical wiring device according to claim 1 or 2,
A semiconductor optical wiring device comprising: an electronic circuit disposed at the bottom of the groove portion and connected to the optical element through the electrode pad portion . In the semiconductor optical wiring device according to any one of claims 1 to 3,
A semiconductor optical wiring device comprising: an electronic element disposed on the upper clad layer and connected to the optical element through the electrode pad portion . In the semiconductor optical wiring device according to any one of claims 1 to 4,
A semiconductor optical wiring device, comprising: a stray light absorbing layer that is disposed on the upper clad layer on the core and absorbs light leaking into the upper clad layer. In the semiconductor optical wiring device according to any one of claims 1 to 5,
A semiconductor optical wiring device, wherein the optical element is a light receiver. The semiconductor optical wiring device according to claim 6,
A semiconductor optical wiring device comprising an optical modulator as the optical element in addition to the optical receiver, wherein the optical receiver and the optical modulator are formed in different element formation regions.

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