JP5426315B2 - ZnO-based compound semiconductor device - Google Patents

Description

  The present invention relates to a ZnO-based compound semiconductor device, and more particularly to a ZnO-based semiconductor light emitting device.

  Zinc oxide (ZnO) is a direct transition type semiconductor having a band gap energy of 3.37 eV at room temperature, and the exciton binding energy is 60 meV, which is relatively large compared to other semiconductors. In addition, since the raw materials are inexpensive and harmless to the environment and the human body, it is expected to realize a light-emitting element with high efficiency, low power consumption, and excellent environmental characteristics.

  A light emitting device such as an LED requires a p-type layer and an n-type layer. As a dopant for producing an n-type with a ZnO-based compound semiconductor, a group III atom or an O site that substitutes a Zn site is used. VII atoms are considered, and many n-type conductivity controls using group III atoms such as Ga and Al have been reported.

For example, Patent Document 1 proposes a method for producing a ZnO-based transparent conductive film ZnO: Al, ZnO: Ga doped with a group III atom. Further, according to Non-Patent Document 1, it is reported that Ga concentration and carrier concentration in a single crystal ZnO film are sufficiently controllable in the range of 10 ¹⁷ to 10 ²⁰ cm ⁻³ .

  By the way, when manufacturing light emitting elements, such as LED, if a dopant diffuses into other than a desired layer, element characteristics will fall remarkably. In the case of a GaAs-based semiconductor optical device, diffusion of p-type dopants into the active layer is a problem. For example, an n-type diffusion stopper layer is provided between the p-type cladding layer and the active layer. A method of suppressing the diffusion of the p-type dopant by providing it is disclosed (for example, see Patent Document 2). Patent Document 3 discloses a method of suppressing the diffusion of a p-type dopant by forming the p-type layer from at least two layers doped with different dopants.

  Thus, in the case of a GaAs-based semiconductor light emitting device, several methods for preventing dopant diffusion are shown.

  On the other hand, with respect to ZnO-based compound semiconductors, there are almost no reports on dopant diffusion, and the present inventor has found that Ga, which is an n-type dopant, diffuses in a semiconductor element.

  FIG. 7 is a cross-sectional view showing an example of a ZnO-based LED element structure according to a conventional manufacturing method.

  A general LED includes an n-type semiconductor layer, an active layer, and a p-type semiconductor layer in an element. In this conventional technique, the n-type semiconductor layer of a ZnO-based LED is doped with Ga atoms as a dopant.

  As a comparative example, the inventors actually manufactured a ZnO-based LED element shown in FIG. 7 using a conventional manufacturing method.

  First, an undoped ZnO buffer layer (buffer layer) 2 was formed on the cleaned + c ZnO substrate 1. The film was grown at 300 ° C. with a thickness of about 300 mm. Next, annealing was performed to improve the quality of the buffer layer (buffer layer) 2. The annealing temperature was 900 ° C. and the annealing time was 20 minutes.

Next, the n-type semiconductor layer 3 was formed on the surface of the buffer layer (buffer layer) 2. The n-type semiconductor layer is Ga-doped Mg _0.2 Zn _0.8 O, and the Ga concentration is about 1.5 × 10 18 cm ⁻³ . The growth temperature was 900 ° C.

Thereafter, an undoped ZnO active layer 4 was formed on the surface of the n-type semiconductor layer 3. The growth temperature was 900 ° C. A p-type semiconductor layer (N-doped Mg _0.2 Zn _0.8 O) doped with nitrogen (N) was formed on the surface of the active layer 3. The growth temperature was 650 ° C.

  Subsequent to the layer formation (film formation) step, an electrode was produced. An n-type electrode (for example, a 3000 to 5000 mm aluminum layer on a 20 to 100 mm thick titanium layer) 8 is formed on the surface of the substrate 1, and a p type translucent electrode (for example, 5 mm thick) is formed on the surface of the p type semiconductor layer. A nickel layer having a thickness of ˜50 mm, a gold layer having a thickness of 10 to 200 mm formed on the surface thereof, and a bonding pad electrode (for example, a nickel layer having a thickness of 1000 mm and a thickness on the p-type translucent electrode 6) 10000 gold) 7 is produced. In the step of forming the electrode, for example, a lithography technique using a resist film or the like is used.

  Thereafter, an electrode alloying process is performed in an oxidizing gas atmosphere at 300 to 800 ° C., for example. The alloy processing time is, for example, about 30 seconds to 10 minutes. As described above, a ZnO-based compound semiconductor light emitting device (ZnO-based LED) was manufactured.

Japanese Patent No. 3040373 JP-A-9-260776 JP 2006-19695 A

Applied Physics Society 120th Crystal Engineering Subcommittee Meeting (2004) p. 27-34

  FIG. 8 is a graph showing a profile in the depth direction of the N concentration and the Ga concentration of a ZnO-based LED manufactured by the conventional method as shown in FIG. This figure is based on a SIMS (Secondary Ion-microprobe Mass Spectrometer) analysis.

  According to this, Ga doped in the n-type semiconductor layer 3 is diffused into the active layer 4 and the p-type semiconductor layer 5. In such a case, the crystal quality of the active layer 4 is deteriorated and as a result, the luminous efficiency is lowered. Further, the diffusion of Ga into the p-type semiconductor layer 5 makes it difficult to control the conductivity of the p-type semiconductor layer 5, and a high-output and highly reliable semiconductor light-emitting element cannot be manufactured.

  FIG. 9 is a graph showing an example of current-voltage characteristics of the ZnO-based LED whose SIMS analysis results are shown in FIG.

  The vertical axis is 2 mA / 1 memory, and the horizontal axis is 2 V / 1 memory. When a pn junction is made of a ZnO-based material, the threshold voltage in the current-voltage characteristics should be about 3 V, but the ZnO-based LED in the above figure is about 1 V, which is It shows that the characteristic is a Schottky. This is considered to be because the element characteristics of the LED are remarkably deteriorated because the dopant Ga diffuses from the n-type semiconductor layer 3 to the p-type semiconductor layer 5. For this reason, no light emission is observed from the ZnO-based LED fabricated by the conventional method.

  An object of the present invention is to prevent the crystal quality of the active layer of the ZnO-based compound semiconductor element from being deteriorated by the diffusion of the n-type dopant.

  Another object of the present invention is to prevent the conductivity of the p-type semiconductor layer of the ZnO-based compound semiconductor element from being deteriorated by the diffusion of the n-type dopant.

According to one aspect of the present invention, ZnO based compound semiconductor device includes an n-type semiconductor layer group III element is doped, and p-type semiconductor layer formed above the n-type semiconductor layer, the n-type semiconductor an active layer formed between the the layer p-type semiconductor layer, is formed between the n-type semiconductor layer and the active layer, and nitrogen possess a doped n-type diffusion preventing layer, Nitrogen in the n-type diffusion prevention layer is doped with at least 1 × 10 ²⁰ cm ⁻³ or more .

  According to the present invention, the crystal quality of the active layer of the ZnO-based compound semiconductor element can be prevented from being deteriorated by the diffusion of the n-type dopant.

  Moreover, according to this invention, it can prevent that the conductivity of the p-type semiconductor layer of a ZnO type compound semiconductor element deteriorates by the diffusion of an n-type dopant.

It is the schematic of the manufacturing apparatus of a ZnO type compound semiconductor. It is a schematic sectional drawing for demonstrating the element structure and manufacturing method of the ZnO type compound semiconductor element (ZnO type LED) by the Example of this invention. It is a graph which shows the profile of the depth direction of N density | concentration and Ga density | concentration of the ZnO-type LED element structure which introduce | transduced the diffusion prevention layer. It is a graph showing the CV measurement result of the N-doped MgZnO single film produced on the same conditions as the diffusion prevention layer 9 of the sample 3 of the semiconductor light-emitting device by the Example of this invention. It is a graph showing the current-voltage characteristic of ZnO-type LED (sample 3) which introduce | transduced the diffusion prevention layer 9 by the Example of this invention. FIG. 8 is an EL spectrum of a ZnO-based LED shown in FIG. 7 manufactured in a conventional example and a ZnO-based LED into which a diffusion prevention layer 9 according to an example (sample 3) of the present invention shown in FIG. 1 is introduced. It is sectional drawing which shows an example of the ZnO type LED element structure by the conventional preparation methods. It is a graph which shows the profile of the depth direction of N density | concentration and Ga density | concentration of ZnO type LED produced by the conventional method like FIG. It is a graph which shows an example of the current-voltage characteristic of ZnO type LED which showed the SIMS analysis result in FIG.

  FIG. 1 is a schematic view of a ZnO-based compound semiconductor manufacturing apparatus.

  As a method of manufacturing a ZnO-based compound semiconductor, for example, an oxygen radical beam radicalized in an electrodeless discharge tube using a high frequency of 13.56 MHz and a zinc beam from a K cell are heated to a growth temperature. There is a molecular beam epitaxy (MBE) method in which a substrate that is simultaneously irradiated is irradiated with ZnO on the substrate.

  A substrate heater 16 is disposed in the ultra-high vacuum container 11, and the substrate 17 is held by the substrate heater 16. The ultra-high vacuum container 11 includes a zinc (Zn) source gun 14, an oxygen (O) radical source gun 15, a magnesium (Mg) source gun 18, a nitrogen (N) radical source gun 19, and a gallium (Ga) source gun 20. Is provided. The zinc source gun 14, the magnesium source gun 18, and the gallium source gun 20 each include a Knudsen cell that contains solid sources of Zn, Mg, and Ga, and emit a zinc beam, a magnesium beam, and a gallium beam, respectively. .

  The oxygen radical source gun 15 and the nitrogen radical source gun 19 each include an electrodeless discharge tube that uses a high frequency (for example, 13.56 MHz). The oxygen radical source gun 15 and the nitrogen radical source gun 19 radicalize oxygen gas and nitrogen gas in an electrodeless discharger, respectively, and emit an oxygen radical beam and a nitrogen radical beam. By supplying a desired beam on the substrate 8 at a desired timing, a ZnO-based compound semiconductor layer having a desired composition can be grown.

  The ultra-high vacuum vessel 11 is also provided with a reflection high-energy electron diffraction (RHEED) gun 12 and a screen 13 for displaying a RHEED diffraction image. From the RHEED diffraction image, the crystallinity of the ZnO-based compound semiconductor layer formed on the substrate 17 can be evaluated. When the ZnO-based compound semiconductor layer is a single crystal having a flat surface (two-dimensionally grown), the RHEED diffraction image shows a streak pattern, and is a single crystal having a non-flat surface (three-dimensionally grown) Shows a spot pattern in the RHEED diffraction image. When the ZnO-based compound semiconductor layer is polycrystalline, the RHEED diffraction image shows a ring pattern.

  When growing an n-type layer in a ZnO-based compound semiconductor device, a radicalized oxygen radical beam, a zinc beam from a K cell, and a gallium beam are simultaneously irradiated onto the substrate 1 that has been heated to the growth temperature. .

  In addition, when a hole carrier injection layer (p-type layer), a cladding layer, or the like is grown in manufacturing a ZnO-based compound semiconductor light emitting device, for example, a nitrogen radical beam gun 19 obtained by radicalizing nitrogen gas, magnesium, etc. A desired layer is laminated with a desired composition using a magnesium gun 18 that emits a (Mg) beam.

As a substrate used for manufacturing a ZnO-based compound semiconductor, a zinc oxide substrate (ZnO), a sapphire substrate (Al ₂ O ₃ ), a silicon carbide substrate (SiC), a gallium nitride substrate (GaN), a hexagonal Mg _x Zn ₁ There are a −xO substrate (0 <x ≦ 0.5), a cubic Mg _x Zn ₁ -xO substrate (0.5 <x ≦ 1), a Si substrate, and the like. In order to obtain a zinc oxide (ZnO) layer having good crystallinity, a substrate having a smaller lattice mismatch is better, and a zinc oxide (ZnO) substrate is particularly preferable. In the case of manufacturing a light emitting element, Mg _x Zn ₁ -xO, which has a larger band gap than ZnO, prevents the substrate from absorbing the emitted light from the active layer and reducing the extraction efficiency of the emitted light from the element. It is also preferable to use a substrate (0 <x ≦ 1).

  As the substrate, various surfaces such as a + c plane, a −c plane, an a plane, and an m plane can be used, and a ZnO-based compound semiconductor layer can be grown thereon. Furthermore, for example, for the + c plane substrate, various substrates having an off angle in the m direction or the a direction can be used. Alternatively, a template in which an MgZnO, ZnO, or GaN film of 1 μm or more is formed on the substrate may be used.

  FIG. 2 is a schematic cross-sectional view for explaining a device structure and a manufacturing method of a ZnO-based compound semiconductor device (ZnO-based LED) according to an embodiment of the present invention.

  The device structure and the ZnO-based compound semiconductor film according to the embodiment of the present invention are produced by, for example, the molecular beam epitaxy (MBE) method shown in FIG. In addition to the MBE method, for example, a known epitaxial growth method such as PLD (Pulsed Laser Deposition) or MOVPE (Metal Organic Vapor Phase Epitaxy) can also be used.

  First, a buffer layer (buffer layer) 2 is formed on the cleaned + c ZnO substrate 1. The thickness is preferably about 100 to 300 mm and grown at 200 to 400 ° C. Thereafter, annealing is performed to improve the quality of the buffer layer (buffer layer) 2. The annealing temperature is 500 ° C. to 1000 ° C., and the annealing time is 3 minutes to 30 minutes.

Next, an n-type semiconductor layer 3 doped with gallium or aluminum is formed on the surface of the buffer layer (buffer layer) 2. The thickness is 100 to 10000 and the concentration of the n-type dopant is 5 × 10 ¹⁷ cm ⁻³ or more. The growth temperature is 800-1000 ° C.

On the surface of the n-type semiconductor layer 3, a diffusion preventing layer 9 for preventing the diffusion of the n-type dopant is formed. The diffusion preventing layer 9 will be described in detail later. On the surface of the diffusion prevention layer 9, an undoped Mg _y Zn _1-y O (0 ≦ y ≦ 0.6) active layer 4 is formed. The active layer 4 may be a single layer or may have a quantum well structure using, for example, MgZnO and ZnO. The growth temperature is 500 ° C to 1000 ° C.

The active layer 4 must have a particularly high crystal quality. When the growth temperature is lower than 500 ° C., high-quality Mg _y Zn _1-y O (0 ≦ y <1) with high crystallinity is grown. If the growth temperature is higher than 1000 ° C., the Zn element is re-evaporated from the substrate, and the growth rate is significantly reduced.

A p-type semiconductor layer (Mg _z Zn _1-z O (0 ≦ z ≦ 0.6)) 5 doped with nitrogen (N) is formed on the surface of the active layer 4. The thickness is 50 to 2000 mm, and the density of nitrogen (N) is 1 × 10 ¹⁸ cm ⁻³ or more. The growth is performed at a growth temperature of 300 to 800 ° C.

The nitrogen (N) concentration in the p-type semiconductor layer 5 is required to be at least 1 × 10 ¹⁶ cm ⁻³ or more as a hole carrier density when a light emitting device such as an LED is manufactured. ZnO and N element doped as an acceptor in ZnMgO have a low activation rate, and effective hole carriers cannot be obtained unless doping is performed at 1 × 10 ¹⁸ cm ⁻³ or more. In addition, if the concentration of N is more than 5 × 10 ²⁰ cm ⁻³ , many defects are generated in the p-type ZnMgO layer and the p-type ZnO film, causing a leak when a current is passed through the device. It may become. Therefore, the concentration of N is preferably in the range of 1 × 10 ¹⁸ cm ^{−3 to} 5 × 10 ²⁰ cm ⁻³ . More preferably, in the range of ^{1 × 10 19 cm -3 ~3 ×} 10 20 cm -3.

  In addition, the p-type semiconductor layer 5 can also use P and As which are V group elements as a p-type dopant instead of nitrogen (N). In addition, a group I element such as Li, Na, Cu, or Ag can be used as the p-type dopant instead of the group V element. Further, a combination of these may be used to simultaneously dope two or more elements such as N and P.

The N element substitutes a part of the O site of ZnO to become an acceptor, but among the various group V elements, N has a close ionic radius with O and is stably substituted. What is used for doping N may be various sources such as N ₂ , N ₂ O, NO, N ₂ + O ₂ , and NH ₃ as long as they contain N element.

  Subsequent to the layer formation (film formation) step, an electrode was produced. An n-type electrode (for example, a 3000 to 5000 mm aluminum layer on a 20 to 100 mm thick titanium layer) 8 is formed on the surface of the substrate 1, and a p type translucent electrode (for example, 5 mm thick) is formed on the surface of the p type semiconductor layer. A nickel layer having a thickness of ˜50 mm, a gold layer having a thickness of 10 to 200 mm formed on the surface thereof, and a bonding pad electrode (for example, a nickel layer having a thickness of 1000 mm and a thickness on the p-type translucent electrode 6) 10000 gold) 7 is produced. In the step of forming the electrode, for example, a lithography technique using a resist film or the like is used.

  Thereafter, an electrode alloying process is performed in an oxidizing gas atmosphere at 300 to 800 ° C., for example. The alloy processing time is, for example, about 30 seconds to 10 minutes. As described above, a ZnO-based compound semiconductor light-emitting element (ZnO-based LED) is manufactured.

In addition, although the + c plane ZnO substrate (n-type conductivity) was used for the manufacturing example of the light emitting device according to this example, when an insulating substrate such as sapphire (Al ₂ O ₃ ) is used, an electrode is used. Since it cannot be fabricated on the top and bottom of the device, a part of the process for fabricating the light emitting device, such as using the dry etching method to expose the n-type semiconductor layer 3 to the upper surface and fabricating the n-type electrode 8 on the upper surface. Different.

  When a semiconductor light emitting device is manufactured using a ZnO substrate doped with a group III element such as Ga or Al, the n-type semiconductor layer 3 is omitted because the substrate itself serves as an electron injection layer. Is also possible. Even in that case, the diffusion of the dopant from the substrate 1 can be suppressed by using the diffusion preventing layer 9 of this embodiment. Furthermore, if the diffusion prevention layer 9 is inserted between the n-type semiconductor layer 3 / substrate 1 doped with the n-type dopant and the active layer 4, the n-type semiconductor layer 3 / substrate 1 doped with the n-type dopant. And the diffusion prevention layer 9 does not need to be adjacent.

  The inventors actually manufactured three types of semiconductor light emitting devices of Samples 1 to 3 by the method of manufacturing the ZnO-based compound semiconductor according to the above-described example. Hereinafter, each production condition of Samples 1 to 3 will be described.

  First, sample 1 will be described. An undoped ZnO buffer layer (buffer layer) 2 was formed on the cleaned + c ZnO substrate 1. The thickness was approximately 300 mm and the film was grown at 300 ° C. Thereafter, annealing was performed to improve the quality of the undoped ZnO buffer layer (buffer layer) 2. The annealing temperature was 900 ° C. and the annealing time was 20 minutes.

Subsequently, an n-type semiconductor layer 3 was formed on the surface of the buffer layer (buffer layer) 2. The n-type semiconductor layer 3 was Ga-doped ZnO, the Ga concentration was about 2.0 × 10 ¹⁸ cm ⁻³ , and the growth temperature was 950 ° C.

Next, an N-doped ZnO diffusion prevention layer 9 for preventing the diffusion of the n-type dopant was formed on the surface of the n-type semiconductor layer 3. The growth temperature was 900 ° C., Zn beam flux = 3.0 Å / s, O ₂ flow rate 1 sccm / RF power 250 W, and N ₂ flow rate 1 sccm / RF power 140 W.

Subsequently, an undoped ZnO active layer 4 was formed on the surface of the diffusion preventing layer 9. The growth temperature is 900 ° C. Thereafter, a p-type semiconductor layer (N-doped MgZnO (Mg composition 0.2)) 5 doped with nitrogen (N) was formed on the surface of the active layer 4. Growth temperature 700 ° C., Zn beam flux = 1.0 Å / s, Mg beam flux = 0.2 Å / s, O ₂ flow rate: ₂ sccm / RF power: 300 W, N ₂ flow rate: 1 sccm / RF power: 120 W, approximately 50 nm Laminated.

  Next, sample 2 will be described. The buffer layer (buffer layer) 2, the active layer 4, and the p-type semiconductor layer 5 were formed in the same manner as in the sample 1.

An n-type semiconductor layer 3 was formed on the surface of the buffer layer (buffer layer) 2. The n-type semiconductor layer 3 was Ga-doped MgZnO (Mg composition 0.2), the Ga concentration was about 2.0 × 10 ¹⁸ cm ⁻³ , and the growth temperature was 950 ° C.

Unlike the sample 1, the N-doped MgZnO diffusion prevention layer 9 for preventing the diffusion of the n-type dopant has a growth temperature of 950 ° C., Zn beam flux = 3.0 Å / s, Mg beam flux = 0.1 Å / s, O ₂ flow rate 1 sccm / RF power 250 W, N ₂ flow rate 1 sccm / RF power 140 W, about 50 nm was laminated.

  Next, sample 3 will be described. The buffer layer (buffer layer) 2 and the active layer 4 were formed in the same manner as Samples 1 and 2.

An n-type semiconductor layer 3 was formed on the surface of the buffer layer (buffer layer) 2. The n-type semiconductor layer 3 was Ga-doped ZnO (Mg composition 0.19), the Ga concentration was about 2.0 × 10 ¹⁸ cm ⁻³ , and the growth temperature was 950 ° C.

The N-doped MgZnO diffusion prevention layer 9 for preventing the diffusion of the n-type dopant is different from the samples 1 and 2 in that the growth temperature is 950 ° C., the Zn beam flux = 3.0 Å / s, the Mg beam flux = 0.2 Å / s, O ₂ flow rate ₂ sccm / RF power 300 W, N ₂ flow rate 1 sccm / RF power 120 W, about 50 nm was laminated.

A p-type semiconductor layer doped with nitrogen (N) (N-doped MgZnO 2 (Mg composition 0.2)) was formed on the surface of the active layer. The layers were stacked at a growth temperature of 650 ° C., Zn beam flux = 1.0 Å / s, Mg beam flux = 0.2 Å / s, O ₂ flow rate ₂ sccm / RF power 300 W, N ₂ flow rate 1 sccm / RF power 120 W, and a thickness of about 50 nm.

  In any of the above samples 1 to 3, following the layer formation (film formation) step, an electrode was produced as described with reference to FIG. As described above, ZnO-based LED samples 1 to 3 were manufactured.

All of the diffusion prevention layers 9 formed as Samples 1 to 3 exhibit n-type conductivity. N element becomes an acceptor when the O site of ZnO is substituted, but is incorporated in the form of N ₂ molecule or the like depending on the growth conditions. In this case, since the N ₂ molecule in ZnO behaves as a double donor, as a result, N-doped Mg _w Zn _1-w O (0 ≦ w <1) exhibits n-type conductivity. Therefore, the N-doped MgZnO diffusion prevention layer 9 used in this example exhibits n-type conductivity.

  Here, the growth conditions of the diffusion preventing layer will be described.

  Zn flux strength is JZn, Mg flux strength JMg, and O radical flux strength is JO. Further, the coefficients (Zn and Mg adhesion coefficients) indicating the ease of adhesion of Zn and Mg to the O-terminated surface of the MgZnO crystal are kZn and kmg, and O easily adheres to the Zn and Mg-terminated surface of the MgZnO crystal. A coefficient (O adhesion coefficient) indicating the thickness is kO. At this time, kZnJZn, which is a product of Zn adhesion coefficient kZn and flux strength JZn, and MgMgJMg, which is a product of Mg adhesion coefficient kmg and flux strength JMg, is deposited on a unit area on the substrate per unit time. This corresponds to the number of atoms and Mg atoms. The product kOJO of the adhesion coefficient kO of O and the flux strength JO corresponds to the number of O atoms deposited per unit time on the unit area of the substrate. The ratio of the product kZnJZn + product kmgJMg and the product kOJO is defined as the II / VI flux ratio in the sense of the ratio of group II elements to group VI elements.

As growth conditions for the diffusion preventing layer 9 in the present invention, it is desirable that the II / VI flux ratio is II / VI ≧ 1 and the growth temperature is 800 ° C. or higher. This is presumably because the higher the growth temperature, the easier the N ₂ molecular double donor is generated by the thermal energy, and the N concentration in the film increases as the II / VI flux ratio increases.

Incidentally, those used in doping N into the diffusion preventing layer 9, as long as it contains an N _element, N _2, N 2 _O, NO, even using a variety of sources, such as N _{2 +} O _2, NH ₃ It doesn't matter.

  Table 1 below shows the N concentration and Mg composition of the diffusion prevention layer 9 for the prepared samples 1 to 3.

実施例にて作製したサンプル１〜３は、全てｎ型半導体層３からのｎ型ドーパントの拡散が拡散防止層９内で抑えられている。拡散防止層９へのＮは、１９乗オーダーでもその効果が確認できる。

In all of Samples 1 to 3 produced in the example, the diffusion of the n-type dopant from the n-type semiconductor layer 3 is suppressed in the diffusion prevention layer 9. The effect of N on the diffusion preventing layer 9 can be confirmed even on the order of 19th power.

Further, regarding the N concentration, it seems that the diffusion is effectively suppressed when the N concentration doped into the diffusion preventing layer 9 is large. That is, it is expected that the N concentration range is more preferably about 1 × 10 ²⁰ cm ⁻³ or more.

  FIG. 3 is a graph showing profiles in the depth direction of N concentration and Ga concentration of a ZnO-based LED element structure in which a diffusion preventing layer is introduced. This profile is a measurement result of the sample 3 described above. This profile is based on SIMS (Secondary Ion-microprobe Mass Spectrometer) analysis.

  According to the above profile, the diffusion of Ga doped in the n-type semiconductor layer into the active layer 4 and the p-type semiconductor layer 5 is suppressed by the diffusion preventing layer 9.

  By SIMS analysis, the diffusion of Ga from the n-type semiconductor layer 3 into the diffusion prevention layer 9 is measured to be about 20 nm. That is, if the thickness of the diffusion preventing layer 9 is about 20 nm, the effect of the embodiment is expected to be obtained. However, the distance at which the n-type dopant diffuses varies depending on the dopant concentration / crystal quality in the n-type semiconductor layer, and also the crystal quality / N concentration of the diffusion prevention layer.

FIG. 4 is a graph showing a CV measurement result of an N-doped MgZnO single film manufactured under the same conditions as the diffusion prevention layer 9 of the sample 3 of the semiconductor light emitting device according to the example of the present invention. The horizontal axis represents voltage, and the vertical axis represents 1 / C2. The unit of C is expressed using [nF / cm ² ].

When Nd was calculated from the slope of the graph by this measurement, it was confirmed that the diffusion prevention layer 9 in this example had an n-type impurity density of 1.5 × 10 ¹⁸ cm ⁻³ .

  FIG. 5 is a graph showing current-voltage characteristics of a ZnO-based LED (sample 3) into which the diffusion prevention layer 9 according to the embodiment of the present invention is introduced.

  The vertical axis is 1 mA and 2 mA, and the horizontal axis is 1 V and 2 V. The threshold voltage is about 3.3 V, and it can be seen that the threshold voltage is increased as compared with the current-voltage characteristics of the ZnO-based LED manufactured by the conventional method shown in FIG. This is presumably because the introduction of the diffusion prevention layer 9 prevents the conductivity of the p-type semiconductor layer from being deteriorated due to the diffusion of Ga.

  FIG. 6 is an EL spectrum of the ZnO-based LED shown in FIG. 7 manufactured in the conventional example and the ZnO-based LED into which the diffusion prevention layer 9 according to the embodiment of the present invention (sample 3) shown in FIG. 1 is introduced. The horizontal axis indicates the wavelength, and the vertical axis indicates the emission intensity.

  While the ZnO-based LED fabricated in the conventional example does not emit light, the ZnO-based LED fabricated according to the example of the present invention has an emission peak observed in the vicinity of 380 nm. This is considered to be light emission from the vicinity of the band edge of ZnO. This difference is considered to be because the introduction of the diffusion preventing layer 9 prevents the conductivity of the p-type semiconductor layer from being deteriorated due to the diffusion of Ga.

  As described above, according to the embodiment of the present invention, the (Mg) ZnO: N layer doped with N between the ZnO-based n-type layer 3 doped with the n-type dopant and the active layer 4 or the p-type layer 5. Is inserted as the diffusion preventing layer 9, the n-type dopant is limited to the (Mg) ZnO: N layer 9, and does not diffuse into the layer (the active layer 4 or the p-type layer 5).

  Therefore, since the crystal quality of the active layer is not deteriorated by the diffusion of the n-type dopant, a semiconductor light emitting device that does not reduce the light emission efficiency can be manufactured.

  Further, the conductivity of the p-type semiconductor layer can be prevented from being deteriorated by the diffusion of the n-type dopant.

  In the above-described embodiment, Ga is used as an n-type dopant for ZnO, but other group III elements such as Al and In can be used. The Al element has a smaller diffusion coefficient than the Ga element used as the n-type dopant in this example. That is, in the diffusion prevention layer 9, when the dopant of the n-type semiconductor layer 3 is Al, for example, the diffusion prevention layer 9 can be made thinner. On the other hand, the In element has a large diffusion coefficient, and in this case, it is considered that the diffusion cannot be suppressed unless the thickness of the diffusion preventing layer 9 is increased.

  In addition, various group VII elements are effective as n-type dopants for ZnO-based semiconductors, and the diffusion prevention layer 9 according to the embodiment of the present invention suppresses diffusion of dopants from the n-type semiconductor layer using group VII elements. The possibility of having a function is considered.

In addition to Mg _x Zn _1-x O, examples of the present invention include [Cd _a Zn _1-a O, Be _a Zn _1-a O, Ca _a Zn _1-a O (both 0 <a < 1)], [ZnO _1-b S _b , ZnO _1-b Se _b , ZnO _1-b Te _b (both 0 <b <1)], etc. It is applicable also to LED which has.

  In addition, the embodiment of the present invention includes a short wavelength (ultraviolet to blue wavelength) light emitting diode (LED) or a short wavelength laser diode (LD) and its application products such as indicators, It can be applied to an LED display or the like.

  Moreover, it is applicable also to white LED and its application products, for example, a lighting fixture, each indicator, a display, the backlight of each indicator. Also applicable to ZnO-based electrodes (for example, transparent conductive films) and their applied products, various electronic devices such as ZnO-based transistors and their applied products, ZnO-based sensors (for example, humidity sensors, ultraviolet sensors, etc.) and their applied products. It is.

  In addition to ZnO-based compound semiconductor light-emitting devices, various ZnO-based compound semiconductor devices that include ZnO-based semiconductor layers, such as transistors, transparent conductive films, piezoelectric elements, thermoelectric elements, and ultraviolet sensors. And applicable products of the semiconductor element.

  Although the present invention has been described with reference to the embodiments, the present invention is not limited thereto. It will be apparent to those skilled in the art that various modifications, improvements, combinations, and the like can be made.

DESCRIPTION OF SYMBOLS 1 ZnO substrate 2 Buffer layer 3 n-type semiconductor layer 4 Active layer 5 p-type semiconductor layer 6 p-type translucent electrode 7 Bonding pad electrode 8 n-type electrode 9 Diffusion prevention layer 11 Ultrahigh vacuum vessel 12 Reflection high-energy electron diffraction (RHEED) gun 13 Reflection high-energy electron diffraction (RHEED) screen 14 Zinc (Zn) source gun 15 Oxygen (O) radical source gun 16 Substrate heater 17 Substrate 18 Magnesium (Mg) source gun 19 Nitrogen (N) radical Source Gun 20 Gallium (Ga) Source Gun

Claims (8)

An n-type semiconductor layer doped with a group III element;
A p-type semiconductor layer formed above the n-type semiconductor layer ;
An active layer formed between the n-type semiconductor layer and the p-type semiconductor layer;
Wherein formed between the n-type semiconductor layer and the active layer, and have a n-type diffusion preventing layer which nitrogen is doped,
A ZnO-based compound semiconductor element doped with at least 1 × 10 ²⁰ cm ⁻³ or more of nitrogen in the n-type diffusion prevention layer . 2. The ZnO-based compound semiconductor device according to claim 1, wherein the group III element doped in the n-type semiconductor layer is one or more of Ga, Al, and In. 3. The ZnO-based compound semiconductor device according to claim 1, wherein the n-type diffusion prevention layer is made of nitrogen-doped Mg _x Zn _1-x O (0 ≦ x <1). 4. The ZnO-based compound semiconductor device according to claim 1, wherein the n-type diffusion prevention layer is formed of a semiconductor layer of 10 nm or more inserted between the n-type semiconductor layer and the active layer. 5. The ZnO-based compound semiconductor device according to claim 1, wherein the n-type semiconductor layer is composed of a Mg _x Zn _1-x O (0 ≦ x <1) layer doped with a group III element. The n-type semiconductor layer, the n-type diffusion prevention layer, the active layer, and the p-type semiconductor layer include a zinc oxide substrate (ZnO), a sapphire substrate (Al2O3), a silicon carbide substrate (SiC), and gallium nitride. 6. The ZnO-based compound according to claim 1, wherein the ZnO-based compound is laminated on any one of a substrate (GaN), a Mg _x Zn _1-x O substrate (0 <x ≦ 1), and a Si substrate. Semiconductor element. Preparing a substrate;
Forming an n-type layer consisting of at least two layers of an n-type semiconductor layer doped with a group III element and an n-type diffusion prevention layer doped with nitrogen, using the MBE method;
Using MBE method to form an active layer on the n-type diffusion barrier layer ;
Using MBE method, on the active layer, it has a forming a p-type semiconductor layer,
A method for producing a ZnO-based compound semiconductor element in which nitrogen in the n-type diffusion barrier layer is doped with at least 1 × 10 ²⁰ cm ⁻³ or more . The method for manufacturing a ZnO-based compound semiconductor element according to claim 7 , wherein a growth temperature in the step of forming the n-type layer is higher than a growth temperature in the step of forming the p-type semiconductor layer.

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