JP5370636B2 - Transistor active substrate, manufacturing method thereof, and electrophoretic display - Google Patents

Description

  The present invention relates to a transistor active substrate, a manufacturing method thereof, and an electrophoretic display.

  Conventionally, as a matrix type display, there are known a passive type display driven using scanning electrodes and data electrodes orthogonal to each other, and an active type display selecting a lighting pixel using a switching element such as a transistor and a storage element. ing. As an active type display, for example, a published patent publication (Patent Document 1) relating to an “organic EL display”, a published patent publication (Patent Document 2) relating to an “active element and a display device having the same”, an “organic active element and the same Disclosed in the published patent publication (Patent Document 3) relating to “display element having”, the published patent publication (Patent Document 4) relating to “ink for forming an organic semiconductor, organic semiconductor pattern forming method, electronic element and electronic element array”, and the like. is there. In the active display, an active element (switching element) is attached to each pixel in addition to a simple matrix driving structure. With such a configuration, the target pixel can be turned on and off, and it is used for displaying moving images that require high image quality and fast response speed.

  The transistor active substrate as described above includes a gate electrode, a source electrode, a drain electrode, and a semiconductor layer that are separated from each other around the gate electrode to define a channel region. As this semiconductor layer, amorphous silicon or polysilicon is used, but recently, an organic semiconductor has been applied.

  Since organic semiconductors can be formed at room temperature and normal pressure, the unit cost of the process can be reduced, and there is an advantage that it can be applied to a plastic substrate that is vulnerable to heat. However, such an organic semiconductor has weak chemical substance performance and plasma resistance, and has a disadvantage of characteristic deterioration due to oxygen, moisture or light in the atmosphere. In order to compensate for this, a thick organic film or inorganic film is provided as a protective layer after the organic semiconductor layer.

  For example, a protective layer is provided by applying a screen printing method to a paste obtained by dissolving a resin as disclosed in an open patent publication (Patent Document 5) relating to an “organic transistor active substrate” with an alcohol solvent. And there is something formed. In addition, there is one in which an organic insulating film such as parylene is formed as a protective film on an organic transistor as disclosed in an open patent publication (Patent Document 6) relating to “organic TFT element and manufacturing method thereof”.

  Problems of the conventional active display will be described with reference to FIGS. 1 and 2, reference numeral 101 denotes a gate electrode, reference numeral 102 denotes a source electrode, reference numeral 103 denotes a drain electrode, reference numeral 104 denotes a pixel electrode, reference numeral 105 denotes a scanning line, reference numeral 106 denotes a signal line, reference numeral 107 denotes a substrate, reference numeral 108 Denotes a gate insulating film, reference numeral 109 denotes an active layer, reference numeral 110 denotes an interlayer film, and reference numeral 111 denotes a through hole. When the pixel electrode 104 is manufactured as shown in FIG. 1, the drain electrode 103 and the pixel electrode 104 are formed on an interlayer film 110 (insulating paste film) provided as a protective layer of an organic semiconductor as shown in Patent Document 5. A through hole 111 as shown in FIG. 2 is formed so as to be conductive. However, it is highly possible that an organic solvent such as an alcohol solvent used in the insulating paste dissolves the underlying organic semiconductor (active layer 109) or the gate insulating film 108, and as a result, the interlayer film 110 that is a protective layer is manufactured. Immediately after that, there is a possibility of characteristic deterioration.

  Further, when a vapor deposition film such as a parylene film as shown in Patent Document 6 is provided as a protective layer, a through-hole portion is formed by a dry etching process or the like in order to establish conduction between the drain electrode and the pixel electrode as in Patent Document 7. Need to form. However, at this time, plasma damage may affect the organic semiconductor, and the transistor characteristics may be deteriorated.

JP 2003-255857 A JP 2003-318196 A JP 2004-241527 A JP 2005-64122 A JP 2007-103913 JP 2004-072049 A JP 06-194689

  An object of the present invention is to provide a transistor active substrate provided with a protective layer that protects the active layer and can sufficiently ensure electrical conduction between the drain electrode and the pixel electrode.

The above problems are solved by the following aspects (1) to (11) of the present invention.
(1) A first electrode is formed on a substrate, a first insulating film is formed on the first electrode, a second counter electrode is formed on the first insulating film, and the first electrode A transistor is formed by forming an active layer made of a semiconductor material on two counter electrodes and on the first insulating film, a second insulating film is deposited on the transistor, and the second insulating film is further formed. A transistor active substrate in which a third electrode electrically connected to one of the second counter electrodes is stacked above the film, the surface roughness of the second counter electrode being Ra ( M) A transistor active substrate, wherein D (I) ≦ Ra (M) × 15, where D (I) is the thickness of the second insulating film.

(2) A first electrode is formed on the substrate, a first insulating film is formed on the first electrode, a second counter electrode is formed on the first insulating film, and the first electrode A transistor is formed by forming an active layer made of a semiconductor material on two counter electrodes and on the first insulating film, a second insulating film is deposited on the transistor, and the second insulating film A third insulating film is deposited thereon, and is electrically connected to one of the second counter electrodes above the third insulating film via a through hole provided in the third insulating film. A transistor active substrate on which a third electrode taken is stacked, wherein the surface roughness of the active layer is Ra (S), the surface roughness of the second counter electrode is Ra (M), When the thickness of the second insulating film is D (I), Ra (S) × 15 ≦ D (I) ≦ Ra (M) × 15. Transistor active substrate having a butterfly.

  (3) A first electrode is formed on a substrate, a first insulating film is formed on the first electrode, an active layer made of a semiconductor material is formed on the first insulating film, A transistor is formed by forming a second counter electrode on the active layer, a second insulating film is deposited on the transistor, and the second counter electrode is formed above the second insulating film. A transistor active substrate in which a third electrode electrically connected to one side is stacked, wherein the surface roughness of the second counter electrode is Ra (M), and the thickness of the second insulating film A transistor active substrate, wherein D (I) ≦ Ra (M) × 15, where D (I) is the thickness.

  (4) A first electrode is formed on the substrate, a first insulating film is formed on the first electrode, an active layer made of a semiconductor material is formed on the first insulating film, A transistor is formed by forming a second counter electrode on the active layer, depositing a second insulating film on the transistor, depositing a third insulating film on the second insulating film, Further, a third electrode that is electrically connected to one of the second counter electrodes is laminated on the third insulating film through a through hole provided in the third insulating film. The surface roughness of the active layer is Ra (S), the surface roughness of the second counter electrode is Ra (M), and the thickness of the second insulating film is D ( I (I)) Ra (S) × 15 ≦ D (I) ≦ Ra (M) × 15 Breakfast board.

  (5) The second insulating film protects the active layer, and the second pair is formed with the second insulating film interposed between the second counter electrode and the third electrode. 5. The transistor active substrate according to any one of (1) to (4), wherein one of the electrodes is electrically connected to the third electrode.

  (6) The transistor active substrate according to any one of (1) to (5), wherein the active layer is made of an organic semiconductor material.

  (7) The transistor active substrate according to any one of (1) to (6), wherein the active layer is mainly composed of a pi-conjugated polymer material containing triarylamine.

  (8) The transistor active according to any one of (1) to (7), wherein the second insulating film is an organic film or an inorganic film formed by using a chemical vapor deposition method. substrate.

(9) forming a first electrode on the substrate; forming a first insulating film on the first electrode; forming a second counter electrode on the first insulating film; A transistor is formed by forming an active layer made of a semiconductor material on the two counter electrodes and the first insulating film, a second insulating film is deposited on the transistor, and the second insulating film is formed on the second insulating film. A third insulating film is deposited on the first insulating film, and is electrically connected to one of the second counter electrodes above the third insulating film via a through hole provided in the third insulating film. The surface roughness of the active layer is Ra (S), the surface roughness of the second counter electrode is Ra (M), and the thickness of the second insulating film is laminated. A method of manufacturing a transistor active substrate where Ra (S) × 15 ≦ D (I) ≦ Ra (M) × 15, where D (I) is
The first electrode and the second counter electrode are formed by an inkjet method,
The first insulating film is formed by coating;
The active layer is formed by an inkjet method,
A method for manufacturing a transistor active substrate, wherein the third electrode is formed by a screen printing method.

  (10) An electrophoretic display in which an electrophoretic display element is stacked on the transistor active substrate according to any one of (1) to (8), wherein the electrophoretic display element displays black and white by an electric field. An electrophoretic display, wherein a possible medium is encapsulated and disposed on the third electrode.

  (11) An electrophoretic display comprising an electrophoretic display element laminated on the transistor active substrate according to any one of (1) to (8), wherein the electrophoretic display element is the transistor active substrate. And a support substrate having a transparent electrode and a partition layer provided therebetween, and a space formed by filling a medium capable of monochrome display by an electric field. Electrophoretic display.

  According to the transistor active substrate of the present invention, the surface roughness Ra (M) of the second counter electrode (for example, source / drain electrode) and the thickness D (I) of the second insulating film (for example, protective film) Is set to D (I) ≦ Ra (M) × 15, thereby protecting the active layer and sufficiently ensuring electrical continuity between the second counter electrode and the third electrode (for example, pixel electrode). And good transistor characteristics can be obtained.

Hereinafter, embodiments of the present invention will be described in detail.
The layer structure of the transistor active substrate is shown in FIG. This transistor active substrate has a configuration in which a protective film 307 and a pixel electrode 308 are disposed on a thin film transistor including a substrate 301, a gate electrode 302, a gate insulating film 303, a source electrode 304, a drain electrode 305, and an active layer 306. . FIG. 4 shows a detailed view of a portion surrounded by a frame line in FIG. By increasing the surface roughness of the drain electrode 305, conduction can be established between the drain electrode 305 and the pixel electrode 308 even when the drain electrode 305 is covered with a protective film 307 as shown in FIG. It becomes.

  On the other hand, FIG. 5 shows a structure of a portion corresponding to FIG. 4 in a conventional transistor active substrate. In FIG. 5, reference numeral 501 denotes a drain electrode, reference numeral 502 denotes an active layer, reference numeral 503 denotes a protective film, and reference numeral 504 denotes a pixel electrode. As shown in FIG. 5, when the surface roughness of the drain electrode 501 is small or the protective film 503 is thick, if the drain electrode 501 is covered with the protective film 503, the space between the drain electrode 501 and the pixel electrode 504 is obtained. As a result, conduction cannot be obtained and sufficient transistor characteristics cannot be obtained.

  As another embodiment of the present invention, a layer structure of a transistor active substrate using an interlayer film is shown in FIG. This transistor active substrate includes a protective film 607, an interlayer film 608 having a through hole, and a pixel on a thin film transistor including a substrate 601, a gate electrode 602, a gate insulating film 603, a source electrode 604, a drain electrode 605, and an active layer 606. The electrode 609 is arranged. FIG. 7 shows a detailed view of a portion surrounded by a frame line in FIG.

  Similar to FIG. 4, by increasing the surface roughness of the drain electrode 605, even when the drain electrode 605 is covered with the protective film 607, the drain electrode 605 and the pixel electrode 609 extending to the lower end in the through hole It becomes possible to take continuity between. Further, if the surface roughness of the active layer 606 is small, the protective film 607 on the active layer 606 serves to prevent an organic solvent such as alcohol contained in the interlayer film 608 from penetrating into the active layer 606, and the active layer Problems such as dissolution of 606 can be suppressed.

  On the other hand, FIG. 8 shows a structure of a portion corresponding to FIG. 7 in a conventional transistor active substrate. In FIG. 8, reference numeral 801 denotes a drain electrode, reference numeral 802 denotes an active layer, reference numeral 803 denotes a protective film, reference numeral 804 denotes an interlayer film, and reference numeral 805 denotes a pixel electrode. As shown in FIG. 8, when the surface roughness of the active layer 802 is large or the protective film 803 is thin, the active layer 802 and the interlayer film 804 come into contact with each other and the organic solvent contained in the interlayer film 804 penetrates. The active layer 802 is dissolved. As a result, sufficient transistor characteristics cannot be obtained.

  Here, the definition of the “surface roughness Ra” of the drain electrode and the active layer in the present invention will be described with reference to FIG. In the present invention, the surface roughness Ra is defined as a value obtained by folding the roughness curve from the center line and dividing the area obtained by the roughness curve and the center line by the measurement length L.

  With respect to the layer structure of the transistor active substrate in FIG. 3, when the surface roughness of the drain electrode 305 is Ra (M) and the film thickness of the protective film 307 is D (I), D (I) ≦ Ra (M) A relationship of × 15 is preferable, and a relationship of D (I) ≦ Ra (M) × 10 is more preferable. In the case of a relationship of D (I)> Ra (M) × 15, the structure shown in FIG. 5 is not preferable. In other words, when the drain electrode 501 is covered with the protective film 503, conduction between the drain electrode 501 and the pixel electrode 504 cannot be obtained, and sufficient transistor characteristics cannot be obtained.

  The film thickness D (I) of the protective film 307 is preferably 10 to 2000 nm. When the thickness is less than 10 nm, the function as the protective film 307 is not achieved. When the thickness is greater than 2000 nm, the stress of the protective film 307 affects the element, and the transistor characteristics are adversely affected. The surface roughness Ra (M) of the drain electrode 305 is preferably in the range of greater than 0.6 nm and not greater than 100 nm, and more preferably in the range of greater than 5 nm and not greater than 50 nm. When the surface roughness Ra (M) is 0.6 nm or less, it may be difficult to make the drain electrode and the pixel electrode conductive through the protective film. When the surface roughness Ra (M) is larger than 100 nm, the wiring resistance becomes high, and transistor operation becomes difficult. May have adverse effects.

  6, the active layer 606 has a surface roughness Ra (S), the drain electrode 605 has a surface roughness Ra (M), and the protective film 607 has a film thickness D (I). It is preferable that Ra (S) × 15 ≦ D (I) ≦ Ra (M) × 15, and Ra (S) × 30 ≦ D (I) ≦ Ra (M) × 10 More preferably, they are in a relationship.

  When the relationship of D (I) <Ra (S) × 15 is satisfied, the structure shown in FIG. 8 is not preferable. That is, when the surface roughness of the active layer 802 is large or the protective film 803 is thin, the active layer 802 and the interlayer film 804 come into contact with each other, the organic solvent contained in the interlayer film 804 penetrates, and the active layer 802 Will dissolve. As a result, transistor characteristics cannot be obtained.

  In FIG. 6, the film thickness D (I) of the protective film 607 is preferably 10 to 2000 nm. When the thickness is less than 10 nm, the function as the protective film 607 is not achieved. When the thickness is greater than 2000 nm, the stress of the protective film 607 affects the element, and the transistor characteristics are adversely affected.

  The surface roughness Ra (M) of the drain electrode 605 is preferably in the range of greater than 0.6 nm and less than or equal to 100 nm, preferably in the range of greater than 5 nm and less than or equal to 50 nm, for the same reason as in the transistor active substrate of FIG. Further preferred.

  Further, the surface roughness Ra (S) of the active layer is preferably less than 40 nm, and more preferably less than 20 nm. When the surface roughness Ra (S) is 40 nm or more, sufficient mobility cannot be obtained as transistor characteristics.

  In addition to the bottom contact type transistor active substrate in which the source / drain electrodes as shown in FIGS. 3 and 6 are formed under the active layer, for example, the source / drain electrodes as shown in FIGS. A similar manufacturing method is possible even for a top contact type transistor active substrate formed on an active layer. The transistor active substrate in FIG. 10 has a structure in which a protective film 1007 and a pixel electrode 1008 are arranged over a thin film transistor including a substrate 1001, a gate electrode 1002, a gate insulating film 1003, an active layer 1004, a source electrode 1005, and a drain electrode 1006. It is. 11 includes a protective film 1107, an interlayer film 1108, and a pixel over a thin film transistor including a substrate 1101, a gate electrode 1102, a gate insulating film 1103, an active layer 1104, a source electrode 1105, and a drain electrode 1106. The electrode 1109 is arranged.

  The materials and construction methods of each component used for the transistor active substrate of the present invention will be specifically described below.

substrate:
The substrate can be formed of glass or plastic. In the case of being made of plastic, there is an advantage that the transistor active substrate can be given flexibility, but there is a disadvantage that the substrate is vulnerable to heat. Here, as preferable types of plastic, for example, polycarbonate, polyimide, PES (polyethersulfone), PAR (polyarylate), PEN (polyethylene naphthalate), PET (polyethylene terephthalate), and the like can be used. .

Gate electrode (first electrode):
The material of the gate electrode is not particularly limited as long as it is a conductive material. For example, platinum, gold, silver, nickel, chromium, copper, iron, tin, antimony, lead, tantalum, indium, aluminum, zinc, magnesium, and These alloys, conductive metal oxides such as indium / tin oxide, or inorganic and organic semiconductors whose conductivity has been improved by doping, such as silicon single crystal, polysilicon, amorphous silicon, germanium, graphite, polyacetylene, poly Examples include paraphenylene, polythiophene, polypyrrole, polyaniline, polythienylene vinylene, and polyparaphenylene vinylene.

  As a method for manufacturing the gate electrode, a method of patterning in a photoetching process after vacuum film formation is preferable. Moreover, the method of forming by an inkjet method (refer patent document 4) and other printing methods using nano metal ink is further more preferable.

Gate insulating film (first insulating film):
As the material of the gate insulating film, for example, inorganic materials such as silicon oxide, silicon nitride, aluminum oxide, aluminum nitride, titanium oxide, polyimide, polyvinyl alcohol, polyvinyl phenol, polyester, polyethylene, polyphenylene sulfide, polyparaxylylene, Examples thereof include organic materials such as polyacrylonitrile and cyanoethyl pullulan, and two or more of these materials may be used in combination.

  The production method is not particularly limited, and examples thereof include a CVD method, a plasma CVD method, a plasma polymerization method, a vapor deposition method, a spin coating method, a dipping method, a printing method, and an ink jet method.

  In addition, among the above materials, when a polymer material such as polyimide, polyvinyl alcohol, polyvinylphenol, polyparaxylylene is contained in the gate insulating film, irradiation is performed by irradiating the gate insulating film with ultraviolet rays. The surface energy of the formed region can be increased. As a result, a high-definition source / drain electrode pattern can be directly drawn in a region where the surface energy is increased by using a printing method. Furthermore, by using polyimide with a low surface energy, it becomes possible to pattern the organic semiconductor layer with high definition. As a polymer material capable of increasing the surface energy with ultraviolet rays, for example, materials described in JP-A-2006-060079 can be used.

  The thickness range of the gate insulating film is preferably 10 to 1000 nm, more preferably 100 to 1000 nm.

Source / drain electrode (second counter electrode):
As a material for the source / drain electrodes, among the conductive materials mentioned as the gate electrode material, a material that is ohmic connected at the contact surface with the semiconductor layer is preferable.

  As a manufacturing method of the source / drain electrodes, it is preferable to deposit a metal film using a shadow mask, or to form a pattern by a photoetching step after vacuum film formation. Moreover, it is more preferable to form by a inkjet method (refer patent document 4) and other printing methods using nano metal ink. In electrode formation by ink jet coating, the surface energy of the base is changed, and the surface that is easy to adjust to the ink and the surface that is difficult to adjust can be light-treated, and the self-exclusion mechanism of the applied ink can be used. Patterning at intervals of 5 microns is possible (see Patent Document 3). In the source / drain electrodes which are the second counter electrodes of the transistor, it is very important to form the channel regions at minute intervals in terms of improving the transistor performance. Patent Document 4 proposes a wiring technique using an inkjet method, which can also be used. Although the thickness of a source / drain electrode can be set suitably, it is preferable to set to the range of 10-100 nm.

Active layer:
As the material of the active layer, organic low molecules such as pentacene, anthracene, tetracene and phthalocyanine, polyacetylene conductive polymers, polyparaphenylene and derivatives thereof, polyphenylene conductive polymers such as polyphenylene vinylene and derivatives thereof, polypyrrole and Organic semiconductors such as derivatives thereof, polythiophene and derivatives thereof, heterocyclic conductive polymers such as polyfuran and derivatives thereof, and ionic conductive polymers such as polyaniline and derivatives thereof can be used. In addition, a known organic semiconductor substance that is generally used may be used as the material of the active layer.

  Semiconductor nanoparticles can also be used as the material for the active layer. Typical semiconductor nanoparticles consist of II-VI materials, III-V materials, Group IV materials, or combinations thereof. Suitable II-VI materials most typically have any number of Group VI materials selected from the group consisting of Se, Te and S, most typically from Zn, Cd, Be, and Mg. It may consist of an alloy of any number of Group II materials selected from the group consisting of Suitable II-VI materials may include zinc oxide or magnesium oxide. Suitable III-V materials most typically consist of In, Al, and Ga with any number of Group V materials selected from the group consisting of As, P, and Sb. It may consist of any number of Group III materials selected from the group. Suitable Group IV materials may include Si and Ge.

  Furthermore, as an example of a particularly preferable material for the active layer, a material mainly composed of a pi-conjugated polymer material containing a triarylamine represented by the following formula can be given.

  As a manufacturing method of the active layer, in addition to vapor deposition, arc discharge, plasma enhanced chemical vapor deposition (PECVD), physical vapor deposition and the like, a wet film forming method can be used. As a wet film forming method, a known wet film forming technique such as a spin coating method, a dipping method, a blade coating method, a spray coating method, a casting method, an ink jet method, or a printing method can be adopted, and this makes it active. The layer can be thinned.

Protective film (second insulating film):
As a material for the protective film, an inorganic insulator such as silicon nitride or silicon oxide, an organic insulator such as parylene, or the like can be used. As a method for forming the protective film, chemical vapor deposition (CVD) can be used. More specifically, the protective film can be selected from the group consisting of LPCVD, PECVD, and PECVD. Parylene also serves to protect the active layer from solvents such as organic solvents in the manufacturing process after the active layer due to its high hydrophobicity, solvent resistance and chemical resistance. The thickness of the protective film is preferably 10 to 2000 nm.

Interlayer film (third insulating film):
The fine particles contained in the mixture constituting the interlayer insulating film may be either organic particles or inorganic particles as long as the material can exist as particles after the interlayer insulating film is formed. It is preferable to use inorganic particles that can be easily controlled in particle size and can be dispersed in an organic material without being dissolved in a solvent. In this case, examples of the organic material include materials including polyvinyl alcohol resin, polyvinyl acetal resin, acrylic resin, ethyl cellulose resin, and the like. Examples of inorganic particles include silica (SiO ₂ ), alumina (Al ₂ O ₃ ), titanium oxide (TiO ₂ ), zinc oxide (ZnO), barium titanate (BaTiO ₃ ), and the like. Among these, materials having a relatively low relative dielectric constant such as silica, alumina, and zinc oxide are preferable. In addition, inorganic porous particles having mesopores or micropores in the structure, such as mesoporous silica, may be used.

  As the means for forming the interlayer insulating film in the present invention, for example, a printing process such as screen printing and intaglio printing is suitable, and the film thickness range of the interlayer insulating film in the present invention is a range that can be suitably formed using a printing technique. It hits. For example, in the case of forming a fine pattern as assumed in the present invention using screen printing, a paste filled in a mesh having a wire diameter of 15 to 50 μm and an aperture ratio of 40 to 60%. Since the film is formed by transferring the material, it can be formed together with the through hole. The thickness of the interlayer insulating film is 2 μm or more and 40 μm or less. Since the interlayer insulating film has an effect of reducing the electrostatic capacity by providing a thickness, the thickness is preferably at least 2 μm, more preferably 4 μm or more.

Pixel electrode (third electrode):
As a material for the pixel electrode, the following paste materials that are commercially available are preferable. Examples of commercially available paste materials include Perfect Gold (registered trademark) (gold paste, product name manufactured by Vacuum Metallurgical Co., Ltd.), Perfect Copper (copper paste, product name manufactured by Vacuum Metallurgical Co., Ltd.), Orgacon.
Paste variant 1/4, Paste variant 1/3 (above, transparent PEDOT / PSS ink for printing, trade name manufactured by Agfa Gebalto, Japan), Orgacon
Carbon Paste variant 2/2 (carbon electrode paste, trade name manufactured by Agfa Gebalto, Japan), BAYTRON (registered trademark) P (PEDT / PSS aqueous solution, trade name, manufactured by Nippon Stark Vitec) can be mentioned. A pixel electrode can be formed by applying the above material by screen printing.

Examples of the present invention will be described below.
<Example 1>
(1) Formation of organic transistor A commercially available nano silver ink was printed on a glass substrate in a desired pattern using an inkjet apparatus, and then heat treated at 200 ° C. to form a first electrode. Next, heat-polymerizable polyimide is applied as a first insulating film by spin coating, heat-treated at 280 ° C., and then irradiated with ultraviolet rays through a photomask to a desired portion (second electrode forming portion, which will be described later). And surface modification was carried out.

  Next, similarly to the first electrode formation, the second electrode was formed by nano silver ink by the IJ (inkjet) method. The pattern of the exposed part cannot be recognized by CCD observation. Therefore, the substrate was aligned with the first pattern, and IJ printing based on the print data was performed.

  As an active layer, an organic semiconductor material having a triarylamine skeleton having the above structure was dissolved in xylene to form an ink. The ink concentration was 1 wt%, the viscosity was about 5 mPa · sec, and the surface tension was about 30 mN / m. Then, the organic transistor was obtained by forming a film | membrane in the site | part desired by IJ method.

  Further, after the formation of the second electrode and the formation of the active layer, the surface roughness of the second electrode and the active layer was measured in a scanning region of 10 μm × 10 μm using a scanning probe microscope (AFM).

(2) Second Insulating Film Formation A parylene film was formed with a thickness of 100 nm using chemical vapor deposition.

(3) Third electrode formation A silver paste manufactured by Daiken Chemical Co., Ltd. is screen-printed and dried at 120 ° C. to form a third electrode (individual electrode, pixel electrode). An organic transistor active substrate was fabricated.

<Example 2>
An organic transistor active substrate similar to that of Example 1 was prepared except that the thickness of the second insulating film was changed to 50 nm in Example 1.

<Example 3>
An organic transistor active substrate similar to that of Example 1 was manufactured except that the film thickness of the second insulating film in Example 1 was 20 nm and the heat treatment temperature of the second electrode was 280 ° C.

<Example 4>
An organic transistor active substrate similar to that of Example 1 was manufactured except that the film thickness of the second insulating film was set to 20 nm in Example 1 and an Au electrode was formed by mask vapor deposition as the second electrode.

<Example 5>
An organic transistor active substrate similar to that in Example 1 was manufactured except that the thickness of the second insulating film was set to 30 nm in Example 1 and an Au electrode was formed as the second electrode by mask vapor deposition.

<Comparative Example 1>
In Example 1, an organic transistor active substrate similar to that in Example 1 was prepared, except that a mask vapor deposition machine was used and an Au electrode was produced as the second electrode by mask vapor deposition.

<Comparative example 2>
Similar to Example 1, except that pentacene is formed as an active layer by vapor deposition using a vapor deposition machine in Example 1, the thickness of the second insulating film is 600 nm, and the heat treatment temperature of the second electrode is 280 ° C. An organic transistor active substrate was prepared.

<Example 6>
(1) Formation of Organic Transistor A commercially available nano silver ink was used for a glass substrate, and an ink jet apparatus manufactured by Ricoh Printing Systems was used to print a desired pattern, followed by heat treatment at 200 ° C. to form a first electrode.

Next, a thermal polymerization type polyimide was applied as a first insulating film by spin coating, and 280 ° C.
After the heat treatment, the surface modification was performed by irradiating a desired site (second electrode formation site described later) with ultraviolet rays through a photomask. When the overlay accuracy of the photomask was obtained for the first electrode pattern, the overlay could be performed within a deviation range of ± 10 μm with respect to the total pitch of 200 mm.

  Next, similarly to the first electrode formation, a second electrode was formed by the IJ method using nano silver ink. The pattern of the exposed part cannot be recognized by CCD observation. Therefore, the substrate was aligned with the first pattern, and IJ printing based on the print data was performed. As a result of obtaining the overlay accuracy of the laminated pattern thus obtained, the overlay was able to be performed within a deviation range of ± 10 μm with respect to the total pitch of 200 mm. This is because the ink reproducibility with respect to the wettability control surface can reproduce the pattern at a rate of almost 100%, and the deviation of ± 10 μm is caused by the overlay deviation at the time of photomask exposure.

  As an active layer, an organic semiconductor material having a triarylamine skeleton having the above structure was dissolved in xylene to form an ink. The ink concentration was 1 wt%, the viscosity was about 5 mPa seconds, and the surface tension was about 30 mN / m. Then, the organic transistor was obtained by forming a film | membrane in the site | part desired by IJ method.

(2) Second Insulating Film Formation A parylene film was formed with a thickness of 100 nm using chemical vapor deposition.

(3) Formation of the third insulating film Polyvinyl butyral resin manufactured by Sekisui Chemical Co., Ltd. is dissolved in terpineol and butoxyethanol, and an insulating filler is added to adjust the printing proper viscosity (60,000 to 200,000 mPa · s). A screen printing paste was prepared by kneading with a three-roll mill. Hydrothermally synthesized barium titanate (average particle size: 0.1 micron) manufactured by Sakai Chemical Co., Ltd. was added as a material from which uniform particles can be easily obtained as an insulating filler. Specifically, 70 wt% of barium titanate filler was added to a polyvinyl butyral concentration: 5 wt% (terpineol + butoxyethanol) binder. Using the paste thus prepared, screen printing (calendar mesh: No. 500, screen plate having a milk thickness of 5 microns) was performed and dried at 120 ° C. to form a second insulating film. It was confirmed that a through hole of about 100 μm × 100 μm was formed in the second insulating film sample.

(4) Third electrode formation A silver paste manufactured by Daiken Chemical Co., Ltd. is screen-printed and dried at 120 ° C. to form a third electrode (individual electrode, pixel electrode). An organic transistor active substrate was fabricated.

<Example 7>
An organic transistor active substrate similar to that in Example 6 was produced except that the film thickness of the second insulating film was changed to 50 nm in Example 6.

<Example 8>
In Example 6, an organic transistor active substrate similar to that in Example 6 was prepared except that the thickness of the second insulating film was 20 nm and the heat treatment temperature of the second electrode was 280 ° C.

<Example 9>
An organic transistor active substrate similar to that of Example 6 was prepared except that the film thickness of the second insulating film was 20 nm in Example 6 and an Au electrode was formed by mask vapor deposition as the second electrode.

<Example 10>
An organic transistor active substrate similar to that of Example 1 was prepared except that the film thickness of the second insulating film was 30 nm in Example 6 and an Au electrode was formed by mask vapor deposition as the second electrode.

<Comparative Example 3>
An organic transistor active substrate was prepared in the same manner as in Example 6 except that, in Example 6, a mask vapor deposition machine was used and an Au electrode was produced by mask vapor deposition as the second electrode.

<Comparative example 4>
Example 6 is the same as Example 6 except that pentacene is produced as an active layer by vapor deposition using a vapor deposition machine in Example 6, the thickness of the second insulating film is 600 nm, and the heat treatment temperature of the second electrode is 280 ° C. A similar organic transistor active substrate was prepared.

<Comparative Example 5>
An organic transistor active substrate was prepared in the same manner as in Example 6 except that pentacene was produced by vapor deposition using a vapor deposition machine in Example 6 and the heat treatment temperature of the second electrode was changed to 280 ° C.

<Comparative Example 6>
An organic transistor active substrate similar to that of Example 6 was prepared except that the film thickness of the second insulating film was set to 10 nm in Example 6 and an Au electrode was formed by mask vapor deposition as the second electrode.

<Comparative Example 7>
An organic transistor active substrate similar to that in Example 6 was prepared except that the second insulating film was not formed in Example 6.

  In the above examples and comparative examples, transistors having a transistor channel length of 5 μm, a channel width of 1000 μm, a relative dielectric constant of a gate insulating film of 3.6, and a film thickness of 400 nm were fabricated, and the transistor performance was evaluated using a semiconductor parameter analyzer. The measurement conditions are as follows.

Source-drain voltage: -20V
Gate voltage: 20 to -20V
Vth: source / drain voltage: -20V, gate voltage measured at 20 to -20V, measure source / drain current, plot square root of source / drain current against gate voltage, extrapolate the indicated linear region A point that intersects the X axis is defined as a threshold voltage.

The calculation method was evaluated from the following formula (1).
Ids = μCinW (Vg−Vth) ² / 2L (1)

  Here, μ is mobility, Cin is capacitance per unit area of the gate insulating film, W is channel width, L is channel length, Vg is gate voltage, and Ids is source / drain current.

  In addition to the transistor, a pattern for confirming the conduction between the second electrode and the third electrode was prepared, and it was confirmed whether or not the electrical conduction was achieved.

  Further, in Examples 6 to 10 and Comparative Examples 3 to 7, since the printing paste (ink) used for forming the interlayer insulating film is composed of the main polymer (polyvinyl butyral resin), the viscosity adjusting filler, and the organic solvent, it is disposed on the base. The dissolved organic semiconductor film may be dissolved to cause a transistor failure. Therefore, the transistor performance was evaluated immediately after the active layer was fabricated, and it was confirmed whether or not characteristic deterioration had occurred compared with the subsequent processes.

  Using the transistor as an active substrate, a support substrate 1202 in which a transparent electrode (ITO; Indium Tin Oxide) 1204 as shown in FIG. 12 is arranged as a common electrode, and the manufacturing method according to Examples 1 to 10 and Comparative Examples 1 to 7 A pixel was formed by sandwiching an electrophoretic microcapsule 1203 for black and white display between the third electrodes (pixel electrodes) of the transistor active substrate 1201 created in the above. -20V was applied to the scanning line and ± 20V was applied to the (pixel) signal line, and the black and white change of the pixel was confirmed.

  Although the results are shown in Table 1, in the results of Comparative Examples 1 to 4, electrical continuity could not be obtained after the pixel electrode was produced, and the transistor performance could not be evaluated. In addition, in the results of Comparative Examples 5 and 6, electrical continuity was confirmed after the pixel electrode was produced, but the printing paste used for forming the interlayer insulating film dissolved the organic semiconductor film and greatly deteriorated the transistor performance. From the results of Examples 1 to 10, it was confirmed that electrical continuity was confirmed after the pixel electrode was produced, and that there was no significant difference in the transistor performance before and after the pixel electrode was produced, and it was confirmed that the pixel was changed black and white. In addition, it was confirmed that Examples 2 and 7 had very good contrast as compared with other Examples. In Table 1, “D (P)” and “D” mean the film thickness (nm) of the second insulating film, “before the interlayer” means before the formation of the interlayer insulating film, and “after pixel” means the pixel. It means after electrode formation.

  From the above results, it is possible to ensure sufficient electrical continuity between the drain electrode and the pixel electrode by controlling the surface roughness of the drain electrode and the active layer and the thickness of the protective film, and have good transistor performance. A transistor active substrate can be provided.

  In addition, this invention is not limited to the said embodiment, A various change is possible within the range of the invention described in the claim. For example, in the above embodiment, an electrophoretic microcapsule for monochrome display is sandwiched between the support substrate arranged as a common electrode as shown in FIG. 12 and the third electrode (pixel electrode) of the transistor active substrate. The electrophoretic display in which pixels are formed has been described, but the configuration of the electrophoretic display is not limited to that shown in FIG. For example, as shown in FIG. 13, an electrical structure having a configuration in which an electrophoretic dispersion liquid 13 is filled in a space formed by bonding a support substrate 11 having a transparent electrode 10 to a transistor active substrate via a partition wall 12. The present invention can also be applied to an electrophoretic display.

1 is a diagram illustrating a basic configuration of a conventional transistor active substrate. 2 is a cross-sectional view illustrating a main part of the transistor active substrate of FIG. 1. 1 is a diagram illustrating a cross-sectional structure of a transistor active substrate according to an embodiment of the present invention. It is explanatory drawing which expands and shows a part of FIG. FIG. 5 is an explanatory diagram showing an enlarged part of a conventional transistor active substrate in comparison with FIG. 4. 6 is a diagram illustrating a cross-sectional structure of a transistor active substrate according to another embodiment of the present invention. It is explanatory drawing which expands and shows a part of FIG. FIG. 8 is an explanatory diagram showing an enlarged part of a conventional transistor active substrate in comparison with FIG. 7. It is drawing for demonstrating the definition of surface roughness. It is drawing explaining another structural example of the transistor active substrate based on this invention. It is drawing explaining another example of a structure of the transistor active substrate based on this invention. 1 is a diagram illustrating a schematic configuration of an electrophoretic display according to an embodiment of the present invention. It is drawing explaining schematic structure of the electrophoretic display which concerns on another embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 101 ... Gate electrode 102 ... Source electrode 103 ... Drain electrode 104 ... Pixel electrode 105 ... Scanning line 106 ... Signal line 107 ... Substrate 108 ... Gate insulating film 109 ... Active layer 110 ... Interlayer film 111 ... Through hole

Claims (11)

A first electrode is formed on the substrate, a first insulating film is formed on the first electrode, a second counter electrode is formed on the first insulating film, and the second pair A transistor is formed by forming an active layer made of a semiconductor material on the electrode and the first insulating film ,
A transistor in which a second insulating film is deposited on the transistor, and a third electrode that is electrically connected to one of the second counter electrodes is stacked on the second insulating film. An active substrate,
When the surface roughness of the second counter electrode is Ra (M) and the thickness of the second insulating film is D (I), D (I) ≦ Ra (M) × 15. A transistor active substrate characterized. A first electrode is formed on the substrate, a first insulating film is formed on the first electrode, a second counter electrode is formed on the first insulating film, and the second pair A transistor is formed by forming an active layer made of a semiconductor material on the electrode and the first insulating film ,
A second insulating film is deposited on the transistor, a third insulating film is deposited on the second insulating film, and further provided on the third insulating film above the third insulating film. A transistor active substrate in which a third electrode electrically connected to one of the second counter electrodes is stacked through a through-hole,
When the surface roughness of the active layer is Ra (S), the surface roughness of the second counter electrode is Ra (M), and the thickness of the second insulating film is D (I), Ra ( S) × 15 ≦ D (I) ≦ Ra (M) × 15, wherein the transistor active substrate. A first electrode is formed on a substrate, a first insulating film is formed on the first electrode, an active layer made of a semiconductor material is formed on the first insulating film, and the active layer is formed on the active layer. The second counter electrode is formed on the transistor to form a transistor,
A transistor in which a second insulating film is deposited on the transistor, and a third electrode that is electrically connected to one of the second counter electrodes is stacked on the second insulating film. An active substrate,
When the surface roughness of the second counter electrode is Ra (M) and the thickness of the second insulating film is D (I), D (I) ≦ Ra (M) × 15. A transistor active substrate characterized. A first electrode is formed on a substrate, a first insulating film is formed on the first electrode, an active layer made of a semiconductor material is formed on the first insulating film, and the active layer is formed on the active layer. The second counter electrode is formed on the transistor to form a transistor,
A second insulating film is deposited on the transistor, a third insulating film is deposited on the second insulating film, and further provided on the third insulating film above the third insulating film. A transistor active substrate in which a third electrode electrically connected to one of the second counter electrodes is stacked through a through-hole,
When the surface roughness of the active layer is Ra (S), the surface roughness of the second counter electrode is Ra (M), and the thickness of the second insulating film is D (I), Ra ( S) × 15 ≦ D (I) ≦ Ra (M) × 15, wherein the transistor active substrate.   The second insulating film protects the active layer, and one of the second counter electrodes is in a state where the second insulating film is interposed between the second counter electrode and the third electrode. 5. The transistor active substrate according to claim 1, wherein the transistor is electrically connected to the third electrode. 6.   The transistor active substrate according to claim 1, wherein the active layer is made of an organic semiconductor material.   The transistor active substrate according to claim 1, wherein the active layer is mainly composed of a pi-conjugated polymer material containing triarylamine.   The transistor active substrate according to claim 1, wherein the second insulating film is an organic film or an inorganic film formed by using a chemical vapor deposition method. A first electrode is formed on a substrate, a first insulating film is formed on the first electrode, a second counter electrode is formed on the first insulating film, and the second pair is formed. A transistor is formed by forming an active layer made of a semiconductor material on the electrode and the first insulating film, a second insulating film is deposited on the transistor, and a third insulating film is formed on the second insulating film. The second insulating film is electrically connected to one of the second counter electrodes via a through-hole provided in the third insulating film above the third insulating film. 3, the surface roughness of the active layer is Ra (S), the surface roughness of the second counter electrode is Ra (M), and the thickness of the second insulating film is D ( I), a method of manufacturing a transistor active substrate with Ra (S) × 15 ≦ D (I) ≦ Ra (M) × 15,
The first electrode and the second counter electrode are formed by an inkjet method,
The first insulating film is formed by coating;
The active layer is formed by an inkjet method,
A method for manufacturing a transistor active substrate, wherein the third electrode is formed by a screen printing method.   An electrophoretic display comprising an electrophoretic display element laminated on the transistor active substrate according to claim 1, wherein the electrophoretic display element is a medium capable of monochrome display by an electric field. An electrophoretic display which is encapsulated and disposed on the third electrode. An electrophoretic display in which an electrophoretic display element is stacked on the transistor active substrate according to claim 1, wherein the electrophoretic display element includes the transistor active substrate, a transparent electrode, and the like. An electrophoretic display comprising: a space formed through a support substrate having a substrate and a partition layer provided between the substrates and a medium capable of monochrome display by an electric field.