JP5366409B2 - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device in which a large number of semiconductor elements are formed in a two-dimensional manner and which prevents peeling-off of a wire-bonding metal. <P>SOLUTION: A mask 11 for selective growth is formed on a substrate 1 for growth. An AlN buffer layer 2 is formed in a region where a part of the mask 11 for selective growth is removed. An undoped GaN layer 3, an n-type GaN layer 4, an active layer 5, and a p-type GaN layer 6 are laminated in turn on the AlN buffer layer 2. A bonding metal 13 and an electrode are connected with each other via a contact hole of an insulating film 12. The bonding metal 13 is continuously formed over the surfaces of at least two or more semiconductor elements adjacent to each other. <P>COPYRIGHT: (C)2009,JPO&amp;INPIT

Description

  The present invention relates to a semiconductor device in which a large number of semiconductor elements are two-dimensionally formed with a separation groove therebetween.

  2. Description of the Related Art Conventionally, a semiconductor light emitting element formed by laminating a plurality of compound semiconductor layers on a substrate is known. An LED (Light Emitting Diode) is known as a typical semiconductor light emitting device. An LED forms a pn or pin junction of a compound semiconductor (GaAs, GaP, AlGaAs, etc.), applies a forward voltage to the junction, injects carriers into the junction, and utilizes the light emission phenomenon that occurs during the recombination process. It is a thing. Conventionally, such an LED is obtained by combining a compound semiconductor lattice-matched to each substrate such as GaAs, AlGaAs, InP, and InGaAsP on a single crystal substrate such as GaAs or InP, a liquid phase epitaxy (LPE) method, or MOCVD (metal organic chemical vapor deposition). It is manufactured by performing epitaxial growth using a crystal growth method such as the VPE method, VPE (vapor phase epitaxy) method, MBE (molecular beam epitaxy) method, etc., and processing.

  In recent years, nitride semiconductors have been used for blue LEDs used as light sources for lighting, backlights, etc., LEDs used for multi-coloring, LDs, and the like. In a nitride semiconductor light emitting device, a pn or pin junction is formed on a substrate such as a sapphire substrate using MOCVD or the like. Furthermore, a device has also been proposed in which a large number of elements such as transistors made of nitride semiconductor are formed on a common substrate with separation grooves.

  As described above, a semiconductor element is formed. A semiconductor device in which a large number of semiconductor elements are formed on a common substrate and the semiconductor elements are arranged two-dimensionally is manufactured.

As described above, when a plurality of semiconductor elements are formed on a common substrate, a p-electrode (positive electrode) and an n-electrode (negative electrode) are formed on the semiconductor elements formed separately from each other. Although these are wired mutually, on the other hand, each semiconductor element does not operate unless power is supplied from the outside to a semiconductor device in which a plurality of semiconductor elements are manufactured. Therefore, it is necessary to connect a wire for supplying power from the outside to the semiconductor device (see, for example, Patent Document 1).
JP 2006-186197 A

  Conventionally, in order to connect to the wire, a wire bonding metal is formed on one specific semiconductor element, and the wire bonding metal and the wire are connected.

  However, even if the wire is connected to the wire bonding metal, if excessive force is applied to the wire during the subsequent assembly process or transportation, the wire bonding metal is likely to be peeled off and not easy to handle. It was.

  The present invention has been devised to solve the above-described problems, and provides a semiconductor device in which a large number of semiconductor elements are two-dimensionally formed and can prevent peeling of metal for wire bonding. The purpose is to do.

To achieve the above object, a semiconductor device of the present invention, a semiconductor in which a semiconductor element at a separation groove on the substrate formed with a plurality of 2-dimensional shape, a portion of the plurality of semiconductor elements are used for the wire bonding A device for forming a wire connecting first bonding metal for supplying power to a semiconductor device so as to continuously and integrally cover the entire surface of at least two adjacent semiconductor elements. Alternatively, one first wire connected to the negative electrode is bonded to the first bonding metal,
Forming a second bonding metal so as to continuously and integrally cover the entire surface of at least two or more adjacent semiconductor elements different from the semiconductor element on which the first bonding metal is formed; The main feature is that one second wire connected to an electrode having a polarity opposite to that of the first wire is bonded to the second bonding metal.

  According to the semiconductor device of the present invention, a large number of semiconductor elements are two-dimensionally formed on the substrate with a separation groove therebetween, and at least two or more semiconductor electrodes are connected to the wire for supplying power to the semiconductor device. Since it forms so that it may continue over the element surface, even if an excessive force is added to a wire, the metal electrode for wire connection will not be easily peeled compared with the past.

  Hereinafter, an embodiment of the present invention will be described with reference to the drawings. 1 and 2 show a semiconductor device comprising one wafer according to the present invention. FIG. 3 is a plan view of the semiconductor device of the present invention as viewed from above, and is drawn with the insulating film 12 removed for easy understanding. The AA section in FIG. 3 corresponds to FIG. 1, and the BB section corresponds to FIG.

  The semiconductor device of the present invention has a configuration in which a large number of semiconductor elements are two-dimensionally formed on a common substrate. The semiconductor element can be manufactured using a semiconductor such as GaAs, AlGaAs, InP, or InGaAsP. In this embodiment, a light-emitting element using a nitride semiconductor will be described as an example.

The nitride semiconductor is formed by a known MOCVD method or the like. Here, the nitride semiconductor represents an AlGaInN quaternary mixed crystal and is called a so-called group III-V nitride semiconductor, and Al _x Ga _y In _z N (x + y + z = 1, 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1).

  A selective growth mask 11 is formed on the growth substrate 1, and an AlN buffer layer 2 is formed in a region where a portion of the selective growth mask 11 has been removed. On the AlN buffer layer 2, an undoped GaN layer 3, an n-type GaN layer 4, an active layer 5, and a p-type GaN layer 6 are sequentially stacked, and each of these semiconductor layers is formed by MOCVD. Each semiconductor light emitting element D is formed in a state of being separated by a method called selective lateral growth, and an isolation groove for separating elements is formed just above the selective growth mask 11. Here, selective growth or selective lateral growth (ELO) is well known as a method of reducing dislocations.

The active layer 5 has a multiple quantum well structure including a barrier layer made of GaN and a well layer made of In _X1 Ga _{1 -X1} N (0 <X1). Further, a sapphire substrate or the like is used as the growth substrate 1, but any substrate having a hexagonal crystal structure (wurtzite structure) may be used. Further, an n-type impurity Si-doped GaN layer may be used instead of the undoped GaN layer 3.

The AlN buffer layer 2 to the p-type GaN layer 6 are selectively grown. An insulating film is used for the selective growth mask 11, and examples of the insulating film include SiO ₂ , Si ₃ N ₄ , and ZrO _2. is there.

  Mesa etching is performed until a part of the n-type GaN layer 4 is exposed from the p-type GaN layer 6 to form a mesa region. An n-electrode (negative electrode) 9 is provided on the exposed n-type GaN layer 4, and a p-electrode (positive electrode) 10 is provided on the p-type GaN layer 6. The p electrode 10 is made of a metal multilayer film such as Al / Ni, and the n electrode 9 is also made of Al / Ni.

Except for the upper surfaces of the p-electrode 10 and the n-electrode 9, the entire surface of each semiconductor light emitting element is covered with an insulating film 12. The insulating film 12 is made of SiO ₂ , Si ₃ N ₄ , ZrO ₂ or the like having high insulating properties. The insulating film 12 is provided with contact holes on the n-electrode 9 and the p-electrode 10 and is connected to a metal wiring through the contact hole, although not shown.

  On the other hand, two semiconductor light-emitting elements arranged in the center of FIG. 1, that is, the semiconductor light-emitting element drawn by a dotted line in FIG. 3, indicate a semiconductor light-emitting element used for wire bonding. As can be seen from FIGS. 1, 2, and 3, the bonding metal 13 is continuously and integrally formed across the entire surface of two adjacent semiconductor light emitting elements and the separation groove between the two semiconductor light emitting elements. .

  The bonding metal 13 is continuously formed not only on the insulating film 12 on the upper surface of the semiconductor element but also on the insulating film 12 existing on the side surface, and is formed so as to completely cover one semiconductor element. The Next, it is continuously formed so as to cover the selective growth mask 11 existing between adjacent semiconductor elements, and further, continuously and integrally so as to completely cover the upper surface and side surfaces of the adjacent semiconductor elements. Is formed.

  In addition, the bonding metal 13 and the p-electrode 10 or the n-electrode 9 are electrically connected through a contact hole provided in the insulating film 12. The bonding metal 13 is a metal electrode for wire connection, and is made of Au (gold) or Al (aluminum), and has a film thickness of about 8000 mm (0.8 μm).

  Then, the wire is bonded and connected to any position above the bonding metal 13 with solder or the like as shown in the figure. Electric power is supplied from this wire through the bonding metal 13. In FIG. 1, the wire bonding connection portion on the positive electrode side is shown, but the wire bonding connection on the negative electrode side is different from the semiconductor light emitting element for wire bonding on the positive electrode side shown in FIG. Two semiconductor light emitting elements are selected, a bonding metal is formed in the same manner as in FIG.

  In addition, the number of semiconductor elements necessary for continuously and integrally forming the bonding metal on the positive electrode side and the negative electrode side is required, and if the number is 2 or more, the strength is further increased. In addition, the bonding metal becomes difficult to peel off. As described above, the bonding area is increased by increasing the bonding area between the metal electrode for wire connection and the semiconductor element.

A method for manufacturing a semiconductor device as shown in FIGS. First, a selective growth mask 11 is formed on the growth substrate 1. For example, a sapphire substrate as a growth substrate 1 is put into an MOCVD (metal organic chemical vapor deposition) apparatus, and the temperature is raised to about 1050 ° C. while flowing hydrogen gas to thermally clean the sapphire substrate. Thereafter, SiO ₂ which is an insulating film is formed as a selective growth mask 11 on the sapphire substrate. Sputtering power is 300 W, sputtering atoms Ar are supplied at 20 cc / min, and sputtering is performed for 20 minutes in an atmosphere with a pressure of 1 Pa to form a SiO ₂ film with a thickness of about 1000 mm on the sapphire substrate.

Next, a resist is formed on the SiO ₂ film in a predetermined pattern by photolithography, and dry etching, for example, CF 4 gas is supplied in a plasma state at a pressure of 3 Pa and a power of 100 W to perform etching.

Thereafter, the AlN buffer layer 2 is grown. The AlN buffer layer 2 is a high-temperature AlN buffer layer, has a temperature of 900 ° C. or higher (eg, 900 ° C.), a growth pressure of 200 Torr, hydrogen as a carrier gas, and a flow rate of carrier hydrogen (H ₂ ) of 14 L. The flow rate of TMA (trimethylaluminum) was 20 cc / min, and the flow rate of NH ₃ (ammonia) was 500 cc / min. When the molar ratio of NH ₃ / TMA at this time is calculated, it is about 2600. Under this growth condition, a high-temperature AlN buffer layer 2 having a thickness of 30 mm is formed. Note that the insulating film used as the selective growth mask 11 includes Si ₃ N ₄ , ZrO _{2 and the} like in addition to the SiO ₂ .

  When the AlN buffer layer 2 is laminated in this way, not only can the AlN buffer layer 2 be thinly formed, but the AlN buffer layer 2 is not deposited on the selective growth mask 11 but is filled between the selective growth masks 11. Formed as follows.

  By the way, in order to form the separated semiconductor elements as shown in FIGS. 1, 2, and 3, it is necessary to make the growth rate in the vertical direction larger than the growth rate in the horizontal direction. For this purpose, the opening of the selective growth mask 11 is formed by removing a part of the insulating film. The shape of the opening is shown in FIG.

  As shown in FIG. 4A, a selective growth mask 11 having a large number of hexagonal openings 11a is used. In this way, a hexagonal (hexagonal frustum) element is obtained. The nitride semiconductor has a wurtzite type (hexagonal) crystal structure with a (0001) orientation, and has a crystal polarity (growth in the c-axis direction) in which Ga atoms or N atoms are in the growth surface direction.

  Therefore, a sapphire substrate or the like having the same wurtzite crystal structure is used as the growth substrate, and the main surface of the sapphire substrate has a C-plane, and a nitride semiconductor is stacked on the main surface. All C planes are in the growth surface direction. In this case, if the mask for selective growth having the hexagonal opening 11a shown in FIG. 4A is selected, the hexagonal side L1 is arranged in parallel with the M plane (10-10) of the growth substrate. Since the crystal grown by the growth grows almost in the vertical direction, it becomes a separated semiconductor layer.

  On the other hand, when the selective growth mask 11 of FIG. 4B is used, it is necessary that one side L2 of each opening 11b is parallel to the M plane (10-10) of the growth substrate. . In this case, a semiconductor element having a triangular frustum is obtained.

Next, in the MOCVD apparatus, the growth temperature is set to 1020 ° C. to 1040 ° C., the supply of TMA of NH ₃ and TMA is stopped, for example, trimethylgallium (TMGa) is supplied at 20 μmol / min, and the undoped GaN layer 3 Are stacked to a thickness of about 0.5 μm.

Thereafter, silane (SiH ₄ ) is supplied as an n-type dopant gas to grow the n-type GaN layer 4 with a thickness of about 4 μm. Next, the supply of TMGa and silane is stopped, the substrate temperature is lowered between 700 ° C. and 800 ° C. in a mixed atmosphere of ammonia and hydrogen, and triethylgallium (TEGa) is supplied at 20 μmol / min to obtain the active layer 5. The undoped GaN barrier layer is laminated, and trimethylindium (TMIn) is supplied at 200 μmol / min, and the InGaN well layer is laminated. A multiple quantum well structure is formed by repeating the GaN barrier layer and the InGaN well layer. The film thickness of the active layer 5 is formed to be about 0.1 μm, for example.

After the active layer 5 is grown, the growth temperature is increased to 1020 ° C. to 1040 ° C., and trimethylgallium (TMGa), which is a Ga atom source gas, ammonia (NH ₃ ), which is a nitrogen atom source gas, and p-type impurity Mg. CP ₂ Mg (biscyclopentadiethyl magnesium) as a dopant material is supplied, and a p-type impurity Mg-doped GaN layer 6 is grown to a thickness of about 0.3 μm.

Next, mesa etching is performed until the n-type GaN layer 4 is exposed from the p-type GaN layer 6, and the p-electrode 10 is formed on the p-type GaN layer 6. Thereafter, SiO ₂ is deposited as an insulating film 12 over the entire surface of the wafer by about 0.5 μm to ₂ μm. To coat the wafer surface with SiO _2, plasma CVD is used, power 300 W, and the growth temperature 400 ° C., silane (SiH ₄₎ 10cc / min, the _{N 2} O and 500 cc / min supply, SiO ₂ About 0.5 to 2 μm.

Next, SiO ₂ on the p-electrode 10 and the n-electrode 9 is removed by etching to form a contact hole. Then, at least two adjacent semiconductor elements for forming the metal electrode for wire connection are selected, and the bonding metal 13 is continuously and integrally formed so as to fill the separation groove. A power supply wire is bonded to any position on the bonding metal 13.

Note that the manufacturing of each semiconductor layer, along with hydrogen or nitrogen carrier gas, triethylgallium (TEGa), trimethyl gallium (TMG), ammonia _(NH 3), trimethyl aluminum (TMA), each of such trimethyl indium (TMIn) Reaction gas corresponding to the components of the semiconductor layer, silane (SiH ₄ ) as a dopant gas for n-type, CP ₂ Mg (cyclopentadienylmagnesium) as a dopant gas for p-type By supplying a gas and sequentially growing it in the range of about 700 ° C. to 1200 ° C., a semiconductor layer having a desired conductivity and a desired composition can be formed to a required thickness.

It is a figure which shows an example of the AA cross-section of FIG. 3 of the semiconductor device of this invention. It is a figure which shows an example of the BB sectional structure of FIG. 3 of the semiconductor device of this invention. It is a top view of the semiconductor device of the present invention. It is a figure which shows the example of a shape of the mask for selective growth.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Growth substrate 2 AlN buffer layer 3 Undoped GaN layer 4 n-type GaN layer 5 Active layer 6 p-type GaN layer 9 n-electrode 10 p-electrode 11 Selective growth mask 13 Bonding metal

Claims (3)

A semiconductor element at a separation groove on the substrate formed with a plurality of 2-dimensional shape, a portion of the plurality of semiconductor devices is a semiconductor device used for the wire bonding,
A wire-bonding first bonding metal for supplying power to the semiconductor device is formed so as to continuously and integrally cover the entire surface of at least two adjacent semiconductor elements, and is used as a positive electrode or a negative electrode. One connected first wire is bonded to the first bonding metal, and at least two or more adjacent semiconductors different from the semiconductor element on which the first bonding metal is formed A second bonding metal is formed so as to continuously and integrally cover the entire surface of the element, and one second wire connected to an electrode having a polarity opposite to that of the first wire is the second wire. A semiconductor device characterized by being bonded to a bonding metal.   The semiconductor device according to claim 1, wherein the first wire is bonded onto a first bonding metal formed on an upper surface or a side surface of the semiconductor element.   The semiconductor device according to claim 1, wherein the second wire is bonded onto a second bonding metal formed on an upper surface or a side surface of the semiconductor element.

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