JP5354339B2 - Exposure method, exposure apparatus, and device manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an exposure method or the like avoiding a reduction in accuracy of superposition due to thermal expansion of a wafer. <P>SOLUTION: First, some of a plurality of divided regions arrayed on the wafer shown in Fig.3(A) are sequentially exposed and then the remaining divided regions shown in Fig.3(B) are sequentially exposed. The firstly and secondly exposed divided regions are respectively arrayed in a checkered pattern. Therefore, as long as the divided regions which are arrayed in one arrangement direction are sequentially exposed, exposure is always performed on a divided region which is not susceptible to or is sufficiently less susceptible to local thermal expansion of the wafer and hence the reduction in accuracy of superposition of patterns due to the thermal expansion of the wafer can be avoided. In later exposing, a plurality of alignment marks on the wafer are detected and exposure is performed based on a result of detection, so that the accuracy of superposition of patterns can be increased. <P>COPYRIGHT: (C)2010,JPO&amp;INPIT

Description

  The present invention relates to an exposure method, an exposure apparatus, and a device manufacturing method, and more specifically, an exposure method and an exposure apparatus that form a pattern on the object by irradiating a sensitive layer on the object surface with an energy beam, and the exposure. The present invention relates to a device manufacturing method using the method.

  Conventionally, in a photolithography process for manufacturing a semiconductor element, a liquid crystal display element, or the like, a photomask or a reticle (hereinafter, collectively referred to as “reticle”) is used as a photosensitive agent such as a photoresist via a projection optical system. A projection exposure apparatus, such as a step-and-repeat type projection exposure apparatus (so-called stepper), or a step-and- A scanning projection exposure apparatus (a so-called scanning stepper (also called a scanner)) or the like is used.

  In this type of projection exposure apparatus, when the amount of illumination light applied to the wafer is large, pattern alignment accuracy (including overlay accuracy of patterns in a plurality of layers formed on the wafer) may be reduced. It is known (see, for example, Patent Document 1). One of the reasons may be that the wafer is thermally expanded by irradiation of illumination light, that is, the wafer is locally thermally expanded, and the pattern is transferred to the deformed partitioned area. In view of this, it is conceivable to maintain a certain alignment accuracy by cooling the wafer with a waiting time each time a pattern is transferred to one partition area. However, if this is done, there is a risk that throughput will be reduced more than necessary.

Japanese Patent Laid-Open No. 10-50588

The present invention has been made under the circumstances described above. From the first viewpoint, the object is exposed by irradiating an energy beam, and a plurality of pattern areas arranged two-dimensionally are formed on the object. an exposure method, a group of first areas not adjacent to each other with respect to at least one arrangement direction on the object, and exposure by irradiating pre Symbol energy beam was exposed groups of the plurality of first regions And exposing the plurality of second region groups not adjacent to each other with respect to at least one arrangement direction on the object by irradiating the energy beam, and exposing the plurality of second region groups on the object prior to the exposure. In the exposure method, a plurality of marks are detected, and based on the detection result, the position of the object at the time of exposure with respect to the group of the plurality of second regions is controlled .

  According to this, areas that are not adjacent to each other with respect to at least one arrangement direction are sequentially exposed. Therefore, exposure is always performed on an area that is not affected by the local thermal expansion of the object or is sufficiently small. Therefore, it is possible to avoid a decrease in pattern alignment accuracy (including overlay accuracy).

  According to a second aspect of the present invention, there is provided a step of forming the plurality of pattern regions in which a pattern is formed on an object using the exposure method of the present invention; and the object in which the plurality of pattern regions are formed. And a step of developing the device.

From a third aspect, the present invention is an exposure apparatus that irradiates an energy beam to transfer a pattern onto an object, the movable body holding and moving the object; and a plurality of marks on the object. A mark detection system for detecting; a pattern generating device for irradiating the sensitive layer formed on the object with the energy beam to form the pattern on the object; required pattern alignment accuracy; and the sensitive based on the relationship between the energy beam irradiation amount and the alignment accuracy for the layer, using the movable body and said pattern generator, a control system system you exposing the object by the exposure method of the present invention An exposure apparatus.

According to this, based on the required alignment accuracy of the pattern by the control system and the relationship between the irradiation amount of the energy beam on the sensitive layer and the alignment accuracy, the exposure method of the present invention allows the object to be used. but Ru is exposed. Therefore, it is possible to avoid a decrease in pattern alignment accuracy (including overlay accuracy).

  Hereinafter, an embodiment of the present invention will be described with reference to FIGS.

  FIG. 1 shows a schematic configuration of an exposure apparatus 100 according to an embodiment. The exposure apparatus 100 is a step-and-repeat projection exposure apparatus (so-called stepper). As will be described later, in the present embodiment, a projection optical system PL is provided. In the following, a direction parallel to the optical axis AX of the projection optical system PL is a Z-axis direction, and in a two-dimensional plane orthogonal to the Z-axis direction. In FIG. 1, the left and right direction on the paper surface is defined as the X axis direction, and the direction orthogonal to the paper surface is defined as the Y axis direction.

  The exposure apparatus 100 holds an illumination system IOP, a reticle stage (reticle holder) RST that holds a reticle R, a projection optical system PL that projects an image of a pattern formed on the reticle R on the wafer W, and a wafer 2. An XY stage 20 that moves on a dimensional plane (within the XY plane), a drive system 22 that drives the XY stage 20, a control system that controls these, and the like are provided.

  The illumination system IOP includes, for example, a light source composed of an ultra-high pressure mercury lamp that outputs an ultraviolet bright line (g-line, i-line, etc.), an elliptical mirror, a reflection mirror, a wavelength filter, a fly-eye integrator, a relay lens system, and a variable field of view. An illumination optical system including a diaphragm (reticle blind), a bending mirror, a condenser lens, and the like is included. A shutter for closing and opening the optical path is disposed in the vicinity of the second focal point of the elliptical mirror. Details of such an illumination system are disclosed in, for example, Japanese Patent Application Laid-Open No. 2004-146732. In the illumination system, the light emitted from the light source passes through the wavelength filter to become the illumination light IL for exposure, and the illumination light IL is adjusted to a luminous flux having a uniform illuminance distribution by a fly eye integrator, and then the variable field of view. By passing through the stop, the rectangular illumination area on the reticle R is illuminated with substantially uniform illuminance.

  Reticle stage RST is arranged below illumination system IOP in FIG. 1 (on the −Z side). On reticle stage RST, reticle R is held by suction via a vacuum chuck (not shown) or the like. Reticle stage RST can be finely driven in a rotation direction (θz direction) around the X axis direction, the Y axis direction, and the Z axis by a drive system (not shown). Thus, reticle stage RST can position reticle R (reticle alignment) in a state where the center of the pattern of reticle R (reticle center) substantially coincides with optical axis AXp of projection optical system PL. FIG. 1 shows a state in which this reticle alignment is performed.

  Projection optical system PL is arranged below reticle stage RST in FIG. 1 (on the −Z side) so that its optical axis AXp is parallel to the Z axis. Here, the projection optical system PL is a double-sided telecentric reduction system, and a refractive optical system (not shown) comprising a plurality of lens elements arranged at a predetermined interval along a direction parallel to the optical axis AXp is used. Yes. Among the plurality of lens elements, a plurality of specific lens elements are controlled by an imaging characteristic correction controller (not shown) based on a command from the main controller 28, and the projection optical system PL thereby has its optical characteristics. For example, magnification, distortion, coma aberration, and field curvature are adjusted (including imaging characteristics).

  The projection magnification of the projection optical system PL is, for example, 1/5 (or 1/4). For this reason, when the reticle R is uniformly illuminated by the pulse illumination light IL, the pattern image of the reticle R is reduced and projected onto the exposed area on the wafer W coated with the photoresist. Thereby, a reduced image of the pattern of the reticle R is transferred onto the wafer W.

  The XY stage 20 is disposed below (-Z side) in FIG. 1 of the projection optical system PL, and freely moves in the XY plane along the upper surface of a base (not shown). A wafer table 18 is mounted on the XY stage 20, and a wafer W is held on the wafer table 18 by vacuum suction or the like via a wafer holder (not shown).

  The wafer table 18 is also called a Z / tilt stage, and minutely drives the wafer holder holding the wafer W in the Z-axis direction and the tilt direction with respect to the XY plane. A movable mirror 24 is provided on the upper surface of the wafer table 18. A laser interferometer 26 is provided facing the reflecting surface of the movable mirror 24. The laser interferometer 26 irradiates the movable mirror 24 with a laser beam and receives the reflected light, thereby measuring the position of the wafer table 18 in the XY plane. Actually, an X moving mirror having a reflecting surface orthogonal to the X axis and a Y moving mirror having a reflecting surface orthogonal to the Y axis are provided, and the position in the X axis direction is measured correspondingly. And an X laser interferometer for measuring a position in the Y-axis direction. However, in FIG. 1, these are shown as the movable mirror 24 and the laser interferometer 26. Note that the X laser interferometer and the Y laser interferometer are multi-axis interferometers having a plurality of measurement axes, and yawing (rotation around the Z axis (θz rotation)) and pitching (rotation around the X axis (rotation around the X axis ( θx rotation)) and rolling (rotation around the Y axis (θy rotation)) can also be measured. Therefore, the laser interferometer 26 can measure position information of the wafer table 18 in the five-degree-of-freedom directions (X, Y, θz, θy, and θx directions).

  The position information measured by the laser interferometer 26 is supplied to the main controller 28. The main controller 28 positions the wafer table 18 by controlling the XY stage 20 via the drive system 22 based on the position information.

  In addition, the exposure apparatus 100 of the present embodiment is provided with a focus sensor AFS that measures the position and inclination of the surface of the wafer W in the Z-axis direction. The focus sensor AFS includes, for example, an oblique incidence type multipoint focal position detection system having a light transmission system 50a and a light reception system 50b disclosed in US Pat. No. 5,502,311 and the like. The measurement result of the focus sensor AFS is also supplied to the main controller 28. The main controller 28 drives the wafer table 18 in the Z-axis direction, θx direction, and θy direction via the drive system 22 according to the measurement result, and the position and inclination of the wafer W with respect to the optical axis direction of the projection optical system PL. To control.

  As described above, by driving the wafer table 18, the position of the wafer W can be controlled in the directions of five degrees of freedom (X, Y, Z, θx, θy). The position of the wafer W in the remaining θz direction (yawing) is controlled by rotating at least one of reticle stage RST and wafer table 18 in accordance with the yawing of wafer table 18 measured by laser interferometer 26. The

  Further, a reference plate FP is fixed on the wafer table 18 so that the surface thereof is the same height as the surface of the wafer W. On the surface of the reference plate FP, various reference marks including reference marks used for baseline measurement of an alignment detection system, which will be described later, are formed.

  Furthermore, in the present embodiment, an off-axis alignment detection system AS is provided on the side surface of the projection optical system PL. As the alignment detection system AS, for example, an image processing type FIA (Field Image Alignment) system is used. The alignment detection system AS can measure the position of the reference mark formed on the reference plate FP and the alignment mark formed on the wafer W in the two-dimensional direction (X-axis and Y-axis directions).

  In the present embodiment, the main controller 28 performs fine alignment or the like that accurately measures the position of each exposed region on the wafer using the alignment detection system AS. In addition, as the alignment detection system AS, for example, an alignment sensor that irradiates a target mark with coherent detection light and detects two diffracted lights (for example, the same order) generated from the target mark alone, Alternatively, it can be used in combination with an FIA system or the like.

  The alignment control device 16 performs A / D conversion on the output signal DS from each alignment sensor constituting the alignment detection system AS, calculates the converted signal, and detects the mark position. This detection result is supplied from the alignment controller 16 to the main controller 28.

  In addition, the exposure apparatus 100 of the present embodiment is provided with a pair of reticle alignment detection systems (not shown) above the reticle R. The pair of reticle alignment detection systems are, for example, a reticle mark on the reticle R or a reference mark on the reticle stage RST via the projection optical system PL as disclosed in US Pat. No. 5,646,413. (Neither shown) and a TTR (Through The Reticle) alignment system for simultaneously observing the mark on the reference plate FP. The detection signal of the reticle alignment detection system is supplied to the main controller 28 via the alignment controller 16.

  The control system is mainly composed of a main control device 28 composed of a microcomputer or the like for comprehensively controlling the entire device.

  Here, when the irradiation amount of the illumination light IL on the wafer is large, pattern alignment accuracy (accuracy of alignment between patterns formed in a plurality of shot regions formed in the same layer, compared to the case where the illumination light IL is small, In addition, the overlay accuracy of patterns in a plurality of layers formed on the wafer (including the overlay accuracy hereinafter) decreases. Here, the irradiation amount of the illumination light IL on the wafer can be variously defined. Here, the product of the dose amount of the illumination light IL (amount per unit area) and the transmittance of the reticle is defined as the irradiation amount of the illumination light IL. Defined as quantity.

  FIG. 2A shows the surface of the wafer W when the irradiation amount of the illumination light IL is small. Points in FIG. 2A, for example, points Pa and Pb, indicate the center of the partition area (shot area). FIG. 2A shows a state in which the illumination light IL is irradiated to the partitioned area Sa, that is, a state in which the partitioned area Sa is being exposed. In FIG. 2A, a partitioned area Sb adjacent to the partitioned area Sa is a partitioned area to be exposed next to the partitioned area Sa. In the state shown in FIG. 2A, the partition regions Sa and Sb are not deformed due to thermal expansion, and the designed rectangular shape is maintained.

  On the other hand, FIG. 2B shows the surface of the wafer W when the irradiation amount of the illumination light IL is larger than that shown in FIG. FIG. 2B shows a state where the illumination light IL is applied to the partitioned area Sa ′, that is, a state where the partitioned area Sa ′ is being exposed. In FIG. 2B, a partitioned area Sb ′ adjacent to the partitioned area Sa ′ is a partitioned area that is to be exposed next to the partitioned area Sa ′. As shown in FIG. 2B, the irradiation of the illumination light IL causes the wafer W to expand locally and isotropically around the center Pa ′ of the partitioned area Sa ′, and thereby the partitioned area Sa. ', Sb' is deformed (locally deformed). In FIG. 2B, the design shapes (rectangular shapes) of the partitioned areas Sa ′ and Sb ′ are indicated by broken lines. Therefore, in the next exposure of the partitioned area Sa ′, the reticle pattern is transferred to the deformed partitioned area Sb ′ in a shape corresponding to the designed shape (rectangular shape).

  FIG. 2C shows the surface of the wafer W after the exposure for all the divided areas in the case shown in FIG. 2B (when the irradiation amount of the illumination light IL is relatively large). ing. The pattern transferred to the partition area deformed as described above is cooled by the wafer W and the local deformation is recovered, so that the stepping direction (for example, + X with respect to the partition area aligned in the X-axis direction including the partition area S ′) The center of the pattern is shifted in the reverse direction (−X direction) from the center P ′ of the partition area. In this manner, pattern overlay deviation (pattern deviation of the pattern itself and deviation from the design exposure position) occurs. Furthermore, since the thermal expansion of the wafer W depends on the irradiation amount (intensity and irradiation time) of the illumination light IL, the thermal expansion coefficient of the wafer W, the heat dissipation, and the like, the pattern overlay deviation has a certain systematic property (for example, However, it occurs almost randomly.

  In the exposure apparatus 100 of the present embodiment, in order to avoid the deterioration of reticle pattern overlay accuracy due to thermal expansion as described above, the wafer is partially exposed and repeated several times, so that all the partition areas are exposed. An exposure method for transferring a pattern is employed.

Hereinafter, exposure control performed by the main controller 28 in the exposure apparatus 100 of the present embodiment will be described. In the present embodiment, the main controller 28 divides the partitioned areas arranged on the wafer into a plurality (M) of groups. Here, as an example, a case will be described in which partitioned areas are grouped into two sets (M = 2). 3A and 3B show two sets of partitioned areas set on the wafer, respectively. In the figure, only the number _j of the partitioned area S _j is given in the corresponding area. On the wafer W, for example, 45 partition areas are two-dimensionally arranged along the X-axis direction and the Y-axis direction. The main control device 28 sets 24 divided areas shown in FIG. 3A among these divided areas as the first set. In the first set, the partitioned areas are extracted in a checkered pattern (the target partitioned areas are arranged every N (= 1) in the X-axis direction and the Y-axis direction). ing. The main control device 28 sets the remaining 21 partitioned areas shown in FIG. 3B as the second set. For the second set, similarly, partitioned areas that are not adjacent to each other in the two-dimensional arrangement direction are extracted. Thus, main controller 28 extracts the partitioned areas that are not adjacent to each other in the X-axis direction and the Y-axis direction in the same set in the partitioned area grouping. In other words, adjacent partition regions having a large degree of deformation due to local thermal expansion of the wafer are distributed to different groups.

  Next, the procedure of the exposure method in the present embodiment will be described with reference to the flowchart shown in FIG. This flowchart shows an outline of a processing algorithm performed by the CPU in the main controller 28. Here, it is assumed that exposure is performed on a predetermined number of wafers divided into two sets of partitioned areas shown in FIGS. 3 (A) and 3 (B).

  First, at step 200, main controller 28 loads reticle R onto reticle stage RST using a reticle loader (not shown). Then, main controller 28 performs preparatory work such as reticle alignment and measurement of the baseline of alignment detection system AS, and adjustment of the irradiation amount of illumination light IL.

In the next step 202, the main controller 28 exchanges the wafer on the wafer table 18 using a wafer exchange mechanism (not shown). However, if there is no wafer on the wafer table 18, the wafer W is simply loaded onto the wafer table 18. Here, the wafer W is exposed to at least one layer, and a plurality of, for example, 45 partition regions S _{1 to} S ₄₅ are formed (see FIGS. 3A and 3B), and the surface thereof. It is assumed that the sensitive layer is formed by applying a photoresist. In addition, it is assumed that at least one alignment mark (base mark) is attached to each partition region S _j (j = 1 to 45). Further, main controller 28 sets 1 as a counter i indicating the group number of the partition area to which the pattern is transferred onto wafer W as an initial setting (i ← 1).

In the next step 204, the main controller 28 uses the alignment detection system AS to position coordinates of a specific plurality of alignment marks (sample marks) among the plurality of alignment marks (base marks) formed on the wafer W. Enhanced to calculate array coordinates in the XY plane of the partition regions S _{1 to} S ₄₅ by statistical calculation using, for example, the least square method disclosed in US Pat. No. 4,780,617 and the like -Perform global alignment (EGA). Here, at the time of EGA, the main controller 28 moves the XY stage 20 via the drive system 22 based on the position information measured by the laser interferometer 26, so that a plurality of sample marks on the wafer W are obtained. Are sequentially positioned and detected within the detection field of the alignment detection system AS. Then, main controller 28 detects the X and Y position coordinates of each sample mark based on the detection center detected by alignment detection system AS, and measurement information of laser interferometer 26 at the time of detection (of wafer table 18). XY position coordinates in the stage coordinate system of each sample mark are calculated based on (X, Y position coordinates).

In the next step 206, the main controller 28 performs exposure on the i-th set of partitioned areas, here, the first set of partitioned areas shown in FIG. Specifically, the main controller 28 determines the driving system based on the positional information of the wafer table WTB measured by the laser interferometer 26, the array coordinates of each partition area obtained by the EGA, and the measurement result of the baseline. 22, the exposure center (optical axis AXp) is numbered 1, 3, 5, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 26 shown in FIG. The centers of the partitioned areas labeled 28, 30, 32, 34, 36, 38, 40, 41, 43, 45 are sequentially positioned at the exposure center (optical axis AXp). Then, each time positioning is performed, main controller 28 irradiates illumination light IL to each of the first set of partitioned areas S _j via reticle R and projection optical system PL, and transfers the pattern of reticle R, respectively.

  In the next step 208, the main controller 28 confirms whether or not the exposure for all the set of divided areas (M (= 2) sets) has been completed. Here, since i (= 1) ≠ M (= 2), the determination in step 208 is denied and the process proceeds to step 210.

  In step 210, the main controller 28 cools the wafer W by waiting for a predetermined time while the wafer W is placed on the wafer table 18, thereby incrementing the counter i by 1 (i ← i). +1). Here, the time required for cooling (cooling time) is the degree of heating of the wafer W, that is, the irradiation amount of the illumination light IL, the heat dissipation of the wafer W, the performance of the cooling device (not shown), or the position of the pattern. It is determined from the cooling time of the projection optical system PL that is periodically performed during the exposure process in order to maintain alignment accuracy, throughput, and desired imaging performance. Here, the alignment accuracy of the pattern can be evaluated from the result of wafer alignment, for example. Therefore, prior to step 210, EGA is executed in the same procedure as in step 204, the cooling time is determined according to the alignment accuracy of the evaluated pattern, and the wafer W can be cooled (in this case, as shown in FIG. 4). Step 204 performed after step 210 can be omitted). Depending on the degree of heating of the wafer, the wafer W may not need to be cooled. In this case, in step 210, the counter i is incremented by 1, and then the process directly returns to step 204. However, the cooling time of the wafer W in step 210 is limited by the time limit required for exposing all the partitioned areas, that is, the required throughput.

  Note that, when the irradiation amount of the illumination light IL is large, the projection optical system PL is heated and the desired imaging performance cannot be maintained. Therefore, the exposure apparatus 100 can perform a predetermined number of sheets even when performing normal exposure. Each time the exposure of the wafer is completed, the projection optical system PL is cooled by providing a certain waiting time. In the present embodiment, the projection optical system PL is cooled in parallel with the cooling of the wafer W (step 210). That is, the cooling time of the projection optical system PL set in the case of performing normal exposure is divided and overlapped with the time for cooling the wafer W (step 210), while exposure to a predetermined number of wafers is performed. The waiting time provided every time it is finished is omitted. Therefore, the throughput does not decrease due to the actual problem, the cooling process of the wafer W in step 210.

  Main controller 28 cools wafer W and then repeats steps 204 and 206. In step 204, EGA for exposure is performed on the i-th set of partitioned areas (i = 2 in this case). Here, the main controller 28 evaluates deformation, misalignment, and the like of the i-th partition area based on the result of EGA. Based on the evaluation result, the main controller 28 controls, for example, a specific lens element in the projection optical system PL to adjust the shape, position, and the like of the projected image of the pattern. The i-th partitioned area, here the second set of partitioned areas shown in FIG. 3B, is sequentially exposed. In this case, sections numbered 2, 4, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31, 33, 35, 37, 39, 42, 44 The pattern of the reticle R is sequentially transferred to the area.

  In the next step 208, the main controller 28 confirms whether or not the exposure for all the set of divided areas (M (= 2) sets) has been completed. Here, since i (= 2) = M, the determination in step 208 is affirmed, and the routine proceeds to step 212.

  In step 212, main controller 28 determines whether or not exposure of a predetermined number of wafers has been completed. If this determination is denied, the process returns to step 202, and the processes of steps 202, 204, 206, 208, and 210 are repeated until the determination in step 212 is affirmed. On the other hand, if the determination in step 212 is affirmed, main controller 28 ends the series of processes.

The exposed wafer W unloaded from the wafer table 18 by the wafer exchange described above is transferred to a coater / developer (not shown) via a wafer transfer system (not shown) and developed. After the development, a resist image having a pattern of the reticle R is formed in 45 divided areas _Sj on the wafer W.

  By the way, in the exposure apparatus 100 of the present embodiment, the main controller 28 performs the exposure process according to the flowchart of FIG. 4 described above (hereinafter referred to as a target partition area division exposure process for convenience) and the normal exposure process. It is designed to switch automatically. Hereinafter, this point will be described.

  FIG. 5 shows the relationship between the degree of heating of the wafer and the irradiation amount of the illumination light IL. As shown in FIG. 5, the overlay accuracy (here, the overlay error is taken as the index value) becomes worse as the irradiation amount of the illumination light IL is higher (the overlay error becomes larger).

  In the present embodiment, a curve indicating the relationship between the dose and the overlay accuracy as shown in FIG. 5 is obtained in advance and stored in the memory. Then, the main controller 28 performs normal exposure processing using the curve shown in the figure based on the dose set by the operator via an input / output device (not shown) and the required overlay accuracy (required accuracy). The target divided area division exposure process according to the flowchart of FIG. 4 is switched. That is, the main controller 28 performs normal exposure processing (45 arranged on the wafer W) when the required accuracy is satisfied with respect to the irradiation amount of the illumination light IL (and when the irradiation amount is lower than this). Are sequentially exposed). On the other hand, when the irradiation amount of the illumination light IL is high and the overlay accuracy is worse than the required accuracy (the overlay error is large), the main controller 28 performs the target partition area division exposure process according to the flowchart of FIG.

  Note that the exposure apparatus is limited by the time limit required for exposing all the partitioned areas, that is, the required throughput. Therefore, if it is expected that the throughput will be extremely reduced by performing the exposure control based on the flowchart shown in FIG. 4, the main controller 28 may determine whether the overlay accuracy is lower than the required accuracy. There is a possibility that the target divided area division exposure process itself according to the flowchart shown in FIG. It should be noted that an exposure mode giving priority to overlay accuracy and an exposure mode giving priority to throughput are configured so that an operator or the like can select at the start of exposure, and the main controller 28 performs exposure processing in the selected exposure mode. You may make it do.

  As described above, in the exposure method of the present embodiment, first, a part of the plurality of partitioned areas arranged on the wafer is sequentially exposed (see FIG. 3A), and then the unexposed partitioned areas. Are exposed (see FIG. 3B). Here, the first exposure target partition region and the subsequent exposure target partition region are arranged in a checkered pattern. Therefore, as long as the partitioned areas arranged in the one arrangement direction are sequentially exposed, exposure is always performed on a partitioned area that is not affected by the local thermal expansion of the wafer or is sufficiently small. It is possible to avoid a decrease in the accuracy (including overlay accuracy). Further, when performing subsequent exposure, a plurality of sample marks on the wafer are detected, and the wafer is moved and aligned according to the result, so that the exposure is performed. Even if the wafer is deformed, exposure processing is performed in consideration of the deformation of the wafer, and a decrease in pattern alignment accuracy (including overlay accuracy) is suppressed.

  Furthermore, the main controller 28 provided in the exposure apparatus 100 of the present embodiment exposes the wafer by an exposure method according to the flowchart shown in FIG. 4 based on the required overlay accuracy, or a plurality of arrays arranged on the wafer. It is determined whether the pattern is sequentially transferred to all of the divided areas (normal exposure is performed). Accordingly, whether or not to apply the exposure method of the present invention is accurately determined, so that it is possible to avoid a decrease in pattern alignment accuracy (including overlay accuracy).

  In the above-described embodiment, the case where at least one layer of exposure is performed on the wafer W, that is, the case where the second layer and subsequent exposures are performed is illustrated, but the present invention is not limited thereto, and the first layer is exposed. When performing the exposure, the target partition area division exposure process may be performed according to the same flowchart as the flowchart of FIG. However, in this case, since there is no ground mark on the wafer, wafer alignment (EGA) is omitted when exposing the first set of partitioned areas. In the exposure for the second and subsequent partitioned areas, EGA may be performed using the latent image of the mark formed on the sensitive layer on the wafer in the previous exposure as a detection target. Of course, when performing exposure for the second and subsequent layers, EGA may be performed with the latent image of the mark as a detection target when exposing the partitioned areas for the second and subsequent sets.

  In the above-described embodiment, the plurality of partitioned areas on the wafer are divided into two sets so that the partitioned areas to be exposed are extracted in the X-axis direction and the Y-axis direction every other area. In other words, the case where M in the flowchart of FIG. However, the present invention is not limited to this, and if the partition areas that are not adjacent to each other in at least one of the X-axis direction and the Y-axis direction are sequentially exposed, the non-exposure target partition areas arranged between the exposure target partition areas The number is not limited to this. For example, the number may be two or three. That is, a plurality of partitioned areas on the wafer may be grouped into three or more groups. In this case, even if the exposure for the plurality of divided areas belonging to the second set is completed, the determination in step 208 in FIG. 4 is denied. Therefore, the main controller 28 determines until the determination in step 208 is affirmed, that is, Steps 204, 206, 208, and 210 are repeated until the exposure for all sets of partitioned areas is completed.

  When a plurality of partitioned areas on the wafer are grouped into M sets, for example, exposure is performed every N = (M−1) for the partitioned areas that are sequentially exposed during normal exposure. Become. For example, in the case of grouping into three sets, the first set of partition area numbers (1, 4, 7,..., 40, 43) on the wafer W shown in FIG. .., 41, 44) and the third set of partition area numbers (3, 6, 9,..., 42, 45), and these are the first exposure, second exposure, and third exposure. Respectively. In this case, in any of the first exposure, the second exposure, and the third exposure, the partitioned areas that are not adjacent at least in the X-axis direction are sequentially exposed.

  The number of repetitions of steps 204, 206, 208, and 210, that is, the number M of division areas is determined from the degree of heating of the wafer W, pattern alignment accuracy, throughput, and the like. The pattern alignment accuracy can be evaluated from the result of wafer alignment, for example. The degree of heating of the wafer W depends on the irradiation amount of the illumination light IL, the heat dissipation of the wafer W, the performance of a cooling device (not shown), and the like. That is, the degree of heating of the wafer W is higher as the irradiation amount of the illumination light IL is higher, and is lower as the heat dissipation of the wafer W and the performance of the cooling device are higher. The main controller 28 sets M to a larger value as the degree of heating is higher. For each type of wafer, main controller 28 measures in advance the relationship between the degree of heating of the wafer and the irradiation amount of illumination light IL, and determines the number M of groups before the start of exposure according to the result. Can do.

  In addition, it is not necessary to regularly extract the areas to be exposed, such as every other area or every other area. In short, the areas to be exposed overlap sequentially with areas that are not adjacent to each other with respect to at least one arrangement direction on the wafer. It is only necessary that exposure is performed and a pattern region in which a plurality of patterns (45 patterns in the above embodiment) are finally formed is formed. Therefore, it is not always necessary to divide the partition areas.

  In the above embodiment, in determining the grouping number M of the plurality of divided areas, both the pattern overlay accuracy and the throughput are considered. However, the present invention is not limited to this, and the grouping is based on only one of them. The number M may be determined.

  In the exposure apparatus 100 of the above embodiment, the position of the wafer table 18 is measured using the laser interferometer 26. Here, instead of the laser interferometer 26, an encoder (an encoder system including a plurality of encoders) may be used. Alternatively, the laser interferometer 26 and the encoder may be used in combination. In addition, the alignment system for detecting a plurality of marks on the wafer includes five (5) including one primary alignment system and four secondary alignment systems as disclosed in, for example, pamphlet of International Publication No. 2008/056735. You may use the alignment apparatus which consists of FIA type | system | group of an eye.

  In the above-described embodiment, the exposure method of the present invention is applied to a step-and-repeat reduction projection exposure apparatus as an example. However, the present invention is not limited to this, and a scanning-type exposure apparatus such as a step-and-scan method is used. It can also be applied to. The present invention can also be applied to a step-and-stitch reduction projection exposure apparatus, a proximity exposure apparatus, or a mirror projection aligner that synthesizes a shot area and a shot area. Further, as disclosed in, for example, US Pat. No. 6,590,634, US Pat. No. 5,969,441, US Pat. No. 6,208,407, etc. The present invention can also be applied to a multi-stage type exposure apparatus provided with a stage. Further, as disclosed in, for example, WO 2005/074014 pamphlet, an exposure apparatus including a measurement stage including a measurement member (for example, a reference mark and / or a sensor) is provided separately from the wafer stage. The present invention is applicable.

  Further, the projection optical system PL may be any of a refractive system, a catadioptric system, and a reflective system. Further, any of a reduction system, an equal magnification system, and an enlargement system may be used. The projected image may be either an inverted image or an erect image.

Furthermore, an ArF excimer laser (wavelength 193 nm), KrF excimer laser (wavelength 248 nm), F ₂ laser (wavelength 157 nm), or other pulse laser light source in the vacuum ultraviolet region may be used as the light source of the exposure apparatus of this embodiment. it can. In addition, as the illumination light for exposure, for example, a fiber doped with erbium (or both erbium and ytterbium), for example, an infrared or visible single wavelength laser beam oscillated from a DFB semiconductor laser or fiber laser. It is also possible to use a harmonic that is amplified by an amplifier and wavelength-converted into ultraviolet light using a nonlinear optical crystal.

  In the above embodiment, a light transmissive mask (reticle) in which a predetermined light shielding pattern (or phase pattern / dimming pattern) is formed on a light transmissive substrate is used. Instead of this reticle, for example, the US As disclosed in Japanese Patent No. 6,778,257, an electronic mask (variable molding mask, active mask) that forms a transmission pattern, a reflection pattern, or a light emission pattern based on electronic data of a pattern to be exposed. Alternatively, for example, a DMD (Digital Micro-mirror Device) that is a kind of non-light emitting image display element (spatial light modulator) may be used.

  Further, as disclosed in, for example, US Pat. No. 6,611,316, two reticle patterns are synthesized on a wafer via a projection optical system, and one shot on the wafer is obtained by one exposure. The present invention can also be applied to an exposure apparatus that double exposes a region almost simultaneously.

  Note that the object on which the pattern is to be formed in the above embodiment (the object to be exposed to the energy beam) is not limited to the wafer, but other objects such as a glass plate, a ceramic substrate, a film member, or a mask blank. But it ’s okay.

  The use of the exposure apparatus is not limited to the exposure apparatus for semiconductor manufacturing. For example, an exposure apparatus for liquid crystal that transfers a liquid crystal display element pattern onto a square glass plate, an organic EL, a thin film magnetic head, an image sensor ( CCDs, etc.), micromachines, DNA chips and the like can also be widely applied to exposure apparatuses. Further, in order to manufacture reticles or masks used in not only microdevices such as semiconductor elements but also light exposure apparatuses, EUV exposure apparatuses, X-ray exposure apparatuses, electron beam exposure apparatuses, etc., glass substrates or silicon wafers, etc. The present invention can also be applied to an exposure apparatus that transfers a circuit pattern.

  Furthermore, the present invention relates to an exposure apparatus for transferring a device pattern onto a glass plate, a thin film magnetic head, which is used for manufacturing not only an exposure apparatus used for manufacturing a semiconductor element but also a display including a liquid crystal display element and a plasma display. Also used in the manufacture of exposure equipment used to manufacture device patterns, exposure devices used to transfer device patterns onto ceramic wafers, imaging devices (CCDs, etc.), micromachines, DNA chips, etc., and masks or reticles can do.

  An electronic device such as a semiconductor element includes a step of designing a function / performance of the device, a step of manufacturing a reticle based on the design step, a step of manufacturing a wafer from a silicon material, and the exposure apparatus (pattern forming apparatus) of the above-described embodiment. ) A lithography step for transferring a mask (reticle) pattern onto a wafer, a development step for developing the exposed wafer, an etching step for removing exposed members other than the portion where the resist remains by etching, and etching is completed. It is manufactured through a resist removal step for removing unnecessary resist, a device assembly step (including a dicing process, a bonding process, and a package process), an inspection step, and the like. In this case, in the lithography step, the exposure method described above is executed using the exposure apparatus of the above embodiment, and a device pattern is formed on the wafer. Therefore, a highly integrated device can be manufactured with high productivity.

  The exposure method and the exposure apparatus of the present invention are suitable for forming a pattern on an object by irradiating an energy beam. The device manufacturing method of the present invention is suitable for manufacturing an electronic device such as a semiconductor element or a liquid crystal display element.

It is a figure which shows schematic structure of the exposure apparatus of one Embodiment of this invention. 2A to 2C are views for explaining the principle of deformation of the partition region due to thermal expansion of the wafer. FIGS. 3A and 3B are diagrams showing two sets of partitioned areas set on the wafer, respectively. It is a flowchart which shows the procedure of the exposure method of this embodiment. It is a figure which shows the relationship between the irradiation amount of illumination light, and a superimposition precision. It is a figure for demonstrating a modification.

Explanation of symbols

  IL ... illumination light, IOP ... illumination system, 20 ... XY stage, 26 ... laser interferometer, 28 ... main controller, 100 ... exposure apparatus, AS ... alignment detection system, PL ... projection optical system, W ... wafer.

Claims (9)

An exposure method for exposing an object by irradiating an energy beam and forming a plurality of pattern regions arranged two-dimensionally on the object,
A group of a plurality of first regions which are not adjacent to each other with respect to at least one arrangement direction on the object, and exposure by irradiating pre Symbol energy beam,
After exposing the plurality of first region groups, the plurality of second region groups that are not adjacent to each other with respect to at least one arrangement direction on the object are irradiated with the energy beam, and exposed .
Prior to exposure of the plurality of second area groups, a plurality of marks on the object are detected, and based on the detection result, the position of the object at the time of exposure to the plurality of second area groups is controlled. exposure method for. Said group of a plurality of first area includes a plurality of regions arranged in every other in a two-dimensional direction of the plurality of pattern regions,
Wherein the plurality of groups of the second region, among the plurality of pattern regions, excluding the first area group, an exposure method according to claim 1 comprising a plurality of remaining regions. It said marks detected prior to exposure, exposure method according to claim 1 or 2 which is a latent image of a mark formed on the sensitive layer by exposure to a group of the first region. A plurality of marks, exposure method according to claim 1 or 2 by exposure before layer is a mark formed on the object to be detected prior to the exposure. When performing exposure to a group of the plurality of second regions, from the detection results of the plurality of marks of the position and / or shape of the plurality of pattern regions, evaluates the deviation from a layer serving as a design value or reference the exposure method according to any one of claims 1 to 4, in consideration of the results of the evaluation performing exposure for the group of the second region. The division number of groups and group of the second region of the first region, exposure method according to any one of claims 1 to 5, determined from the alignment accuracy of the pattern. The object is held by a moving body that moves while holding the object,
For forming the plurality of pattern regions, exposure to a plurality of areas on said object, to any one of claims 1 to 6, which is performed without releasing the object held by the movable body The exposure method as described. Using the exposure method according to any one of claims 1 to 7 to form the plurality of pattern regions in which a pattern is formed on an object;
Developing the object on which the plurality of pattern areas are formed;
A device manufacturing method including: An exposure apparatus that irradiates an energy beam and transfers a pattern onto an object,
A moving body that holds and moves the object;
A mark detection system for detecting a plurality of marks on the object;
A pattern generating device for irradiating the sensitive layer formed on the object with the energy beam to form the pattern on the object;
Based on the required pattern alignment accuracy and the relationship between the alignment accuracy and the irradiation amount of the energy beam to the sensitive layer, the moving body and the pattern generation device are used. 7 and your system that system be exposed to the object by the exposure method according to any one of;
An exposure apparatus comprising: