JP5337079B2 - Plasma display panel and manufacturing method thereof - Google Patents

Description

  The present invention relates to a plasma display panel and a method for manufacturing the same, and more particularly, a plasma display panel in which a front plate whose display electrodes are covered with a dielectric layer is sealed facing a back plate across a discharge space, and a method for manufacturing the same. About.

  Conventionally, plasma display panels using ultraviolet radiation from gas discharge are known as display panels for flat image display devices. Plasma display panels are easy to display at high speed and large in size, and are widely put into practical use in fields such as video display devices and public information display devices.

  FIG. 1 is a view showing the structure of a conventional general AC type plasma display panel. Generally, a plasma display panel is formed by bonding a front plate 110 and a back plate 120 together. The front plate 110 includes a plurality of display electrode pairs each including a scan electrode 113 and a sustain electrode 112 on a front glass substrate 111 on the side facing the back plate 120, and covers the display electrode pairs 112 and 113. Thus, the dielectric layer 114 and the protective layer 116 are sequentially stacked.

In order to form the dielectric layer 114, first, a lead-based or non-lead-based low melting glass having a softening point of 550 ° C. to 600 ° C., an SiO ₂ material powder, and an organic binder made of butyl carbitol acetate or the like were mixed. The paste is applied to the front glass substrate 111. Then, baking is performed at about 550 ° C. to 650 ° C. to form the dielectric layer 114 having a final thickness of several μm to several tens of μm.

  The protective layer 116 is a film having a function of protecting the dielectric layer 114 and the display electrode pair 112 and 113 from ion collision of plasma discharge, efficiently emitting secondary electrons, and lowering a discharge start voltage. Usually, the protective layer 116 has a thickness of 0.5 μm by EB (Electron Beam) vapor deposition or sputtering using magnesium oxide (MgO) having excellent secondary electron emission characteristics, sputtering resistance and optical transparency. The film is formed to about ˜1 μm.

  On the other hand, on the back plate 120, a plurality of address (data) electrodes 122 for writing image data intersect the display electrode pairs 112 and 113 of the front plate 110 in the orthogonal direction on the surface facing the front plate 110. It is arranged as follows. The address electrode 122 is provided on the rear glass substrate 121 and is covered with a dielectric layer 123. A barrier rib (rib) 124 having a predetermined height made of low-melting glass is formed on the boundary of the back plate 120 with an adjacent discharge cell (not shown) so as to define a discharge space. It is formed with a pattern. On the surface of the dielectric layer 123 on the address electrode 122 and the side surfaces of the barrier ribs 124, phosphor layers 125R, 125G, and 125B are formed by applying and firing phosphor inks of red, green, and blue colors.

  The front plate 110 and the back plate 120 are disposed so that the display electrode pairs 112 and 113 and the address electrode 122 are opposed to each other so as to be orthogonal to each other across the discharge space, and are sealed at the periphery of the front plate 110 and the back plate 120. Is done. At this time, a Xe—Ne rare gas is sealed in the internally sealed discharge space at a pressure of about several tens of kPa as a discharge gas. A general plasma display panel has such a configuration.

  Here, the conventional general plasma display has the following problems. That is, as a first problem, when the pulses are applied to the display electrodes 112 and 113, a “discharge delay” from the rise of the pulse to the start of discharge may become apparent. In recent display fields including plasma display panels, pixels have high definition and the number of scanning lines tends to increase. For example, in a full high-definition television, the number of scanning lines is more than doubled compared to a conventional NTSC (National Television Standards Committee) television. As described above, if the plasma display panel has a high definition, high-speed driving associated therewith is required. In order to perform high-speed driving, it is necessary to narrow the pulse width of the address pulse applied during the writing period. Therefore, if the width of the address pulse is narrowed, the probability that discharge is normally performed within the address pulse width is reduced, and the problem of discharge delay becomes large. In the address discharge, discharge is performed one by one for each scan electrode 113 extending in the horizontal direction and spaced in parallel in the vertical direction. There are those where discharge is performed and those where address discharge is performed later. The longer the discharge pause period, the smaller the charge charged in the initialization period, so the discharge delay is longer. However, the number of scanning electrodes 113 increases as the number of scanning lines increases as the definition becomes higher. Then, the number of scan electrodes 113 having a long discharge pause period increases, and the probability of causing a discharge delay increases. Then, due to such a delay in discharge, there is a problem that write discharge cannot be performed on a cell that should be lit up, and a non-lighted cell is generated.

  As a countermeasure against this discharge delay, a single crystal MgO powder having an average particle diameter of 200 nm or more produced by a vapor phase method on the dielectric layer 114 or the MgO protective film 115 is used as a solvent to obtain a highly dispersible IPA ( By applying a coating solution (IPA 94 wt%, MgO powder 5 wt%, dispersant 1 wt%) to which glycerin or acetylene glycol is added as a dispersant, dissolved in an alcohol such as 2-propanol) by a spray method, A configuration for obtaining a surface layer in which MgO microcrystals are laminated is disclosed (for example, see Patent Document 1). With this configuration, MgO microcrystals emit electrons during discharge, and the discharge rate can be increased.

  With the configuration described in Patent Document 1, the first problem of “discharge delay” has been improved. However, in recent years, there has been a strong demand for power saving of electrical products, and there is also a demand for power saving for plasma display panels. In a high-definition plasma display panel, since the number of discharge cells is reduced and the number of discharge cells is increased, there is a problem that the operating voltage is increased to increase the reliability of the write discharge and the consumption voltage is increased. Further, in order to increase the luminous efficiency, it is preferable to increase the partial pressure of the Xe gas. However, in this case as well, there arises a problem that the operating voltage increases. Although the invention described in Patent Document 1 has the effect of improving the discharge delay, there is essentially no effect of reducing the sustain discharge voltage related to the light emission efficiency.

Therefore, in order to achieve both a reduction in driving voltage and a reduction in discharge delay, the protective layer 15 in FIG. 1 includes, as magnesium oxide, barium oxide (BaO), strontium oxide (SrO), calcium oxide (CaO), and the like, MgO. There has been proposed a plasma display panel having a configuration in which an alkaline earth metal oxide material having a discharge voltage lower than that of the protective layer is selected and formed by an EB vapor deposition layer or a sputtering method (for example, Patent Documents 2 and 3). reference). In the configurations of Patent Documents 2 and 3, MgO single crystal fine particles 115 are further dispersed in a solution to improve discharge delay, and the dispersion is sprayed, screen-printed, or The protective layer 116 is dispersed and dispersed on the surface on the discharge space side by an electrostatic coating method. Thereafter, the solvent is removed through a drying / firing process, and the MgO single crystal fine particles 115 are fixed on the surface of the protective layer 116. Then, the produced front board 110 and the back board 120 are bonded together using the glass for sealing. Next, the inside of the discharge space is evacuated to a high vacuum (for example, about 1.0 × 10 ⁻⁴ Pa), and at a predetermined pressure (for example, 66.5 kPa to 101 kPa), Ne—Xe system, He—Ne—Xe. A discharge gas such as a system or a Ne—Xe—Ar system is sealed. The plasma display panel is completed through the above steps, and the plasma display panel is configured using both a material for reducing the driving voltage and a material for reducing the discharge delay.

JP 2007-103230 A WO2007 / 126061 Publication WO2007 / 139184

  However, in the configurations described in Patent Documents 2 and 3 described above, the dispersion liquid or the dispersant actually reacts with an alkaline earth metal oxide such as SrO or CaO in the protective layer 116, and the alkaline earth metal However, there is a problem that the low discharge voltage inherently increases and the drive voltage cannot be reduced.

  These alkaline earth metal oxides are highly reactive, react with moisture, carbon dioxide gas, hydrocarbon gas, etc. in the atmosphere, and change to alkaline earth metal hydroxides and carbonates with high discharge voltage. It is known. In particular, in a normal sealing process in which the plasma display panel is heated to a high temperature in the atmosphere, the change of the protective layer to carbonate is significant. Therefore, as described in Patent Documents 2 and 3, in a plasma display panel in which single crystal fine particles for the purpose of reducing discharge delay are arranged in a protective layer of alkaline earth metal oxide which is a low voltage material. Actually, a sufficient low voltage characteristic is not actually obtained.

  SUMMARY OF THE INVENTION An object of the present invention is to provide a plasma display panel and a method for manufacturing the same that can achieve both reduction in driving voltage and reduction in address discharge delay.

In order to achieve the above object, a plasma display panel according to a first aspect of the present invention is a plasma display panel in which a front plate in which display electrodes are covered with a dielectric layer is sealed facing a back plate across a discharge space. There,
A fine particle layer formed on the dielectric layer, wherein a fine particle layer in which at least one kind of fine particles whose main component is magnesium oxide or calcium oxide is disposed;
And a protective layer containing a calcium oxide formed in the fine particle layer, was closed,
The fine particles are formed so as to sink into the dielectric layer so as to sink from the surface of the dielectric layer .

As a result, the protective layer can be formed after the fine particle layer is formed. Therefore, the protective layer can be formed in a state where the solvent of the fine particles is extinguished, and the discharge delay is reduced by the fine particles and the driving voltage is reduced. Reduction can be made compatible. In addition, the solvent can be reliably removed from the fine particles and fixed to the dielectric layer, and the reaction between the solvent and the protective layer can be reliably prevented.

A second invention is the plasma display panel according to the first invention, wherein
The protective layer is composed of a composite material of strontium oxide and calcium oxide or calcium oxide.

  Thereby, even when SrCaO or CaO having a characteristic of discharging at a low voltage is used, it is possible to reduce the discharge delay while maintaining the low voltage discharging characteristic and reducing the driving voltage.

A method for manufacturing a plasma display panel according to a third aspect of the invention is a method for manufacturing a plasma display panel in which a front plate and a back plate are sealed facing each other.
Preparing a glass substrate for the front plate having a dielectric layer formed on the surface;
A step of dispersing and dispersing a dispersion in which at least one kind of fine particles whose main component is magnesium oxide or calcium oxide is dispersed in a solvent, on the surface of the dielectric layer;
Firing the glass substrate at a temperature equal to or higher than the softening point of the dielectric layer, and forming a fine particle layer on the dielectric layer;
And a protective layer forming step of forming a protective layer containing calcium oxide on the fine particle layer.

  As a result, the solvent of the fine particle dispersion can be reliably removed by firing at a temperature equal to or higher than the softening point of the dielectric layer, and both reduction in driving voltage and reduction in discharge delay can be ensured.

4th invention is the manufacturing method of the plasma display panel based on 3rd invention,
After the protective film forming step, the method further includes a sealing step in which the front plate and the back plate are opposed to each other and sealed in a nitrogen, rare gas, or vacuum atmosphere.

  Thereby, it is possible to prevent calcium oxide from reacting with moisture, carbon gas, hydrocarbon gas and the like in the atmosphere, and a reduction in driving voltage can be realized with certainty.

A fifth invention is a method of manufacturing a plasma display panel according to the third or fourth invention,
The protective layer is composed of a composite material of strontium oxide and calcium oxide or calcium oxide.

  According to the present invention, it is possible to achieve both the reduction of the driving voltage of the plasma display panel and the reduction of the discharge delay.

It is the figure which showed the structure of the conventional common AC type plasma display panel. It is the figure which showed the example of whole structure of the plasma display panel which concerns on embodiment of this invention. It is the figure which showed the cross-sectional structural example of the front plate 10 of the plasma display panel which concerns on this embodiment. It is the figure which showed the example of the manufacturing method of the plasma display panel which concerns on this embodiment. It is the figure which showed the manufacturing method of the conventional plasma display panel as a comparative example. 6 is a diagram illustrating voltage characteristics of the plasma display panel according to Example 1. FIG. FIG. 3 is a diagram illustrating a driving voltage waveform of the plasma display panel according to the first embodiment. It is the figure which showed the characteristic of the discharge delay time of the plasma display panel which concerns on Example 2. FIG. It is the figure which showed the basic characteristic of the discharge phenomenon of the plasma display panel which concerns on Example 2. FIG.

  DESCRIPTION OF EMBODIMENTS Hereinafter, embodiments for carrying out the present invention will be described with reference to the drawings.

  FIG. 2 is a diagram showing an example of the overall configuration of the plasma display panel according to the embodiment of the present invention. In FIG. 2, the plasma display panel according to the present embodiment includes a front plate 10 and a back plate 20 as main components. The front plate 10 includes a front glass substrate 11, sustain electrodes 12, scan electrodes 13, a dielectric layer 14, a fine particle layer 15, and a protective layer 16. The back plate 20 includes a back glass substrate 21, address electrodes 22, a dielectric layer 23, partition walls (ribs) 24, and a phosphor layer 25.

  The front plate 10 and the back plate 20 are arranged to face each other, and a peripheral portion (not shown) is sealed to constitute a plasma display panel. In the front plate 10, the sustain electrode 12 and the scan electrode 13 disposed on the front glass substrate 11 are covered with a dielectric layer 14, and a fine particle layer 15 is further formed on the dielectric layer 14. And a protective layer 16 is formed. The back plate 20 has an address electrode 22 disposed on a back glass substrate 21, and the address electrode 22 is covered with a dielectric layer 23, and is parallel to the address electrode 22 so as to partition the space on each address electrode 22. A partition wall 23 is formed on the dielectric layer 23, and a phosphor 25 is formed on the dielectric layer 23. One cell, which is a discharge unit, is configured in a space that includes a pair of the address electrode 22, the sustain electrode 12, and the scan electrode 13 and is partitioned by the barrier ribs 24.

  The front plate 10 forms a display screen of a plasma display panel, and includes a front glass substrate 11 on the forefront. The sustain electrodes 12 and the scan electrodes 13 extend in parallel in the horizontal direction and are alternately arranged so as to sandwich each other. The sustain electrode 12 and the scan electrode 13 form a pair of display electrodes (or display electrode pairs) 12 and 13. A sustain discharge is performed between the sustain electrode 12 and the scan electrode 13 to display an image. The scanning electrode 13 is also used when writing discharge is performed between the scanning electrode 13 and the address electrode 22 of the back plate 20, and data writing of a cell to be lit is performed.

  The dielectric layer 14 is a means that covers the display electrodes 12 and 13 disposed on the front glass substrate 11 and functions to store electric charges like a capacitor. The dielectric layer 14 is formed, for example, by melting low melting point glass powder. The thickness of the dielectric layer 14 may be formed to about 30 to 40 μm, and may be formed to a thickness of 35 μm, for example.

  The fine particle layer 15 is a layer made of fine particles that function to emit electrons during discharge and reduce discharge delay. The fine particle layer 15 is formed on the dielectric layer 14. The fine particle layer 15 includes at least one kind of fine particles whose main component is magnesium oxide or calcium oxide. Since the fine particle layer 15 is dispersed as fine particles on the surface of the dielectric layer 14, it is not always necessary to cover the entire surface of the dielectric layer 14. The fine particle layer 15 can be formed by various methods. For example, at least one kind of fine particles whose main component is magnesium oxide or calcium oxide is dispersed in a solvent to form a dispersion, and the dispersion is used as a dielectric layer. It may be formed by dispersing and spraying on the surface of 14, then removing the solvent component through a drying / firing process, and fixing the fine particles on the surface of the dielectric layer 14.

  The fine particles 15a forming the fine particle layer 15 are at least one kind of fine particles whose main component having an emission peak in an ultraviolet region of 200 to 400 nm based on excitation by an electron beam or ultraviolet rays is magnesium oxide or calcium oxide, Or a polyhedron shape having a shape of hexahedron or more and an average particle diameter of 0.1 to 3.0 μm, preferably 0.5 to 2.0 μm, more preferably 0.7 to 1.5 μm are used. can do. Further, for the purpose of improving the emission intensity, at least one kind of different elements selected from 2A group, 3A group and 3B group may be added in an amount of 1 wt% or less in terms of oxide.

  For the measurement of the average particle size, a laser diffraction scattering type particle size distribution measuring device (trade name: MT3300, manufactured by Nikkiso Co., Ltd.) was used.

  The protective layer 16 is a layer having a function of covering and protecting the dielectric layer 14 and reducing the driving voltage of discharge. The protective layer 16 is formed on the fine particle layer 15. Further, as described above, since the fine particle layer 15 does not necessarily cover the entire surface of the dielectric layer 14, the protective layer 16 is exposed without being covered with the fine particle layer 15. It will also cover the part that is.

  Note that more detailed configurations and functions of the fine particle layer 15 and the protective layer 16 will be described later with reference to another drawing.

  The back plate 20 is disposed on the back side of the image display surface of the plasma display panel, and includes a back glass substrate 21 on the back surface. A plurality of address electrodes 22 extend in parallel in the vertical direction and are arranged so as to cross the display electrodes 12 and 13. During the write discharge, a counter discharge is performed at a location where the scan electrode 13 and the address electrode 22 of the front plate 10 intersect.

  Similar to the dielectric layer 14 of the front plate 10, the dielectric layer 23 covers the address electrodes 22 and has a function of storing electric charges like a capacitor. The partition wall 24 is a means for partitioning each cell for each address electrode. The phosphor 25 is a substance that emits light upon receiving ultraviolet rays or electron beams. When discharge occurs in the cell, ultraviolet light is generated by the enclosed discharge gas, and the phosphor 25 emits light. The phosphor 25 is composed of a red phosphor 25R, a green phosphor 25G, and a blue phosphor 25B, and emits red, green, and blue light when irradiated with ultraviolet rays.

  Next, the configuration of the front plate 10 of the plasma display panel according to the present embodiment will be described in more detail with reference to FIG. FIG. 3 is a diagram showing an example of a cross-sectional configuration of the front plate 10 of the plasma display panel according to the present embodiment.

  In FIG. 3, a front plate 10 in which a dielectric layer 14 is formed on the surface of a front glass substrate 11, a fine particle layer 15 is formed on the dielectric layer 14, and a protective layer 16 is formed on the fine particle layer 15. It is shown. In FIG. 3, the display electrodes 12 and 13 are omitted.

  In the prior art, the protective layer 16 is formed so as to cover the entire dielectric layer 14, and the fine particle layer 15 is formed on the protective layer 16. However, in the plasma display according to the present embodiment, a laminated layer is formed. The order is reversed, and the fine particle layer 15 is formed on the dielectric layer 14, and the protective layer 16 is formed on the fine particle layer 15. Each fine particle 15 a of the fine particle layer 15 is in a state where it sinks from the surface of the dielectric layer 14 and sinks into the dielectric layer 14. The details of the manufacturing method of the plasma display according to the present embodiment will be described later. When the fine particle layer 15 is formed on the dielectric layer 14, after the dispersion of the fine particles 15a is dispersed and dispersed on the dielectric layer 14, The front plate 10 is heated so as to be equal to or higher than the softening point of the dielectric layer 14. Then, since the dielectric layer 14 is melted and softened, the fine particles 15a are submerged from the surface of the dielectric layer 14 and become in a state of being embedded in the surface of the dielectric layer 14. By performing heating at such a sufficiently high temperature, most of the solvent of the dispersion liquid of the fine particles 15a can be thermally decomposed and removed by firing, and the fine particles 15 are integrated with the dielectric layer 14. It is formed by adhering.

  After the fine particle layer 15 is formed on the dielectric layer 14, the protective layer 16 is formed on the fine particles 15. However, since the solvent of the dispersion liquid of the fine particles 15a is almost completely removed, Even if the protective layer 16 is formed of a material containing SrCaO or CaO having high reactivity, the protective layer 16 does not form hydroxides or carbonates, and the original low discharge voltage property can be maintained.

  The average particle diameter of the fine particles 15a is 0.1 to 3.0 μm, preferably 0.5 to 2.0 μm, more preferably 0.7 to 1.5 μm, and the thickness of the protective layer 16 is about 700 nm. Therefore, the protective layer 16 does not cover all the fine particles 15a, and further, the surface of the protective layer 16 is cleaned up by discharge, and a part of the corners of the fine particles 15a is obtained by initial aging that stabilizes the discharge. Is considered to be more exposed from the protective layer 16. If the protective film 16 completely covers the fine particle layer 15, it is considered that the fine particles 15 a emit electrons and the effect of reducing the discharge delay does not occur. However, as shown in FIG. If a part is exposed, it is considered that electrons can be emitted from the exposed part and the effect of reducing the discharge delay can be generated.

  Furthermore, the protective layer 16 covers the upper surface other than the corners of the fine particles 15a and the entire exposed portion of the dielectric layer 14 where the fine particles 15a are not disposed on the surface, so that the dielectric layer 14 is protected. It is considered that the role and the function of generating discharge at a low voltage are fulfilled.

  Thus, according to the plasma display according to the present embodiment, the discharge delay is achieved by forming the fine particle layer 15 on the dielectric layer 14 and then forming the protective layer 16 on the fine particle layer 15. The functions of the fine particle layer 15 for reducing the pressure and the protective film 16 for reducing the driving voltage of the discharge can be exhibited in a balanced manner.

  Next, the manufacturing method of the plasma display panel according to the present embodiment will be described with reference to FIG. FIG. 4 is a view showing an example of a method for manufacturing a plasma display panel according to the present embodiment.

  In FIG. 4, steps 100 to 120 show a front plate manufacturing process, step 130 shows a back plate manufacturing process, and step 140 shows a sealing process. In FIG. 4, the same components as those described so far are denoted by the same reference numerals, and the description thereof is omitted.

In step 100, display electrodes 12 and 13 are formed on front glass substrate 11, and dielectric layer 14 is formed so as to cover display electrodes 12 and 13. For example, the dielectric layer 14 is formed by first covering the display electrodes 12 and 13 with lead or non-lead low-melting glass having a softening point of 550 ° C. to 600 ° C., SiO ₂ material powder and butyl carbitol. A paste mixed with an organic binder made of acetate or the like is applied. Then, it may be fired at about 550 ° C. to 650 ° C. to form the dielectric layer 14 having a final thickness of several μm to several 10 μm.

  In step 110, a fine particle arranging step is performed. In the fine particle arranging step, the fine particles 15a are arranged so as to cover the dielectric layer 14, and the fine particle layer 15 is formed. In the fine particle arranging step, the dispersion liquid of fine particles 15 a is dispersed and dispersed on the dielectric layer 14, and the front plate 10 on which the fine particles 15 a are dispersed and dispersed on the dielectric layer 14 is applied to the dielectric layer 14. Heating and firing above the softening point to fix the fine particles 15a on the dielectric layer 14 to form the fine particle layer 15.

  Specifically, the fine particles 15a are arranged, for example, by first dispersing a high-purity MgO fine powder having a cubic shape with a diagonal length of about 0.5 to 2 μm in a dispersion solution of ethyl alcohol. And Next, a dispersion solution of MgO fine powder is spray-coated on the dielectric layer 14 using a spray gun, and then the front glass substrate 11 is heated to a temperature higher than the softening point of the dielectric layer 14 to form the MgO fine particle dielectric layer 14. Stable fixing and effective removal of solvent components. The softening point of the dielectric layer 14 depends on the material of the dielectric layer 14 but is generally in the range of 550 ° C. to 600 ° C. as described above. For example, the front glass substrate 11 may be heated and baked to 580 ° C. or higher by using the dielectric layer 14 having a softening point of about 580 ° C. By heating and firing above the softening point of the dielectric layer 14, the dielectric layer 14 melts and softens, and the fine particles 15 a sink into the softened surface of the dielectric layer 14. The fine particles 15a are fixed to the surface of the dielectric layer 14 in the submerged state. Thereby, not only the solvent is surely removed, but also the bond between the fine particles 15a and the dielectric layer 14 is strengthened, and although not the entire surface of the dielectric layer 14, the fine particles 15a are formed like a layer. 15

  In addition, you may perform dispersion | distribution dispersion | distribution of a dispersion solution by the screen printing method and the electrostatic coating method other than the spray method. Further, the fine particle layer 15 may be configured using CaO fine powder. In this case, CaO fine particles 15 a are disposed on the dielectric layer 14.

In step 120, a protective layer forming step for forming the protective layer 16 is performed. In the protective layer forming step, fine particles are formed by EB (electron beam) vapor deposition using a target containing CaO (calcium oxide), specifically, for example, a target of CaO or SrCaO (composite material of strontium oxide and calcium oxide). A protective layer 16 is formed on the layer 15. Here, for example, the pressure when oxygen is supplied during deposition is set to 6.0 × 10 ⁻² Pa or less, the substrate temperature T is increased to 350 ° C., 150 ° C. <T <350 ° C., and the deposition rate is set. By setting the thickness to 0.5-15 nm / sec, a thin film of CaO or SrCaO having a thickness of about 700 nm may be formed as the protective layer 16. Alternatively, a target made of another alkaline earth metal oxide may be used. For example, an SrO thin film may be formed as the protective layer 16 using an SrO target.

  Note that the method for forming the thin film serving as the protective layer 16 is not limited to the EB vapor deposition method, and the film can be formed by a sputtering method, ion plating using a plasma gun, or the like. can get.

  By manufacturing the plasma display panel by the steps 110 and 120 described above, the dispersion of the fine particles 15a and the dispersing agent can be prevented from reacting with the alkaline earth metal oxide of the protective layer 16. it can.

  On the other hand, in step 130, the back plate 20 is manufactured. In manufacturing the back plate 20, first, the address electrode 22 is disposed on the back glass substrate 21, and the address electrode 22 is covered with the dielectric layer 23. The method for forming the dielectric layer 23 is the same as the method for forming the dielectric layer 14 of the front plate 10 described in step 100, and thus the description thereof is omitted. After the dielectric layer 23 is formed, the partition wall 24 is formed on the dielectric layer 23, and then the phosphor 25 is formed to complete the back plate 20.

  In step 140, a sealing process is performed. In the sealing step, the front plate 10 and the back plate 20 are arranged to face each other, and the front plate 10 and the back plate 20 are overlapped and sealed using a low melting point glass frit or the like.

  However, before the sealing is performed, the front plate 10 and the back plate 20 are accommodated in a chamber in which nitrogen gas is flowed, and the front plate 10 and the back plate 20 are respectively brought into contact with the sealing portion without being in contact with each other. Is heated at a high temperature to generate impure gas. Thereafter, the front plate 10 and the back plate 20 are overlapped and sealed to reduce impure gas remaining in the panel at the time of sealing, and the protective layer 16 that is an alkaline earth metal oxide layer is formed of water. It can prevent changing to an oxide or carbonate. In addition, it is possible to manufacture a plasma display panel that can achieve both reduction in driving voltage and reduction in discharge delay.

  Note that the sealing step may be performed in an inflow atmosphere of a rare gas such as Ar or He or in a vacuum atmosphere in addition to an inflow atmosphere of nitrogen gas. Even under these atmospheres, the reaction between the protective layer 16 and components in the atmosphere can be prevented, so that the plasma display panel can be manufactured while maintaining the low voltage discharge characteristics of the protective layer 16.

  FIG. 5 is a view showing a conventional plasma display panel manufacturing method as a comparative example. In FIG. 5, steps 200 to 220 are a front plate manufacturing process, step 230 is a back plate manufacturing process, and step 240 is a sealing process. The components described in FIG. 1 are described with the same reference numerals as those in FIG.

  In step 200, display electrodes 112 and 113 are disposed on the glass substrate 111 of the front plate 110 and covered with a dielectric layer 114. Step 200 is the same as step 100 in FIG. 4, and a detailed description thereof will be omitted.

  In step 210, the protective layer 116 is formed on the surface of the dielectric layer 114. In the method for manufacturing the plasma display panel according to the present embodiment described with reference to FIG. 4, the fine particle layer 15 is formed on the dielectric layer 14 after the formation of the dielectric layer 14, but in the conventional manufacturing method, A protective layer 116 is formed on the dielectric layer 114. The protective layer 116 is made of an alkaline earth metal oxide in order to achieve low voltage driving. The method for forming the protective layer 116 is the same as that in step 120 in FIG.

  In step 220, a fine particle disposing process is performed. The content of the fine particle disposing process is the same as that of step 110 in FIG. 4 and will not be described. However, a dispersion solution of the MgO fine particles is dispersed and dispersed on the protective layer 116 of alkaline earth metal oxide. Will be. At this time, the alkaline earth metal oxide is highly reactive and reacts with moisture, carbon dioxide gas, hydrocarbon gas, etc., so it reacts with the solvent of the dispersion solution, and from the oxide to hydroxide or carbonate. Will change. Then, the situation where the low voltage drive effect by the protective layer 116 formed in step 210 is lost occurs.

  In step 230, the back plate 120 is manufactured. Since the content is the same as that of step 130 in FIG. 4, the description thereof is omitted.

  In step 240, a sealing process is performed. The conventional sealing process is performed in the atmosphere. As described above, since the alkaline earth metal oxide protective layer 116 is highly reactive, it also reacts with components in the atmosphere. Therefore, when the sealing step is performed in the atmosphere, the protective layer 116 reacts with moisture, carbon dioxide gas, hydrocarbon gas, etc. in the atmosphere, and forms a hydroxide or carbonate. Therefore, even in the sealing step, the low voltage discharge effect of the protective layer 116 is reduced, resulting in the loss of the original good characteristics of the alkaline earth metal oxide material.

  As described above, in the conventional method for manufacturing a plasma display panel shown in FIG. 5, the protective layer 116 is altered in the fine particle disposing step in step 220 and the sealing step in step 240, and the protective layer 116 is The inherent low voltage discharge characteristics cannot be exhibited effectively.

  On the other hand, in the method for manufacturing the plasma display panel according to the present embodiment shown in FIG. 4, the step of arranging the fine particles in step 110 is performed before the formation of the protective layer 16, and the heating / firing is performed above the softening point of the dielectric layer 14. Thus, the solvent is completely removed, so that the low voltage discharge characteristics of the protective layer 16 can be maintained. Also, in the sealing step of step 140, the front plate 10 and the back plate 20 are sealed in an inflow atmosphere of nitrogen gas or a rare gas or in a vacuum atmosphere. The plasma display panel can be manufactured while maintaining the low voltage discharge characteristics of the protective layer 16.

  FIG. 6 is a graph showing voltage characteristics of the SrCaO protective layers 16 and 116 of the plasma display panel according to Example 1 and the conventional plasma display panel. In Example 1, an example in which a plasma display panel is actually configured using SrCaO for the protective layer 16 in the plasma display panel and the manufacturing method thereof according to the embodiments described so far will be described. In the first embodiment, the same reference numerals are used for the same components as those described so far.

  In FIG. 6, SrCaO is used as the protective layers 16 and 116, and MgO fine particles are provided as the fine particle layers 15 and 115 to constitute the front plates 10 and 110 of the plasma display panel, and 10% of Ne—Xe is included. An example in which discharge gas is sealed and driven at 20 kHz is shown. Moreover, each front board 10 and 110 is vacuum-heated at 350 degreeC before the sealing process. The sealing here was performed in nitrogen gas.

  In FIG. 6, the time lapse characteristics of the discharge voltage of the plasma display panel according to the present embodiment are shown by curves connecting white circles or black circles, and the time lapse characteristics of the discharge voltage of the conventional plasma display panel are white triangles or It is shown as a curve connecting black triangles. When the plasma display panel according to the present embodiment and the conventional plasma display panel are compared between the minimum discharge start voltages and the minimum discharge sustain voltages, the plasma according to the present embodiment has both the minimum discharge start voltage and the minimum discharge sustain voltage. The display panel shows a lower discharge voltage characteristic than the conventional plasma display panel. In the plasma display panel manufactured by the conventional process, the protective layer 16 of SrCaO reacts with the alcohol that is the solvent of the fine particle dispersion solution, and the voltage drop with respect to the operating time is not sufficiently advanced. The solvent used in this example is only ethanol, no dispersant is used, and the solvent is relatively easy to remove by heating. However, in the conventional plasma display panel, the discharge voltage does not decrease. It becomes a characteristic.

  On the other hand, in the plasma display panel according to the present example, since the solvent is sufficiently removed, the discharge voltage is reduced, and is 30 V or more lower than that of the conventional plasma display panel.

  As described above, in the plasma display panel and the manufacturing method thereof according to the present embodiment, the discharge voltage can be significantly reduced as compared with the conventional plasma display panel, and a low power consumption plasma display panel can be realized. it can.

  Next, the effect by the sealing process of the manufacturing method of the plasma display panel concerning a present Example is demonstrated. Table 1 shows a result of comparison between a plasma display panel using the SrCaO protective layer 16 sealed in the air and a plasma display panel sealed in nitrogen gas.

In Table 1, the first stage shows the result when the protective layer 16 of SrCaO is formed on the fine particle layer 15 and sealing is performed in nitrogen gas. The second stage shows the result when the protective layer 16 of SrCaO is formed on the dielectric layer 14 and sealing is performed in nitrogen gas. On the other hand, the third stage shows the result when the fine particles 15a are arranged on the SrCaO protective layer 16 and sealed in the atmosphere according to the prior art described in FIG. Note that a discharge gas containing 10% Ne—Xe was used as the discharge gas to be sealed.

  As shown in Table 1, according to the method for manufacturing a plasma display panel according to this embodiment in which sealing is performed in nitrogen gas, in the plasma display panel provided with the MgO fine particles 15a shown in the first stage, The same low discharge voltage characteristic as that of the plasma display panel not provided with the MgO fine particles 15a shown in the second stage was obtained. In addition, when the fine particle layer 150 is provided, the plasma display panel manufactured by the conventional plasma display panel manufacturing method that performs atmospheric sealing has a minimum start voltage, a maximum start voltage, a maximum sustain voltage, and a minimum sustain voltage [ In any of the items V], the discharge voltage is about twice that of the plasma display panel manufactured by the method of manufacturing a plasma display panel according to this example, and low discharge voltage characteristics are not obtained.

  Thus, the sealing step of the plasma display panel manufacturing method according to the present example is effective in realizing a low discharge voltage.

  Next, in the plasma display panel according to Example 1, in order to investigate the effect of disposing the MgO fine particles 15a, a driving voltage was applied and the discharge delay of the plasma display panel was measured.

  FIG. 7 is a diagram illustrating a voltage waveform of a drive voltage applied to the plasma display panel according to the first embodiment. In FIG. 7, drive voltage waveforms applied to the scan electrode 13, the sustain electrode 12, and the address electrode 22 are shown. In the initialization period, an initialization voltage is applied to the scan electrode 13, and the charge in the cell is brought into an initial state by the initialization discharge. In the address period, a voltage is applied to the scan electrode 13 and the address electrode 22, and data writing is performed by address discharge. At this time, the scanning electrodes 13 extending in the horizontal direction sequentially emit light one row at a time, and cells to be emitted are selected by the address electrode 22 for each row, and data writing is performed for each row. Therefore, there is a time difference in the address discharge depending on the position of the scan electrode 13 in the display screen, the uppermost scan electrode 13 has a shorter discharge pause period, and the lowermost scan electrode 13 has a longer discharge pause period. . As the discharge pause period from the initialization discharge is longer, the non-discharge probability due to the discharge delay of the address discharge increases. Note that after the data writing is completed in the address period, a display period starts, and a driving voltage is applied alternately to the scan electrodes 13 and the sustain electrodes 12, and the sustain discharge is performed a number of times according to the gradation.

  Table 2 shows the success probability of address discharge when the drive voltage waveform shown in FIG. 7 is applied to the plasma display panel according to the first embodiment.

In Table 2, the vertical item indicates the length of the discharge pause period [μs], and the horizontal item indicates the address voltage [V]. For the front panel 10 of the plasma display panel, the SrCaO protective film 16 is used, and in each column in the table, the address discharge success probability is described in the order of no MgO particles → MgO particles. Moreover, about the color, it measured using the cell of the green fluorescent substance 25G.

  As shown in Table 2, it can be seen that in each column, the probability of successful address discharge is significantly increased when the MgO fine particles 15a are present than when they are not present. That is, according to the plasma display panel and the manufacturing method thereof according to the present embodiment, the discharge delay of the address discharge can be improved, and both the reduction of the driving voltage and the reduction of the unlit cells caused by the address discharge delay are achieved. It is possible.

  Further, the higher the address voltage and the shorter the discharge pause period, the higher the success rate of the address discharge. However, when the MgO fine particles 15a are provided, the address voltage is low and the discharge pause period is long. , The degree of decline in its success rate is less. In other words, when the discharge pause period is 500 μs, comparing the case where the address voltage is 90 V and the case where the address voltage is 60 V, the one where the MgO fine particles 15a are not disposed is significantly successful from 52.7% to 16.7%. Whereas the rate is reduced, the one where the MgO fine particles 15a are disposed maintains a high success rate of 80% or more, from 97.3% to 80.1%. In addition, when the address voltage is 60 V, when the discharge pause period is 20 μs and 500 μs, the success rate is as high as 99.7% even when the MgO fine particles 15a are not present at 20 μs, but when it becomes 500 μs. The success rate is greatly reduced to 16.7%. On the other hand, in the case where the MgO fine particles 15a are present, the success rate is 100% at 20 μs, and a high success rate of 80% or more is maintained at 80.1% even at 500 μs. That is, it is possible to reduce the discharge voltage while maintaining a high success rate of address discharge.

  Thus, according to the plasma display panel according to Example 1 in which the fine particle layer 15 provided with the fine particles 15a is provided on the dielectric layer 14, the discharge delay of the address discharge can be significantly reduced, The driving discharge voltage can be reduced.

  As described with reference to FIG. 4, in the plasma display panel and the manufacturing method thereof according to the present embodiment, the protective layer 16 is formed after the fine particles 15a are disposed on the dielectric layer 14 to form the fine particle layer 15. It is filming. In this case, if the protective layer 16 completely covers the fine particle layer 15, it is considered that the effect of improving the discharge delay due to the fine particles 15 a is difficult to be obtained. was gotten. The reason for this is that, due to the effect of aging after manufacturing the plasma display panel (in this embodiment, approximately 10 hours with a 20 kHz AC pulse), as described in FIG. This is thought to be due to exposure to the discharge space.

  In Example 1, although the example about the protective layer 16 of SrCaO was shown, the plasma display and the manufacturing method thereof according to the present embodiment generally provide a protective film 16 that can obtain a voltage reduction effect by containing SrO or CaO. Can be applied to. In Example 2, an example in which the plasma display according to this embodiment is configured using CaO for the protective layer 16 will be described.

  FIG. 8 is a diagram showing the characteristics of the discharge delay time of the plasma display panel according to Example 2 in which CaO is used for the protective layer 16. The measurement results in FIG. 8 are the results under the conditions where the address voltage is 50 V, the discharge sustain voltage is 130 V, a gas containing 10% Ne—Xe is used as the discharge gas, and the gas pressure is set to 67 kPa. In FIG. 8, the horizontal axis indicates the discharge rest period of the address discharge, the vertical axis indicates the discharge delay time, the line connecting the circles indicates the characteristics of the plasma display panel in which the particles are not disposed, and the characteristics connecting the squares indicate the particles. The characteristic of the arrange | positioned plasma display panel is shown.

  As described with reference to FIG. 7, the discharge in the plasma display panel includes initializing discharge for initializing cells, write discharge (address discharge) for selecting cells to emit light, and continuous light emission from selected cells. There is a sustain discharge to cause As described above, the discharge delay becomes a problem in address discharge (address discharge) having a long discharge pause period. In the plasma display panel according to this embodiment, since the CaO protective layer 16 is formed on the fine particles 15a, the discharge voltage was as low as that of the CaO protective film 16 without the fine particles 15a. .

  In addition, as shown in FIG. 8, the characteristic indicated by the square in which the fine particles 15a are arranged on the dielectric layer 14 has a longer discharge delay time than the characteristic of the plasma display panel in which the fine particles 15a are not arranged. It shows short characteristics. Thus, even when CaO was used for the protective layer 16, the discharge delay could be improved.

  FIG. 9 is a diagram showing the basic characteristics of a discharge phenomenon called a Laue plot of the plasma display panel according to Example 2 using CaO as the protective layer 16. FIG. 9 shows the characteristics when the discharge pause period is 200 μs, the address voltage is 50 V, the discharge sustain voltage is 130 V, Ne + Xe in the discharge gas is 10%, and the gas pressure is 67 kPa. In FIG. 9, the horizontal axis indicates the elapsed time [μs] from the voltage application, and the vertical axis indicates the non-discharge probability [%].

  In the Laue characteristic, the larger the slope of the straight line portion, the smaller the temporal variation in the discharge delay. As shown in FIG. 8, when CaO is used for the protective layer 16, the plasma display panel in which the fine particle layer 15 in which the fine particles 15a are disposed is formed more than the plasma display panel in which the fine particle layer 15 is not formed. It can be seen that variation in discharge of the CaO protective layer 16 can also be reduced.

  Thus, according to the plasma display panel and the manufacturing method thereof according to the present embodiment and the present example, the discharge delay is maintained while maintaining the low discharge voltage characteristic of the protective layer 16 having the low voltage discharge characteristic containing SrCaO and CaO. Can be improved.

  The preferred embodiments and examples of the present invention have been described in detail above. However, the present invention is not limited to the above-described embodiments and examples, and the examples described above can be used without departing from the scope of the present invention. Various modifications and substitutions can be made.

  In particular, the case where SrCaO or CaO is used for the protective layer has been described as an example. However, the present invention can be applied to all alkaline earth metal oxide films having a characteristic of discharging at a low voltage, for example, SrO. The present invention can also be applied to the case where the protective layer is used.

  The present invention can be used for a plasma display panel and a plasma display device which is a display device using the same.

DESCRIPTION OF SYMBOLS 10 Front plate 11 Front glass substrate 12 Sustain electrode 13 Scan electrode 14, 23 Dielectric layer 15 Fine particle layer 15a Fine particle 16 Protective layer 20 Back plate 21 Rear glass substrate 22 Address electrode 24 Partition 25, 25R, 25G, 25B Phosphor

Claims (5)

A front panel in which a display electrode is covered with a dielectric layer is a plasma display panel sealed opposite to a rear panel across a discharge space,
A fine particle layer formed on the dielectric layer, wherein a fine particle layer in which at least one kind of fine particles whose main component is magnesium oxide or calcium oxide is disposed;
And a protective layer containing a calcium oxide formed in the fine particle layer, was closed,
The plasma display panel according to claim 1, wherein the fine particles are formed so as to sink into the dielectric layer so as to sink from the surface of the dielectric layer . The plasma display panel according to claim 1, wherein the protective layer is made of a composite material of strontium oxide and calcium oxide or calcium oxide. A method of manufacturing a plasma display panel in which a front plate and a back plate are sealed facing each other,
Preparing a glass substrate for the front plate having a dielectric layer formed on the surface;
A step of dispersing and dispersing a dispersion in which at least one kind of fine particles whose main component is magnesium oxide or calcium oxide is dispersed in a solvent, on the surface of the dielectric layer;
Firing the glass substrate at a temperature equal to or higher than the softening point of the dielectric layer, and forming a fine particle layer on the dielectric layer;
And a protective layer forming step of forming a protective layer containing calcium oxide on the fine particle layer.   4. The plasma according to claim 3, further comprising a sealing step in which the front plate and the back plate are opposed to each other and sealed in a nitrogen, rare gas, or vacuum atmosphere after the protective film forming step. Display panel manufacturing method. The protective layer, the manufacturing method of the plasma display panel according to claim 3 or 4, characterized in that it is composed of a composite material or calcium oxide and strontium oxide calcium oxide.