JP5309571B2 - Radio correction watch and control method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a radio wave correction timepiece which can shorten a restart time of a reception circuit and which causes no fault even when the reception circuit is operated intermittently and can reduce reception power consumption required for time correction. <P>SOLUTION: The radio wave correction timepiece 1 includes a receiving part 3A which receives a standard radio wave and a control part 47 which controls the receiving part 3A. The receiving part 3A has an amplification circuit 32 which amplifies a reception signal of the standard radio wave, an AGC circuit 36 which controls a gain of the amplification circuit 32 and a binary coding circuit 37 which conducts binary coding of the amplified reception signal with a threshold so as to obtain time information. The control part 47 controls the receiving part 3A by an intermittent receiving operation of stopping temporarily the operation of the receiving part 3A while data unnecessary to acquire is transmitted. During the temporary stopping, the receiving part 3A keeps AGC voltage for controlling the AGC circuit 36 at that at the point of time when the operation is stopped, and restarts the operation of the AGC circuit 36 on the basis of the AGC voltage being kept, on the occasion when the temporary stopping is canceled to restart the operation. <P>COPYRIGHT: (C)2009,JPO&amp;INPIT

Description

  The present invention relates to a radio-controlled timepiece that receives a standard radio wave having time information and corrects the time based on the received standard radio wave, and a control method therefor.

Conventionally, a radio-controlled timepiece that can receive standard radio waves is known (see, for example, Patent Document 1).
In Patent Document 1, at the time of reception once a day (3 am), a sufficient time, for example, 3 minutes of reception processing is performed to obtain all information of the time code. A watch that eliminates waste of power consumption by receiving only a part of the time code and shortening the reception time is disclosed.

  By the way, the standard radio wave is amplitude modulation, and the reception circuit of the radio clock first adjusts the received signal level to a desired level by adjusting the gain of the amplification circuit by an automatic gain control circuit (AGC circuit, Automatic Gain Control). There is a need to. Therefore, in the radio timepiece, after the envelope signal of the received signal whose level has been adjusted is extracted by a filter or the like, the envelope signal and the reference voltage are compared and binarized by a comparator (comparator), and the time code signal TCO ( Time Code Out) is obtained, time information is obtained, and the time is displayed.

  In such a receiving circuit, a circuit configuration that shortens the time until the AGC circuit operates stably has been proposed (see, for example, Patent Documents 2 and 3).

Japanese Unexamined Patent Publication No. Hei 7-198878 JP 2005-210266 A JP 2004-151055 A

  Patent Document 1 has a problem in that the reception process at 3:00 am performs a reception process for a sufficient time, so that the effect of reducing power consumption is not necessarily high. That is, in recent radio-controlled timepieces, it is sufficient to receive once a day in terms of time accuracy. Even in such a watch that performs reception only once a day, reduction in power consumption is required. However, in Patent Document 1, reception processing is performed for a sufficient time when receiving once a day. Therefore, the effect of reducing power consumption is not necessarily high.

  In addition, it is conceivable to reduce the reception time by receiving only necessary information at the time of reception once a day, but such control can be performed with an actual radio-controlled clock for the following reasons. There wasn't. That is, the standard radio wave is a signal with a very low transmission speed, and it takes a few seconds for the AGC circuit to stably operate. By that amount, the AGC voltage is converged again after the receiving circuit is stopped until the AGC circuit is stably operated. The startup time of will be as long as about a dozen seconds. This was the same even when the circuit configurations of Patent Documents 2 and 3 were adopted.

  For this reason, for example, when receiving three time data as in the reception process at 3 am in Patent Document 1, if the reception circuit is temporarily stopped during the reception, it takes time to restart, The next time data could not be received. For this reason, in an actual radio-controlled timepiece, the receiving circuit cannot be stopped during reception, and reception processing is continuously performed for several minutes, and the reception power consumption cannot be reduced by that amount. It was.

  The object of the present invention is to solve the above-mentioned problems, the restart time after stopping the operation of the receiving circuit can be shortened, there is no problem even if the receiving circuit is operated intermittently, and the time can be corrected. An object of the present invention is to provide a radio-controlled timepiece and a method for controlling the radio-controlled timepiece that can reduce the required power consumption.

The radio-controlled timepiece of the present invention is a radio-controlled timepiece that receives a standard radio wave, acquires time information, and corrects the time, and includes a receiving unit that receives the standard radio wave, and a control unit that controls the receiving unit. And an amplifier circuit capable of amplifying the received signal of the standard radio wave and adjusting the gain, and a binarizing circuit for binarizing the amplified received signal based on a predetermined threshold to obtain time information The control unit operates the receiving unit to start reception processing, then establishes second synchronization, and continues the reception operation until minute synchronization is established. During the acquisition of time information transmitted in a cycle, while receiving data that does not need to be acquired, the reception unit is controlled by an intermittent reception operation that temporarily stops the operation of the reception unit, and this intermittent reception is performed. Multiple cycles of the time information by operation It was separated acquisition, the receiving unit, in the intermittent receiving operation, when the pause has resumed operation is released, characterized in that to resume the gain of the amplifier circuit from the state prior to the pause.

  In the present invention, when the operation of the receiver is resumed after being paused, the gain of the amplifier circuit is resumed from the state before the pause, so that when the operation of the receiver is resumed, Can quickly return to normal operation. For this reason, when the operation of the receiving unit is paused, the restart time after stopping the operation of the receiving circuit can be shortened compared to when the gain is reset to the initial value, and the receiving circuit is intermittently operated. Troubles can be eliminated even if it is operated automatically, and reception power consumption required for time correction can be reduced.

In the present invention, the receiving unit includes an auto gain control circuit (AGC circuit) for controlling the gain of the amplifier circuit, and the control unit controls the AGC circuit while being temporarily stopped by an intermittent receiving operation. The auto gain control voltage (AGC voltage) is held at the voltage at the time when the operation of the receiving unit is stopped, and when the operation is resumed after the suspension is canceled, the auto gain control voltage (AGC voltage) is based on the held AGC voltage. It is preferable to restart the operation of the AGC circuit.

  In the present invention, the AGC voltage of the AGC circuit is maintained at the voltage at the time of the operation stop even while the operation of the reception unit is temporarily stopped, so that the normal operation is performed when the operation of the reception unit is resumed. It is possible to return quickly. For this reason, when the operation of the receiving unit is temporarily stopped, the restart time after stopping the operation of the receiving circuit can be shortened compared with the case where the AGC voltage is not held, and the receiving circuit is operated intermittently. However, the problem can be eliminated and the reception power consumption required for time correction can be reduced.

In the present invention, the control unit operates the receiving unit to establish second synchronization, and after establishing minute synchronization, obtains all data for at least one cycle, and then intermittently receives the receiving unit. It is preferable to acquire the time information for a plurality of cycles by controlling the operation.

  According to the present invention, since the time information for at least one cycle is received by a normal reception operation, it is possible to reliably determine that the minutes for each minute can be reliably acquired and the minute synchronization can be obtained, It is possible to prevent erroneous determination of minute synchronization in the subsequent intermittent reception operation, and the reliability of the intermittent reception operation can be increased.

In the present invention, the control unit operates the reception unit while the minute and hour information is transmitted in the standard radio wave, and temporarily turns the reception unit while the minute and hour information is not transmitted. It is preferable to stop.
Here, the period during which the minute and hour information is not transmitted refers to a period during which calendar information such as day, month, year, day of the week, etc. is transmitted.

  If the receiving unit is operated only during transmission of minute and hour information in the standard radio wave, the operating time of the receiving unit can be reduced to 1/3 or less, and the power consumption during reception can be greatly reduced. .

In the present invention, the control unit is preset with a gain holding mode for resuming the gain of the amplifier circuit from the state before the suspension and the gain of the amplifier circuit when the operation of the receiving unit is resumed. It is preferable to select a gain reset mode for resetting to a predetermined gain.
For example, when the gain of the amplifier circuit is controlled using an AGC circuit, the control unit restarts the operation of the receiving unit based on the held AGC voltage. A voltage holding mode (gain holding mode) for resuming the operation and a voltage reset mode (gain reset mode) for resuming the operation of the AGC circuit based on a predetermined AGC voltage different from the held AGC voltage are selected. It is preferable to do.

  Here, the reception unit is configured to be able to change the reception frequency, and the control unit selects the gain reset mode when the reception frequency is changed, and when the reception frequency is not changed, the control unit selects the gain reset mode. It is preferable to select the gain holding mode.

According to the present invention, for example, when the reception condition is changed as in the case of changing the reception frequency, the reception signal level is highly likely to fluctuate greatly, and when the operation of the reception unit is resumed, Even if the gain of the amplifier circuit is restarted from the state before the suspension, for example, even if the operation of the AGC circuit is restarted with the held AGC voltage, the time until the signal can be received at an appropriate level. It may take such a case.
On the other hand, in the present invention, in addition to the gain holding mode for restarting the gain of the amplifier circuit from the state before the temporary stop, the gain reset mode for resetting the gain to a predetermined value can be selected. An appropriate control mode can be selected, and accordingly, the time until reception at an appropriate level can be shortened. For example, when controlling the AGC voltage, in addition to the voltage holding mode in which the AGC circuit is operated with the held AGC voltage, the voltage reset mode in which the AGC circuit is operated by resetting the AGC voltage to a predetermined voltage can be selected. An appropriate control mode can be selected according to the reception conditions, and the time until reception at an appropriate level can be shortened accordingly.
In particular, when the reception frequency is changed, there is a high possibility that the reception signal level is also fluctuating. Therefore, appropriate reception processing can be quickly performed by controlling in the voltage reset mode.

  In the present invention, it is preferable that the AGC circuit includes a capacitive element, and holds the AGC voltage at the potential of the capacitive element while the operation of the receiving unit is temporarily stopped.

  According to the present invention, when the AGC voltage is held, it is only necessary to perform control for separating the capacitive element from the AGC circuit, so that the circuit configuration is simplified and the holding control of the AGC voltage can be easily performed. .

The present invention relates to a control method for a radio-controlled timepiece that receives a standard radio wave, acquires time information and corrects the time, and includes a receiving unit that receives the standard radio wave and a control unit that controls the receiving unit. The receiving unit amplifies the reception signal of the standard radio wave and can adjust the gain; and a binarization circuit that binarizes the amplified reception signal based on a predetermined threshold to obtain time information; The receiver is operated to start reception processing, establish second synchronization, and continue the reception operation until the minute synchronization is established. During the acquisition of information, while data that does not need to be acquired is transmitted, the reception unit is controlled by an intermittent reception operation that temporarily stops the operation of the reception unit, and the time information is obtained by the intermittent reception operation. the acquired plurality of cycles, wherein While paused in the open receiving operation, the gain of the amplifier circuit, and held on the gain of the stop time of the operation of the receiving unit, when the operation of the receiving portion and the pause is canceled it is resumed Is characterized in that the operation of the amplifier circuit is restarted based on the held gain.
Also in the present invention, the same operational effects as the radio wave correction timepiece can be obtained.

[First Embodiment]
Hereinafter, a radio-controlled timepiece 1 according to a first embodiment of the present invention will be described with reference to the drawings.

[Configuration of radio-controlled watch 1]
As shown in FIG. 1, the radio-controlled timepiece 1 includes an antenna 2 as a receiving unit, a receiving circuit unit 3, a control circuit unit 4, a display unit 5, an external operation member 6, and a crystal resonator 48. I have.
The antenna 2 receives a long-wave standard radio wave (hereinafter referred to as “standard radio wave”), and outputs the received standard radio wave to the receiving circuit unit 3.
The receiving circuit unit 3 demodulates the received signal of the standard radio wave received by the antenna 2 and outputs it to the control circuit unit 4 as TCO (Time Code Out). A detailed description of the receiving circuit unit 3 will be described later.

  The control circuit unit 4 decodes the input TCO to generate a TC (time code), and sets the time of the time counter 43 based on the generated TC. Further, the control circuit unit 4 performs control to display the time of the time counter 43 on the display unit 5. Further, the control circuit unit 4 outputs a control signal to the reception circuit unit 3. The detailed description of the control circuit unit 4 will be described later.

  The display unit 5 is driven and controlled by the drive circuit unit 46 of the control circuit unit 4 and displays the time counted by the time counter 43. For example, the display unit 5 may include a liquid crystal panel and display the time on the liquid crystal panel. The display unit 5 may include a dial and a pointer, and the control circuit unit 4 may move the pointer to display the time. There may be.

  The external operation member 6 is constituted by, for example, a crown or a setting button, and outputs a predetermined operation signal to the control circuit unit 4 when operated by a user. As the operation signal, for example, a signal for setting the type of standard radio wave received by the antenna 2 (for example, JJY in Japan, WWVB in the United States, DCF77 in Germany, etc.), or the standard radio wave is received to correct the time. For example, a signal for requesting manual reception processing.

  The crystal oscillator 48 for the reference clock outputs a predetermined reference signal (reference clock, for example, 1 Hz signal), and the reference signal output from the crystal oscillator 48 is input to the control circuit unit 4. Yes.

[Receiver circuit configuration]
As shown in FIG. 1, the receiving circuit unit 3 includes a tuning circuit 31, a first amplifier circuit 32, a band-pass filter (hereinafter sometimes abbreviated as "BPF") 33, a second The amplifier circuit 34 includes an envelope detection circuit 35, an AGC (Auto Gain Control) circuit 36, a binarization circuit 37, and a decoding circuit 39. Of the receiving circuit unit 3, except for the decoding circuit 39, the tuning circuit 31 and the binarizing circuit 37 constitute the receiving unit 3A of the present invention.

  The tuning circuit 31 includes a capacitor, and the tuning circuit 31 and the antenna 2 constitute a parallel resonance circuit. The tuning circuit 31 causes the antenna 2 to receive a radio wave having a specific frequency. The tuning circuit 31 converts the standard radio wave received by the antenna 2 into a voltage signal and outputs the voltage signal to the first amplifier circuit 32. In the receiving circuit unit 3 of this embodiment, in addition to the Japanese standard radio wave “JJY”, the US standard radio wave “WWVB”, the German standard radio wave “DCF77”, the British standard radio wave “MSF”, the People's Republic of China It is configured to be able to receive standard radio waves in each region such as the standard radio wave “BPC”.

Here, the time information (time code) is configured in accordance with a predetermined time information format (time code format) for each country.
That is, in the Japanese standard radio wave (JJY) time code format shown in FIG. 2, one signal is transmitted every second, and is configured as one record in 60 seconds. That is, one frame is 60-bit data. The data items include the minute of the current time, the hour, the day of the current year from January 1, the year (the last two digits of the year), the day of the week, and “leap second”. The value of each item is configured by a combination of numerical values assigned every second, and ON / OFF of this combination is determined from the type of signal. In FIG. 2, “M” indicates a marker corresponding to the minute (0 seconds per minute), and “P1 to P5” indicate position markers whose positions are determined in advance. It is a signal. The signal indicating the marker is a signal having a pulse width of approximately 0.2 ms. In each item, a signal indicating ON (binary 1) is a signal having a pulse width of approximately 0.5 ms, and OFF (binary 0). ) Is a signal having a pulse width of about 0.8 ms.
The long wave standard radio wave (JJY) is transmitted in Japan at 40 kHz (East Japan) and 60 kHz (West Japan), but the time code format of each radio wave is the same.

  On the other hand, in the time code format of the German standard radio wave (DCF77) shown in FIG. 3, data items of minute, hour, day, day of the week, month, and year are set. Further, there is no data until the 15th second, and therefore the positions of the position markers P1, P2, P3 and the marker M are also different from JJY in FIG. Further, before each time item, “R: use of spare antenna”, “A1: notice of change of normal time and daylight saving time”, “Z1, Z2: display of normal time and daylight saving time”, “A2: display of leap second” , “S: Start bit of time code” and the like are set.

Further, in the time code format of the American standard radio wave (WWVB) shown in FIG. 4, data items of minute, hour, day, and year are set. WWVB has a frequency of 60 kHz and is the same as JJY in western Japan, but the position of year information is different from JJY, and JJY and WWVB can be distinguished by analyzing data.
Although not shown, the UK standard radio wave (MSF) time code format and the People's Republic of China standard radio wave “BPC” are also different from those in other countries, and the format of the received time information (time code) (data) ) To determine which output station the standard radio wave belongs to.

  The first amplifier circuit 32 is configured such that the gain can be adjusted according to a signal input from an AGC circuit 36 described later. Then, the first amplification circuit 32 whose gain has been adjusted amplifies the reception signal input from the tuning circuit 31 so as to be input to the BPF 33 as a constant amplitude. That is, according to the signal input from the AGC circuit 36, the first amplifying circuit 32 reduces the gain when the amplitude is large, and increases the gain when the amplitude is small. Amplify so that

  The BPF 33 is a filter that extracts a signal in a desired frequency band. That is, by passing through the BPF 33, components other than the carrier wave component are removed from the received signal input from the first amplifier circuit 32.

  The second amplification circuit 34 further amplifies the reception signal input from the BPF 33 with a fixed gain.

  The envelope detection circuit 35 includes a rectifier (not shown) and a low-pass filter (LPF) (not shown). The envelope detection circuit 35 rectifies and filters the received signal input from the second amplifier circuit 34, and performs filtering. The envelope signal thus obtained is output to the AGC circuit 36 and the binarization circuit 37.

[AGC circuit]
The AGC circuit 36 outputs a signal for determining a gain when the first amplification circuit 32 amplifies the reception signal based on the reception signal input from the envelope detection circuit 35.
FIG. 5 shows a specific example of the AGC circuit 36.
The AGC circuit 36 controls the AGC voltage by charging and discharging the AGC capacitor 363 by exclusive switching between the constant current source 361 and the constant current source 362. This AGC voltage becomes the gain of the first amplifier circuit 32.
Here, the AGC capacitor 363 normally requires a capacitance of several μF in order to have a large time constant for AGC control. For this reason, the AGC capacitor 363 cannot be integrated in the IC, and a ceramic capacitor or a tantalum capacitor is usually used.

The comparator 364 compares the signal from the envelope detection circuit 35 with a predetermined reference voltage, and outputs a high signal when the signal is higher than the reference voltage, and outputs a low signal when the signal is lower. The output of the comparator 364 is input to the NOR circuit 365 and also input to the NOR circuit 367 via the NOT circuit 366. Further, the AGCHLD signal is also input from the decode circuit 39 to each of the NOR circuits 365 and 367.
For this reason, if the AGCHLD signal is Low, the output of one of the NOR circuits 365 and 367 is High and the other is Low according to the reception signal level detected by the comparator 364, and the constant current source 361, 362 is switched exclusively so that the AGC voltage converges to the optimum voltage.
On the other hand, when the AGCHLD signal becomes a High signal, the outputs of the NOR circuits 365 and 367 are both Low, the constant current sources 361 and 362 are both disconnected from the AGC capacitor 363, and the AGC voltage of the AGC capacitor 363 is held.

Further, the AGCHLD signal and the PWRON signal for performing on / off control of the receiving unit 3A are input to the NOR circuit 368, and the output of the NOR circuit 368 is input to the field effect transistor 369 which is a switch element. A pull-down resistor 370 is connected to the field effect transistor 369.
For this reason, when the receiving unit 3A is stopped, that is, when the PWRON signal is Low and the AGCHLD signal is Low, the field effect transistor 369 is turned on, and the AGC voltage is fixed to the GND potential via the pull-down resistor 370. The circuit is stabilized.
When the receiver 3A is activated in this state, the AGC voltage at the time of activation becomes the GND potential, and the AGC voltage is converged and controlled from the GND potential to the optimum voltage by the exclusive switching of the constant current sources 361 and 362. .
It should be noted that the field effect transistor 369 is turned off and the pull-down resistor 370 is disconnected from the AGC capacitor 363 except for the above conditions, that is, when the PWRON signal = Low and the AGCHLD signal = Low.

Further, the AGC circuit 36 is also provided with a reset circuit 371. The reset circuit 371 is operated by the output of the AND circuit 372 to which the control signal and the PWRON signal are input. The control signal is normally Low, but is High when the reception frequency is switched. If the PWRON signal rises from Low to High in the state of this control signal = High, the output of the AND circuit 372 changes from Low to High, and the reset circuit 371 is activated. The reset circuit 371 resets the AGC voltage to the potential VSS. In this embodiment, the potential VSS is set to be the same as the GND potential. However, the potential VSS may be set to a potential different from the GND potential, for example, a negative potential.
Since the control signal returns to Low when the reset circuit 371 is activated, the reset circuit 371 is activated only once immediately after the reception frequency is switched.
When the reception frequency is switched, the input level may fluctuate greatly before and after that. In such a case, if the AGC voltage is reset by the reset circuit 371, it is effective to suppress the variation in the starting time. .

  The binarization circuit 37 includes a binarization comparator, binarizes the envelope signal input from the envelope detection circuit 35 with a predetermined threshold (reference voltage), and binarizes the binarized signal, that is, the TCO. Output a signal.

  Specifically, the binarization circuit 37 outputs a signal having a high level (high level) voltage when the voltage of the envelope signal exceeds the reference voltage, and the voltage of the envelope signal sets the reference voltage. If it is lower, a low level signal having a voltage value lower than that of the high level signal is output to the TCO decoding unit 41 of the control circuit unit 4 as a TCO signal. When the voltage of the envelope signal is higher than the reference voltage, the control circuit unit 4 uses the Low level as the TCO signal, and when the voltage of the envelope signal is lower than the reference voltage, the signal as the TCO signal. It is also possible to configure so as to output to the TCO decoding unit 41.

  The decode circuit 39 is connected to the control circuit unit 4 to be described later via a serial communication line SL. The decode circuit 39 decodes the control signal and the clock signal input from the control circuit unit 4, and performs power on / off control of the receiving unit 3A and AGC hold control for holding the AGC voltage of the AGC circuit 36. .

[Configuration of control circuit section]
As described above, the control circuit unit 4 controls the operation of the receiving circuit unit 3. Specifically, the control circuit unit 4 controls the power on / off of the receiving circuit unit 3 with respect to the decoding circuit 39 of the receiving circuit unit 3. And a control signal for performing hold control of the AGC voltage of the AGC circuit 36 is output. In addition, the control circuit unit 4 decodes the TCO signal input from the binarization circuit 37 and sets the time of the time counter 43 based on the time code generated by decoding. Furthermore, the control circuit unit 4 controls the display unit 5 to display the time of the time counter 43.
As shown in FIG. 1, the control circuit unit 4 includes a TCO decoding unit 41 as a time code decoding unit, a storage unit 42, a time counter 43, a drive circuit unit 46, and a control unit 47. Has been. Note that the reference signal output from the crystal resonator 48 is input to the control unit 47.

The TCO decoding unit 41 decodes the TCO signal input from the binarization circuit 37 of the receiving circuit unit 3 and extracts a time code (TC) having date information and time information included in the TCO signal. Then, the TCO decoding unit 41 outputs the extracted TC to the control unit 47.
Specifically, the TCO decoding unit 41 recognizes the waveform of the TCO signal and measures the reception pulse duty with respect to a predetermined pulse width (for example, 1 Hz). Then, TC is recognized from the TCO signal based on the difference in the received pulse duty. For example, in a standard radio wave (JJY) used in Japan, when the pulse width of a high level signal is 0.5 seconds (that is, when the duty is 50%) with respect to the pulse width of 1 second, “ 1 "signal (1 signal) is recognized. Further, when the pulse width of the high level signal is 0.8 seconds with respect to the pulse width of 1 second (that is, when the duty is 80%), the signal “0” (0 signal) is recognized. When the pulse width of the high-level signal is 0.2 seconds with respect to the pulse width of 1 second (that is, when the duty is 20%), the “P” signal (P signal) is recognized. Then, the TCO decoding unit 41 recognizes a predetermined TC from the sequence of the recognized 1 signal, 0 signal, and P signal.

  In the above, TC recognition in JJY has been exemplified. However, when the received standard radio wave is of another type, TC is recognized based on the duty corresponding to each radio wave. For example, in the standard radio wave (WWVB) in the United States, a 1 signal is recognized when the duty is 50%, a 0 signal when the duty is 20%, and a P signal when the duty is 80%. In the standard radio wave (DCF77) in Germany, 1 signal is recognized when the duty is 80%, and 0 signal is recognized when the duty is 90%. In the standard radio wave (MSF) in the UK, the duty is 80%. 1 signal, 0 signal is recognized when the duty is 90%, and P signal is recognized when the duty is 50%.

The storage unit 42 is a memory that stores various data, programs, and the like necessary for controlling the reception circuit unit 3 by the control circuit unit 4. Such a storage unit 42 stores a radio wave data table in which radio wave data related to standard radio waves received by the receiving circuit unit 3 is recorded, which is set when the radio wave correction timepiece 1 is manufactured.
This radio wave data table is constructed in a table structure in which radio wave data configured by associating radio wave type data and a time code format for each radio wave type is used as one record, and a plurality of these radio wave data are recorded.
Here, the radio wave type data is information relating to the type of standard radio wave received by the receiving circuit unit 3, and for example, JJY, WWVB, DCF77, MSF, and the like are recorded.
The time code format records the TC (time code) format included in the standard radio wave specified by the radio wave type data, that is, in what order and size each data for the date is stored. ing.

  Further, as shown in FIG. 6, received time data 421 is stored in the storage unit 42. In this embodiment, it is configured to be able to store reception time data of up to seven times. For example, since the standard radio wave transmits time data every minute, it is possible to acquire time data for seven times by receiving a maximum of seven minutes. At this time, each time data becomes different time data by one minute.

The time counter 43 counts time based on the reference signal output from the crystal unit 48. As shown in FIG. 7, the time counter 431 for internal time data and the clock display time data A time counter 432.
Specifically, each of the counters 431 and 432 includes a second counter that counts seconds, a minute counter that counts minutes, and an hour counter that counts hours.
The second counter is a counter that loops the signal for 60 counts, that is, 60 seconds when a reference signal of 1 Hz is output from the crystal resonator 48, for example. The minute counter is a count that counts once when the reference signal of 1 Hz is counted 60 times, and loops at 60 counts, that is, 60 minutes. The hour counter counts 1 when a 1 Hz reference signal is counted 3600 times, and is a count that loops in 24 counts, that is, 24 hours.
The minute counter may be configured to output a signal from the second counter to the minute counter every time the second counter counts 60 to count up the minute counter. Similarly, the hour counter may be configured such that every time the minute counter counts 60, a signal is output from the minute counter to the hour counter, and the hour counter is counted up.

The time counter 431 for internal time data is updated with the received time data when the time information is successfully received, and is counted up with the reference signal otherwise.
The time counter 432 for clock display time data is normally set to the same counter value as the time counter 431 for internal time data. However, when the time difference display setting is set by the user, the user sets it. The time difference is added. For example, when moving from Japan to overseas, after correcting the radio-controlled timepiece 1 by receiving radio waves in Japan, when setting the time difference and displaying the local time, the counters 431, 432 The value will be different.

Here, in the time code format of JJY, as shown in FIG. 2, one signal is transmitted every second and is configured as one record in 60 seconds. That is, one frame is 60-bit data. The data items also include current time information for minutes and hours, and calendar information such as the date of the current year from January 1, the year (the last two digits of the year), and the day of the week. The value of each item is configured by a combination of numerical values assigned every second, and ON / OFF of this combination is determined from the type of signal.
A parity bit for checking hourly data is provided between the day and the year. Therefore, when the parity bit is received and checked, as shown in Example 1 of FIG. 8, it is sufficient to receive up to 37 seconds from a marker indicating a positive rise (every 0 seconds).
On the other hand, when it is not necessary to receive the minute parity bit, such as when the time has not passed since the previous reception or when the hour / minute data can be checked from a plurality of received data, the example shown in FIG. Thus, it is sufficient to receive only about 20 bits (about 20 seconds) of minute data.
Therefore, compared to the case of receiving data of 60 bits (60 seconds) as in the prior art, in Example 1, the reception time can be reduced to about 2/3, and the power consumption required for reception can be reduced to about 2/3. it can.
In Example 2, the reception time can be reduced to about 1/3, and the power consumption required for reception can be reduced to about 1/3.

  The drive circuit unit 46 controls the display state of the display unit 5 based on the time display control signal output from the control unit 47 and controls the display unit 5 to display the time. For example, when the display unit 5 has a liquid crystal panel and displays the time on the liquid crystal panel, the drive circuit unit 46 controls the liquid crystal panel based on the time display control signal and displays the time on the liquid crystal panel. To control. When the display unit 5 is configured to have a dial and a pointer, the drive circuit unit 46 outputs a pulse signal to the stepping motor that drives the pointer, and controls to move the pointer by the driving force of the stepping motor. .

  The control unit 47 is driven based on a clock signal input from the crystal resonator 48 and performs various control processes. That is, the control unit 47 controls the correction of the count of the time counter 43 by outputting the TC input from the TCO decoding unit 41 to the time counter 43. Further, the control unit 47 outputs a time display control signal for displaying the time counted by the time counter 43 on the display unit 5 to the drive circuit unit 46.

Further, the control unit 47 outputs a control signal PWRON for controlling the power on / off of the receiving unit 3A and a control signal AGCHLD for holding the AGC voltage of the AGC circuit 36 to the decoding circuit 39 of the receiving circuit unit 3.
Specifically, the control unit 47 transmits a control signal for powering on the reception unit 3A when a preset scheduled reception time is reached or when manual reception is instructed by the external operation member 6. Then, the receiving unit 3A is operated to start reception processing. Then, during the reception process, as will be described later, a control signal for powering off at a predetermined timing is transmitted, and the receiving unit 3A is temporarily stopped.
Further, before and after the power-on and power-off, a control signal AGCHLD that holds the AGC voltage of the AGC circuit 36 is output, and the AGC voltage is continuously held while the receiving unit 3A is temporarily stopped.

Note that, as described above, the control unit 47 and the decode circuit 39 are connected by the serial communication line SL, and the control signal is input to the decode circuit 39 via the serial communication line SL.
Here, in the serial communication between the control unit 47 and the reception circuit unit 3, a two-line synchronous interface capable of bidirectional communication between the control unit 47 and the reception circuit unit 3 is used. Serial communication may be performed. In such a case, after the control signal is output from the control unit 47 to the reception circuit unit 3, the reception circuit unit 3 again transfers the received and recognized control signal to the control unit 47, and the control unit 47 outputs the control signal. By confirming the data difference between the control signal and the input control signal, serial communication with higher reliability can be performed.

[Time correction operation of radio-controlled clock]
Next, the time correction operation using the standard radio wave in the radio wave correction watch 1 as described above will be described.
FIG. 9 is a flowchart showing the time adjustment operation of the radio-controlled timepiece 1.
In FIG. 9, when the control unit 47 of the radio-controlled timepiece 1 recognizes that an operation signal indicating that manual reception processing is to be performed is input from the external operation member 6 or that a preset automatic reception time has come, Processing is started (S1).

  In S <b> 1, the standard radio wave received by the antenna 2 is converted into a voltage signal (reception signal) by the tuning circuit 31. Then, the first amplification circuit 32, the band-pass filter 33, the second amplification circuit 34, and the envelope detection circuit 35 amplify the received signal to a predetermined level, extract a signal in a desired frequency band, rectify and filter it. The envelope signal. Further, the envelope signal is binarized by the binarization circuit 37 to obtain a TCO signal, and this TCO signal is output to the control circuit unit 4.

Next, the control unit 47 detects the rising (or falling) edge of the input TCO signal, and determines whether the width of each pulse can be determined, that is, whether the second synchronization is OK (S2). ).
If the second synchronization can be performed in S2, the control unit 47 acquires (recognizes) every minute minute marker and determines whether minute synchronization has been established (S3).

  If minute synchronization has been established in S3, the controller 47 determines whether or not reception has been performed for a preset number of times (S4). That is, with the standard radio wave, one time data is received every minute, and unless the number (number of times) of received time data is limited, the reception process continues for a long time and the power consumption increases. For this reason, in the present embodiment, when N times (for example, 7 times) of time data are received in one reception process, the reception process is terminated. In this way, the reception time is N minutes (for example, 7 minutes) at the maximum, and it is possible to prevent the reception time from becoming longer.

If N receptions are not completed in S4, the control unit 47 performs an intermittent reception operation so as to receive only minute information (S5).
In the intermittent reception operation, the control unit 47 controls the PWRON signal to operate the reception unit 3A only during 0 to 20 seconds during which minute information is transmitted, as in Example 2 in FIG. While the information is being transmitted, control is performed to stop the receiving unit 3A.
At the same time, the control unit 47 controls the AGCHLD signal to hold the AGC voltage immediately before stopping the receiving unit 3A, and performs control to end the holding of the AGC voltage immediately after resuming the operation of the receiving unit 3A.
Further, the control unit 47 controls a control signal input to the AND circuit 372 and selects a gain reset mode (the control signal is High) or a gain holding mode (the control signal is Low).

Thus, if the AGC voltage is held while the receiving unit 3A is stopped, the startability when the receiving unit 3A is reactivated is improved within 1 to 2 seconds. The reason for this will be described with reference to FIG.
In FIG. 10, the original waveform is a waveform of a standard radio wave received by the antenna 2. The envelope detection circuit 35 extracts the envelope of this waveform. When the PWRON signal becomes High, the receiving unit 3A operates. The AGC circuit 36 adjusts the gain (amplification factor) of the first amplifier circuit 32 by adjusting the AGC voltage in order to keep the amplitude of the waveform within a certain range. Since the standard radio wave is amplitude-modulated, the AGC circuit 36 is important for accurate binarization by the binarization circuit 37. The AGC circuit 36 is controlled to increase the gain when the AGC voltage is high. If the PWRON signal becomes High and the AGCHLD signal is Low, the AGC capacitor 363 is charged, and the AGC voltage rises to increase the gain of the amplifier circuit 32. Then, the output of the envelope detection circuit 35 also increases, and when the threshold value of the binarization circuit 37 is exceeded, TCO begins to be output.
The time from when the PWRON signal rises to High until the TOC starts to be output is the startup time, and usually takes several seconds to several tens of seconds. This is because the response speed of the AGC circuit 36 cannot be increased because the data transfer rate of the standard radio wave is as low as 1 bps, and it takes time to converge the AGC voltage.

Also in FIG. 10, in the gain reset mode in which the control signal input to the AND circuit 372 is High, when the AGCHLD signal is Low and the PWRON signal rises from Low to High, the AGC voltage is set to VSS by the reset circuit 371. Reset to. When the AGC circuit 36 operates from this state, the AGC voltage gradually increases, the gain of the amplifier circuit 32 increases in conjunction with it, and the output of the envelope detection circuit 35 gradually increases. Then, until the envelope signal of the portion where the amplitude of the original waveform is large reaches a level exceeding the threshold value of the binarization circuit 37, that is, until the AGC voltage almost converges to an appropriate level and the TOC starts to be output. The startup time takes several seconds to several tens of seconds.
On the other hand, if the AGCHLD signal becomes High in the gain holding mode in which the control signal input to the AND circuit 372 is Low, the AGC voltage can be maintained at that voltage. When the PWRON signal changes from Low to High in this state, the AGC voltage is maintained at a substantially convergent level, the output of the envelope detection circuit 35 immediately becomes a level that can be appropriately compared with the threshold, and the startup time is also 1 , Greatly improved within 2 seconds.

The control unit 47 stores the first reception time data (minutes) acquired in the intermittent reception operation of S5 in the storage unit 42, and determines whether the acquired time data is consistent (S6). As a method for determining the consistency, for example, it may be determined by comparing with the counter value of the internal time data time counter 431 or comparing time data received a plurality of times. In this embodiment, when three time data are acquired and each time data is acquired at a predetermined time difference, that is, every one minute, if the time data is shifted by one minute, the correct time data It is judged that.
Accordingly, when only the first reception time data can be acquired, S6 is determined as “No”, and the process returns to S4. In S4, since N receptions have not been completed yet, the intermittent reception operation in S5 is continued.

When the control unit 47 repeats such control and can acquire the received data for three times and confirms that the consistency is obtained in S6, the control unit 47 sends a control signal to the decoding circuit 39 of the receiving circuit unit 3, and PWRON The signal is set to Low, the receiving unit 3A is stopped, and reception is ended (S7).
Thereafter, the control unit 47 corrects the time counter 43 based on the received time data, and corrects the time display on the display unit 5 via the drive circuit unit 46 (S8).
Thereafter, the control unit 47 updates the time counter 43 based on the reference signal from the crystal resonator 48, and drives the drive circuit unit 46 to perform normal hand movement (S9).

  On the other hand, when the determination is “No” in S2 and S3 and the determination is “Yes” in S4, for example, the control unit 47 has a poor radio wave reception state and cannot acquire correct time data. Therefore, the receiving unit 3A is stopped and the reception ends (S10). And since correct time data has not been acquired, it returns to normal hand movement, without performing time correction (S9).

[Effects of First Embodiment]
The radio-controlled timepiece 1 of the present embodiment has an AGC hold function for holding the AGC voltage while the receiving unit 3A is stopped. Therefore, when the receiving unit 3A is returned from the stopped state to the operating state, the AGC voltage is reduced. It is possible to start up more quickly than when resetting.
For this reason, even when the receiving unit 3A is intermittently operated during the time data reception process, it is possible to prevent problems such as delay in activation and occurrence of missing time code.
Here, for example, a normal reception process, such as when receiving a standard radio wave once a day, can be corrected to the correct time if only the minute and hour data can be acquired from the accuracy of the crystal resonator 48 and the like. In the present embodiment, since the receiving unit 3A can be restarted quickly, only the minute data is received in the one-minute time code format, and the receiving unit 3A is stopped during other data transmission. For this reason, the reception power consumption required for time correction can be reduced. For example, when receiving the Japanese standard radio wave JJY, when receiving only minute data, the receiving unit 3A may be operated for 20 seconds. Therefore, the reception time can be reduced to about 1/3 and the power consumption can be reduced to about 1/3 compared with the conventional example in which reception is performed for one minute.

The reception circuit unit 3 includes a decode circuit 39, decodes the control signal input from the control circuit unit 4 by the decode circuit 39, and outputs the decoded control signal to the reception unit 3A.
For this reason, since the decoding circuit 39 decodes the control signal, the control signal output from the control circuit unit 4 can be set to a simple signal, and the reliability of the signal to be communicated can be improved.

  The receiving circuit unit 3 and the control circuit unit 4 are connected by a serial communication line. For this reason, compared with the case where the receiving circuit part 3 and the control circuit part 4 are connected by a parallel communication circuit, the number of communication lines can be reduced and the circuit configuration in the radio-controlled timepiece 1 can be further simplified. In addition, the communication speed can be further increased by serially outputting a control signal from the control circuit unit 4 to the receiving circuit unit 3 via the serial communication line. Furthermore, the control circuit unit 4 and the reception circuit unit 3 are connected by a pair of serial communication lines so that bidirectional communication can be performed, so that the control signal is output from the control unit 47 to the reception circuit unit 3. The receiving circuit unit 3 can transfer the received and recognized control signal to the control unit 47 again, and check the data difference between the control signal output by the control unit 47 and the input control signal. With such a configuration, more reliable serial communication can be performed.

[Second Embodiment]
Next, a second embodiment of the present invention will be described with reference to the flowchart of FIG. In the following embodiments, the same or similar configurations as those of the other embodiments described above are denoted by the same reference numerals, and description thereof is omitted or simplified.
In the first embodiment, all reception of time data is performed in the intermittent reception operation S5. On the other hand, in the second embodiment, the intermittent reception operation S5 is not performed from the beginning, but in order to ensure certainty, the first-cycle reception (first time) for acquiring the first reception data is the calendar information. The difference is that all data of 1 minute including (total day, year, day of week) is received. Since other processes are the same as those in the first embodiment, description thereof will be omitted.

In the second embodiment, as shown in FIG. 11, when the reception process is started (S1), the control unit 47 determines whether the second synchronization is OK (S2). If the second synchronization is OK, the control unit 47 determines whether the marker can be acquired and the minute synchronization is OK (S3).
If the minute synchronization is OK, the control unit 47 performs a normal reception operation for one data, that is, for one minute (S21). Then, the time data acquired in the normal reception operation S21 is compared with the data of the internal time data time counter 431, and it is determined whether or not the consistency is OK (S22).

  If the consistency is OK in S22, the same processes of S4 to S9 as in the first embodiment are performed. That is, in the second embodiment, the second and subsequent receptions are performed in the intermittent reception operation S5, and only minute data is received. Then, the control unit 47 checks whether or not N times (for example, 7 times) preset in S4 have been completed, and the consistency is OK with the received data obtained 3 times before receiving 7 times. If it is (S6), it is considered that the reception has been successful, the reception is terminated (S7), the time is corrected (S8), and the routine moves to normal operation (S9). Therefore, if the consistency can be confirmed by the first three received data, the control unit 47 also ends the reception process when the three pieces of time data are received.

  On the other hand, if “No” in S2, S3, S22 or “Yes” in S4, the control unit 47 ends the reception without correcting the time (S10).

According to such 2nd Embodiment, there can exist the same effect as the said 1st Embodiment.
Furthermore, since the first data is received for one cycle (one minute) by the normal reception operation (S21), the marker for every minute can be reliably acquired and the minute synchronization is ensured. Therefore, the reliability of intermittent reception can be increased.
That is, in JJY, minute synchronization can be determined based on whether or not two markers are continuously input. However, depending on the signal state, other signals may be erroneously determined as markers, and minute synchronization may be erroneously determined only by acquiring frame markers.
On the other hand, in this embodiment, since data for one cycle is acquired at the first time, minute synchronization can also be reliably determined, and the reliability of intermittent reception can be improved.

[Third Embodiment]
Next, a third embodiment of the present invention will be described.
The radio-controlled timepiece 1 of the third embodiment is configured so that the received radio wave can be automatically changed. Specifically, the radio-controlled timepiece 1 of the third embodiment is controlled so as to automatically switch and receive a 40 kHz radio wave and a 60 kHz radio wave in the Japanese standard radio wave JJY.

In such a radio-controlled timepiece 1, as shown in FIG. 12, when the reception process starts (S1), the same processes as in the first embodiment are performed from S2 to S9. At this time, the reception frequency is set to the frequency at the previous reception.
Here, if “No” is determined in S2 and S3, and “Yes” is determined in S4, the type of radio waves that can be received may have been changed due to the movement of the reception location. Therefore, as shown in FIG. 13, the control unit 47 executes each process of switching the frequency, changing the tuning frequency, and resetting the AGC voltage by the reset circuit 371 (S31).
That is, for example, in the reception process of FIG. 12, when the setting is made to tune to a frequency of 40 kHz, the setting is changed to tune to a frequency of 60 kHz in S31.

  Further, since the received signal level is likely to be greatly different due to the change in the type of radio wave to be received, and it is not necessary to maintain the AGC voltage, the control unit 47 initially sets the AGC voltage to VSS in S31. The reception process is started from the first step (second synchronization confirmation process S2). That is, when the received radio wave is changed, the control unit 47 sets the control signal input to the AND circuit 372 to High and shifts to the gain reset mode. In this state, the PWRON signal changes from Low to High, and temporarily stops. When the operation of the receiving unit 3A that has been performed is resumed, the reset circuit 371 operates to initialize the AGC voltage to VSS. Thereafter, the same processes S2 to S10 as in the first embodiment are executed.

According to such 3rd Embodiment, there can exist the same effect as the said 1st Embodiment.
Further, when receiving different standard radio waves, the tuning frequency and the like are automatically switched in S31, and the AGC voltage is reset by the reset circuit 371. Therefore, the radio-controlled timepiece 1 capable of receiving a plurality of standard radio waves 1 Thus, it is possible to automatically receive an appropriate radio wave, and to converge the AGC voltage to an appropriate level relatively quickly even if the reception level fluctuates greatly due to a change in the reception frequency.

[Modification]
The present invention is not limited to the above embodiments.
For example, the AGC circuit 36 is not limited to the configuration shown in FIG. For example, the function of the AGC circuit 36 is not limited to that realized using a logic circuit, and may be configured by software control.
In order to increase the reliability of holding the AGC voltage, a configuration using an A / D converter and a storage circuit may be used, or a circuit configuration other than this may be used. When an A / D converter is used, since it is processed digitally, there is no restriction on the holding time of the AGC voltage, it can be held for a long time, and the accuracy of the AGC voltage can be improved.

  Further, the predetermined voltage at the time of starting the AGC voltage may not be the VSS potential but may be VREG which is a constant voltage. In this case, contrary to when the AGC capacitor 363 is connected to GND, the start-up time in a strong electric field environment with a large input signal is shortened. In that case, the pull-down resistor 370 may be configured as a pull-up resistor connected to VREG instead of GND, or the AGC capacitor 363 is connected to VREG at the moment when the PWRON signal is switched from Low to High. It is also possible to provide a switch that rapidly charges the battery.

  Furthermore, the present invention is not limited to controlling the gain of the amplifier circuit 32 with the AGC voltage of the AGC circuit 36. In short, when the control unit 47 controls the gain of the amplifier circuit 32 and operates the receiving unit 3A again from the paused state, it is only necessary that the operation can be resumed with the gain before the pause.

  Furthermore, the standard radio wave to be received by the radio-controlled timepiece 1 is not limited to JJY in Japan, but may be configured to receive the standard radio wave of each country as shown in FIGS. In this case, the period for performing the reception operation for receiving minute data may be set according to the time code format of the standard radio wave of each country.

  In the intermittent reception operation S5 of each of the above embodiments, only the minute data is received as shown in Example 2 of FIG. 8, but the parity of the minute data may also be received. . In this case, as shown in Example 1 of FIG. 8, the reception operation may be performed continuously from the marker to the parity bit for about 40 seconds, or after receiving the minute data, the reception unit 3A is temporarily stopped, When receiving the parity bit, the receiving unit 3A may be operated again, and then the receiving unit 3A may be stopped.

  Further, in the case of an analog watch in which the hands are driven by a motor, stepping of the hour hand and the minute hand may be performed while the receiving unit 3A is stopped in the intermittent receiving operation. In the case of a watch, since the distance between the motor coil and the antenna 2 cannot be sufficiently separated, a magnetic field is generated from the motor coil when a motor pulse is output for hand movement, and the magnetic field jumps into the antenna 2 to cause noise. There is a possibility. Therefore, if the receiving unit 3A is stopped when the motor is driven, it is possible to receive correct time data without being affected by noise from the motor coil.

In the case of an analog watch in which the hands are driven by a motor, step movement of the hour hand and minute hand may be performed while the AGC voltage is held, even during the reception operation. That is, if the AGC voltage is not held, the level of the received signal varies due to noise from the motor coil, and the AGC voltage may also vary greatly. For example, when the level of the received signal is apparently increased due to noise, the control unit 47 excessively decreases the AGC voltage in an attempt to decrease the gain of the amplifier circuit 32, and it takes time to return to the normal level. The pulse may not be binarized correctly and data loss may occur.
On the other hand, if the hand is moved while the AGC voltage is held even during the reception operation, it is possible to prevent the AGC voltage from fluctuating due to the influence of noise and to output a correct TCO.

  The reception process of the present invention is not limited to the case of automatic reception received at a preset time, but may be performed at the time of manual reception by operation of the external operation member 6. In addition, the condition for performing automatic reception is not limited to scheduled reception that performs reception at a predetermined time. For example, reception processing is performed once a day by outdoor detection using a solar cell, an ultraviolet sensor, or the like. May be set.

In addition, the specific structure and procedure for carrying out the present invention can be appropriately changed to other structures and the like within a range in which the object of the present invention can be achieved.

It is a block diagram which shows the structure of the electromagnetic wave correction watch which concerns on 1st Embodiment. It is a figure explaining the time code format of the standard radio wave “JJY” in Japan. It is a figure explaining the time code format of standard electric wave "DCF77" in Germany. It is a figure explaining the time code format of standard electric wave "WWVB" in the United States. It is a circuit diagram which shows the structure of an AGC circuit. It is a block diagram which shows the structure of a memory | storage part. It is a block diagram which shows the structure of a time counter. It is explanatory drawing which illustrates the example of a receiving period. It is a flowchart which shows the time correction operation | movement of a radio wave correction clock. It is a figure which shows the original waveform concerning TC contained in a standard wave, the waveform of PWRON and an AGCHLD signal, the waveform of an AGC voltage, and a time code. It is a flowchart which shows the time correction operation | movement of the radio-controlled timepiece of 2nd Embodiment. It is a flowchart which shows the time correction operation | movement of the radio-controlled timepiece of 3rd Embodiment. FIG. 13 is a flowchart showing an operation continued from FIG. 12. FIG.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Radio wave correction clock, 3 ... Reception circuit part, 3A ... Reception part, 4 ... Control circuit part, 6 ... External operation member, 32 ... 1st amplifier circuit, 35 ... Envelope detection circuit, 37 ... Binarization circuit, DESCRIPTION OF SYMBOLS 39 ... Decoding circuit, 41 ... TCO decoding part, 42 ... Memory | storage part, 43 ... Time counter, 46 ... Drive circuit part, 47 ... Control part.

Claims (8)

A radio-controlled timepiece that receives standard radio waves, obtains time information, and corrects the time,
A receiver for receiving the standard radio wave;
A control unit for controlling the receiving unit,
The receiver is
An amplification circuit capable of amplifying the reception signal of the standard radio wave and adjusting a gain;
A binarization circuit that obtains time information by binarizing the amplified received signal based on a predetermined threshold;
The controller is
After starting the reception process by operating the receiving unit, establish the second synchronization, continue the reception operation until the minute synchronization is further established,
After the establishment of minute synchronization, during the acquisition of time information transmitted in a fixed cycle, while the data that does not need to be acquired is being transmitted, the reception unit is suspended by an intermittent reception operation that temporarily stops the operation of the reception unit. And the time information is obtained for a plurality of cycles by this intermittent reception operation,
In the intermittent reception operation, the reception unit resumes the gain of the amplifier circuit from the state before the suspension when the suspension is canceled and the operation is resumed. The radio-controlled timepiece according to claim 1,
The receiver includes an auto gain control circuit that controls the gain of the amplifier circuit,
The control unit holds the auto gain control voltage for controlling the auto gain control circuit at a voltage at the time when the operation of the receiving unit is stopped while the pause is canceled by the intermittent reception operation, and the pause is canceled. When the operation is resumed, the radio correction timepiece restarts the operation of the auto gain control circuit on the basis of the held auto gain control voltage. In the radio-controlled timepiece according to claim 1 or 2,
The control unit operates the receiving unit to establish second synchronization, and after establishing minute synchronization, obtains all data for at least one cycle,
Thereafter, the radio wave timepiece is characterized in that the time information is acquired for a plurality of cycles by controlling the receiving unit by intermittent reception operation. The radio-controlled timepiece according to any one of claims 1 to 3,
The control unit operates the receiving unit while the minute and hour information is transmitted in the standard radio wave, and pauses the receiving unit while the minute and hour information is not transmitted. Features a radio-controlled watch. The radio-controlled timepiece according to any one of claims 1 to 4,
The control unit, when resuming the operation of the receiving unit, the gain holding mode for resuming the gain of the amplifier circuit from the state before the pause, and the gain of the amplifier circuit to a predetermined gain set in advance A radio wave correction clock characterized by selecting a gain reset mode to be reset. The radio-controlled timepiece according to claim 5,
The receiving unit is configured to be able to change the reception frequency,
The radio-controlled timepiece, wherein the control unit selects the gain reset mode when the reception frequency is changed, and selects the gain holding mode when the reception frequency is not changed. The radio-controlled timepiece according to claim 2,
The radio gain timepiece according to claim 1, wherein the auto gain control circuit includes a capacitive element, and holds the auto gain control voltage at the potential of the capacitive element while the operation of the receiving unit is temporarily stopped. A control method for a radio-controlled watch that receives a standard radio wave, acquires time information, and corrects the time,
A receiver for receiving the standard radio wave;
A control unit for controlling the receiving unit,
The receiver is
An amplification circuit capable of amplifying the reception signal of the standard radio wave and adjusting a gain;
A binarization circuit that obtains time information by binarizing the amplified received signal based on a predetermined threshold;
After starting the reception process by operating the receiving unit, establish the second synchronization, continue the reception operation until the minute synchronization is further established,
After the establishment of minute synchronization, during the acquisition of time information transmitted in a fixed cycle, while the data that does not need to be acquired is being transmitted, the reception unit performs an intermittent reception operation that temporarily stops the operation of the reception unit. And obtaining the time information for a plurality of cycles by this intermittent reception operation,
While being temporarily stopped by the intermittent reception operation, the gain of the amplification circuit is held at the gain at the time when the operation of the reception unit is stopped,
A method of controlling a radio-controlled timepiece, wherein when the suspension is released and the operation of the receiving unit is resumed, the operation of the amplifier circuit is resumed based on the held gain.

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