JP2012189557A - Radio modification timepiece and method of controlling the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a radio modification timepiece that is capable of adjusting a threshold value of a binarization circuit to an appropriate level in a short time.SOLUTION: A radio modification timepiece 1 includes: an amplifier circuit 32 that amplifies a reception signal of a standard radio wave; an AGC circuit 36 that adjusts gain of the amplifier circuit 32 according to the intensity of the reception signal; a binarization circuit 37 that binarizes the reception signal on the basis of a threshold value and outputs the binarized signal; a control section 46 serving as level switching means that changes a threshold value of the binarization circuit 37 in response to an AGC signal output from the AGC circuit 36; and a TCO decoding section 41 that decodes the binarized signal after the threshold value is changed and demodulates a time code.

Description

  The present invention relates to a radio-controlled timepiece that receives a standard radio wave having time information and corrects the time based on the received standard radio wave, and a control method therefor.

  Radio timepieces that can receive standard radio waves are known. The standard radio wave is amplitude-modulated, and the radio-controlled timepiece extracts the envelope of the received signal with a filter or the like in the receiving circuit, and then compares the envelope signal with a reference voltage by a comparator or the like. A binarization circuit for converting into values is provided. The radio timepiece obtains time information based on the time code signal obtained by the binarization circuit and displays the time.

Incidentally, the reference voltage (threshold value) of the binarization circuit is usually a fixed value. For this reason, a correct time code cannot be obtained depending on the reception environment.
Therefore, the pulse duty (pulse duty ratio) of the binarized signal is calculated, and it is determined whether it is included in the reference range value of the duty set in advance according to the type of time code. A radio-controlled timepiece that adjusts the threshold value to an appropriate level by changing the threshold level has been proposed (see Patent Document 1).

JP 2009-19921 A

  The Patent Document 1 has a problem that it takes time to calculate the pulse duty of the binarized signal while the threshold value can be adjusted appropriately. For example, when the duty is calculated by dividing the time when the signal level is high in the data for 1 minute by the 1 minute, the threshold is adjusted unless the data for 1 minute is received. There was a problem that I could not.

  An object of the present invention is to provide a radio-controlled timepiece capable of adjusting a threshold value of a binarization circuit to an appropriate level in a short time and a control method therefor.

  The present invention is a radio-controlled timepiece that receives a standard radio wave having a time code and corrects the time of an internal clock based on the received standard radio wave, an amplification circuit that amplifies the received signal of the standard radio wave, and the reception An auto gain control circuit that adjusts the gain of the amplifier circuit according to the strength of the signal; and binarization means that binarizes the received signal based on a predetermined threshold value and outputs a binarized signal; Level switching means for changing a threshold value of the binarization means in accordance with a signal indicating an adjustment level of the gain of the amplifier circuit output from the auto gain control circuit, and the binarization means by the level switching means And a time code decoding means for demodulating the time code by decoding the binarized signal after the threshold value is changed.

An auto gain control circuit (hereinafter also referred to as an AGC circuit) adjusts the gain of the amplifier circuit according to the level of the received signal. Specifically, an auto gain control voltage (hereinafter also referred to as AGC voltage) is output to the amplifier circuit, and the amplifier circuit adjusts the gain of the amplifier circuit based on the AGC voltage. At this time, the AGC circuit increases the gain of the amplifier circuit when the reception signal level is low, such as when the reception environment is a weak electric field environment. Further, when the reception signal level is high, as in the case where the reception environment is a noise environment, the gain of the amplifier circuit is decreased to control the output signal level of the amplifier circuit to be constant.
Therefore, the AGC circuit outputs an adjustment level signal indicating the gain adjustment level of the amplifier circuit, for example, a signal indicating the AGC voltage value, and the level switching means uses the adjustment level signal to output the threshold value of the binarization means. By changing, an optimum threshold value can be set according to the surrounding radio wave condition. For this reason, reception performance can be improved under adverse conditions such as a noise environment and a weak electric field state.
When an AGC circuit that can output an adjustment level signal as a digital signal is used, the adjustment level signal can be directly input to a level switching unit configured by a control unit such as a CPU. Therefore, the control by the level switching means can be easily executed.

  In the radio-controlled timepiece according to the invention, there is provided storage means for storing a threshold value setting table in which the relationship between the adjustment level signal and the threshold value is stored, and the level switching means is provided from the auto gain control circuit. It is preferable to read a threshold value corresponding to the output adjustment level signal from the threshold value setting table and change the threshold value of the binarization means.

  According to the present invention, since the relationship between the adjustment level signal and the threshold value is set in the threshold value setting table, it is easy to change the threshold value setting according to the adjustment level signal. Yes.

  In the radio-controlled timepiece of the present invention, the receiving circuit unit including the amplifier circuit, the auto gain control circuit, the binarizing unit, and a threshold adjusting unit for adjusting a threshold in the binarizing unit, A control circuit unit that includes a level switching unit and the time code decoding unit, and outputs a control signal output from the level switching unit to the reception circuit unit to control a reception state of the standard radio wave in the reception circuit unit; And the receiving circuit unit decodes the control signal output from the level switching unit of the control circuit unit, and outputs the decoded control signal to the threshold value adjusting unit. It is preferable to have provided.

  According to the present invention, the control signal decoding means decodes the control signal input from the level switching means, and the threshold value adjusting means sets the threshold value of the binarization means based on the decoded control signal. adjust. Thereby, since the control signal decoding means decodes the control signal, the control signal output from the control circuit unit can be set to a simple signal, and the reliability of the signal to be communicated can be improved.

  In the radio-controlled timepiece according to the invention, the level switching means starts the reception operation and adjusts the threshold value of the binarization means and then fixes the threshold value without changing it during decoding of the time code. It is preferable to do.

  According to the present invention, since the threshold value does not change during the decoding of the time code, it is possible to avoid inconveniences such as that the accurate decoding is hindered due to, for example, garbled bits, and to decode the accurate TC. Can do.

  The present invention is a method for controlling a radio-controlled timepiece that receives a standard radio wave having a time code and corrects the time based on the received standard radio wave, wherein the radio-controlled timepiece amplifies the received signal of the standard radio wave An amplifying circuit, an auto gain control circuit for adjusting the gain of the amplifying circuit according to the strength of the received signal, and binarizing the received signal based on a predetermined threshold value to output a binarized signal Binarizing means for changing the threshold value of the binarizing means in accordance with an adjustment level signal indicating the gain adjustment level of the amplifier circuit output from the auto gain control circuit, and binarizing The time code is demodulated by decoding the binarized signal after the threshold value is changed.

  According to the present invention, similarly to the radio-controlled timepiece, the threshold value for binarization can be immediately changed to an appropriate level according to the gain adjustment level of the amplifier circuit by the AGC circuit, so that the correct time code can be set. It can be acquired, the influence of the reception environment can be reduced, and it can be corrected to the correct time.

It is a block diagram which shows the structure of the electromagnetic wave correction watch which concerns on 1st Embodiment. It is a figure which shows the relationship between the AGC voltage and gain in a 1st amplifier circuit. It is a circuit diagram which shows the structure of an AGC circuit. It is a figure which shows the relationship between the input level of the received signal in an AGC circuit, and an AGC voltage. It is a circuit diagram which shows the structure of the binarization circuit of 1st Embodiment, and a VREF switching circuit. It is a figure which shows the waveform of the TCO signal which binarized based on each reference voltage after the envelope detection of the original waveform concerning TC contained in a standard radio wave, and the received signal of this standard radio wave. The figure which shows the original waveform concerning TC contained in a standard radio wave, the waveform of the envelope signal when this standard radio wave is received in a weak electric field environment, and the waveform of the envelope signal when the standard radio wave is received in a noise environment It is. It is a figure which shows the time code format of the standard radio wave "JJY" in Japan. It is a figure which shows each signal of the standard radio wave "JJY" in Japan. It is a figure which shows the outline of a threshold value setting table. It is a flowchart which shows the time correction operation | movement of a radio wave correction clock. It is a block diagram which shows the structure of the electromagnetic wave correction watch which concerns on a modification.

[First Embodiment]
(1) Configuration of the radio-controlled timepiece 1 As shown in FIG. 1, the radio-controlled timepiece 1 includes an antenna 2, a receiving circuit unit 3, a control circuit unit 4, a display unit 5, an external operation member 6, and a quartz crystal. And a vibrator 47.
The antenna 2 receives a long-wave standard radio wave (hereinafter referred to as “standard radio wave”), and outputs the received standard radio wave to the receiving circuit unit 3.
The receiving circuit unit 3 demodulates the received signal of the standard radio wave received by the antenna 2 and outputs it to the control circuit unit 4 as TCO (Time Code Out). A detailed description of the receiving circuit unit 3 will be described later.

  The control circuit unit 4 decodes the input TCO to generate a TC (time code), and sets the time of the time counter 44 based on the generated TC. Further, the control circuit unit 4 performs control to display the time of the time counter 44 on the display unit 5. Further, the control circuit unit 4 determines the duty of the TCO input from the receiving circuit unit 3 and outputs a control signal to the receiving circuit unit 3. The detailed description of the control circuit unit 4 will be described later.

  The display unit 5 is driven and controlled by the drive circuit unit 45 of the control circuit unit 4 and displays the time counted by the time counter 44. For example, the display unit 5 may include a liquid crystal panel and display the time on the liquid crystal panel. The display unit 5 may include a dial and a pointer, and the control circuit unit 4 may move the pointer to display the time. There may be.

  The external operation member 6 is constituted by, for example, a crown or a setting button, and outputs a predetermined operation signal to the control circuit unit 4 when operated by a user. As the operation signal, for example, the radio wave type setting data for setting the type of standard radio wave received by the antenna 2 (for example, JJY in Japan, WWVB in the United States, DCF77 in Germany, BPC in China, etc.), standard radio wave For example, correction request information indicating that the time is corrected by receiving.

  The crystal oscillator 47 for the reference clock outputs a predetermined reference signal (reference clock, for example, a 32.768 kHz signal). The reference signal output from the crystal oscillator 47 is input to the control circuit unit 4. ing. This signal is frequency-divided into a signal of 1 Hz by a frequency dividing circuit in the control unit 46.

(2) Configuration of Reception Circuit Unit 3 As shown in FIG. 1, the reception circuit unit 3 is abbreviated as a tuning circuit 31, a first amplification circuit 32, and a band-pass filter (hereinafter referred to as “BPF”). 33), second amplification circuit 34, envelope detection circuit 35, AGC (Auto Gain Control) circuit 36, binarization circuit 37 as binarization means, and threshold adjustment means The VREF switching circuit 38 and a decoding circuit 39 as control signal decoding means are provided.

  The tuning circuit 31 includes a capacitor, and the tuning circuit 31 and the antenna 2 constitute a parallel resonance circuit. The tuning circuit 31 causes the antenna 2 to receive a radio wave having a specific frequency. The tuning circuit 31 converts the standard radio wave received by the antenna 2 into a voltage signal and outputs the voltage signal to the first amplifier circuit 32. In the receiving circuit unit 3 of the present embodiment, in addition to the Japanese standard radio wave “JJY”, the standard radio wave “WWVB” in the United States, the standard radio wave “DCF77” in Germany, the standard radio wave “BPC” in China, etc. It is configured to receive standard radio waves.

The first amplifier circuit 32 adjusts the gain in accordance with a signal (AGC voltage) input from an AGC circuit 36 described later, and amplifies the received signal input from the tuning circuit 31 so as to be input to the BPF 33 as a constant amplitude.
Here, the relationship between the AGC voltage and the gain in the first amplifier circuit 32 is as shown in FIG. That is, when the AGC voltage is in the range of 0.0 to 0.2 V, the gain in the first amplifier circuit 32 is set to 80 dB, and when the AGC voltage is 0.2 V or more, the gain is approximately proportional to the AGC voltage. When the AGC voltage is in the range of 0.9 to 1.0 V, the gain is about 0.0 dB. The AGC voltage input to the first amplifier circuit 32 is actually set to a variable width of about 0.1 to 0.9V.

  The band pass filter (BPF) 33 is a filter that extracts a signal in a desired frequency band. That is, by passing through the BPF 33, components other than the carrier wave component are removed from the received signal input from the first amplifier circuit 32.

  The second amplification circuit 34 further amplifies the reception signal input from the BPF 33 with a fixed gain.

  The envelope detection circuit 35 includes a rectifier (not shown) and a low-pass filter (LPF) (not shown). The envelope detection circuit 35 rectifies and filters the received signal input from the second amplifier circuit 34, and performs filtering. The envelope signal thus obtained is output to the AGC circuit 36 and the binarization circuit 37.

[Configuration of AGC circuit]
The AGC circuit 36 outputs a signal (AGC voltage) for determining a gain when the first amplification circuit 32 amplifies the reception signal based on the reception signal input from the envelope detection circuit 35. For example, A circuit as shown in FIG. 3 can be used.

  That is, the AGC circuit 36 includes a comparator 361, an AGC capacitor 362, first and second constant current sources 363 and 364, an inverter 370, a pull-down resistor 372, and a constant voltage source 373 that outputs an AGC reference voltage. I have.

The comparator 361 includes two input terminals. One input terminal (minus input) is connected to a constant voltage source 373 that is connected to a low potential power source VSS and outputs an AGC reference voltage, and the other input terminal (plus input) is connected to the envelope detection circuit 35. Has been.
For this reason, the comparator 361 outputs a Hi level signal when the voltage of the envelope signal input from the envelope detection circuit 35 is equal to or higher than the AGC reference voltage, and outputs a Low level signal when the voltage is lower than the AGC reference voltage. Is output.

The first constant current source 363 is connected between the power supply VDD having a higher potential than the power supply VSS and the AGC capacitor 362. The first constant current source 363 is turned on when a Hi level signal is output from the comparator 361 and is turned off when a Low level signal is output.
The second constant current source 364 is connected between the AGC capacitor 362 and the power source VSS. Since the inverter 370 is disposed between the comparator 361 and the second constant current source 364, the second constant current source 364 is turned on when the Low level signal is output from the comparator 361, and is at the Hi level. When a signal is output, it is turned off.

Accordingly, when a Hi level signal is output from the comparator 361, the first constant current source 363 is turned on and the second constant current source 364 is turned off, and the constant current source 363 passes a constant current to cause the AGC capacitor 362 is charged.
When the AGC capacitor 362 is charged, the AGC voltage (AGC control voltage) input to the first amplifier circuit 32 increases.
On the other hand, when a low level signal is output from the comparator 361, the first constant current source 363 is turned off, the second constant current source 364 is turned on, and the constant current source 364 passes a constant value of current so that the AGC capacitor 362 is discharged.
When the AGC capacitor 362 is discharged, the AGC voltage input to the first amplifier circuit 32 decreases.

  Therefore, as shown in FIG. 4, in the AGC circuit 36, when the input level of the reception signal input to the first amplifier circuit 32 increases, the AGC voltage also increases, and the AGC voltage changes in proportion to the input signal level. . For this reason, the strength of the input signal can be grasped by monitoring the AGC voltage.

As shown in FIG. 2, the first amplifier circuit 32 of the present embodiment decreases the gain (gain) of the first amplifier circuit 32 when the AGC voltage increases, and the first amplifier circuit 32 when the AGC voltage decreases. The gain (gain) of 32 is configured to be large.
Therefore, when the input signal level increases, the AGC voltage output from the AGC circuit 36 to the first amplifier circuit 32 increases, and the gain in the first amplifier circuit 32 decreases.
On the other hand, when the input signal level decreases, the AGC voltage output from the AGC circuit 36 to the first amplifier circuit 32 decreases, and the gain in the first amplifier circuit 32 increases.
Therefore, the AGC circuit 36 and the first amplifier circuit 32 can automatically adjust the received signal so as to have a constant amplitude.

[Configuration of binarization circuit]
As shown in FIG. 5, the binarization circuit 37 includes a binarization comparator, and one of the two input terminals is connected to the envelope detection circuit 35 and the other input terminal is , VREF switching circuit 38. The binarization circuit 37 is a comparator having hysteresis. The binarization circuit 37 is a reference voltage (threshold) having a predetermined voltage input from the envelope signal input from the envelope detection circuit 35 and the VREF switching circuit 38. Based on this, a binarized signal, that is, a TCO signal is output. The envelope signal is noisy, and flickering of the TCO signal can be suppressed by providing a binary comparator with a hysteresis of several mV.

  Specifically, the binarization circuit 37 outputs a signal having a Hi level (high level) voltage when the voltage of the envelope signal exceeds the reference voltage, and the voltage of the envelope signal sets the reference voltage. If it is lower, a Low level signal having a voltage value lower than that of the H level signal is output to the control circuit unit 4 as a TCO signal. When the voltage of the envelope signal is higher than the reference voltage, the control circuit unit 4 uses the L level as the TCO signal, and the L level when the voltage of the envelope signal is lower than the reference voltage. It is also possible to configure so as to output to

  The VREF switching circuit 38 generates reference voltages VREF1 to VREF4 from the power supply voltage VDD output from the constant voltage source 381 and outputs the reference voltage to the binarization circuit 37. The VREF switching circuit 38 includes a constant voltage source 381, four resistors R1 to R4 arranged between the constant voltage source 381 and the ground GND, and between these four resistors R1 to R4 and the binarization circuit 37. , Four switches SW1 to SW4 disposed between the R4 and the ground GND, and between the binarization circuit 37, and a constant current source 382 disposed between the resistor R4 and the ground GND. ing.

  Among these, each of the switches SW1 to SW4 is configured by an analog switch, the switch SW1 is binarized between the resistors R1 and R2 and the binarization circuit 37, and the switch SW2 is binarized between the resistors R2 and R3. Between the circuit 37, the switch SW3 is between the resistors R3 and R4 and the binarization circuit 37, and the switch SW4 is between the resistor R4 and the constant current source 382 and the binarization circuit 37. Each is arranged. Each of the switches SW1 to SW4 is independently connected to the decode circuit 39 via the selection lines SEL1 to SEL4 so that the on / off state is switched according to a signal input from the decode circuit 39. It is configured. Then, when any one of these switches SW1 to SW4 is turned on (conductive state) and the other switches are turned off (non-conductive state), the power supply voltage VDD output from the constant voltage source 381 is The voltage is changed by the current IS and the resistor R output from the constant current source 382, and the reference voltage VREF is input to the binarization circuit 37.

Specifically, the reference voltage VREF is obtained by power supply voltage VDD−current IS × resistance R. Therefore, the VREF switching circuit 38 outputs the highest reference voltage VREF1 to the binarization circuit 37 when only the switch SW1 is in the ON state. The VREF switching circuit 38 outputs the second highest reference voltage VREF2 when only the switch SW2 is in the on state, and the third highest voltage reference when only the switch SW3 is in the on state. When the voltage VREF3 is output and only the switch SW4 is in the ON state, the lowest reference voltage VREF4 is output.
By switching the reference voltage VREF, the threshold value in the binarization comparator can be switched in four stages, and the TCO duty can be adjusted.

  The decode circuit 39 is connected to the control circuit unit 4 described later via a serial communication line. The decode circuit 39 decodes the control signal input from the control circuit unit 4 and outputs a signal for setting the on / off state of the switches SW1 to SW4 based on the code included in the control signal to each selection line. Output to SEL1 to SEL4.

(3) Configuration of Control Circuit Unit 4 The control circuit unit 4 controls the operation of the reception circuit unit 3 as described above. Specifically, the control circuit unit 4 controls the decoding circuit 39 of the reception circuit unit 3 with respect to the reference circuit 39. A control signal for switching the voltage VREF is output. Further, the control circuit unit 4 decodes the TCO signal input from the binarization circuit 37 and sets the time of the time counter 44 based on the time code generated by decoding. Further, the control circuit unit 4 performs control to display the time of the time counter 44 on the display unit 5.
As shown in FIG. 1, the control circuit unit 4 includes a TCO decoding unit 41 as a time code decoding unit, a storage unit 42 as a storage unit, a time counter 44, a drive circuit unit 45, and a level switching unit. The control part 46 is comprised. Note that the reference signal output from the crystal resonator 47 is input to the control unit 46.

  The TCO decoding unit 41 decodes the TCO signal input from the binarization circuit 37 of the receiving circuit unit 3 and extracts a time code (TC) having date information and time information included in the TCO signal. Then, the TCO decoding unit 41 outputs the extracted TC to the control unit 46. The TCO decoding unit 41 of the present embodiment decodes and outputs time codes of a plurality of types of standard radio waves such as Japanese standard radio JJY, American standard radio WWVB, German standard radio DCF77, Chinese standard radio BPC, etc. It is configured to be able to.

  The storage unit 42 is a memory that stores various data, programs, and the like necessary for controlling the reception circuit unit 3 by the control circuit unit 4. Further, the storage unit 42 stores a threshold setting table 8 described later.

The time counter 44 counts time based on the reference signal output from the crystal resonator 47. Specifically, the time counter 44 includes a second counter that counts seconds, a minute counter that counts minutes, and an hour counter that counts hours.
For example, when a 1 Hz reference signal is output from the crystal unit 47, the second counter is a counter that loops the signal at 60 counts, that is, 60 seconds. The minute counter is a counter that counts once when the reference signal of 1 Hz is multiplied 60 times and loops at 60 counts, that is, 60 minutes. The hour counter is a counter that counts once when the 1 Hz reference signal is coefficiented 3600 times and loops in 24 counts, that is, 24 hours.
The minute counter may be configured to count up the minute counter by outputting a signal from the second counter to the minute counter every time the second counter counts 60 times. Similarly, the hour counter may be configured to output a signal from the minute counter to the hour counter every time the minute counter counts 60 to count up the hour counter.

  The drive circuit unit 45 controls the display state of the display unit 5 based on the time display control signal output from the control unit 46, and controls the display unit 5 to display the time. For example, when the display unit 5 has a liquid crystal panel and displays the time on the liquid crystal panel, the drive circuit unit 45 controls the liquid crystal panel based on the time display control signal and displays the time on the liquid crystal panel. Let When the display unit 5 has a dial and a pointer, the drive circuit unit 45 outputs a pulse signal to the stepping motor that drives the pointer and moves the pointer by the driving force of the stepping motor.

The control unit 46 is driven based on the drive frequency input from the crystal unit 47 and performs various control processes. That is, the control unit 46 controls the correction of the count of the time counter 44 by outputting the TC input from the TCO decoding unit 41 to the time counter 44. Further, the control unit 46 outputs a time display control signal for displaying the time counted by the time counter 44 on the display unit 5 to the drive circuit unit 45.
Further, as will be described later, the control unit 46 serving as a level switching means outputs a control signal for setting the threshold value of the binarization circuit 37 based on the AGC signal output from the AGC circuit 36 to the receiving circuit unit. 3 is output.

The control unit 46 and the decode circuit 39 are connected by a serial communication line, and the control signal is input to the decode circuit 39 via the serial communication line. As a result, a control signal for controlling the voltage switching of the VREF switching circuit 38 can be output to the VREF switching circuit 38 via the decoding circuit 39.
Here, in the serial communication between the control unit 46 and the receiving circuit unit 3, a two-line synchronous interface capable of bidirectional communication between the control unit 46 and the receiving circuit unit 3 is used. Serial communication may be performed. In such a case, after outputting a control signal from the control unit 46 to the receiving circuit unit 3, the receiving circuit unit 3 again transfers the received and recognized control signal to the control unit 46 and outputs it from the control unit 46. By confirming the data difference between the control signal and the input control signal, serial communication with higher reliability can be performed.

[Control unit (level switching means)]
The control unit 46 serving as a level switching unit adjusts the threshold value of the binarization circuit 37 to an appropriate level according to the value of the AGC signal (adjustment level signal) input from the AGC circuit 36.
First, the use that requires the threshold level adjustment of the binarization circuit 37 will be described.
FIG. 6 is a diagram illustrating the relationship between the reference voltage VREF that determines the threshold value of the binarization circuit 37 and the TCO waveform. The original waveform of the standard radio wave is a rectangular wave as indicated by A1 in FIG. 6, but the waveform from the envelope detection circuit 35 is an amplified waveform of a minute signal as indicated by A2 in FIG. In this frequency band (30 to 300 kHz), there is a lot of noise generated by electronic equipment, and therefore there is a lot of noise in the actual usage environment.

When the threshold value is increased to the reference voltage VREF1, the waveform A2 has many low periods lower than the threshold value. For this reason, the TCO waveform A3 binarized with the reference voltage VREF1 loses its pulse when the amplitude of the waveform is small, and the total pulse duty of the TCO waveform A3 also decreases.
On the other hand, when the threshold value is lowered to the reference voltage VREF3, the waveform A2 has a higher Hi period than the threshold value. For this reason, the TCO waveform A5 binarized with the reference voltage VREF3 also picks up sudden noise and outputs an erroneous pulse. Therefore, the total pulse duty of the TCO waveform A4 increases.
When the threshold is set to VREF2 between the reference voltages VREF1 and VREF3, the pulse duty of the TCO waveform A4 binarized with the threshold is between the TCO waveforms A3 and A5.

  Further, the TCO waveform changes depending on the reception environment. That is, the relationship between the peak and bottom of the output waveform of the envelope detection circuit 35 changes in the reception environment. As shown in FIG. 7, a) When the signal of the weak electric field is weak, the level of the peak (Hi) decreases. Since the dynamic range of the circuit is fixed, the bottom level does not change. For this reason, the pulse width of the narrow pulse is considerably low, and the threshold value cannot be exceeded at the reference voltage VREF1. In this case, the reference voltage VREF3 is optimal.

In addition, b) In an environment with a lot of urban noise, the bottom (Lo) level increases as a whole. Since the dynamic range of the circuit is also fixed, the peak level does not change. At the reference voltage VREF3, the threshold value is almost exceeded, and it is determined as Hi and the duty is increased. In this case, the reference voltage VREF1 is optimal.
In the case of FIG. 7, the SN ratio is deteriorated anyway, and setting of the threshold value of the binarization circuit 37 becomes more difficult than the state where the SN ratio is good.

If the threshold value of the binarization circuit 37 cannot be set appropriately, each signal of the standard radio wave cannot be detected accurately.
For example, the standard radio wave (JJY) time code format used in Japan is as shown in FIG. The pulse width of each signal in JJY is as shown in FIG.

In JJY, as shown in FIG. 9, the “1” signal has a high-level signal pulse width of 0.5 seconds (that is, pulse duty 50%) with respect to a pulse width of 1 second. The “0” signal has a high-level signal pulse width of 0.8 seconds (pulse duty 80%) with respect to a pulse width of 1 second. Further, the “P” signal has a high-level signal pulse width of 0.2 seconds (pulse duty 20%) with respect to a pulse width of 1 second.
Here, if the threshold value is not at an appropriate level, the pulse width of the high level signal is significantly different from the original waveform, as in the TCO signal by VREF1 in FIG. In this case, the TCO decoding unit 41 cannot decode a correct signal.

Therefore, the control unit 46 of the present embodiment sets the threshold value to an appropriate level based on the AGC signal that is the adjustment level signal indicating the AGC voltage value. That is, the control unit 46 serving as a level switching unit compares the value of the AGC signal with a preset reference value. This reference value is set in the threshold value setting table 8 stored in the storage unit 42. Note that since the AGC signal needs to be input as a digital value to the control unit 46 constituted by a CPU or the like, the AGC circuit 36 is preferably configured so that the AGC signal is output as a digital signal. When the AGC signal is output as an analog signal, it may be converted into a digital value by an AD converter and input to the control unit 46.
As shown in FIG. 10, the threshold setting table 8 includes an AGC voltage range 81, a threshold level 82 corresponding to the AGC voltage range 81, and a reference voltage level 83 corresponding to the threshold level 82. Is set.

In the present embodiment, the threshold setting table 8 sets the level 1 when the AGC voltage range 81 and the threshold level are 0.8 V or more, and when the level is 0.5 V or more and less than 0.8 V. 2 is set. If the voltage is 0.2V or more and less than 0.5V, level 3 is set. If the voltage is less than 0.2V, level 4 is set.
Corresponding to the respective levels 1 to 4, reference voltages VREF1 to VREF4 of the binarization circuit 37 are set. Note that the levels of the reference voltages VREF1 to VREF4 are not set at regular intervals, as shown in FIGS. That is, what is important as a specific threshold level is that the input level is a strong input with a high input signal level (AGC voltage is 0.8 V or more) and a weak input with a low input signal level (AGC voltage is 0. 0). 2 V or less). Therefore, first, the reference voltage VREF1 and the reference voltage VREF4 are set, and the reference voltages VREF2 and VREF3 may be set therebetween.
As shown in FIG. 4, the AGC voltage saturates to about 0.1 V when the input signal level is about 40 db or less, and saturates to about 0.9 V when the input signal level is about 85 db or more. Therefore, the threshold value is not switched in a region where the AGC voltage is saturated where the input signal is extremely large or small.
In the present invention, since the threshold value is changed by the AGC voltage, the type of the standard radio wave is not limited. That is, the threshold setting table 8 can be used regardless of the type of standard radio wave.

(4) Operation of the radio-controlled timepiece 1 Next, the time-correcting operation using the standard radio wave in the radio-controlled timepiece 1 as described above will be described.
FIG. 11 is a flowchart showing the time adjustment operation of the radio-controlled timepiece 1.

  At the time of manufacturing the radio-controlled timepiece 1, the threshold setting table 8 is written and stored in the storage unit. When the radio-controlled timepiece 1 is manufactured, for example, JJY is set as the type of standard radio wave to be received. Therefore, at the time of manufacturing the receiving circuit, the radio-controlled timepiece 1 is set to a state in which the TC included in JJY can be decoded. The type of radio wave to be received is basically the standard radio wave at the time of previous reception, but can be set by the user by operating the external operation member 6 after the previous reception.

In FIG. 11, when the preset automatic reception time comes and when a manual reception operation is performed by the external operation member 6, the control unit 46 of the radio-controlled timepiece 1 starts reception processing (step S1). .
As the automatic reception time, for example, a time zone with less city noise such as 2:00 am is set, but the user may set the automatic reception time in advance. Then, the control unit 46 monitors the time counted by the time counter 44, and recognizes that the time counted by the time counter 44 is a preset time (for example, 2:00 am) Automatic reception processing is started (S1).

  When the reception process is started, the control unit 46 selects a receiving station (standard radio wave type) (S2). As described above, the initial setting of the receiving station is JJY, but in principle after that, the previous receiving station is set, and when the user selects a station, the selected station is set.

When the receiving station is selected, the control unit 46 stops the process until a predetermined wait time elapses (S3). This is to wait for the AGC voltage to stabilize after the setting of the receiving circuit is switched by the selection of the receiving station. The time constant of the AGC circuit 36 of the radio-controlled timepiece 1 is large, and it takes several seconds for the AGC voltage to stabilize. For this reason, the control unit 46 waits for a predetermined wait time (for example, 10 seconds) without proceeding with the process.
When the predetermined wait time elapses, the control unit 46 receives the AGC signal output from the AGC circuit 36 and acquires AGC voltage data (S4).

Then, the control unit 46 needs to refer to the threshold setting table 8 to acquire the threshold level of the binarization circuit 37 corresponding to the acquired AGC voltage and to change it from the initial threshold level. It is determined whether there is (S5).
That is, in the present embodiment, level 2 is set as the initial value of the threshold level. For this reason, as shown in FIG. 10, if the acquired AGC voltage is in the range of 0.5 to 0.8 V (range of 0.5 or more and less than 0.8 V), the level 2 may be maintained. Then, it is determined as “No”.

On the other hand, when the acquired AGC voltage is 0.8 V or more and less than 0.5 V, “Yes” is determined in S 5, and the control unit 46 determines the threshold based on the threshold setting table 8. Is changed (S6).
For example, when the reception environment is a) a weak electric field shown in FIG. 7, the signal level becomes small and the AGC voltage becomes low. For this reason, for example, the AGC voltage is in the range of 0.2 to 0.5 V (0.2 V or more and less than 0.5 V). In this case, the threshold level setting table 8 selects level 3 as the threshold level. For this reason, the control unit 46 outputs a control signal for setting the threshold level of the binarization circuit 37 to level 3 to the decode circuit 39. Then, the reference voltage VREF3 is selected by the VREF switching circuit 38, and the threshold level is set to level 3.

  Further, when the reception environment is the b) noise environment shown in FIG. 7, the signal level is increased and the AGC voltage is also increased. For this reason, for example, the AGC voltage is 0.8 V or more, and the threshold level is selected as the threshold level 1 by the threshold setting table 8. Therefore, the control unit 46 outputs a control signal for setting the threshold level of the binarization circuit 37 to level 1 to the decode circuit 39. Then, the reference voltage VREF1 is selected by the VREF switching circuit 38, and the threshold level is set to level 1.

Next, the control unit 46 performs a second synchronization process (S7). That is, the reception circuit unit 3 converts the standard radio wave received by the antenna 2 into a voltage signal (reception signal) by the tuning circuit 31, and the first amplification circuit 32, the bandpass filter 33, the second amplification circuit 34, The envelope detection circuit 35 amplifies the received signal to a predetermined level, extracts a signal in a desired frequency band, and rectifies and filters it to obtain an envelope signal. Further, the envelope signal is binarized by the binarization circuit 37 to obtain a TCO signal, and this TCO signal is output to the control circuit unit 4.
Therefore, the control unit 46 establishes second synchronization by confirming whether the rising timing of the TCO signal input to the TCO decoding unit 41 is 1 second.

  After establishing the second synchronization, the control unit 46 establishes frame synchronization (minute synchronization) in order to confirm the 0-second position of the time code (S8). For example, in the Japanese standard radio wave JJY, the portion where the P0 and M markers are continuous is the start point of the time code, and frame synchronization can be established by detecting this continuous marker.

When frame synchronization is established, the binarization circuit 37 performs binarization processing with a threshold of an appropriate level according to the AGC voltage and outputs a TCO signal, and the TCO decoding unit 41 decodes the TCO signal. The time code is acquired (S9).
That is, in the present embodiment, in order to output an accurate TCO before decoding the time code, the threshold value is set based on the AGC voltage, and then the flow proceeds to the time code acquisition (S9) flow.
If the threshold level for binarization is determined in S6, it is fixed during acquisition of the time code. This is because if the threshold level is changed during acquisition of the time code, bit data may be erroneously detected and accurate decoding may not be performed.

And the control part 46 judges whether exact TC was acquired (S10), and when accurate TC is acquired, the reception operation | movement of the standard wave in the receiving circuit part 3 is complete | finished (S11). Thereafter, the control unit 46 outputs the acquired TC to the time counter 44, corrects each counter value of the time counter 44, and corrects the display time of the display unit 5 (S12). And it returns to normal hand movement (S13).
On the other hand, if an accurate TC cannot be obtained in step S10, the control unit 46 ends the standard radio wave receiving operation in the receiving circuit unit 3 (S14), and returns to the normal hand movement (S13).

[Effects of Embodiment]
In the radio-controlled timepiece 1 of the present embodiment, the control unit 46 serving as a level switching unit uses the AGC signal indicating the AGC voltage value and the threshold setting table 8 to set the threshold level according to the AGC voltage value. Therefore, the threshold value of the binarization circuit 37 can be immediately changed to an appropriate level.
Since the AGC voltage changes according to the level of the received signal level, it changes according to the surrounding radio wave condition. Therefore, if the threshold value is set according to the AGC voltage value, an optimum threshold value corresponding to the radio wave environment can be set. For this reason, reception performance can be improved under adverse conditions such as a noise environment and a weak electric field state.
Therefore, the binarization circuit 37 can output a correct TCO signal after setting the threshold value, and the TCO decoding unit 41 can acquire an accurate TC. Therefore, the time correction process of the radio-controlled timepiece 1 can be accurately performed using the decoded TC.

  Since the AGC voltage value is set according to the input level of the received signal, it can be detected immediately after the start of reception. For this reason, a time of several seconds to 10 seconds is required until the AGC voltage is stabilized, but when the AGC voltage is stabilized, the value can be detected and the threshold value can be set immediately. For this reason, unlike the conventional case, the threshold value can be set more quickly than when the threshold value cannot be set unless data for one minute is received. Therefore, the average reception time in the radio-controlled timepiece can be shortened, and power can be saved.

The control unit 46 changes the reference voltage VREF only once during one reception process, and is set by the VREF switching circuit 38 while the TCO decoding unit 41 decodes the TCO signal into TC. The reference voltage is maintained, and the reference voltage in the binarization circuit 37 is not changed.
For this reason, since the reference voltage does not change during decoding, it is possible to avoid inconveniences such as obstructing accurate decoding due to, for example, garbled bits, and to decode accurate TC.

Further, the receiving circuit unit 3 includes a decoding circuit 39, which decodes the control signal input from the control circuit unit 4 by the decoding circuit 39 and outputs the decoded control signal to the VREF switching circuit 38.
For this reason, since the decoding circuit 39 decodes the control signal, the control signal output from the control circuit unit 4 can be set to a simple signal, and the reliability of the signal to be communicated can be improved.

  Furthermore, since the threshold level (reference voltage VREF) can be set according to the AGC voltage value, it is not necessary to set the threshold according to the type of the standard radio wave. For this reason, it is not necessary to store the setting for each standard radio wave in the threshold setting table 8, and only one type of setting can be used for each standard radio wave such as JJY or WWVB. Therefore, for example, even when moving to a place where a different standard radio wave is transmitted, the time can be easily and accurately corrected.

  The receiving circuit unit 3 and the control circuit unit 4 are connected by a serial communication line. For this reason, compared with the case where the receiving circuit part 3 and the control circuit part 4 are connected by a parallel communication circuit, the number of communication lines can be reduced and the circuit configuration in the radio-controlled timepiece 1 can be further simplified. In addition, the communication speed can be further increased by serially outputting a control signal from the control circuit unit 4 to the receiving circuit unit 3 via the serial communication line. Furthermore, the control circuit unit 4 and the reception circuit unit 3 are connected by a pair of serial communication lines so that bidirectional communication can be performed, so that a control signal is output from the control unit 46 to the reception circuit unit 3. The receiving circuit unit 3 can transfer the received and recognized control signal to the control unit 46 again, and can confirm the data difference between the control signal output by the control unit 46 and the input control signal. With such a configuration, more reliable serial communication can be performed.

[Other Embodiments]
It should be noted that the present invention is not limited to the above-described embodiments, and modifications, improvements, and the like within the scope that can achieve the object of the present invention are included in the present invention.

That is, the radio wave correction timepiece may be a radio wave correction timepiece 1B shown in FIG.
The reception circuit unit 3B of the radio-controlled timepiece 1B is different from the binarization unit in that an AD converter 37B and a level selection unit 38B are used instead of a binarization circuit using a comparator. In this case, a clock signal for the AD converter 37B is required.
When a 10-bit AD converter is used as the AD converter 37B for digitizing the analog signal after envelope detection, ten digital signals are output to the level selection unit 38B. Therefore, the level selection unit 38B binarizes the 10-bit signal of the AD converter 37B based on the control signal at a predetermined level to obtain a TCO output.

In each of the above embodiments, the initial value of the reference voltage VREF of the binarization circuit 37 at the time of reception processing may be a fixed value set in advance. For example, the value set at the time of the previous reception processing is stored, In the next reception process, the previous set value may be set as the initial value.
In this case, in reception processing where the surrounding reception environment is constant, such as during regular reception, if the value set at the previous reception is set as the initial value, the threshold value can be changed without changing the threshold. There is a high possibility that the processing after the synchronization processing S7 can be performed. Therefore, the reception process can be performed in a shorter time and efficiently.

In the above embodiment, the analog circuit shown in FIG. 3 is used as the AGC circuit 36, but other circuit configurations may be used. For example, an AGC circuit that detects a waveform after envelope detection with an AD converter and digitally generates an AGC voltage using a DA converter may be used. In this case, the digital signal before the DA converter can be used as the AGC signal output to the control unit 46, and the control unit 46 can control based on this digital data, so that the control by the control unit 46 can be easily performed. .
In the case where an AD converter is used as the AGC circuit 36, it is the same as the AD converter 37B of the binarization means in FIG. 12 in that the received signal is sampled. May also be used.

  In the above embodiment, once the threshold value is changed, the threshold value is fixed until reception is completed. However, when the AGC voltage changes greatly after the threshold value is changed, the threshold value is changed again based on the AGC voltage. You may reset the threshold. In this way, the threshold value can be changed to an appropriate level when the reception environment changes greatly during reception. In this case, the time may be corrected using only the TC decoded after the threshold value is changed.

  Furthermore, in the above-described embodiment, the radio correction clocks 1 and 1B are examples of a straight system that does not perform frequency conversion. However, the radio correction clocks 1 and 1B are not limited to this, but for example, as radio correction clocks having a superheterodyne reception circuit unit Also good. In such a case, the reception frequency may be switched not by switching the band-pass filter but by switching the transmission frequency or frequency division ratio of a VCO (Voltage Controlled Oscillator).

  Further, the circuit for changing the threshold value of the binarization circuit 37 is not limited to the configuration in which the reference voltage of the binarization circuit 37 is switched by the VREF switching circuit 38. For example, the reference voltage of the binarization circuit 37 may be fixed and a circuit for changing the offset value of the comparator may be provided. Further, the threshold value may be set by providing a plurality of inverters that change the capabilities of the Pch transistor and the Nch transistor. It is good also as composition changed.

  In the above embodiment, the level switching means is configured by the control unit 46. However, the level switching means is provided in the reception circuit units 3 and 3B, and the threshold value is automatically set in the binarization circuit 37 and the level selection unit 38B. You may comprise so that a value may switch. In this case, it is not necessary to take out the AGC signal from the receiving circuit units 3 and 3B to the control circuit unit 4, and wiring and the like can be simplified.

Further, in the above embodiment, the relationship between the AGC signal and the threshold value is set in the threshold value setting table 8 stored in the storage unit 42. The relationship may be set. For example, when the level switching means is realized by software executed by the control unit 46, the relationship between the AGC signal and the threshold value may be directly incorporated into the software. In particular, the relationship between the AGC signal and the threshold value does not depend on the type of the standard radio wave, etc., and only one type of setting may be used.
In addition, the specific structure and procedure for carrying out the present invention can be appropriately changed to other structures and the like within a range in which the object of the present invention can be achieved.

  DESCRIPTION OF SYMBOLS 1,1B ... Radio wave correction clock, 2 ... Antenna, 3, 3B ... Reception circuit part, 4 ... Control circuit part, 5 ... Display part, 6 ... External operation member, 8 ... Threshold setting table, 32 ... 1st amplification Circuit, 35 ... Envelope detection circuit, 36 ... AGC circuit, 37 ... Binarization circuit, 37B ... AD converter, 38 ... VREF switching circuit, 38B ... Level selection unit, 39 ... Decoding circuit, 41 ... TCO decoding unit, 42 DESCRIPTION OF SYMBOLS ... Memory | storage part, 44 ... Time counter, 45 ... Drive circuit part, 46 ... Control part, 381 ... Constant voltage source, 382 ... Constant current source.

Claims (5)

A radio-controlled timepiece that receives a standard radio wave having a time code and corrects the time of the internal clock based on the received standard radio wave,
An amplifier circuit for amplifying the received signal of the standard radio wave;
An auto gain control circuit for adjusting the gain of the amplifier circuit according to the strength of the received signal;
Binarization means for binarizing the received signal based on a predetermined threshold and outputting a binarized signal;
Level switching means for changing a threshold value of the binarization means in accordance with an adjustment level signal indicating an adjustment level of the gain of the amplifier circuit output from the auto gain control circuit;
Time code decoding means for demodulating the time code by decoding the binarized signal after the threshold value of the binarizing means is changed by the level switching means;
A radio-controlled timepiece characterized by comprising: The radio-controlled timepiece according to claim 1,
A storage unit storing a threshold setting table in which a relationship between the adjustment level signal and the threshold is set;
The level switching means reads a threshold value corresponding to the adjustment level signal output from the auto gain control circuit from the threshold setting table and changes the threshold value of the binarization means. A radio-controlled watch. In the radio-controlled timepiece according to claim 1 or 2,
A receiving circuit unit including a threshold value adjusting unit for adjusting a threshold value in the amplifier circuit, the auto gain control circuit, the binarizing unit, and the binarizing unit;
A control circuit unit that includes the level switching unit and the time code decoding unit, and outputs a control signal output from the level switching unit to the reception circuit unit to control a reception state of the standard radio wave in the reception circuit unit And comprising
The receiving circuit unit is
A radio-controlled timepiece comprising: a control signal decoding unit that decodes the control signal output from the level switching unit of the control circuit unit and outputs the decoded control signal to the threshold value adjusting unit. . The radio-controlled timepiece according to any one of claims 1 to 3,
The level switching means adjusts the threshold value of the binarization means after starting the reception operation, and then fixes the threshold value without changing the threshold value during decoding of the time code. clock. A control method for a radio-controlled clock that receives a standard radio wave having a time code and corrects the time based on the received standard radio wave,
The radio wave correction watch is
An amplifier circuit for amplifying the received signal of the standard radio wave;
An auto gain control circuit for adjusting the gain of the amplifier circuit according to the strength of the received signal;
Binarization means for binarizing the received signal based on a predetermined threshold value and outputting a binarized signal; and showing a gain adjustment level of the amplifier circuit output from the auto gain control circuit Changing the threshold value of the binarization means according to the adjustment level signal;
A method of controlling a radio-controlled timepiece, comprising: decoding a binarized signal after a binarization threshold is changed and demodulating a time code.

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