JP4362656B2 - Time information receiving apparatus and time information receiving control method - Google Patents

Description

The present invention relates to a time information reception device and a time information reception control method , and is suitable for application to a radio timepiece, for example.

  Currently, in each country (for example, Germany, the UK, Switzerland, Japan, etc.), time data, that is, a standard radio wave including a time code is transmitted. In Japan (Japan), amplitude-modulated 40 kHz and 60 kHz standard radio waves including format time codes are transmitted from two transmitting stations (Fukushima Prefecture and Saga Prefecture).

  In recent years, a radio timepiece, which is a type of time information receiving device that receives a standard radio wave in such a time code format and corrects the data of a clock time (hereinafter referred to as “internal time” as appropriate), has been put into practical use. Yes.

  A general radio clock receives a standard radio wave at a fixed time such as 3 am and corrects the internal time. However, since it takes a certain time for the operation of the receiving circuit to stabilize, for example, continuous reception for 3 minutes or more is performed, for example, the time code is continuously received three times (for example, Patent Document 1). reference). In this way, the long-time receiving operation consumes a relatively large amount of power because the power is continuously supplied to the receiving circuit during this time.

In addition, a technology has been developed to detect an error in the second part at the time of reception for correcting the internal time once a month, and to determine whether or not to perform a long-time reception operation based on the result of this error detection. (For example, refer to Patent Document 2). However, when the internal time is surely corrected, the long-time receiving operation as described above is eventually performed.
JP-A-7-198878 Japanese Patent Laid-Open No. 5-157859

  As described above, in the conventional radio-controlled timepiece, the internal time correction process is started at a preset time regardless of whether the internal time needs to be corrected or not. Although correction may be possible with a part of the data of the time code, a long-time reception operation is required to stabilize the reception operation.

  Further, in a wristwatch type radio-controlled timepiece, power consumption is a problem directly related to the continuous operation possible time as a timepiece, and therefore reduction of power consumption is required. Therefore, it is necessary to reduce power consumption by reducing the operation time of the receiving circuit as much as possible.

The present invention has been made in consideration of the above points. When correcting the internal time, the reception operation time of the standard radio wave is reduced as much as possible without receiving unnecessary data as much as possible. It is an object of the present invention to realize a time information receiving apparatus and a time information receiving control method with reduced consumption.

In order to solve the above problems, the time information receiving device of the invention described in claim 1 is:
A receiving means (for example, the radio wave receiving circuit unit 60 in FIG. 1) that receives a standard time wave that carries a standard time code in a standardized standard time format , and a time measuring means (for example, a time measuring means that measures the internal time including the date) In the time information receiving device provided with the time measuring circuit unit 80) of FIG.
Time difference correction amount of time when the internal time is corrected based on the time code of the standard radio during reception the previous between time of reception of the standard radio before last and the previous reception by said receiving means And an error that occurs at the internal time as time elapses from the previous reception is converted into an error within the limit error range based on the data representing the error value within the limit error range that is within ± 8 seconds. An expected date and time calculating means (CPU 10 in FIG. 1; step A20 in FIG. 9, steps A22 to A28 in FIG. 10) for calculating an expected date and time to be reached ;
When the internal time measured by the time measuring means reaches 00 seconds of the expected date and time calculated by the expected date and time calculating means, the reception means receives the standard radio wave by the receiving means and starts receiving the time code. Control means (CPU 10 in FIG. 1; A4 and A6 in FIG. 9);
Detection means (CPU 10 in FIG. 1; A8 in FIG. 9) for detecting a pulse of the leading P signal waveform included in the time code of the standard radio wave received by the control of the reception start control means;
Discriminating means (CPU 10 in FIG. 1; A10 in FIG. 9) for discriminating whether or not the pulse immediately after the pulse detected by the detecting means is an M signal;
When it is determined by the determining means that the immediately following pulse is an M signal, the time measuring means is controlled in response to the next pulse following the M signal to set the numerical value of the second part of the internal time to 01. On the other hand, when it is determined that the immediately following pulse is not an M signal, and the second part of the internal time is not a numerical value of 01 when the immediately following pulse is received, Time adjusting means (CPU 10 in FIG. 1; A12 in FIG. 9) which controls the time measuring means in response to the next pulse following the immediately following pulse to control the numerical value of the second part of the internal time to a numerical value of 11. , A14, A16),
A reception end control means (CPU 10 in FIG. 1; A18 in FIG. 9) for terminating the reception of the standard radio wave by the reception means immediately after the correction of the internal time by the time correction means,
It is characterized by having.

The invention described in claim 2 is the time information receiver according to claim 1,
The time correcting means determines that the immediately following pulse is not an M signal by the determining means, and when the second portion of the internal time is a numerical value of 01 when receiving the immediately following pulse, The correction control is finished without changing the numerical value of the second part of the internal time (A14 in FIG. 9; Yes) .

The invention described in claim 3,
A receiving means (for example, the radio wave receiving circuit unit 60 in FIG. 1) that receives a standard time wave that carries a standard time code in a standardized standard time format, and a time measuring means (for example, a time measuring means that measures the internal time including the date) In the time information reception control method used in the time information receiving apparatus provided with the time measuring circuit unit 80) of FIG.
Time difference between the previous reception of the standard radio wave and the previous reception by the receiving means, and the correction amount of the time when the internal time is corrected based on the time code of the standard radio wave at the previous reception And an error that occurs at the internal time as time elapses from the previous reception is converted into an error within the limit error range based on the data representing the error value within the limit error range that is within ± 8 seconds. An expected date and time calculating step for calculating an expected date and time expected to reach (CPU 10 in FIG. 1; step A20 in FIG. 9, steps A22 to A28 in FIG. 10);
When the internal time measured by the time measuring means reaches 00 seconds, which is the expected date and time calculated by the expected date and time calculating step, the reception means receives the standard radio wave and starts receiving the time code. Control steps (CPU 10 in FIG. 1; A4 and A6 in FIG. 9);
A detection step (CPU 10 in FIG. 1; A8 in FIG. 9) for detecting a pulse of the leading P signal waveform included in the time code of the standard radio wave received by the control of the reception start control step;
A determination step (CPU 10 in FIG. 1; A10 in FIG. 9) for determining whether or not the pulse immediately after the pulse detected in this detection step is an M signal;
If it is determined in this determination step that the immediately following pulse is an M signal, the time measuring means is controlled in response to the next pulse following the M signal to set the value of the second part of the internal time to 01. On the other hand, when it is determined that the immediately following pulse is not an M signal, and the second part of the internal time is not a numerical value of 01 when the immediately following pulse is received, A time correction step (control CPU 10 in FIG. 1; A12 in FIG. 9) which controls the time measuring means in response to the next pulse following the immediately following pulse to control the second portion of the internal time to a numerical value of 11. , A14, A16),
A reception end control step (CPU 10 in FIG. 1; A18 in FIG. 9) for terminating the reception of the standard radio wave by the receiving means immediately after the correction of the internal time in this time correction step;
It is characterized by providing.

The invention described in claim 4,
In the time information reception control method according to claim 3,
In the time correction step, when the immediately following pulse is determined not to be an M signal by the determining means, and when the numerical value of the second part of the internal time is a numerical value of 01 when the immediately following pulse is received, The correction control is finished without changing the numerical value of the second part of the internal time (A14 in FIG. 9; Yes) .

According to the first aspect of the present invention, the internal time based on the time difference between the previous reception of the standard radio wave and the previous reception by the reception means, and the time code of the standard radio wave at the previous reception. Based on the data representing the amount of time correction when the time is corrected and the value of the error within the limit error range within ± 8 seconds, the internal time is set according to the passage of time from the previous reception. An expected date and time that is expected to reach an error within the limit error range is calculated, and the internal time counted by the time measuring means is 00 seconds of the expected date and time calculated by the expected date and time calculating means. When receiving the standard radio wave by the receiving means, the time code is reproduced, the pulse of the leading P signal waveform included in the time code is detected, and the pulse immediately after this pulse is If it is a signal, the time measuring means is controlled in response to the next pulse following the M signal to correct the second part of the internal time to a value of 01, while the immediately following pulse is an M signal. If the value of the second part of the internal time is not 01 when the immediately following pulse is received, the time measuring means is controlled in response to the next pulse following the immediately following pulse to control the second of the internal time. Control is performed so that the numerical value of the portion is corrected to a numerical value of 11, and reception of the standard radio wave by the receiving means is terminated immediately after the correction of the internal time. Therefore, in order to perform the reception start operation automatically at the timing when the error correction is required, while receiving the start operation is minimal ing and frequency, when the internal time is corrected, immediately thereafter, the standard being received Since the reception of radio waves is terminated , the overall reception operation time is shortened and power consumption can be suppressed.

Furthermore, as described above , since the minimum reception operation is performed at the timing when the error needs to be corrected, the reception operation time is greatly shortened compared to the conventional one, and the power consumption can be further suppressed. .

According to the invention described in claim 3, the same effect as that of the invention described in claim 1 can be obtained.

  Next, embodiments for carrying out the present invention will be described in detail with reference to the drawings. In the following, a case where the time information receiving device of the present invention is applied to a radio timepiece will be described, but the form to which the present invention is applicable is not limited to this.

<First Embodiment>
FIG. 1 is a block diagram showing an internal configuration of the radio timepiece 1 according to the first embodiment. In the figure, a radio timepiece 1 includes a CPU (Central Processing Unit) 10, an input unit 20, a display unit 30, a ROM (Read Only Memory) 40A, a RAM (Random Access Memory) 50A, a radio wave receiving circuit unit 60, and a time code generation. The circuit unit 70, the time measuring circuit unit 80, and the oscillation circuit unit 90 are provided. Each unit except for the oscillation circuit unit 90 is connected by a bus 100, and the oscillation circuit unit 90 is connected to a time measuring circuit unit 80.

  The CPU 10 reads out various programs stored in the ROM 40A in accordance with predetermined timings or operation inputs input from the input unit 20, and develops them in the RAM 50A. Based on this program, the operation of each unit in the radio timepiece 1 is controlled. Control.

  In particular, the CPU 10 always monitors whether or not the reception start date / time has been reached by executing the limit error correction process. When the reception start date / time is reached, the CPU 10 controls the radio wave reception circuit unit 60 to generate the standard radio wave. Receive. Then, based on the time code generated by inputting the received signal to the time code generation circuit unit 70, the internal time data (not shown) measured by the time measurement circuit unit 80 is corrected. Various controls are also performed such as outputting a display signal based on the internal time data to the display unit 30 to update the display time.

  The input unit 20 includes a switch for causing the radio timepiece 1 to execute various functions. When these switches are operated by the user, an operation signal for the corresponding switch is output to the CPU 10.

  The display unit 30 is a display device configured by an LCD (Liquid Crystal Display), a segment type display, or the like. Then, the display data output from the CPU 10, for example, the internal time data measured by the timing circuit unit 80 is digitally displayed.

  The ROM 40A is an area for storing various initial setting values and initial programs, as well as programs and data for realizing the functions of the radio timepiece 1, and limit error correction for executing limit error correction processing described later. A limit error correction processing program area 41 in which a processing program is stored is provided.

  The CPU 10 can automatically correct an error in time measured by the time measuring circuit unit 80 built in the radio timepiece 1 within the limit error range by executing limit error correction processing. The marginal error range is a range of errors that can be reliably corrected by receiving a part of one frame without receiving all one frame of the time code.

  This will be described more specifically. The limit error range of the present embodiment is within ± 8 seconds, which is an identification code (hereinafter referred to as “P signal”) arranged at a time code position of equal intervals of 10 seconds, and In order to perform error correction based on an identification code (hereinafter referred to as “M signal”) arranged at the start position of each frame, the limit error range is within ± 8 seconds. In the limit error range, the maximum error occurs when the error is +8 seconds (advance 8 seconds) or −8 seconds (8 seconds delay) (hereinafter referred to as “maximum error within the limit” as appropriate).

  As described above, the error includes the advance error and the delay error. When the error is corrected, it is necessary to identify these two errors. In the present embodiment, the advance error and the delay error are identified based on the P signal and the M signal included in the time code, and correction corresponding to each error is executed. Note that the error in time measured by the clock circuit built in the wristwatch is, for example, on the order of a monthly difference of about ± 15 seconds. Therefore, if the monthly difference is ± 15 seconds, if the standard time signal is received once every two weeks in the radio-controlled timepiece 1, the error of the time measured is usually within ± 8 seconds. .

  Further, the limit error correction process predicts the timing at which the error should be corrected based on the timekeeping accuracy of the radio timepiece 1 and the maximum error within the limit, so that the error can be corrected in a situation where the generated error is always within the limit error range. I have to. Therefore, it is possible to minimize the frequency and time of the reception operation by the radio wave receiving circuit unit 60 of the radio timepiece 1 by executing the limit error correction process.

  The mechanism in which the CPU 10 corrects the error within ± 8 seconds by the limit error correction processing is deeply related to the time code format of the standard radio wave as shown in FIG. If the second part of the reception start time is always 0 second, if there is a lead error within 8 seconds, the CPU 10 causes the radio wave reception circuit unit 60 to start reception between time T10 and time T11, and within 8 seconds. When there is a delay error, reception is started between time T13 and time T20.

  When reception is started between time T10 and time T11, the CPU 10 detects the P signal at time T11 and then detects the M signal at time T12. On the other hand, when reception is started between time T13 and time T20, the CPU 10 does not detect the M signal at time T22 after detecting the P signal at time T21.

  Therefore, when the M signal is detected with the next pulse after the P signal is detected, it indicates that the rising edge of the next pulse is time T13, and the M signal is detected with the next pulse after the P signal is detected. When not detected, it indicates that the next pulse rises at time T23. Therefore, when it is a lead error, the second part of the internal time data measured by the time measuring circuit unit 80 is corrected to the time T13 at the rising edge of the next pulse at the time T12 when the M signal is detected, and when it is a delay error. Is corrected at time T23 at the rising edge of the next pulse at time T22 when the M signal is not detected.

  If there is no error in the internal time data measured by the time measuring circuit 80, reception starts at time T12, and the M signal is detected simultaneously with the start of reception. However, since the P signal and the M signal are the same pulse having a width of 0.2 seconds, if the M signal is detected alone, it is determined that the P signal is detected. Since the M signal is not detected at the next pulse at time T12 when the detection of the M signal is determined to be the detection of the P signal, the pattern is the same as in the case of the delay error. That is, there is a risk that the time T13 is erroneously determined as the time T22. However, when there is no error in the internal time data measured by the time measuring circuit unit 80, the second part of the internal time data at time T13 is “01”, and the internal time data at time T22 when there is a delay error. The second part of “02” to “09”. Therefore, the case where there is no error and the case where there is a delay error can be distinguished.

  In this way, the CPU 10 detects the P signal and further determines whether it is an advance error or a delay error based on whether or not the M signal is detected in the next pulse. It is possible to correct the error within ± 8 seconds in the internal time data timed by.

  The ROM 50A is an area for storing various programs executed by the CPU 10, data related to the execution of these programs, and the like. According to FIG. 1, a reception start date / time data area 51 and a current correction time width data area 52 in which reception start date / time data and current correction time width data, which are data relating to execution of the marginal error correction processing, are stored, respectively. Yes.

  The reception start date / time data 51 is data that is read when the CPU 10 executes the limit error correction process. According to FIG. 2, the reception start date / time data 51 is composed of a previous reception start date / time 51a and a reception start date / time 51b. The previous reception start date and time 51a is data representing the latest date and time when the standard radio wave is received in the marginal error correction processing, and the reception start date and time 51b is data representing the date and time when the standard radio wave is scheduled to be received next. .

  The correction time width data 52 of this time is the correction of the internal time data measured by the time measuring circuit unit 80 based on the time data acquired by receiving the standard radio wave in the limit error correction processing executed by the CPU 10. This is data representing the amount of time correction, and the unit is seconds.

  After the standard radio wave is received by the radio wave receiving circuit unit 60 in the limit error correction process, the CPU 10 is based on the reception start date / time data 51 and the current correction time width data 52 and the expected date / time when the time measurement error becomes the maximum error within the limit. Is calculated as the new reception start date and time 51b, and the reception start date and time data 51 is updated. Then, based on the new reception start date and time 51b, the CPU 10 monitors the date and time data measured by the timing circuit unit 80 and determines whether or not the reception start date and time 51b is reached.

  The radio wave receiving circuit unit 60 cuts out unnecessary frequency components of the standard radio wave received by the antenna ANT, extracts a signal of the corresponding frequency, detects the extracted signal, and outputs it to the time code generation circuit unit 70 as needed. . The time code generation circuit unit 70 generates a time code as needed based on the signal output from the radio wave reception circuit unit 60 and outputs the time code to the CPU 10.

  According to FIG. 7, the time code of the standard radio wave is transmitted in a frame of 60 seconds per cycle every time the minute digit of the correct time is updated, that is, every minute. An M signal that is a leading marker (M) having a pulse width of 0.2 seconds is arranged at the rising edge of the minute (0 seconds per minute), which is the start time of 60 seconds (1 minute). Further, the P signal which is the position marker (P) having the same pulse width of 0.2 seconds is 9 seconds (P1), 19 seconds (P2), 29 seconds (P3), 39 seconds (P4), 49 seconds (P5). And 59 seconds (P0). For this reason, two pulses having a pulse width of 0.2 seconds (that is, the P0 signal and the M signal) are arranged at an interval of approximately 1 second at the frame boundary. Thereby, the start of a new frame can be recognized. Of these two signals, the M signal is a frame reference marker, and the rising edge of the pulse indicated by the frame reference marker is the time when the digit of the current time is accurately updated.

  In the frame, the minute, hour, integration date (number of days since January 1), year (last two digits of the year), and day of the week (Sunday is counted as 0 to 6) are included in the frame. (Integer value) data is 1 second to 8 seconds, 12 seconds to 18 seconds, 22 seconds to 33 seconds, 41 seconds to 48 seconds, and 50 seconds to 52 seconds, respectively. It is encoded and distributed in BCD (binary-coded decimal number) between seconds. Logic 1 and 0 are represented by pulses having pulse widths of 0.5 seconds and 0.8 seconds, respectively. In the frame, a pulse having a pulse width of 0.8 seconds used as a mere delimiter instead of data is also arranged as appropriate. The frame shown in FIG. Data is shown.

  Here, the radio wave receiving circuit unit 60 will be described in detail with reference to the drawings. FIG. 3 is a block diagram showing an example of a circuit configuration of the radio wave receiving circuit unit 60 using the superheterodyne method. According to the figure, the radio wave reception circuit unit 60 includes an antenna ANT, an RF amplification circuit 611, filter circuits 612, 615, and 617, a frequency conversion circuit 613, a local oscillation circuit 614, an IF amplification circuit 616, and an AGC (Auto Gain Control). A circuit 618 and a detection circuit 620 are provided.

  The antenna ANT can receive standard radio waves, and is configured by, for example, a bar antenna. The received radio wave is converted into an electrical signal and output.

  The RF amplification circuit 611 receives the electrical signal output from the antenna ANT and the RF control signal f1 output from the AGC circuit 618. Then, the RF amplification circuit 611 amplifies and outputs the signal output from the antenna ANT according to the RF control signal f1.

  The signal output from the RF amplifier circuit 611 is input to the filter circuit 612. The filter circuit 612 passes a predetermined range of frequencies with respect to the input signal, blocks out frequency components outside the range, and outputs them.

  The frequency conversion circuit 613 receives the signal output from the filter circuit 612 and the signal output from the local oscillation circuit 614. Then, the frequency conversion circuit 613 combines the two input signals and outputs them as an intermediate frequency signal. The local oscillation circuit 614 generates and outputs a signal having a local oscillation frequency.

  The intermediate frequency signal output from the frequency conversion circuit 613 is input to the filter circuit 615. Then, the filter circuit 615 passes a predetermined range of frequencies centering on the intermediate frequency with respect to the intermediate frequency signal, and blocks and outputs out-of-range frequency components.

  The IF amplifier circuit 616 receives the signal output from the filter circuit 615 and the IF control signal f2 output from the AGC circuit 618. The IF amplifier circuit 616 amplifies and outputs the signal input from the filter circuit 615 according to the IF control signal f2.

  The signal output from the IF amplifier circuit 616 is input to the filter circuit 617. Then, the filter circuit 617 passes a frequency in a predetermined range with respect to the input signal, cuts off a frequency component outside the range, and outputs the signal as a.

  The detection circuit 620 includes a carrier extraction circuit 621 and a signal reproduction circuit 622. The carrier extraction circuit 621 is configured by, for example, a PLL (Phase Locked Loop) circuit. The signal a output from the filter circuit 617 is input to the carrier extraction circuit 621. Then, a signal b that is a reference signal having the same signal level and the same phase as the signal a is output.

  The signal regeneration circuit 622 receives the signal a output from the filter circuit 617 and the signal b output from the carrier extraction circuit 621. Then, the signal reproduction circuit 622 outputs a signal c1 and a signal g corresponding to the baseband signal of the signal a (that is, a signal obtained by reproducing the signal a).

  The AGC circuit 618 receives the signal a output from the filter circuit 617 and the signal c1 output from the signal regeneration circuit 622. Then, the AGC circuit 618 uses the RF control signal f1 and the IF control signal f2 as gain control signals for adjusting the respective amplification degrees of the RF amplifier circuit 611 and the IF amplifier circuit 616 according to the strength (signal level magnitude) of the signal a. Generate and output.

  FIG. 4 is a circuit block diagram showing an example of the circuit configuration of the carrier extraction circuit 621, the signal reproduction circuit 622, and the AGC circuit 618 in the present embodiment. According to the figure, the carrier extraction circuit 621 includes a PD (Phase Detector) 621a, an LPF (Low Pass Filter) 621b, and an oscillator 621c.

  The PD 621a receives the signal a output from the filter circuit 617 and the signal output from the oscillator 621c. Then, the PD 621a compares the phases of the two input signals and outputs a signal based on the comparison result.

  The LPF 621b receives a signal output from the PD 621a (a signal based on the phase comparison result). Then, the LPF 621b passes a frequency in a predetermined range (low frequency) with respect to the input signal and outputs a signal in which a frequency component outside the range is cut off.

  The signal output from the LPF 621b is input to the oscillator 621c. The oscillator 621c adjusts the phase difference of the oscillating signal based on the input signal so that the phase of the oscillating signal is synchronized with the phase of the carrier wave of the signal b, and the adjusted signal is set as the signal b. Output.

  The signal reproduction circuit 622 includes an integration circuit 622a, LPFs 622b, and 622c. The integrator 622a receives the signal a output from the filter circuit 617 and the signal b output from the oscillator 621c. Then, the integrator 622a integrates the signal a and the signal b, and outputs the signal after integration as a signal c.

  The signal c output from the integrator 622a is input to the LPF 622b. Then, the LPF 622b passes a frequency in a predetermined range (low range) with respect to the signal c, and outputs a signal c1 in which a frequency component outside the range is blocked. The LPF 622b blocks the high frequency component of the signal a, and a signal (reproduced signal) substantially corresponding to the baseband signal of the signal a is obtained.

  The signal c1 output from the LPF 622b is input to the LPF 622c. Then, the LPF 622c passes a frequency in a predetermined range (low range) with respect to the signal c1, and outputs a signal g in which a frequency component outside the range is blocked. This signal g corresponds to a standard radio wave data signal (reproduced signal) obtained by the radio wave receiving circuit unit 60.

  The AGC circuit 618 includes an inverting amplifier 618a, an integrator 618b, an AGC detection circuit 618c, an LPF 618b, and an AGC voltage generation circuit 618e.

  The signal c1 output from the LPF 622b is input to the inverting amplifier 618a. Then, the inverting amplifier 618a inverts and amplifies the signal c1, and outputs the signal after inversion amplification as the signal d.

  The integrator 618b receives the signal a output from the filter circuit 617 and the signal d output from the inverting amplifier 618a. Then, the integrator 618b integrates the signal a and the signal d, and outputs the integrated signal as the signal e.

  A signal e output from the integrator 618b is input to the AGC detection circuit 618c. Then, the AGC detection circuit 618c detects (for example, peak detection) the input signal e and outputs a signal after detection.

  The signal output from the AGC detection circuit is input to the LPF 618d. Then, the LPF 618d passes a frequency in a predetermined range (low range) with respect to the input signal and outputs a signal in which a frequency outside the range is cut off.

  A signal output from the LPF 618d is input to the AGC voltage generation circuit 618e. Then, the AGC voltage generation circuit 618e outputs an RF control signal f1 and an IF control signal f2 for controlling the amplification degrees of the RF amplification circuit 611 and the IF amplification circuit 616 according to the level of the input signal.

  Next, the operation of the radio wave receiving circuit unit 60 will be described. FIG. 5 is a flowchart showing a processing flow of the radio wave receiving circuit unit 60 in the present embodiment, and FIG. 6 is a diagram showing a schematic waveform of each signal flowing through the radio wave receiving circuit unit 60.

  According to FIG. 5, first, the standard radio wave received by the antenna ANT is converted into an electric signal and output to the RF amplifier circuit 611. The RF amplifier circuit 611 amplifies (or attenuates) the input electrical signal in accordance with the RF control signal f1 input from the AGC circuit 618, and the amplified signal (or the attenuated signal) passes through the filter circuit 612. The data is output to the conversion circuit 613.

  Next, the frequency conversion circuit 613 converts the input signal into a signal having a predetermined intermediate frequency, and outputs the signal to the IF amplification circuit 616 via the filter circuit 615. The IF amplifier circuit 616 amplifies (or attenuates) the input signal in accordance with the IF control signal f 2 input from the AGC circuit 618, and the amplified signal (or the attenuated signal) is passed through the filter circuit 617 as a signal. It outputs to the detection circuit 620 as a (step S11). Here, the signal a is a signal having an amplitude modulation factor of 10% and an amplitude modulation factor of 100% as shown in FIG.

  In the detection circuit 620, the carrier extraction circuit 621 outputs the signal b synchronized with the phase of the carrier wave of the signal a. Then, the integrator 622a of the signal regeneration circuit 622 integrates the signal a and the signal b and outputs the signal after integration as a signal c. The high-frequency component of the signal c is blocked by the LPF 622b, and as shown in FIG. 6, the signal c is output as a signal c1 substantially corresponding to the baseband signal of the signal a (step S12).

  Next, the inverting amplifier 618a of the AGC circuit 618 inverts and amplifies the signal c1 and outputs it as the signal d (step S13). Thereafter, the integrator 618b integrates the signal a and the signal d, and outputs the signal after integration as the signal e (step S14). That is, the signal e is output as a signal in which the maximum amplitude of the signal a is substantially constant as shown in FIG.

  Subsequently, the AGC detection circuit 618c detects the signal e (for example, peak detection), and the detected signal is output to the LPF 618d, the high frequency component is cut off, and output to the AGC voltage generation circuit 618e (step S15). .

  Then, the AGC voltage generation circuit 618e controls the RF control signal f1 for controlling the amplification degree of the RF amplification circuit 611 and the IF control signal for controlling the IF amplification circuit 616 according to the signal level of the input signal. f2 is generated and output (step S16).

  As described above, the radio wave receiving circuit unit 60 includes the signal a which is an intermediate frequency signal and the signal c1 reproduced by the signal reproduction circuit 622 (more precisely, the signal g is a reproduction signal, but the signal c1 is also a reproduction signal). The signal d obtained by inverting and amplifying the signal d is integrated, that is, the signal a is modulated (inversely modulated) by the signal c1, and the amplification degree of the RF amplifier circuit 611 is determined according to the signal level of the modulated signal e. The RF control signal f1 for controlling the IF and the IF control signal f2 for controlling the amplification degree of the IF amplifier 616 can be generated. That is, since the AGC detection circuit 618c ideally detects the signal e having only the intermediate frequency component, a filter having a time constant larger than the period of the received amplitude modulation signal is installed to perform the AGC operation. There is no need, and a high-speed AGC operation independent of the period of the amplitude modulation signal can be realized.

  As described above, the radio wave receiving circuit unit 60 can adjust the reception gain by the high-speed AGC operation immediately after starting the reception of the standard radio wave, and quickly outputs the corresponding frequency signal to the time code generation circuit 70. be able to. The time code generation circuit unit 70 generates a standard time code having the format shown in FIG. 7 based on the electric signal output from the radio wave reception circuit unit 60 and outputs the standard time code to the CPU 10. Therefore, it is possible to greatly reduce the time lag from the start of reception until the time code is generated.

  The clock circuit unit 80 counts the clock signal output from the oscillation circuit unit 90 to obtain internal time data, and outputs the internal time data to the CPU 10. The oscillation circuit unit 90 is configured by a crystal oscillator or the like, and always outputs a clock signal having a constant frequency to the time measuring circuit unit 80.

  Next, the processing operation of the limit error correction processing in the radio timepiece 1 will be described in detail with reference to FIG. FIG. 9 is a flowchart of limit error correction processing. The limit error correction process is a process in which the CPU 10 reads out and executes the limit error correction process program stored in the limit error correction process program area 41 of the ROM 40A, and is continuously executed.

  Then, the CPU 10 monitors whether or not the internal time data is the reception start date and time, and if it is determined that the internal time data is the reception start date and time (step A2; Yes), the radio wave reception circuit unit 60 is set. Control is started to receive standard radio waves (step A4). The standard radio wave signal received by the radio wave receiving circuit unit 60 is output to the time code generation circuit unit 70 as needed. The time code generation circuit unit 70 generates a time code from a signal input at any time and outputs it to the CPU 10 (step A6).

  The CPU 10 determines that the P signal included in the input time code has been detected (step A8; Yes), and then further detects the M signal with the next pulse (step A10; Yes). When the next pulse rises, the clock circuit unit 80 is controlled to correct the second part of the internal time data to “01” (step A12). On the other hand, when the M signal is not detected by the pulse immediately after the P signal is detected (step A10; No), there is no error when the second part of the internal time data is “01” (step A14; Yes). On the other hand, when the second portion is not “01” (step A14; No), it is determined that there is a delay error in the internal time data. In order to correct this delay error, the CPU 10 controls the time measuring circuit 80 when the next pulse rises to correct the second part of the internal time data to “11” (step A16). After correcting the error in the internal time data, the CPU 10 controls the radio wave receiving circuit unit 60 and immediately ends the reception of the standard radio wave (step A18).

  Next, the CPU 10 executes a reception start date / time calculation process (step A20), calculates a new reception start date / time, and updates the reception start date / time data stored in the reception start date / time data area 51 of the RAM 50A. Details of the reception start date calculation process will be described below with reference to FIG. FIG. 10 is a flowchart of the reception start date / time calculation process.

  First, the CPU 10 reads the previous reception start date / time 51a and the reception start date / time 51b of the reception start date / time data 51 from the RAM 50A, calculates the difference between the previous reception start date / time 51a and the reception start date / time 51b, and sets it as R1 (step A22). ). Further, the current corrected time width data 52 is read from the RAM 50A, and the product of the quotient obtained by dividing R1 by the current corrected time width data 52 and the absolute value of the maximum error within the limit (± 8 in this embodiment) is obtained. Calculate R2 (step A24). This is based on the error generated in the radio timepiece 1 from the previous reception to the current reception, and the time required to generate the error of 1 second is obtained. The time until the error in 1 reaches the maximum error within the limit is obtained.

  The CPU 10 updates the previous reception start date and time 1a of the reception start date and time data stored in the reception start date and time data area 51 of the RAM 50A by overwriting with the reception start date and time 51b (step A26). Then, the previously calculated R2 is added to the reception start date and time 51b to calculate a new reception start date and time 51b, and the reception start date and time 51b of the reception start date and time data 51 stored in the RAM 50A is overwritten and updated. (Step A28).

  Here, a specific example of the reception start date calculation process will be described with reference to FIG. FIG. 2A shows data at the time of receiving the nth standard radio wave, and FIG. 2B shows data at the time of receiving the (n + 1) th standard radio wave. That is, the data obtained by updating the reception start date / time data 51 of FIG. 2A is the reception start date / time data 51 of FIG. 2B. The reception start date and time 51b calculated by executing the reception start date and time calculation process when the time range in which the internal time data is corrected at the time of the nth standard radio wave reception is 6 seconds is the reception start date and time 51b shown in FIG. The start date and time 51b is “2004/10/14 16:00:00”. This is because the previous reception start date 51a “2004/9/26 0:00:00” and the reception start date 51b “2004/10/4 0:00:00” of the reception start date data 51 of FIG. Is subtracted to obtain 8 days, and this is divided by 6 seconds to obtain 1 day and 8 hours. Multiplying 1 day and 8 hours by 8 which is the absolute value of the limit error, 10 days and 16 hours are calculated. Further, when 10 days and 16 hours are added to the reception start date 51b “2004/10/4 0:00:00” of the reception start date 51 of FIG. 2A, a new reception start date 51b is obtained as shown in FIG. The reception start date and time 51b “2004/10/14 16:00:00” of (b) is calculated.

  That is, the current timekeeping accuracy of the radio timepiece 1 is obtained from the elapsed time from the previous reception start date / time 51a to the reception start date / time 51b and the current correction time width data 52, and the error generated under this timekeeping accuracy is within the limit. A time to reach 8 seconds, which is an error, is predicted, and a reception start date 51b, which is a timing at which the standard radio wave is received and error correction should be performed next, is calculated. As a result, since the error of the internal time in the radio timepiece 1 is always within the allowable error range, the radio wave receiving circuit unit 60 is caused to perform the minimum necessary receiving operation in the limit error correction process to automatically correct the second part error. By executing, it is possible to always maintain the accuracy of the internal time data.

  When the execution of the above reception start date / time calculation process is completed, the CPU 10 executes the internal time based on the reception start date / time data 51 updated by executing the reception start date / time calculation process without ending the execution of the limit error correction process. The monitoring of whether or not the data is the reception start date and time 51a is resumed.

  As described above, according to the radio-controlled timepiece 1 of the present embodiment, the time when the generated error reaches the maximum error within the limit is predicted, the date and time when the error should be corrected is calculated, and the standard time signal is received when this time is reached. Correct the error. In the radio-controlled timepiece 1, these series of processes are executed, so that it is possible to automatically perform a minimum reception operation at a timing that requires correction of an error without requiring a useless reception operation. . Therefore, the reception operation time is significantly shortened compared to the conventional one, and the power consumption can be reduced.

<Second Embodiment>
FIG. 11 is a block diagram of the second embodiment showing the internal configuration of the radio timepiece 2. The same components as those in the first embodiment described above are denoted by the same reference numerals, and detailed description thereof is omitted.

  According to FIG. 11, the radio timepiece 2 of the present embodiment includes a ROM 40B instead of the ROM 40A of the radio timepiece 1 of the first embodiment, and a RAM 50B instead of the RAM 50A.

  The ROM 40B is an area for storing programs, data, and the like, similar to the ROM 40A. According to FIG. 11, an internal time reference correction processing program for executing the internal time reference correction processing and a first correction target designation table which is data relating to execution of the internal time reference correction processing are stored. An internal time reference correction processing program area 42 and a first correction target designation table area 43 are provided.

  The CPU 10 executes the internal time reference correction process to partially receive one frame of the standard radio wave time code and partially correct the internal time data that the time measuring circuit unit 80 measures. The portion to be corrected in the internal time data is predetermined in the first correction target designation table 43.

  According to the standard radio wave time code format shown in FIG. 7 described above, one frame includes date and time data such as minutes, hours, and integration dates divided into seconds and included in each specific part of one frame. . Therefore, in the internal time reference correction process, when only a part of the time code corresponding to the part to be corrected is received, the second part of the internal time data may accurately match the time code indicated by the standard radio wave. Required. Therefore, immediately before receiving the portion to be corrected, the M signal included in the time code is detected and the second portion of the internal time data is corrected to “00”. After correcting the second portion of the internal time data, only the time code portion corresponding to the portion to be corrected is received based on the first correction target designation table 43 described below.

  FIG. 12 is a diagram illustrating an example of the first correction target designation table 43. According to the figure, the first correction target designation table 43 is composed of items of an execution date 43a, correction target data 43b, and an acquisition location 43c. For example, when the execution date 43a is set to “2004/10/1”, the portion in the internal time data to be corrected is determined as “time data” from the correction target designation data 43b. The correction portions 43c corresponding to “hour data” are “12 to 19”. This indicates a portion to be acquired in order to correct the “time data” in the time code of the standard radio wave shown in FIG. Therefore, the execution date 43a is “2004/10/1”, the correction target data 43b is “time data”, and the portion of the time code from the 12th to 19th seconds may be acquired.

  The RAM 50B, like the RAM 50A, is an area for storing various programs and data related to the execution of the programs. According to FIG. 11, the first correction target reception instruction data 53, which is data related to the execution of the internal time reference correction process, is stored.

  FIG. 13 is a diagram illustrating an example of the first correction target reception instruction data 53. According to the figure, the first modification target reception instruction data 53 has the same item configuration as that of the first modification target designation table 43. This is done by searching the first modification target designation table 43 on the most recent day, reading the instruction data corresponding to the corresponding execution date 43a from the first modification target designation table 43, and writing it into the RAM 50B. This is because the correction target reception instruction data 53 is used. However, the execution date and time 53a is data obtained by adding the time for executing the internal time reference correction process in the execution date 43a of the first correction target designation table 43. Although this time data is “2:00 am”, the present invention is not limited to this, and an appropriate time may be designated.

  Next, the processing operation of the internal time reference correction processing in the radio timepiece 2 will be described in detail using the flowchart shown in FIG. The CPU 10 starts the execution of the internal time reference correction process shown in the figure by executing the internal time reference correction processing program 42 stored in the ROM 40B.

  The CPU 10 continuously monitors whether or not the internal time data timed by the time measuring circuit unit 80 is the execution date and time 53a of the first correction target reception instruction data 53 stored in the RAM 50B. (Step B2). If it is determined that the internal time data has reached the execution date and time 53a (step B2; Yes), the CPU 10 controls the radio wave receiving circuit unit 60 to start receiving standard radio waves (step B4). The standard radio wave signal received by the radio wave receiving circuit unit 60 is output to the time code generation circuit unit 70 as needed. The time code generation circuit unit 70 generates a time code from a signal input at any time and outputs the time code to the CPU 10 at any time. The CPU 10 detects the M signal from the signal input as needed from the time code generation circuit unit 70, and corrects the second part of the internal time data to “00” (step B6). Immediately after detecting this M signal, the reception of the standard radio wave in the radio wave receiving circuit unit 60 is once ended (step B8).

  The CPU 10 monitors whether or not the second portion of the internal time data is the number of seconds indicated in the acquisition location 53c of the first correction target reception instruction data 53 (step B10). If it is determined that the number of start seconds specified by the acquisition location 53c is reached (step B10; Yes), the CPU 10 controls the radio wave reception circuit unit 60 to start reception of the standard radio wave to acquire the acquisition location. Reception ends in the number of end seconds indicated in 53c (step B12). The standard radio wave signal received by the radio wave receiving circuit unit 60 is output to the time code generation circuit unit 70 as needed. The time code generation circuit unit 70 generates a time code from a signal input at any time and outputs it to the CPU 10 at any time (step B14). Based on the time code input from the time code generating circuit unit 70, the CPU 10 controls the time measuring circuit unit 80 to correct the internal time data (step B16). According to FIG. 13, the start seconds are the 12th and the end seconds are the 19th, and only the hour data of the internal time data is corrected based on the received time code.

  Then, the CPU 10 determines the closest date after the date of the current correction based on the first correction target specification table 43 (step B18), and the instruction data corresponding to the execution date 43a determined by this determination Is read out from the first modification target designation table 43 and written into the RAM 50B as new first modification target reception instruction data 53 (step B20). For example, according to FIG. 12 and FIG. 13, searching for the day closest to the execution date 43a on the day after the execution date and time 53a “4/1 2:00” is “every day of the week”, and the execution date and time 53a If “4/1 2:00 am” is a Monday, the new execution date and time 53a is determined as “4/7 2:00 am”. The CPU 10 resumes monitoring whether or not the internal time data has reached the new execution date and time 53a without ending the internal time reference correction process.

  As described above, according to the radio timepiece 2 of the present embodiment, the internal time data preset in the first correction target designation table 43 is determined based on the date and time to be corrected and the target portion. Perform corrections only on the parts that have been changed. Since only the necessary part of one frame of the time code is received with the second part of the internal time data as a reference, the second part of the internal time data is monitored and received until immediately before the required part of the time code. Can wait for start. Therefore, by eliminating unnecessary reception operations as much as possible, it is possible to significantly reduce the reception operation time and to reduce power consumption compared to the conventional one.

<Third Embodiment>
FIG. 15 is a block diagram of the third embodiment showing the internal configuration of the radio timepiece 3. In addition, the same code | symbol is attached | subjected about the component same as 1st Embodiment and 2nd Embodiment mentioned above, and detailed description is abbreviate | omitted.

  According to FIG. 15, the radio timepiece 3 of this embodiment includes a ROM 40 </ b> C instead of the ROM 40 </ b> A of the radio timepiece 1 of the first embodiment, and a RAM 50 </ b> C instead of the RAM 50 </ b> A.

  The ROM 40C is an area for storing programs, data, and the like in the same manner as the ROM 40A. According to FIG. 15, the P signal reference correction processing program 44 for executing the P signal reference correction processing and the second correction target designation table 45 that is data relating to the execution of the P signal reference correction processing are stored. Yes.

  The CPU 10 partially corrects the internal time data measured by the time measuring circuit unit 80 by executing the P signal reference correcting process. The portion in the internal time data to be corrected is predetermined in the second correction target designation table 45.

  FIG. 16 is a diagram illustrating an example of the second correction target designation table 45. In the drawing, the second correction target designation table 45 includes items of an execution date 45a, correction target data 45b, an acquisition location 45c, a P signal start count 45d, and a P signal end count 45e. The P signal reference correction processing in the present embodiment is based on the number of times of reception of the P signal included in the received time code, not the internal time data timed by the time measuring circuit 80, and the time corresponding to the correction target data 45b. This process acquires a part of the code and corrects the internal time data. For this reason, items of the P signal start count 45d and the P signal end count 45e, which were not included in the first correction target specification table 43, are added.

  Like the RAM 50A, the RAM 50C is an area for storing various programs and data related to execution of the programs. According to FIG. 15, second correction target reception instruction data 54 that is data related to execution of the P signal reference correction process is stored.

  FIG. 17 is a diagram illustrating an example of the second correction target reception instruction data 54. In the drawing, the second modification target reception instruction data 54 has the same item configuration as that of the second modification target designation table 45. In the same manner as the first correction target reception instruction data 53 in the second embodiment, a search is made from the second correction target designation table 45 for the nearest day after the date on which the correction of the error of the internal time data is executed. This is because the instruction data corresponding to the corresponding execution date 45a is read from the second correction target designation table 45 and written in the RAM 50C to be used as the second correction target reception instruction data 54. However, the execution date and time 54a includes the execution date 45a of the second correction target designation table 45 and the time when the P signal reference correction process is executed. This time data is a predetermined time set in advance and is “2:00 am” in the present embodiment, but is not limited to this and may be another time.

  Next, the processing operation of the P signal reference correction process in the radio timepiece 3 will be described in detail with reference to the flowchart shown in FIG. The CPU 10 executes the P signal reference correction processing program stored in the P signal reference correction processing program area 44 of the ROM 40C, thereby starting execution of the P signal reference correction processing shown in FIG.

  The CPU 10 continuously monitors whether or not the internal time data timed by the time measuring circuit unit 80 is the execution date and time 54a of the second correction target reception instruction data 54 stored in the RAM 50C. (Step C2). When it is determined that the internal time data has become the execution date and time 54a (step C2; Yes), the CPU 10 controls the radio wave receiving circuit unit 60 to start receiving standard radio waves (step C4). The standard radio wave signal received by the radio wave receiving circuit unit 60 is output to the time code generation circuit unit 70 as needed. The time code generation circuit unit 70 generates a time code from a signal input at any time and outputs the time code to the CPU 10 at any time. The CPU 10 detects the M signal from signals input from the time code generation circuit unit 70 as needed (step C6) and monitors the time code input from the time code generation circuit unit 70 (step C8). At this time, the number of detections of the P signal is counted, and it is monitored whether or not the P signal end number 45e of the second correction target reception instruction data 54 is reached (step C10).

  When it is determined that the number of detections of the P signal included in the received time code has reached the number of P signal ends 45e (step C10; Yes), the CPU 10 controls the radio wave receiving circuit unit 60 to control the standard radio wave. Is terminated (step C12). The CPU 10 controls the time measuring circuit unit 80 to correct the internal time data based on the acquisition location 54c in the time code input from the time code generating circuit unit 70 (step C14). According to FIG. 17, only the accumulated date data is corrected among the internal time data based on the received time code, and the CPU 10 has detected four P signals that are the number of P signal end times. The receiving operation of the radio wave receiving circuit unit 60 is immediately terminated later.

  Then, the CPU 10 determines the closest date after the date of the current correction based on the second correction target specification table 45 (step C16), and an instruction corresponding to the execution date 45a determined by this determination. The data is read from the second modification target designation table 45 and written into the RAM 50C as new second modification target reception instruction data 54 to be updated (step C18). For example, according to FIG. 16 and FIG. 17, when the nearest day of the execution date 45a is searched after the execution date and time 54a “3/1 2:00 am”, it is “everyday day of the week”. If 54a “3/1 2:00 am” is Wednesday, the new execution date and time 54a is determined to be “3/5 2:00 am”. The CPU 10 resumes monitoring whether or not the internal time data has reached the new execution date and time 54a without ending the P signal reference correction process.

  As described above, according to the radio timepiece 3 of the present embodiment, the internal time data set in advance in the second correction target designation table 45 is determined based on the date and time to be corrected and the target portion. Perform corrections only on the parts that have been changed. Then, with reference to the P signal included in the time code, reception is performed from the detection of the M signal to the necessary portion in one frame of the time code. Therefore, the reception operation time is shortened and the power consumption can be reduced as compared with the conventional case in which the entire frame of the time code is received.

1 is a block diagram showing a circuit configuration of a radio timepiece according to an embodiment of the present invention. It is a figure which shows an example of a structure of a radio wave receiving circuit part. It is a block diagram which shows an example of a circuit structure of a carrier extraction circuit, a signal reproduction circuit, and an AGC circuit. It is a flowchart of the process in a radio wave receiving circuit unit. It is a figure which shows the schematic waveform of each signal which flows through a radio wave receiving circuit unit. It is a figure which shows the standard radio wave received in a limit error correction process. It is a figure which shows the structure of reception start date data. It is a flowchart of a limit error correction process. It is a flowchart of a reception start date calculation process. It is a block diagram which shows the circuit structure of the radio timepiece concerning the 2nd Embodiment of this invention. It is a figure which shows the structure of a 1st correction object table. It is a figure which shows the structure of 1st correction object reception instruction data. It is a flowchart of an internal time reference correction process. It is a block diagram which shows the circuit structure of the radio timepiece concerning the 3rd Embodiment of this invention. It is a figure which shows the structure of a 2nd correction object table. It is a figure which shows the structure of 2nd correction object reception instruction data. It is a flowchart of a P signal reference correction process. It is a figure which shows the format of a time code.

Explanation of symbols

1 Radio clock 10 CPU
20 Input unit 30 Display unit 40A ROM
41 Limit error processing program 50A RAM
51 Reception start date and time data 52 Current correction time width data 60 Radio wave reception circuit section 70 Time code generation circuit section 80 Timekeeping circuit section 90 Oscillation circuit section 100 Bus 2 Radio clock 40B ROM
42 Internal time reference correction processing program 43 First correction target designation table 50B RAM
53 First correction target reception instruction data 3 Radio time signal 40C ROM
44 P signal reference correction processing program 45 Second correction target specification table 50C RAM
54 Second modification target reception instruction data

Claims (4)

In a time information receiving device comprising a receiving means for receiving a standard radio wave carrying a standard time code in a standardized standard time format , and a time measuring means for measuring an internal time including a date ,
Time difference correction amount of time when the internal time is corrected based on the time code of the standard radio during reception the previous between time of reception of the standard radio before last and the previous reception by said receiving means And an error that occurs at the internal time as time elapses from the previous reception is converted into an error within the limit error range based on the data representing the error value within the limit error range that is within ± 8 seconds. An expected date and time calculating means for calculating an expected date and time expected to reach ,
When the internal time measured by the time measuring means reaches 00 seconds of the expected date and time calculated by the expected date and time calculating means, the reception means receives the standard radio wave by the receiving means and starts receiving the time code. Control means;
Detecting means for detecting a pulse of the leading P signal waveform included in the time code of the standard radio wave received by the control of the reception start control means;
Discriminating means for discriminating whether or not the pulse immediately after the pulse detected by the detecting means is an M signal;
When it is determined by the determining means that the immediately following pulse is an M signal, the time measuring means is controlled in response to the next pulse following the M signal to set the numerical value of the second part of the internal time to 01. On the other hand, when it is determined that the immediately following pulse is not an M signal, and the second part of the internal time is not a numerical value of 01 when the immediately following pulse is received, Time adjusting means for controlling the time measuring means in response to the next pulse following the immediately following pulse to control the value of the second part of the internal time to a value of 11;
A reception end control means for terminating the reception of the standard radio wave by the reception means immediately after the correction of the internal time by the time correction means,
A time information receiving apparatus comprising: The time information receiving device according to claim 1,
The time correcting means determines that the immediately following pulse is not an M signal by the determining means, and when the second portion of the internal time is a numerical value of 01 when receiving the immediately following pulse, The time information receiving apparatus , wherein the correction control is finished without changing the numerical value of the second part of the internal time . Time information reception control used in a time information receiving apparatus having a receiving means for receiving a standard radio wave carrying a standard time code in a standardized standard time format, and a time measuring means for measuring an internal time including a date In the method
Time difference between the previous reception of the standard radio wave and the previous reception by the receiving means, and the correction amount of the time when the internal time is corrected based on the time code of the standard radio wave at the previous reception And an error that occurs at the internal time as time elapses from the previous reception is converted into an error within the limit error range based on the data representing the error value within the limit error range that is within ± 8 seconds. An expected date / time calculating step for calculating an expected date / time to be reached,
When the internal time measured by the time measuring means reaches 00 seconds, which is the expected date and time calculated by the expected date and time calculating step, the reception means receives the standard radio wave and starts receiving the time code. Control steps;
A detection step of detecting a pulse of the leading P signal waveform included in the time code of the standard radio wave received by the control of the reception start control step;
A discriminating step for discriminating whether or not the pulse immediately after the pulse detected in this detecting step is an M signal;
If it is determined in this determination step that the immediately following pulse is an M signal, the time measuring means is controlled in response to the next pulse following the M signal to set the value of the second part of the internal time to 01. On the other hand, when it is determined that the immediately following pulse is not an M signal, and the second part of the internal time is not a numerical value of 01 when the immediately following pulse is received, A time correcting step for controlling the time measuring means in response to the next pulse following the immediately following pulse to control the value of the second part of the internal time to a value of 11;
A reception end control step for terminating the reception of the standard radio wave by the receiving means immediately after the correction of the internal time by the time correction step;
A time information reception control method comprising: In the time information reception control method according to claim 3,
In the time correction step, when the immediately following pulse is determined not to be an M signal by the determining means, and when the numerical value of the second part of the internal time is a numerical value of 01 when the immediately following pulse is received, A time information reception control method, wherein the correction control is finished without changing the numerical value of the second part of the internal time .

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