JP2003270370A - Time data receiving device and time data correcting method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To quickly determine an optimum receiving frequency and to switch a frequency of received radio waves to the optimum receiving frequency in a radio wave clock receiving radio waves with a plurality of different frequencies, that is, in a time data receiving device. <P>SOLUTION: When receipt of radio waves is started, a CPU 11 sends a switching signal to a switching circuit 15 so that radio waves with a frequency (a receipt successful frequency in the previous time) stored in a RAM 13 are received. In the case of a failure in receipt of radio waves, the receiving frequency is switched to another frequency, and then, the radio waves are received again. In the case of successful receipt of the radio waves, the frequency stored in the RAM 13 is updated to the frequency of the currently received radio waves. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a time data receiving device for receiving a radio wave containing time data and a time data correcting method.

[0002]

2. Description of the Related Art At present, in each country (for example, Germany, England, Switzerland, Japan, etc.), a long wave standard radio wave containing time data, that is, a time code, is transmitted. In Japan (Japan), two transmitting stations (Fukushima prefecture and Saga prefecture)
Long-wave standard radio waves of 40 kHz and 60 kHz, which are amplitude-modulated by a time code having a format as shown in FIG. 7, are transmitted.

According to FIG. 7, the time code is transmitted in a frame of 60 seconds per cycle every time the minute digit of the accurate time is updated, that is, every minute. And this 60 seconds (1
The leading marker (M) corresponds to the rise of the minute (0 second per minute), which is the start point of the frame of (minute). This head marker (M) has a pulse width of 0.2 seconds,
Also, the position markers (P0 to P5) having the same pulse width of 0.2 seconds are 9 seconds (P1), 19 seconds (P2), 29
Seconds (P3), 39 seconds (P4), 49 seconds (P5), and 5
It is also placed at 9 seconds (P0). Therefore, a pulse width of 0.
Two 2 second ones (that is, the one indicated by the head marker (M) and the one indicated by the position marker (P0)) are arranged (this makes it possible to recognize the start of a new frame). The former head marker (M) of the two pulses is the frame reference marker (M). That is, the rising time of the pulse indicated by the frame reference marker (M) is the accurate update of the minute digit of the current time.

Then, within the frame, the minute, hour, and cumulative date (January 1
Data such as the number of days from a day) are in the order of 1 second, 10
Binary-coded decimal number (BCD) in seconds and 20-30 seconds
It is coded and distributed. Also, in this case, logic 1 and 0 have pulse widths of 0.5 seconds and 0.8, respectively.
Represented in seconds pulses. Further, as shown in FIG. 7, a frame having a pulse width of 0.8 seconds, which is used not as data but as a simple delimiter, is also arranged in the frame. The frame shown in FIG. 7 displays data at 17:25 on the 114th day in total.

By the way, a time data receiving device called a radio timepiece that receives the time code and corrects the time data of the timekeeping circuit by this is put into practical use. Further, as described above, since the transmission frequencies of the long-wave standard radio waves transmitted from the two transmitting stations are different from each other, so-called multi-band radio-controlled timepieces capable of receiving radio waves of both frequencies (40 kHz and 60 kHz). Is provided.

[0006]

However, in such a multi-band radio-controlled timepiece, depending on the location, which transmission station should receive the radio wave, that is, which frequency. It is necessary to quickly determine whether to receive the radio wave and switch the reception frequency.

An object of the present invention is to quickly determine the optimum reception frequency in a radio-controlled timepiece, that is, a time data receiving device that receives radio waves of a plurality of different frequencies, and immediately determine the frequency of the received radio wave. It is to switch to the reception frequency.

[0008]

In order to solve the above-mentioned problems, the invention according to claim 1 counts a reference clock signal to obtain current time data (for example, clock counting circuit 19 in FIG. 1). ), A radio wave receiving means (for example, the antenna 14 in FIG. 1) capable of receiving a plurality of radio waves including time data and having different frequencies, and a reception frequency switching for switching the frequency of the radio wave received by the radio wave receiving means. Means (for example, switching circuit 15 in FIG. 1), control means (for example, CPU 11 in FIG. 1) for controlling frequency switching by the reception frequency switching means, and time included in the radio wave received by the radio wave receiving means. Current time correction means for correcting the current time data based on the data (see, for example, FIG.
CPU11), and a success / failure determination means (for example, FIG. 1) for determining success / failure of reception of a radio wave by the radio wave reception means. CPU 11) and storage means for storing the frequency (for example, RAM 13 in FIG. 1), and the control means stores the frequency of the radio wave received by the radio wave receiving means in the frequency stored in the storage means. The reception frequency switching means is controlled so as to switch to, and when the success / failure determination means determines that the reception frequency switching means is switched to another frequency, the success / failure determination means succeeds. When it is determined that the frequency of the radio wave received by the radio wave receiving means is stored in the storage means.

Further, the invention according to claim 4 is a clock means for counting the reference clock signal to obtain the current time data (for example, the clock counting circuit 19 in FIG. 1), and a radio wave including the time data and having a frequency. 1. A time data receiving device (for example, FIG. 1 of FIG. 1) including a radio wave receiving unit (for example, antenna 14 of FIG. 1) capable of receiving a plurality of different radio waves and a storage unit (for example, RAM 13 of FIG. 1) for storing frequencies. A time data correction method for a time data receiving device 1), wherein the frequency of the radio wave received by the radio wave receiving means is switched to the frequency stored in the storage means, and the radio wave receiving means succeeds in receiving the radio wave. First determination step of determining failure (for example, steps S12 to S14 or S18 to S of FIG. 3)
20) and if it is determined that the radio wave reception means fails in the first determination step, the radio wave reception means switches the frequency of the radio wave received by the radio wave reception means to a frequency other than the frequency stored in the storage means. Successful reception of radio waves /
Second determination step for determining failure again (for example, steps S15 to S17 or steps S21 to S23 in FIG. 3)
And a frequency updating step of storing the frequency of the radio wave received by the radio wave receiving means in the storage means when it is determined to be successful in the second determination step (for example, step S25 of FIG. 3), When it is determined to be successful in the first determination step or the second determination step, a correction step of correcting the current time data based on the time data included in the radio wave received by the radio wave receiving means (for example, FIG. 3). And step S24).

According to the invention of claim 1 or 4,
When starting reception of radio waves, first, the frequency of the received radio waves is switched to the frequency stored in the storage means. Since the frequency stored in this storage means is the frequency of the radio wave that has been successfully received recently, the radio wave can be received with high probability. Further, when the reception of the radio wave fails, the frequency of the received radio wave can be immediately switched to another frequency. This makes it possible to determine the optimum reception frequency and quickly correct the current time based on the time data included in the received radio wave.

According to a second aspect of the present invention, a clock means for counting the reference clock signal to obtain the current time data (for example, the clock counting circuit 19 in FIG. 1) and a radio wave including the time data, the frequency of which is different. Radio wave receiving means capable of receiving the first radio wave and the second radio wave (for example, the antenna 14 in FIG. 1)
And a reception frequency switching means (for example, the switching circuit 1 of FIG. 1 that switches the frequency of the radio wave received by the radio wave receiving means.
5) and control means for controlling frequency switching by the reception frequency switching means (for example, CPU 11 in FIG. 1).
And a time data receiving unit (for example, the CPU 11 in FIG. 1) that corrects the current time data based on the time data included in the radio wave received by the radio wave receiving unit. No. 1 time data receiving device 1), which is success / failure determining means for determining success / failure of reception of the radio wave by the radio wave receiving means (for example, FIG.
CPU 11), and the control means controls the reception frequency switching means to switch the frequency of the radio wave received by the radio wave receiving means to the frequency of the first radio wave, and then the success / failure determination means. When it is determined to be unsuccessful by the above, the reception frequency switching means is controlled to switch to the frequency of the second radio wave.

The invention according to claim 5 is a clock means for counting the reference clock signal to obtain the current time data (for example, the clock counting circuit 19 in FIG. 1), and a radio wave including the time data and having a frequency. A radio wave receiving means capable of receiving a first radio wave and a second radio wave having different frequencies (for example, the antenna 1 of FIG.
4) a time data correction method for a time data receiving device (for example, the time data receiving device 1 in FIG. 1) comprising:
The frequency of the radio wave received by the radio wave receiving means is set to the first
The frequency of the radio wave is changed to a first determination step (for example, steps S31 to S34 in FIG. 6) for determining success / failure of reception of the radio wave by the radio wave receiving means, and a failure is determined in the first determination step. In such a case, the frequency of the radio wave received by the radio wave receiving means is switched to the frequency of the second radio wave, and the second determination step for re-determining the success / failure of reception of the radio wave by the radio wave receiving means (for example, 6) and the current time data based on the time data included in the radio wave received by the radio wave receiving means when the success is determined in the first determination step or the second determination step. Correction step for correcting (for example, step S39 in FIG. 6)
It is characterized by including and.

According to the invention of claim 2 or 5, the first radio wave is first received, and its success / failure is determined. When it is determined that the failure has occurred, the frequency of the received radio wave is immediately switched to the second frequency. This makes it possible to determine the optimum reception frequency and quickly correct the current time based on the time data included in the received radio wave.

Further, as in the invention described in claim 3, in the time data receiving device according to claim 1 or 2, each of the radio waves is modulated by a modulated wave of 1 Hz, and the success / failure determination means is configured to operate the radio wave. When the radio waves received by the receiving means are not synchronized with each other, the reception of the radio waves may be determined to have failed.

According to the third aspect of the present invention, for example, the long-wave standard radio wave currently transmitted in Japan is received as the radio wave, and the radio wave is received depending on whether the received radio wave is synchronized with the second. It can be determined whether or not it has failed. That is, if the frequency of the received radio wave is not appropriate, it is possible to immediately determine the failure of reception based on the radio wave reception status for a predetermined time from the start of reception.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Two preferred embodiments of the present invention will be described in detail below with reference to the drawings.

First Embodiment First, the first embodiment will be described in detail with reference to FIGS.

FIG. 1 is a block diagram showing a main circuit configuration of a time data receiving device 1 to which the present invention is applied. According to the figure, the time data receiving device 1 has a CPU (Central Proc
essing unit) 11, ROM (Read Only Memory) 1
2, RAM (Random Access Memory) 13, antenna 1
4, a switching circuit 15, a receiving circuit 16, an oscillating circuit 17, a frequency dividing circuit 18, a clock counting circuit 19, a display unit 20, and a switch unit 21.

The CPU 11 processes and processes the time data sent from the receiving circuit 16 on the basis of the program stored in the ROM 12 to determine whether or not the reception of the radio wave has succeeded and the time correction. And a switching signal for switching the frequency of the received radio wave to the switching circuit 15 to control the tuning frequency of the antenna 14 and the like.

The RAM 13 is C under the control of the CPU 11.
It is used for storing the data processed by the PU 11 and outputting the stored data to the CPU 11. As shown in FIG. 2, the RAM 13 includes reception time / minute memories X1 to X3, reception integrated date memories D1 to D3, a reception current time memory Y, and a reception success frequency memory Z.

The reception hour / minute memories X1 to X3 are memories that receive the time code TC three times in succession every minute and store the hour / minute data (what hour and minute data) extracted from them. . The accumulated reception date memories D1 to D3 store date data (data of what month and what day) obtained by converting the accumulated date data sent together with the reception time data stored in the reception time memories X1 to X3. It is a memory that is stored.

The current reception time memory Y is based on the hour / minute data stored in the reception hour / minute memory X3 and is based on the clock counting circuit 19
Of the current time (time data), the elapsed time (specifically, 1 minute) is added, and the date data stored in the received cumulative date memory D3 is included. It is a memory that stores time data. Then, the time data stored in the present reception time memory Y is set in the total clock circuit 19 as the current accurate time data.

The successful reception frequency memory Z is a memory for storing the frequency when the reception is successful. That is, the content of the successful reception frequency memory Z is updated to the reception frequency at that time when the reception of the radio wave is successful.

The ROM 12 mainly stores a system program relating to the time data receiving device 1, a program for executing the processing of this embodiment (see FIGS. 3 to 5), and the like.

The antenna 14 receives the transmitted radio wave, converts it into a corresponding electric signal, and switches the circuit 15.
It has a 40 kHz tuning antenna 14a tuned to a frequency of 40 kHz and a 60 kHz tuning antenna 14b tuned to a frequency of 60 kHz.

The switching circuit 15 is a circuit for selecting a signal of a specific frequency from the electric signals output from the antenna 14 according to a switching signal from the CPU 11 and outputting the signal to the receiving circuit 16.

The receiving circuit 16 is activated upon receiving a reception start / end signal C from the CPU 11, obtains a time code or time code TC from the electric signal and sends it to the CPU 11, and then outputs a reception start / end signal C. It is a super-heterodyne type receiving circuit 16 which receives and stops the operation. That is, the receiving circuit 16 includes a high frequency amplifier circuit that amplifies the electric signal output from the switching circuit 15, a PLL frequency synthesizer used as a local oscillator, and a signal amplified by the high frequency amplifier circuit from the PLL frequency synthesizer. , A bandpass filter for extracting a desired intermediate frequency signal from the signal from the mixer, a detection circuit for obtaining a baseband signal from the intermediate frequency signal extracted by the bandpass filter, and And an A / D conversion circuit for converting the base signal obtained by the detection circuit into a digital signal and outputting it as a time code TC to the CPU 11.

The oscillation circuit 17 is a circuit which constantly outputs a signal of a constant frequency. The frequency divider circuit 18 counts the signals output from the oscillator circuit 17 and outputs a 1-minute signal m every time the count value reaches a value corresponding to 1 minute.
It is a circuit for outputting to 9. Also, this frequency dividing circuit 18
Each time the preset signal P is received from the CPU 11, the count value is increased by 1 second.

The clock counting circuit 19 counts the one-minute signal m from the frequency dividing circuit 18, obtains the current time data, that is, the date data of the current day, the current hour data and the minute data, and the like, and sends them to the CPU 11. Output. Also, this current time data is
The CPU 11 appropriately corrects the current time data based on the time code TC.

The switch section 21 is equipped with various switches, for example, a time correction switch SW for causing the time data receiving device 1 to receive a long-wave standard radio wave and correct the current time, and when these switches are operated. , A circuit for outputting a corresponding switch input signal to the CPU 11.

The display unit 20 is composed of a small liquid crystal display or the like, and digitally displays data from the CPU 11, for example, current time data by the total clock number circuit 19.

Next, the overall processing operation of the time data receiving apparatus 1 configured as described above will be described with reference to the flowchart shown in FIG. Further, this operation is performed by pressing the time adjustment switch SW of the switch unit 21
It is started by the PU 11 executing the corresponding program stored in the ROM 12.

According to the figure, the CPU 11 first determines the RA
A switching signal is output to the switching circuit 15 so that the radio wave having the frequency stored in the reception success frequency memory Z of M13, that is, the frequency successfully received last time is received. That is, the frequency stored in the successful reception frequency memory Z is “40 kHz.
z ”(step S11: 40 kHz), CP
U11 outputs a switching signal for setting the tuning frequency of the switching circuit 15 to 40 kHz (step S12). On the other hand, when the stored frequency is "60 kHz" (step S11: 60 kHz), a switching signal for setting the tuning frequency of the switching circuit 15 to 60 kHz is output (step S).
18).

Next, the CPU 11 outputs a radio wave reception start signal C to the receiving circuit 16 to start reception of radio waves,
Starts capturing the time code TC. That is, CPU
The switching circuit 15 to which the switching signal has been input by means of 11 switches the frequency (40 kHz or 60 kHz specified in this switching signal.
Hz) and outputs the electric signal to the receiving circuit 16. Further, the reception circuit 16 to which the reception start signal C of the radio wave is input starts the reception operation, converts the electric signal into a time code TC, and outputs the time code TC to the CPU 11. And CP
U11 takes in this time code TC in sequence.

When the reception of radio waves, that is, the acquisition of the time code TC is started in this way, the CPU 11 continues to
A radio wave reception process (see FIG. 4) described later is executed (step S13 or step S19), and it is determined whether or not the reception of the radio wave at this frequency is successful.

As a result, when it is determined that the reception of the radio wave is successful (step S14: YES, or step S2).
0: YES), the CPU 11 subsequently executes a time adjustment process (see FIG. 5) described later (step S24), and based on the loaded time code TC, the total clock number circuit 19
Correct the current time data by.

Thereafter, the CPU 11 causes the total clock number circuit 19
The current time data of (which is the data after correction) is displayed on the display unit 2.
In addition to displaying digitally at 0, the reception frequency of this time,
That is, the tuning frequency of the antenna 14 (40 kHz or 60
(kHz) is stored in the successful reception frequency memory Z of the RAM 13 (step S25), and this processing ends.

On the other hand, step S14 or step S2
0, when it is determined that the reception of the radio wave has failed (step S14: NO, or step S20: N
O), the CPU 11 outputs a switching signal to the switching circuit 15 so as to receive the radio wave of the other frequency. That is, when the current reception frequency is "40 kHz" (step S1
4: NO), and outputs a switching signal for switching the tuning frequency to 60 kHz to the switching circuit 15 (step S1).
5). On the other hand, when the current reception frequency is "60 kHz" (step S20: NO), the tuning frequency is set to 40.
A switching signal for switching to kHz is output to the switching circuit 15 (step S21).

Then, the CPU 11 starts the reception of the radio wave at the newly switched frequency (60 kHz or 40 kHz), and similarly to step S13 or step S19, the radio wave reception processing at this frequency (see FIG. 4). ) Is executed (step S16 or step S2).
2). That is, the received time code TC is sequentially fetched and it is determined whether or not the reception of the radio wave at this frequency is successful.

As a result, when it is determined that the reception of the radio wave is successful (step S17: YES, or step S2).
3: YES), the CPU 11 executes time adjustment processing (see FIG. 5) described later (step S24). That is, the total clock number circuit 19 is based on the loaded time code TC.
Correct the current time data by. After that, CPU11
Causes the display unit 20 to digitally display the current time data (corrected data) of the total clock number circuit 19,
This time the reception frequency (60kHz or 40kHz),
It is stored in the successful reception frequency memory Z of the RAM 13 (step S25), and this processing ends.

On the other hand, step S17 or step S2
In step 3, when it is determined that the reception of the radio wave has failed (step S17: NO, or step S23: N
O), since the reception of radio waves at both frequencies of 40 kHz and 60 kHz has failed, the CPU 11 causes the display unit 20 to display a message (error message) indicating that radio waves cannot be received. , This process ends.

Next, the above step S13 and step S1
The radio wave reception process executed in step 6, step S19, or step S22 will be described with reference to the flowchart shown in FIG. In this processing, the CPU 11 also performs the RO
This is the process started by executing the corresponding program stored in M12.

According to the figure, when this radio wave correction processing is started, the CPU 11 first refers to the frame reference marker (M) (hereinafter referred to as the "first frame reference marker") in the fetched time code TC. ) Is searched (step S
131). When the first frame reference marker is detected (step S131: YES), the CPU 11 extracts the hour and minute data, which is the minute and hour data, and the integrated date data from the subsequently obtained time code TC (step) (step S131: YES). S132). After that, the extracted hourly and minute data is converted into R
While storing in the reception time / minute memory X1 of AM13,
The integrated date data is converted into date data, and the obtained date data is stored in the received integrated date memory D1 of the RAM 13 (step S133).

Next, the CPU 11 determines whether or not the frame reference marker (M) has been detected three times (step S134). As a result, when the CPU 11 determines that the frame reference marker (M) has been detected three times, the CPU 11 proceeds to subsequent step S135. In this case, the reception time memories X1 to X3 of the RAM 13 and the reception accumulated date memories D1 to D
In 3, the data has been stored.

On the other hand, when it is determined in step S134 that the frame reference marker (M) is not detected three times (step S134: NO), the CPU 11 shifts to step S131 again.

When the process proceeds to step S131, the CPU 1
1 is from the time code TC that is sent next,
A frame reference marker (M) (hereinafter, referred to as a "second frame reference marker") sent after the first frame reference marker, that is, one minute later is searched (step S13).
1).

When the second reference frame marker is detected (step S131: YES), the CPU 11 similarly extracts the hour / minute data and the integrated date data from the subsequently obtained time code TC (step S132).
After that, the extracted hour / minute data is stored in the reception hour / minute memory X.
In step S133, the integrated date data is converted into date data and stored in the received integrated date memory D2 (step S133).

Then, in step S134, the CP
U11 determines that the frame reference marker (M) has not been detected three times (step S134: NO), and moves to step S131 again. Then, similarly to the above, the frame reference marker (M) sent one minute after the second frame reference marker (hereinafter, referred to as “third frame reference marker”).
Say. ) Is searched (step S131) and the third frame reference marker is detected (step S131: Y).
ES), and subsequently the time data extracted is received time / minute memory X
3 and stores the date data obtained by converting the integrated date data in the received integrated date memory D3 (steps S132 and S133).

After that, the CPU 11 carries out step S134.
, It is determined that the frame reference marker (M) has been detected three times (step S134: YES), and the subsequent step S
Move to 135.

In this way, when the frame reference marker (M), that is, the first to third frame reference markers are detected three times, the CPU 11 makes one minute in the hour / minute data stored in the reception hour / minute memory X3. The time data including the hour / minute data obtained by adding the date data stored in the reception integrated date data Y3 is stored in the reception current time memory Y (step S135). That is, the time data stored in the reception current time memory Y here is the frame reference marker (M) (hereinafter, referred to as “fourth frame reference marker”) that will be detected next (1 minute later) to the third frame reference marker. It is the time data at the time of the rise of the marker.

Next, the CPU 11 determines whether or not the data has been correctly received, that is, whether or not the received data is correct data (step S136). That is, R
The values of the three hour / minute data stored in the reception hour / minute memories X1 to X3 of the AM13 are sequentially delayed by one minute, and the three dates stored in the reception accumulated date memories D1 to D3. It is judged whether or not the data are the same.

As a result of the judgment, when the above three time / minute data are sequentially delayed by one minute and the above three date data are the same, the CPU 11 receives the data correctly, that is, the reception is successful. It is determined that On the other hand, if not, it is determined that the reception has failed.

As described above, whether or not the reception of the radio wave has succeeded is detected based on the three time data and the date data obtained by detecting the reference frame marker (M) three times and fetching the time code TC. When the CPU 11 judges,
The radio wave reception stop signal C is output to the reception circuit 16, and the radio wave reception process is terminated.

Next, the time adjustment processing executed in step S24 of FIG. 3 will be described with reference to the flowchart shown in FIG. Also in this processing, the CPU 11 causes the ROM 12 to
This is a process that is started by executing a corresponding program stored inside.

According to the figure, the CPU 11 first waits for detection of the fourth frame reference marker (step S).
241). Then, when the fourth frame reference marker is detected (step S241: YES), the CPU 11 waits for a pulse (time point indicated by T1 in FIG. 7) which rises 1 second after the rising time point of the fourth frame reference marker (time point). Step S242).

When this T1 is detected (step S242: YES), the CPU 11 detects the time T1 and at the same time detects the time data stored in the reception current time memory Y of the RAM 13 as the current time data. 1
Forcibly set to 9 (step S243).

By the way, the time data set here is the data at the time of rising of the fourth reference frame marker as described above. That is, since the data is delayed by 1 second from T1, in order to correct this, the CPU 11
Supplies the preset signal P to the frequency dividing circuit 18 so that the next 1-minute signal m is output after 59 seconds instead of after 60 seconds,
The count value of the frequency dividing circuit 18 is forcibly set to be larger by 1 second (step S244).

As described above, when the current time data of the total clock number circuit 19 is updated to the accurate time data based on the fetched time code TC, the CPU 11 ends this time adjustment process.

As described above, according to the first embodiment, when the time data receiving device 1 starts to receive the radio wave, C
The PU 11 first switches the tuning frequency of the antenna 14 so as to receive the radio wave having the frequency stored in the reception success frequency memory Z, that is, the frequency successfully received last time. Normally, it is considered that the position condition of the time data receiving device 1 at the time of the previous successful reception and the position condition at the time of the current reception are the same. Therefore, it is possible to successfully receive radio waves with high probability. Further, when reception fails, the reception frequency can be immediately switched to the other frequency. This makes it possible to determine the optimum reception frequency and quickly adjust the time based on the time code included in the received radio wave.

[Second Embodiment] Next, a second embodiment will be described in detail with reference to FIG. Since the time data receiving device according to the second embodiment is substantially the same as the time data receiving device 1 according to the first embodiment, the same reference numerals are used and the detailed description thereof is omitted. Also, the second
The embodiment is different from the first embodiment in the procedure of the overall processing operation of the time data receiving device 1. Therefore, this point will be mainly described.

The overall processing operation of the time data receiving apparatus 1 according to the second embodiment will be described with reference to the flowchart shown in FIG. In addition, as in the first embodiment, this operation is performed by the CPU 11 starting execution of the corresponding program stored in the RON 12 by pressing the time adjustment switch SW of the switch unit 21. , Started.

As shown in FIG.
A switching signal for switching the tuning frequency of the switching circuit 15 to 40 kHz is output so as to receive a radio wave of kHz (step S31). Then, the radio wave reception start signal C is output to the receiving circuit 16, the reception of the radio wave is started, and the acquisition of the time code TC is started. That is, the switching circuit 15 is C
Frequency specified by PU11 for switching signal, ie 40k
It tunes to Hz and outputs the electric signal to the receiving circuit 16. Further, the reception circuit 16 to which the reception start signal C of the radio wave is input starts the reception operation, converts the electric signal into a time code TC, and outputs the time code TC to the CPU 11. And CP
U11 takes in this time code TC in sequence.

In this way, when the acquisition of the time code TC is started, the CPU 11 subsequently determines whether or not the received radio waves are synchronized with the second (step S3).
2). That is, it is determined whether or not continuous pulses (that is, 10 pulses) are obtained every 1 second for 10 seconds from the time when the time code TC is taken in.

As a result, if ten consecutive pulses are obtained every one second, it is determined that the second synchronization is achieved (step S32: YES), and in the following step S33, the radio wave reception process at 40 kHz is performed. Is executed (step S33). The radio wave reception process executed in step S33 is similar to the process described with reference to FIG. That is, three frame reference markers (M)
Are continuously detected, and hour / minute data and date data at each time point are acquired, and based on these data, it is determined whether or not the reception of the radio wave is successful.

By this radio wave reception processing, 40 k
When it is determined that the reception of the radio wave in Hz is successful (step S34: YES), the CPU 11 causes the step S39.
And the time adjustment process is executed (step S3
9). The time adjustment process executed in step S39 is similar to the process described with reference to FIG. That is, the time data stored in the reception current time memory Y based on the previously fetched time code TC is set in the total clock number circuit 19 and the preset signal P is output to the frequency dividing circuit 18.

Thereafter, the CPU 11 causes the total clock number circuit 19
The current time data of (is the data after the correction) is digitally displayed on the display unit 20, and this processing is ended.

In step S32, 40 kHz
When it is determined that the second synchronization in z is not established (step S32: NO), or 4 in step S34.
When it is determined that the reception of the radio wave at 0 kHz has failed (step S34: NO), the CPU 11 proceeds to step S35.

Then, in step S35, the CPU
11 outputs a switching signal for switching the tuning frequency to 60 kHz so as to receive the radio wave of 60 kHz to the switching circuit 15 (step S35), and starts receiving the radio wave at 60 kHz.

When the reception of radio waves is started, the CPU 11
Similar to step S32, it is determined whether or not the received radio waves are synchronized with each other (step S36). That is, it is determined whether or not continuous pulses (that is, 10 pulses) are obtained every 1 second for 10 seconds from the time when the time code TC is taken in.

As a result, when ten consecutive pulses are obtained every one second, it is determined that the seconds are synchronized (step S36: YES), and in the subsequent step S37, the radio wave reception process at 60 kHz is performed. Is executed (step S36). The radio wave reception process executed in step S36 is similar to the process described with reference to FIG. 4, and the frame reference marker (M) is continuously detected three times, and at each time point. The hour / minute data and the date data are acquired, and whether or not the reception of the radio wave is successful is determined based on these data.

By this radio wave reception processing, 60 k
When it is determined that the reception of the radio wave in Hz is successful (step S36: YES), the CPU 11 continues to step S
In 39, the time adjustment processing is executed (step S3).
9). The time adjustment process executed in step S39 is similar to the process described with reference to FIG. That is, the time data stored in the reception current time memory Y based on the previously fetched time code TC is set in the total clock number circuit 19 and the preset signal P is output to the frequency dividing circuit 18.

After that, the CPU 11 causes the total clock number circuit 19
The current time data of (is the data after the correction) is digitally displayed on the display unit 20, and this processing is ended.

Further, in step S36, 60 kHz
When it is determined that the second synchronization in z is not established (step S36: NO), or in step S38,
When it is determined that the reception of the radio wave at 60 kHz has failed (step S38: NO), 40 kHz and 60 kHz
Since the reception of the radio waves at both frequencies of Hz has failed, the CPU 11 causes the display unit 20 to display a message (error message) indicating that the radio waves cannot be received, and then ends this processing. To do.

As described above, according to the second embodiment, when the time data receiving device 1 starts to receive the radio wave, C
The PU 11 first receives one (40 kHz) radio wave for a predetermined time, and determines whether the received radio wave is synchronized with the second. Then, when the seconds are not synchronized, the frequency of the received radio wave is immediately switched to the other frequency (60 kHz). Therefore, it is possible to quickly determine the optimum reception frequency and correct the current time based on the time data included in the received radio wave.

[Modification] The present invention is not limited to the above-mentioned two embodiments, and can be appropriately modified without departing from the spirit of the present invention.

For example, in the above embodiment, 40
Although it was decided to receive both / 60 kHz radio waves once and determine whether each reception was successful, the reception of these radio waves may be repeated during a predetermined measurement time. That is, after the NO determination in step S17 of FIG. 3, the NO determination of step S23, the NO determination of step S36 of FIG. 6, and the NO determination of step S38, the elapsed time from the start of the operation is within a predetermined measurement time. A step of determining whether or not there is is added, and if it is within the time, the process proceeds to step S11 or step S31 again.

In this case, even if the reception at both frequencies fails due to the surrounding conditions of the time data receiving device 1 such as passing through a place where an obstacle radio wave is generated, the reception is performed again. By switching the frequency of the radio wave and repeatedly determining success / failure of reception, it is possible to reliably determine the optimum frequency.

[0078]

According to the present invention, it is possible to quickly determine the optimum reception frequency and correct the current time based on the time data included in the received radio wave.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a time data receiving device.

FIG. 2 is a diagram showing a memory configuration of a RAM.

FIG. 3 is a flowchart for explaining an overall processing operation according to the first embodiment.

FIG. 4 is a flowchart for explaining a radio wave reception process.

FIG. 5 is a flowchart for explaining a time adjustment process.

FIG. 6 is a flowchart for explaining an overall processing operation according to the second embodiment.

FIG. 7 is a diagram showing a time code.

[Explanation of symbols]

1 Time data receiver 11 CPU 12 ROM 13 RAM 14 antenna 14a 40kHz tuning antenna 14b 60kHz tuning antenna 15 Switching circuit 16 Receiver circuit 17 Oscillation circuit 18 frequency divider 19 total clock number circuit 20 Display 21 Switch

Claims (5)

[Claims] 1. A clocking means for counting a reference clock signal to obtain current time data, and a radio wave receiving means capable of receiving a plurality of radio waves including time data and having different frequencies.
Based on reception frequency switching means for switching the frequency of the radio wave received by the radio wave receiving means, control means for controlling frequency switching by the reception frequency switching means, and time data included in the radio wave received by the radio wave receiving means. A time data receiving device for correcting the current time data according to the present invention, the time data receiving device comprising success / failure determining means for determining success / failure of reception of a radio wave by the radio wave receiving means, and storage means for storing a frequency. The control means controls the reception frequency switching means so as to switch the frequency of the radio wave received by the radio wave receiving means to the frequency stored in the storage means, and the success / failure determination means If it is determined that the failure has occurred, the reception frequency switching means is controlled to switch to another frequency, and the success / failure judgment is made. The time data receiving device, wherein the frequency of the radio wave received by the radio wave receiving means is stored in the storage means when the setting means determines the success. 2. A time measuring means for counting a reference clock signal to obtain current time data, and a radio wave receiving means capable of receiving a first radio wave and a second radio wave which are radio waves containing time data and having different frequencies. Based on reception frequency switching means for switching the frequency of the radio wave received by the radio wave receiving means, control means for controlling frequency switching by the reception frequency switching means, and time data included in the radio wave received by the radio wave receiving means. And a current time correction unit that corrects the current time data, further comprising a success / failure determination unit that determines success / failure of reception of a radio wave by the radio wave reception unit, and the control unit. Controlling the reception frequency switching means to switch the frequency of the radio wave received by the radio wave receiving means to the frequency of the first radio wave, After, if it is determined that failure by the success determining means, time data receiving apparatus and controls the receiving frequency switching means to switch the frequency of the second radio wave. 3. The time data receiving device according to claim 1, wherein each of the radio waves is modulated with a modulated wave of 1 Hz, and the success / failure determination means synchronizes the seconds of the radio waves received by the radio wave receiving means. The time data receiving device is characterized by determining that the reception of the radio wave is unsuccessful when the time is not obtained. 4. A time measuring means for counting a reference clock signal to obtain current time data, and a radio wave receiving means capable of receiving a plurality of radio waves including time data and having different frequencies.
A time data correction method for a time data receiving device, comprising: storage means for storing a frequency, wherein the frequency of the radio wave received by the radio wave receiving means is switched to the frequency stored in the storage means, And a first determination step of determining success / failure of reception of the radio wave by the radio wave, and a frequency of the radio wave received by the radio wave reception means is stored in the storage means when the first determination step determines failure. Switch to a frequency other than frequency,
A second determination step for re-determining the success / failure of reception of the radio wave by the radio wave receiving means, and a frequency of the radio wave received by the radio wave receiving means when it is determined to be successful in the second determination step. The frequency updating step to be stored in the storage means, and the current time based on time data included in the radio wave received by the radio wave receiving means when it is determined to be successful in the first determination step or the second determination step. A time data correction method comprising: a correction step of correcting data. 5. A timekeeping means for counting the reference clock signal to obtain current time data, and a radio wave receiving means capable of receiving a first radio wave and a second radio wave having different frequencies and including time data. A time data correction method for a time data receiving device, comprising: determining a frequency of a radio wave received by the radio wave receiving means as the first
Switching to the frequency of the radio wave to determine whether the reception of the radio wave by the radio wave receiving means is successful or unsuccessful; and if the first decision step determines that the radio wave has failed, the radio wave receiving means receives the signal. A second determination step of re-determining the success / failure of the reception of the radio wave by the radio wave receiving means by switching the frequency of the radio wave to the frequency of the second radio wave; and the first determination step or the second determination step. A correction step of correcting the current time data based on the time data included in the radio wave received by the radio wave reception means when it is determined to be successful, and a time data correction method.