JP5299333B2 - Solid-state image sensor - Google Patents

Description

The present invention relates to a solid-state imaging element in which a photoelectric conversion element is formed in a silicon layer.

The solid-state imaging device is configured by forming a photoelectric conversion device in a semiconductor layer.
In the solid-state imaging device, a problem arises that a so-called dark current is generated due to the surface level of the semiconductor layer in which the photoelectric conversion device is formed.

As shown in the potential diagram of FIG. 7A, this dark current mainly constitutes a photoelectric conversion element by the electric field of the surface depletion layer when the electrons trapped in the surface level are thermally excited to the conduction band. Occurs to move to the n-type semiconductor region of the photodiode.
For example, if the semiconductor layer is silicon, the bandgap is 1.1 eV, and the surface level (and Fermi level) where the bandgap is divided into 2: 1 by the Bardeen limit. Exists.
Accordingly, at this time, the potential barrier for electrons trapped in the surface level is 0.7 eV.

Therefore, in order to reduce the dark current caused by the surface level, a method of providing a p ⁺ layer on the surface of the photodiode is employed (see, for example, Patent Document 1).
As a result, dark current is suppressed to some extent.
That is, as shown in the potential diagram of FIG. 7B, the presence of the p ⁺ layer makes the potential barrier for electrons trapped in the surface level 1.0 eV, which is 0.3 eV compared to the case without the p ⁺ layer. It gets higher. Thereby, since the number of electrons excited thermally can be reduced, dark current can be reduced.

When the p ⁺ layer is provided on the surface of the silicon substrate, the amount of dark current at room temperature (T = 300K) is estimated from the Fermi Dirac distribution function as compared with the case where the p ⁺ layer is not provided. Decrease by an order of magnitude.
Here, the distribution function of Fermi Dirac is expressed by the following formula 1.

However, E is the energy, E _F is the Fermi energy, T is the absolute temperature, k is Boltzmann's constant, e is the natural logarithm. E-E _F corresponds to the size of the potential barrier.

JP 2002-252342 A (FIG. 15)

However, as the pixels become finer, the amount of light received by the photodiode of each pixel decreases, so the signal amount also decreases and the S / N ratio becomes relatively small.
For this reason, even if a p ⁺ layer is provided on the surface of the silicon substrate and the amount of dark current is reduced by four orders of magnitude, a sufficient S / N ratio cannot be ensured. It appears as dot-like noise in the obtained image.

  Normally, when the amount of incident light is small, the signal intensity is increased by increasing the gain of the image signal with an amplifier or the like to compensate for the lack of sensitivity. This is because the noise in the image becomes conspicuous as a result.

In the future, as the miniaturization further proceeds, the signal intensity decreases. Therefore, it is impossible to catch up only by providing a p ⁺ layer on the surface of the silicon substrate to reduce noise caused by dark current.
Therefore, a new device is required to ensure a sufficient S / N ratio.

In order to solve the above-described problems, the present invention provides a solid-state imaging device that can secure a sufficient S / N ratio by reducing noise due to dark current.

The solid-state imaging device of the present invention is formed on the entire surface of the semiconductor layer including a semiconductor layer made of silicon, a photoelectric conversion element formed in the semiconductor layer, and a portion where the photoelectric conversion element is formed. And a single crystal layer made of SiGeC, and the thickness of the single crystal layer is 30 nm or less .

According to the above-described configuration of the solid-state imaging device of the present invention, the single crystal layer made of SiGeC is formed on the entire surface of the semiconductor layer including the portion of the semiconductor layer made of silicon where the photoelectric conversion device is formed. Accordingly, since the band gap of the single crystal layer is wider than that of the semiconductor layer, a barrier against electrons from the surface state is increased, and dark current caused by the electrons can be reduced.

According to the present invention described above, the barrier against electrons from the surface state is increased by the single crystal layer, and the dark current caused by the electrons can be reduced. For example, it can be significantly reduced to 12 digits. Therefore, the S / N ratio of the signal due to incident light can be dramatically improved.
This makes it possible to obtain an image with no noticeable noise even if the signal gain is set high for high sensitivity under imaging conditions with a small amount of incident light such as in a dark room.
Further, even with a low-sensitivity image sensor, a high-quality image can be obtained only by amplification by an amplifier, regardless of the amount of incident light.

Even if the element is miniaturized and the amount of incident light is reduced, a sufficient S / N ratio can be ensured. Therefore, the noise is not noticeable by simply amplifying with an amplifier to compensate for the lack of sensitivity. An image is obtained.
Therefore, by miniaturizing the element, it is possible to increase the number of pixels of the solid-state imaging element, and it is possible to reduce the size of the solid-state imaging apparatus.

1 is a schematic configuration diagram (schematic plan view) of an embodiment of a solid-state imaging device of the present invention. It is sectional drawing of the solid-state image sensor of FIG. It is a figure which shows potential distribution. It is a schematic block diagram (sectional drawing) of other embodiment of the solid-state image sensor of this invention. It is a schematic block diagram (sectional drawing) of a solid-state image sensor when a single crystal layer is formed by a method different from the solid-state image sensor of FIG. It is a schematic block diagram (schematic top view) of other embodiment of the solid-state image sensor of this invention. It is a figure which shows the potential distribution of A conventional solid-state image sensor. It is a figure which shows the potential distribution of the structure which provided the P ⁺ layer in B surface.

First, an outline of the present invention will be described prior to description of specific embodiments of the present invention.
In the present invention, in view of the problems described above, as a means for effectively reducing dark current, a single crystal layer made of a wide band gap material is used as a semiconductor layer (semiconductor substrate, semiconductor epitaxial layer, A high potential barrier is formed by bonding to the surface of a semiconductor substrate and a semiconductor epitaxial layer on the semiconductor substrate and the like (which corresponds to a single crystal semiconductor layer).

For example, when a cubic SiC layer is bonded to the surface of an n-type Si layer on which a photodiode is formed, the potential distribution in the depth direction is as shown in FIG. 3 if the SiC band gap is 2.2 eV. Further, the potential barrier becomes 1.5 eV, and the barrier becomes larger than that shown in FIGS. 7A and 7B, so that the dark current is reduced.
In this case, the dark current is reduced by about 12 orders of magnitude at room temperature based on the Fermi Dirac distribution function described above.
Thus, since the noise is reduced by reducing the dark current, the S / N ratio is increased. As a result, even if the signal is amplified by an amplifier when the amount of incident light is low, noise is not noticeable.

Various materials can be considered as the above-mentioned wide band gap material.
For example, the band gap can be controlled by changing the composition ratio of a mixed crystal that is a compound semiconductor. For example, AlGaInP-based mixed crystals, SiC-based mixed crystals, ZnCdSe-based mixed crystals, and AlGaInN-based mixed crystals can be used.

When a silicon layer is used as the semiconductor layer for forming the photoelectric conversion element, SiC-based compatibility using the same group VI element is good in consideration of ease of manufacture.
However, since the absolute value of the lattice mismatch between silicon and SiC is large, misfit dislocations are likely to occur at the junction interface. The lattice irregularity Δa described here can be defined by the following equation (Equation 2).

Here, a _SiC and a _Si are lattice constants of SiC and Si, respectively.
In order to prevent the occurrence of misfit dislocations, for example, the film thickness of SiC may be reduced to a critical film thickness or less. For example, it has been experimentally found that the film thickness of SiC may be 30 nm or less.
Furthermore, it has been found that when the composition ratio of C is high such that the composition ratio of Si and C is 1: 1, the film thickness may be further reduced to 15 nm or less.

Further, the absolute value of the lattice irregularity Δa may be reduced by adding Si to SiC to form a SiGeC-based mixed crystal.
Here, Table 1 shows the crystal structures and lattice constants of Si, Ge, and C.

As shown in Table 1, since the lattice constant of C is smaller than the lattice constant of Si, the absolute value of the lattice irregularity Δa increases only with the SiC system.
Therefore, the absolute value of the lattice irregularity Δa can be reduced to some extent by mixing Ge larger than the lattice constant of Si with SiC.
Even when a single crystal layer is formed of SiGeC as described above, the thickness of the single crystal layer is preferably 30 nm or less, more preferably 15 nm or less.
Since SiGe not containing C has a band gap smaller than that of Si, when using this SiGeC system for a single crystal layer, it is necessary to contain C.

Crystallinity can be increased by adding Ge to form a SiGeC mixed crystal as described above, but it is also possible to increase the crystallinity by another method.
That is, by placing one or more strained superlattices having a thickness of 15 nm or less at the interface between a semiconductor layer such as a Si layer and a single crystal layer such as a SiC layer or a SiGeC layer, the strained superlattice causes strain. Is relaxed and dislocations escape in the direction of the film surface, so that the crystallinity increases. In this case, the superlattice thin film may have a different lattice constant from Si. That is, for example, the same effect can be obtained even if layers of different composition ratios based on SiGeC are stacked on the Si substrate.

In order to obtain a single crystal thin film of the above-mentioned compound, CVD (chemical vapor deposition) method, MOCVD (metal organic CVD) method, plasma CVD method, MBE (molecular beam epitaxy) method, laser ablation method, sputtering Any general crystal growth method such as a method can be used.
Alternatively, the SiC layer may be formed on the surface by carbonizing the surface of the silicon by a method such as annealing after attaching a carbon-based material such as carbon to the surface of the silicon.

As described above, if the single crystal layer with a wide band gap is too thick as described above, misfit transition occurs between the semiconductor layer and the single crystal layer.
On the other hand, if the film thickness is made too thin, a tunnel effect occurs and the role as a barrier cannot be sufficiently achieved. Therefore, the film thickness is set to 2 nm or more, more preferably 5 nm or more.

  Note that if the layer with a wide band gap is not a single crystal layer but an amorphous layer or a polycrystalline layer, a level is formed at the interface with the lower semiconductor layer, and the dark current can be sufficiently reduced. Since it becomes impossible, it is not preferable.

Subsequently, specific embodiments of the present invention will be described.
As an embodiment of the present invention, FIG. 1 shows a schematic configuration diagram (schematic plan view) of a solid-state imaging device.
In this embodiment, the solid-state imaging device of the present invention is applied to a CCD solid-state imaging device.

  This solid-state imaging device 1 has a vertical CCD register in which a large number of photodiodes PD are arranged in a matrix as a light receiving portion, and extends in the vertical direction (vertical direction in the figure) corresponding to each column of the light receiving portions (photodiodes PD). 2 is connected to one end of each vertical CCD register 2 and connected to a horizontal CCD register 3 extending in the horizontal direction (lateral direction in the figure). Further, an output unit 5 is connected to one end of the horizontal CCD register 3 via an output amplifier 4. Connected and configured.

FIG. 2 is a cross-sectional view including the light receiving portion of the solid-state imaging device 1 of FIG.
As shown in FIG. 2, a p-type semiconductor well region 12 is formed on an n-type silicon substrate 11, and semiconductor regions constituting the photodiode PD and the vertical CCD register 2 are formed in the p-type semiconductor well region 12. Has been.
The photodiode PD serves as a so-called photoelectric conversion element. An n-type charge storage region 13 is formed on the p-type semiconductor well region 12, and the regions 12 and 13 constitute a diode.
In the vertical CCD register 2, an n-type transfer channel region 15 to which signal charges are transferred is formed near the surface of the p-type semiconductor well region 12, and a second p-type semiconductor well region is formed below the n-type transfer channel region 15. 14 is formed.
A p-type channel stop region 16 is formed between the n-type charge storage region 13 of the photodiode PD and the right-side n-type transfer channel region 15, and the channel stop region 16 allows signal Charges are prevented from flowing from the n-type charge accumulation region 13 into the right-side n-type transfer channel region 15.
A read gate region 17 is formed between the n-type charge storage region 13 of the photodiode PD and the left n-type transfer channel region 15.

A transfer electrode 19 made of polycrystalline silicon is formed on the silicon substrate 11 via a gate insulating film 18. The transfer electrode 19 is formed across the readout gate portion 17, the transfer channel region 15, and the channel stop region 16, and the charge storage region 13 of the photodiode PD is formed corresponding to the opening of the transfer electrode 19. Yes.
A light shielding film 21 made of Al is formed on the transfer electrode 19 via an interlayer insulating film 20 made of SiO ₂ . The light shielding film 21 is formed from above the transfer electrode 19 to the side surface, and has an opening on the charge accumulation region 13 of the photodiode PD.

In the solid-state imaging device 1 of the present embodiment, in particular, a material having a wider band gap than silicon of the silicon substrate 11 bonded to the silicon substrate 11 on which the photodiode (photoelectric conversion element) PD of the light receiving unit is formed. For example, a single crystal layer 25 made of SiC or SiGeC is provided.
By providing this single crystal layer 25, dark current can be greatly reduced as compared with the conventional configuration.

  As described above, when SiC or SiGeC is used for the single crystal layer 25, it is desirable that the film thickness of the single crystal layer 25 be 30 nm or less. For example, the film thickness is about 10 nm.

  For the process of forming the single crystal layer 25, for example, various methods described above such as a CVD method can be employed.

According to the configuration of the solid-state imaging device 1 of the present embodiment described above, a single crystal layer made of a material having a wider band gap than silicon of the silicon substrate 11 is bonded onto the silicon substrate 11 on which the photodiode PD is formed. By providing 25, since the band gap of the single crystal layer 25 is wide, a barrier against electrons from the surface level is increased, and dark current caused by the electrons can be reduced. Further, the dark current can be significantly reduced, for example, to 12 digits, and the S / N ratio of the signal due to the incident light can be drastically improved.
This makes it possible to obtain an image with no noticeable noise even if the signal gain is set high for high sensitivity under imaging conditions with a small amount of incident light such as in a dark room.
Even if the solid-state imaging device 1 has low sensitivity, a high-quality image can be obtained only by amplification of the amplifier regardless of the amount of incident light.

Even if the pixels of the solid-state imaging device 1 are miniaturized to reduce the amount of incident light, a sufficient S / N ratio can be secured. A good image with no noticeable is obtained.
Therefore, by miniaturizing the pixels of the solid-state imaging device 1, it is possible to increase the number of pixels of the solid-state imaging device 1 and to reduce the size of the solid-state imaging device.

(Example)
Here, actually, the solid-state imaging device 1 of the present embodiment was manufactured, and the characteristics were examined.

First, the solid-state imaging device 1 in which a SiC layer was formed as the single crystal layer 25 was produced.
An SiC layer, for example, having a film thickness of about 10 nm was grown as a single crystal layer 25 on the silicon substrate 11 by using, for example, a CVD method. At this time, for example, C ₃ H ₈ and monosilane SiH ₄ were used as raw materials, and the substrate temperature was set to 1100 ° C. or lower.
It is also possible to form the SiC layer by a method other than the CVD method. For example, in the laser ablation method, it is possible to grow a crystal using SiC as a target material.
Thereafter, the same process as the manufacturing process of a normal CCD solid-state image sensor was performed, and the solid-state image sensor 1 of the present embodiment shown in FIGS. 1 and 2 was produced.

  When imaging was actually performed using the produced solid-state imaging device 1, dark current was very small, and an image in which noise was not noticeable was obtained even when imaging was performed under dark conditions.

Next, the solid-state imaging device 1 in which a SiGeC layer was formed as the single crystal layer 25 was produced.
The surface was cleaned by immersing the silicon substrate 11 in a mixed solution of NH ₄ OH, H ₂ O ₂ , H ₂ O (mixing ratio is 1: 1: 5) for 10 minutes.
Thereafter, a natural oxide film on the surface of the silicon substrate 11 was removed by performing HF (HF: H ₂ O = 1: 50) treatment for 10 seconds.
When the surface of the silicon substrate 11 is cleaned through such steps, the crystallinity of subsequent crystal growth is improved.
The silicon substrate 11 from which the pretreatment was performed and the natural oxide film was removed was placed on the substrate holder.

Next, a SiGeC layer to be the single crystal layer 25 was formed on the silicon substrate 11 by using a low pressure CVD method.
First, propane C ₃ H ₈ was further supplied at 450 μmol / min under the conditions of a pressure of 1 × 10 ⁴ Pa, a substrate temperature of 1150 ° C., and a hydrogen gas flow rate of 1 liter / min. The surface of the silicon substrate 11 was carbonized by holding in the state for 2 minutes.
Further, by supplying the raw material gases monosilane SiH ₄ , C ₃ H _8, and GeH ₄ simultaneously under the conditions of 36 μmol / min, 59 μmol / min, and 10 μmol / min by low pressure CVD, respectively, The substrate was grown for 30 seconds. As a result, the SiGeC layer to be the single crystal layer 25 was formed with a film thickness of approximately 10 nm.

  Although the low pressure CVD method is used here, the SiGeC layer can be formed by other methods. For example, in the laser ablation method, it is possible to grow a crystal using SiGeC as a target material, and it is also possible to grow a crystal by a gas source MBE method using an organometallic material such as an organosilane material.

  Thereafter, the same process as the manufacturing process of a normal CCD solid-state image sensor was performed, and the solid-state image sensor 1 of the present embodiment shown in FIGS. 1 and 2 was produced.

  When imaging was actually performed using the produced solid-state imaging device 1, dark current was very small, and an image in which noise was not noticeable was obtained even when imaging was performed under dark conditions.

In the above-described embodiment, the single crystal layer 25 is formed on the entire surface of the silicon substrate 11. However, for the purpose of improving the electrical characteristics, for example, the single crystal layer other than the photodiode PD portion is formed by RIE ( It may be removed by an etching method such as a reactive ion etching method. In this case, etching may be performed after the photodiode portion is protected with a mask by lithography.
An embodiment in this case is shown below.

Next, FIG. 4 shows a schematic configuration diagram (cross-sectional view) of a solid-state imaging device according to another embodiment of the present invention.
In the solid-state imaging device 30 of the present embodiment, a single crystal layer 26 made of, for example, SiC or SiGeC is formed only on the surface of the photodiode PD portion of the silicon substrate 11. The single crystal layer 26 is formed on the silicon substrate 11 by bonding.
Since other configurations are the same as those of the solid-state imaging device 1 of the previous embodiment, the same reference numerals are given and redundant description is omitted.

  For example, after the single crystal layer 26 is formed as a single crystal layer 26 on the entire surface, the single crystal layer other than the photodiode PD portion is removed by an etching method such as RIE (reactive ion etching). Thus, it can be formed.

According to the configuration of the solid-state imaging device 30 of the present embodiment described above, the single crystal layer 26 made of a material having a wider band gap than silicon of the silicon substrate 11 is bonded to the photodiode PD portion of the silicon substrate 11. By providing the single crystal layer 26, since the band gap is wide, the barrier against electrons from the surface level is increased, and the dark current caused by the electrons can be reduced. Further, the dark current can be significantly reduced, for example, to 12 digits, and the S / N ratio of the signal due to the incident light can be drastically improved.
This makes it possible to obtain an image with no noticeable noise even if the signal gain is set high for high sensitivity under imaging conditions with a small amount of incident light such as in a dark room.
Even if the solid-state imaging device 30 has low sensitivity, it is possible to obtain a high-quality image only by amplification of the amplifier regardless of the amount of incident light.

Even if the pixels of the solid-state image sensor 30 are miniaturized to reduce the amount of incident light, a sufficient S / N ratio can be ensured. A good image with no noticeable is obtained.
Therefore, by miniaturizing the pixels of the solid-state imaging element 30, it is possible to increase the number of pixels of the solid-state imaging element 30 and to reduce the size of the solid-state imaging device.

  Here, the solid-state imaging device 30 of the embodiment shown in FIG. 4 was actually manufactured and the characteristics were examined.

As described above, pretreatment and film formation of the SiGeC layer were performed to form a SiGeC layer to be the single crystal layer 26 on the silicon substrate 11.
Next, the SiGeC layer other than the photodiode PD part was removed by the lithography technique and the RIE technique, and the single crystal layer 26 made of SiGeC was left only in the photodiode PD part.

  Thereafter, the same process as the manufacturing process of a normal CCD solid-state image sensor was performed, and the solid-state image sensor 30 of the present embodiment shown in FIG. 4 was produced.

  When imaging was actually performed using the manufactured solid-state imaging device 30, dark current was very small, and an image in which noise was not noticeable was obtained even when imaging was performed under dark conditions.

Note that a single crystal layer may be formed only in the photodiode PD portion using a mask.
For example, the surface of the silicon substrate 11 is carbonized by covering the silicon substrate 11 other than the photodiode PD portion with a mask. Thereby, a single crystal layer is formed only in the photodiode PD.
Note that the solid-state imaging device manufactured in this case is formed such that the single crystal layer 27 formed in the photodiode PD portion enters the silicon substrate 11 as shown in a cross-sectional view of FIG. Is different from the configuration of FIG.

In each of the above-described embodiments, the single crystal layers 25, 26, and 27 made of SiC or SiGeC are formed on the silicon substrate 11. However, the single crystal layer has other band gaps wider than the silicon of the substrate 11. It is also possible to use materials.
Here, materials having a wider band gap than silicon Si other than SiC are listed below together with lattice constants. All the materials listed below have the same cubic system as silicon Si. This is because the same cubic system is desirable for epitaxial growth on silicon.

Material Band gap Eg (eV) Lattice constant a (Å)
GaAs 1.43 5.654
AlAs 2.16 5.66
GaN 3.27 4.55
AlN 6.8 4.45
ZnSe 2.67 5.667
ZnS 3.70 5.41
MgSe 3.6 5.62
MgS 4.5 5.89

Here, GaAs, AlAs, GaN, and AlN are III-V group compound semiconductors, and may be an AlGaAs ternary mixed crystal or an AlGaN ternary mixed crystal. As other III-V group compound semiconductors, there are AlGaInP-based quaternary mixed crystals and the like.
ZnSe and ZnS are II-VI group compound semiconductors, and may be ZnMgSSe-based quaternary mixed crystals. In the II-VI group compound semiconductor, there are ZnMgO ternary mixed crystals and the like.

The present invention can also be applied to a solid-state imaging device in which a photoelectric conversion element is formed in a semiconductor layer other than silicon.
For example, the present invention can be applied to a solid-state imaging device in which a photoelectric conversion element (photodiode) is formed in a compound semiconductor layer.
In order to detect infrared rays in the wavelength region of 0.9 μm to 1.7 μm, a compound such as GaInAs is used for the semiconductor layer forming the photoelectric conversion element.
In order to detect infrared rays in the wavelength region of 3 μm to 5 μm, a compound such as InSb or PtSi is used for the semiconductor layer forming the photoelectric conversion element.
Furthermore, in order to detect a wavelength region of 8 μm to 14 μm, a compound such as HgCdTe is often used for the semiconductor layer constituting the photoelectric conversion element.
By detecting such an infrared region, the present invention can be applied to, for example, a quartz glass fiber optical communication photodiode and a solid-state imaging device (commonly known as infrared thermography) that obtains temperature information.

Since these materials have a narrow band gap, a single crystal layer having a wider band gap is bonded to the surface of the semiconductor layer forming the photoelectric conversion element, thereby bonding the silicon substrate and the SiC system. Similarly, the effect of reducing dark current can be obtained.
Further, the present invention can be applied not only to a compound semiconductor but also to a configuration in which a photoelectric conversion element (photodiode) is formed in a semiconductor layer made of a group IV element other than silicon, for example, Ge.

  In each of the embodiments described above, the present invention is applied to the CCD solid-state imaging device. However, the present invention can also be applied to solid-state imaging devices having other configurations, for example, CMOS solid-state imaging devices.

FIG. 6 shows a schematic configuration diagram (schematic plan view) of still another embodiment of the solid-state imaging device of the present invention. In the present embodiment, the present invention is applied to a CMOS type solid-state imaging device.
As shown in FIG. 6, the solid-state imaging device 50 includes photodiodes PD serving as light receiving portions arranged in a matrix, and each photodiode PD connected to signal lines 52 and 53 via a cell amplifier 51. The signal line includes a vertical signal line 52 connected to the vertical shift register 54 and a horizontal signal line 53, and a photodiode PD of each pixel is provided in the vicinity of the intersection of these signal lines 52 and 53.
The horizontal signal line 53 is connected to a signal line for outputting a signal voltage via a noise canceling circuit 55 and a lower MOS transistor in the figure.
The gate of the MOS transistor is connected to the horizontal shift register 56, and the horizontal shift register 56 turns the MOS transistor on and off.

In this embodiment, although not shown, a single crystal layer having a wider band gap than the semiconductor layer, at least on the photodiode PD portion of the semiconductor layer in which the source and drain regions of the photodiode PD and the MOS transistor are formed. Is provided.
As a result, as in the embodiments applied to the CCD solid-state imaging device described above, the dark current can be greatly reduced, and even if the pixels of the solid-state imaging device 50 are miniaturized to reduce the incident light quantity. Since a sufficient S / N ratio can be secured, a good image with no noticeable noise can be obtained simply by amplifying with an amplifier to compensate for the lack of sensitivity.
Therefore, by miniaturizing the pixels of the solid-state imaging device 50, it is possible to increase the number of pixels of the solid-state imaging device 50 and to reduce the size of the solid-state imaging device.

  Further, the present invention is not limited to a configuration in which photoelectric conversion elements such as photodiodes PD are arranged in a matrix, but a configuration in which pixels made of photoelectric conversion elements are alternately arranged in a row (substantially in a checkered pattern) The present invention can also be applied to a configuration (line sensor or the like) arranged in one or several rows.

  In addition, when manufacturing the solid-state imaging device according to the present invention, which step is the step of forming a semiconductor region or other semiconductor regions constituting the photoelectric conversion element in the semiconductor layer and the step of forming the polycrystalline layer You may go first.

  The present invention is not limited to the above-described embodiment, and various other configurations can be taken without departing from the gist of the present invention.

1, 30, 40, 50 Solid-state imaging device, 2 vertical CCD register, 3 horizontal CCD register, 4 output amplifier, 11 silicon substrate, 12 p-type semiconductor well region, 13 (n-type) charge storage region, 15 transfer channel region , 19 Transfer electrode, 21 Light shielding film, 25, 26, 27 Single crystal layer, 51 Cell amplifier, 52 Vertical signal line, 53 Horizontal signal line, 54 Vertical shift register, 55 Noise cancel circuit, 56 Horizontal shift register, PD photodiode

Claims (1)

A semiconductor layer made of silicon;
A photoelectric conversion element formed in the semiconductor layer;
Including a single crystal layer made of SiGeC formed on the entire surface of the semiconductor layer, including on the portion where the photoelectric conversion element is formed ,
The solid-state image sensor whose thickness of the said single crystal layer is 30 nm or less .

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