JP5285637B2 - Track circuit device - Google Patents

Description

  The present invention relates to a track circuit receiver using a digital modulation signal, and relates to a technique for reducing an error miss rate.

  There is a track circuit as a device for detecting a train in a railway. This is to detect the presence or absence of a train by using the fact that a current is passed through a rail and the received current varies depending on the presence or absence of a train. Usually, there is a signal when there is no train, and there is no signal when there is a train. Similarly, no signal is generated when the rail is broken or when the circuit through which the signal flows is disconnected. As described above, when the train is present or the rail is broken, basically no signal should be received.

However, in reality, current flows through the rail from the vehicle or the like toward the substation in the electrified section, and a part of this current may be received as noise by the receiver of the track circuit. When this noise is received, it is treated as having a signal, so even if the rail is broken, there is a risk that it may be misjudged that there is no train (can enter), and this situation is dangerous. In order to avoid this, it is effective to use a track circuit using a digital modulation system signal. In the case of a digital modulation type track circuit, in order to distinguish an original transmission signal from a noise generated from a vehicle or the like at a receiver, a signal transmitted by digital modulation is encoded at a transmitter and received at a receiver. A sign test is performed on the received signal. If the received signal is not the original signal as a result of the sign test, it is treated as no signal and it is determined that the train is present (no entry). Thereby, dangerous side malfunction can be prevented.

  In order to make the error miss rate in this test (probability of misjudging noise as having a signal) below a predetermined standard, a certain code length is required, but the time for judging the code is the transmission time of the code. Will depend.

  However, in many cases, the track circuit cannot secure a high bit rate. For example, many use a very low carrier frequency such as a commercial frequency of 50/60 Hz or half that of 25/30 Hz. Even when a higher frequency is adopted, in order to avoid noise of power supply harmonics, it is often possible to ensure only about 30 to 100 Hz as a transmission band.

  The bit rate in such a transmission band of 100 Hz or less is at most about several tens of bps, and it takes several seconds to determine the code.

JP 2001-219849 A JP 2002-337686 A

  It is an object of the present invention to shorten the code determination time in a track circuit using a digital modulation system signal.

The track circuit device
A transmission device connected to the track circuit, digitally modulating a predetermined transmission code at a predetermined symbol period, and transmitting a modulated signal;
N, which is connected to a track circuit, receives a modulated signal, obtains a demodulated code sampled at a period of 1 / n (integer) of the symbol period by digital demodulation, and repeats each bit included in the transmitted code n times It is characterized by comprising a receiving device that determines whether the double-length code and the demodulated code are compatible, and determines that there is a signal when they match.

Also,
The receiving apparatus determines the signal level of the received modulated signal, and determines that the signal is present on the condition that the n-fold code and the demodulated code have a predetermined signal level in addition to the matching. To do.

Also,
The receiving apparatus is characterized in that when the decoded code matches either the n-fold code or the test code obtained by rotating each bit of the n-fold code, the n-fold code matches the decoded code.

Also,
n is any one of 2 to 4.

  In the present invention, in sampling of the detection output in the receiving device of the track circuit, oversampling (sampling a plurality of times by dividing the symbol period) is performed on the symbol period to increase the number of times of code determination. It is possible to reduce the error oversight rate (probability of misjudging noise as having a signal) when receiving noise in a state. In particular, it is excellent in that it is not necessary to widen the transmission band and it is not necessary to extend the code length, and it is possible to reduce dangerous errors due to noise reception when there is no signal.

FIG. 1 is a diagram showing an outline of a test by normal sampling. FIG. 2 is a diagram showing an outline of the verification by oversampling. FIG. 3 is a diagram showing an outline of a test by oversampling for noise. FIG. 4 is a diagram regarding an error miss rate by normal sampling. FIG. 5 is a diagram regarding an error miss rate due to oversampling. FIG. 6 is a diagram regarding an error rate by normal sampling. FIG. 7 is a diagram regarding an error rate by oversampling. FIG. 8 is a diagram illustrating a configuration of a transmission device for a track circuit using a digital modulation method. FIG. 9 is a diagram illustrating a configuration of a receiving device for a track circuit using a digital modulation method. FIG. 10 is a diagram illustrating a configuration of a code determination unit according to the second embodiment.

  First, the outline of the receiving side test according to the present invention will be described. On the receiving side, a fixed determination value is provided for the detection output to determine the bit.

  In a state where normal train detection signals are transmitted and received, the transmission signal is switched in units of symbol periods on the transmission side, so that a change in the determination value on the reception side occurs at a timing for each unit of symbol periods. Become. On the other hand, when noise that is not related to the transmission signal is received, the determination value changes at an arbitrary timing. Focusing on this point, the accuracy of verification on the receiving side is improved.

  FIG. 1 is a diagram showing an outline of a test by normal sampling. In the case of original sampling, the code is determined every symbol period. As shown in FIG. 1, when the verification code is “010011” of 6 bits, one bit is sampled for each symbol period, and it is determined whether or not it sequentially matches one bit of the verification code. At this time, the verification code used on the reception side is set corresponding to the transmission code on the transmission side. The normal test code has the same code length as the transmission code and is the same code word as the transmission code. In addition, when a transmission code is a cyclic code and one code is repeated and continuously transmitted, a code word obtained by rotating the transmission code bit by bit is also included as a verification code. The reason why the rotated codeword is also compared as a verification code is to perform verification without specifying the start position as the codeword from the code string demodulated on the receiving side.

  FIG. 2 is a diagram showing an outline of the verification by oversampling. In the present invention, the symbol period is divided and sampling is performed a plurality of times (oversampling) to make the determination. In the case of oversampling, the bit determination cycle is set to 1 / n of the symbol cycle T, and the test code is set to a length n times that of a normal code. That is, n times of bit determination are performed during a period in which the conventional bit determination has been performed once. The verification code is a code word of n times length as a whole, in which each bit of the transmission code is repeated n times.

  FIG. 2 shows an example in which oversampling with n = 3 is performed. It shows that the code is compared three times by sampling three times within the symbol period corresponding to the original one bit. The test code in this example is “0001111000000111111” and a code word obtained by rotating the code one bit at a time.

  FIG. 3 is a diagram showing an outline of a test by oversampling for noise. When oversampling is performed on noise, bits are switched at an arbitrary position regardless of the symbol period. The polarity is not always switched at the (n times) + 1st bit, and the polarity is switched at other positions. In this example, the polarity is switched between the fifth bit and the eighth bit. Then, a mismatch between the test code and the fourth bit is detected.

  Thus, even if the noise signal matches the verification code as shown in FIG. 1 according to normal sampling, the difference from the verification code as shown in FIG. 3 appears according to oversampling. .

  In the present invention, it is possible to reduce the risk of missed dangerous errors when only noise is received. Until now, there was a technology to reduce the error rate of the judgment value by synchronizing, and a technology to reduce the error rate by increasing the sampling and performing averaging, etc., but actively increasing the number of sampling and no signal There was no technology that tried to distinguish between noise and signal.

  Next, a brief description will be given of how much the risky mistake miss can be reduced. FIG. 4 is a diagram regarding an error miss rate by normal sampling. Assume that m patterns of test codes to be compared by the receiving apparatus are provided for the x-bit transmission code transmitted from the transmitting apparatus. In this example, 6 patterns of verification codes are provided for 6-bit transmission codes. In a state where the transmission code “010011” is repeatedly transmitted, the code received and demodulated by the receiving device is “010011”, “100110”, “001101”, “011010”, “110100”, or “101001”. If it matches any of the verification codes, it is determined that there is a signal.

Here, when only noise is received in a state where the train detection signal whose transmission code is modulated is not transmitted, the probability that one bit matches the predetermined value of the test code due to the influence of noise is halved. In this case, the error miss rate is m (1/2) ^x . The missed error rate is the probability of erroneously determining that a signal is present due to noise received when no train detection signal is transmitted.

On the other hand, the error miss rate according to the present invention is as follows. FIG. 5 is a diagram regarding an error miss rate due to oversampling. For the x-bit transmission code transmitted from the transmission device, the test code to be compared by the reception device is n × x bits, and an m × n pattern is provided. In this example, 18 patterns of 18-bit verification codes are provided for 6-bit transmission codes. When the transmission code of “010011” is repeatedly transmitted and the code received and demodulated by the receiving device matches either “0001111000000111111” or a codeword obtained by rotating this bit by bit, the presence of a signal to decide. In this case, the missed error rate is mn (1/2) ^nx .

Conversely, the probability of erroneous determination in a state where a train detection signal is being transmitted will also be described. FIG. 6 is a diagram regarding an error rate by normal sampling. Let p << 1 be the probability that one bit in the signal is erroneously determined while the train detection signal is being transmitted. Regardless of the state in which the signal is transmitted, the probability (error rate) for determining that there is no signal is 1− (1−p) ^x ≈px.

On the other hand, the error rate according to the present invention is as follows. FIG. 7 is a diagram regarding an error rate by oversampling. Since the code length to be demodulated is n times, the probability of determining that there is no signal (error rate) is (1− (1−p) ^nx ) ≈npx.

  As described above, the error missing rate without a signal decreases exponentially as n is increased. On the other hand, the increase of the error rate in the signal presence state is about n times. Therefore, it can be said that the missed error due to noise can be reduced without significantly impairing the error rate.

In practice, since the bit error rate increases when oversampling is performed, it is unrealistic to unnecessarily increase n, which is unrealistic. However, if x is 10 or more ((1 / 2) ¹⁰ = 1/1024), and even if n is about 2 to 3, there is an effect of sufficiently reducing the risky error miss.

  Next, the configuration of the track circuit device (transmitting device and receiving device connected to the track circuit) according to the present invention will be described. FIG. 8 is a diagram illustrating a configuration of a transmission device for a track circuit using a digital modulation method. In this example, the PSK modulation method (phase shift keying method) is used, but the present invention can also be applied to other modulation methods such as the MSK modulation method (minimum shift modulation method).

  The oscillator 101 generates a carrier wave. It is often a low frequency of about 30 to 100 Hz. For example, a commercial frequency of 50/60 Hz or a half of 25/30 Hz is used.

  The transmission code for specifying the train detection signal is a code word consisting of an x-bit logical value (0/1), and is stored in advance in the transmission code storage unit 102.

  The polarity switching unit 103 circulates from the transmission code storage unit 102 sequentially for each symbol period T and sequentially reads bits (logical values). If the bit value is 0, the polarity is the same phase, and the bit value is 1. If so, the polarity is reversed to the opposite phase. That is, phase modulation is performed. As a result, a modulation signal is generated. The modulation signal is transmitted to the rails constituting the track circuit.

  FIG. 9 is a diagram illustrating a configuration of a receiving device for a track circuit using a digital modulation method. In this example, the PSK modulation method (phase shift keying method) is used, but the present invention can also be applied to other modulation methods such as the MSK modulation method (minimum shift modulation method).

  The receiving device receives a transmission signal from a rail constituting the track circuit, passes it through a BPF (band pass filter) 201, divides the signal after passing through a level determination unit 202 and a code determination unit 203, and performs level determination processing. A code determination process is performed.

  The level determination unit 202 determines a signal level (voltage level). The full wave rectifier 221 rectifies the BPF output and passes it through an LPF (low pass filter) 222. The level comparison unit 223 determines the level of the signal level by comparison with a threshold value. When the signal level is higher than the threshold value, it is determined that the signal level is high, and when the signal level is low, it is determined that the signal level is low.

  On the other hand, in the code determination unit 203, a multiplier 232 multiplies the signal obtained by delaying the output signal of the BPF 201 by the symbol circuit T by the delay circuit 231 and the output signal of the BPF 201. As a result, a signal that is positive if it has the same phase as the signal one symbol period before and negative if it has the opposite phase is generated. By passing this multiplied signal through an LPF (low-pass filter) 233, a detection output (demodulated signal) is obtained. The bit determination unit 234 samples the detection output at a cycle of 1 / n of the symbol cycle T, determines 0 if positive, and determines 1 if negative. As a result, a bit determination output (demodulation code) having a logical value (0/1) is obtained. The verification unit 235 performs verification by comparing the bit determination output (demodulation code) with the verification code, and determines that the code matches if it matches the verification code, and determines that the code does not match if it does not match the verification code.

  The test code is an n-fold codeword obtained by repeating each bit of the transmission code n times as described above, and a codeword obtained by sequentially rotating the code bit by bit. All these verification codes are compared, and if they match any of the verification codes, it is determined that the codes match. The plurality of test codes are stored in advance in the test code storage unit 236 and sequentially read out. Alternatively, based on the verification code (corresponding to the transmission code) stored in the verification code storage unit 236, the verification unit rotates one bit at a time to generate another verification code (corresponding to the rotated code group). You can also.

  The standing line determination unit 204 determines the standing line state based on the level determination result and the sign determination result. When the level determination result is a high signal level and the code determination result is a code match, it is determined that there is a signal. Having a signal is synonymous with having no train.

  On the other hand, if the level determination result is a low signal level, or if the code determination result does not match the code, it is determined that there is no signal. No signal is synonymous with troubles such as train presence or rail breakage.

Embodiment 2. FIG.
In the above-described embodiment, the n-times test code is stored in the test code storage unit. However, an n-times test code can be generated by the receiving apparatus.

  FIG. 10 is a diagram illustrating a configuration of a code determination unit according to the second embodiment. The transmission code storage unit 237 stores the same code as the transmission code used in the transmission apparatus. The code conversion unit 238 then repeats each bit of the transmission code n times to generate an n-fold test code. In addition, another test code rotated for each bit is also generated.

  According to the present invention, it is possible to reduce the risk-side error when the track circuit is dropped without extending the determination time. In addition, it is possible to reduce the risk-side error without greatly impairing the error rate during normal times.

  The integer n is effective at 2 or more. For example, it may be any one of 2 to 4.

201 BPF (band pass filter)
202 level determination unit 203 code determination unit 204 standing line determination unit 221 full wave rectifier 222 LPF (low pass filter)
223 Level comparison unit 231 Delay circuit 232 Multiplier 233 LPF (low pass filter)
234 bit determination unit 235 verification unit 236 verification code storage unit 237 transmission code 238 code conversion unit

Claims (4)

A transmission device connected to the track circuit, digitally modulating a predetermined transmission code at a predetermined symbol period, and transmitting a modulated signal;
N, which is connected to a track circuit, receives a modulated signal, obtains a demodulated code sampled at a period of 1 / n (integer) of the symbol period by digital demodulation, and repeats each bit included in the transmitted code n times An orbital circuit device comprising: a receiving device that determines whether a double-length code and a demodulated code are compatible, and determines that there is a signal when they match.   The receiving apparatus determines the signal level of the received modulated signal, and determines that the signal is present on the condition that the n-fold code and the demodulated code have a predetermined signal level in addition to the matching. The track circuit device according to claim 1.   The receiving apparatus determines that the n-fold code and the decoded code are suitable when the decoded code matches either the n-fold code or the test code obtained by rotating each bit of the n-fold code. Item 3. The track circuit device according to Item 1 or 2.   5. The track circuit device according to claim 1, wherein n is any one of 2 to 4.

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