JP5263067B2 - Inverter failure detection device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To accurately detect open failure of a semiconductor switching element for power which constitutes an inverter for driving an AC motor that is controlled by switching two or more control modes, even when its control mode is frequently switched, within a short interval. <P>SOLUTION: A controller gets a filter current value regarding each phase which is obtained by low-pass filtering of phase currents, separately for each control mode (S120). When the absolute value of the filter current value exceeds a determined value, open failure of the switching element of a relevant phase is detected (S200). With respect to switching of the control mode, the filter current value is kept, when a mode other than the target control mode is selected (S160); and at switching to the target control mode, offset modification is carried out on the filter current value so as to prevent misdetection of the open failure (S140). <P>COPYRIGHT: (C)2011,JPO&amp;INPIT

Description

  The present invention relates to a failure detection device for an inverter, and more particularly to detection of an open failure in a power semiconductor switching element constituting the inverter.

  Various types of failure detection have been proposed for power semiconductor switching elements (hereinafter also simply referred to as “switching elements”) that constitute an inverter that drives and controls an AC motor. For example, Japanese Patent Laying-Open No. 2005-094773 (Patent Document 1) integrates current for each phase of an inverter, and an open failure (failure that remains off) according to an integrated value during two motor rotation cycles. A configuration for detecting the error is described. Specifically, it is described that when the integrated value is positive (greater than 0), the failure of the upper switching element, when it is negative, the failure of the lower switching element, and when it is 0, it is determined as normal. ing.

  In addition, as another example of a detection method for an open circuit fault of an inverter, Japanese Patent Laid-Open No. 2002-136147 (Patent Document 2) diagnoses an open circuit fault by measuring a current flowing through a shunt resistor connected to the inverter. It is described. In Japanese Patent Laid-Open No. 2006-320176 (Patent Document 3), a voltage dividing resistor is installed between DC terminals of an inverter, and a connection point between the voltage dividing resistors is connected to an arbitrary AC terminal to form a diagnostic point. In addition, it is described that short-circuit faults (failures that remain on) and open-circuit faults are detected by comparing the potential at this diagnostic point with a reference value made from the voltage of the smoothing capacitor.

Japanese Patent Laying-Open No. 2005-094773 JP 2002-136147 A JP 2006-320176 A

  In the control of an AC motor, a plurality of control modes such as pulse width modulation control (PWM) control and rectangular wave voltage control are switched according to the operating state of the AC motor. In such a case, the current behavior changes for each control mode. Therefore, for the detection of an open fault based on the integral value of each phase current as described above or the filter current value processed by the low-pass filter, the current integral is used. It is preferable to obtain a value or a filter current value for each control mode.

  However, when the control mode is frequently switched within a short time, the control mode may be switched before the electrical cycle of the AC motor, that is, one cycle of the phase current has not elapsed. In this case, in the configuration of Patent Document 1 in which an open fault is performed based on the fact that the phase current integral value of one cycle is 0 when normal, there is a possibility that the open fault cannot be accurately detected.

  Also, Patent Documents 2 and 3 do not describe a method for detecting an open failure corresponding to a case where the control mode is frequently switched within a short time.

  The present invention has been made to solve such problems, and an object of the present invention is to provide a power semiconductor that constitutes an inverter that drives an AC motor controlled by switching a plurality of control modes. An open failure of the switching element is accurately detected even when the control mode is frequently switched within a short time.

  An inverter failure detection device according to the present invention is a failure detection device for a multi-phase inverter for controlling an AC motor, and includes a current detection means for detecting a current of each phase of the inverter, and an operating state of the AC motor. A mode selection means for selecting one of a plurality of control modes in accordance with the low-pass filter processing of each phase current detected by the current detection means, so that the filter current value of each phase separately for each control mode And a failure detection means for detecting an open failure of the switching element of the corresponding phase of the inverter when the filter current value calculated by the filter processing unit exceeds a predetermined determination value When the control mode is switched, the absolute value of the filter current value of each phase corresponding to the control mode after switching is a predetermined range. And a correction means for correcting to decrease within.

  Preferably, the correcting means decreases the absolute value by the maximum offset value when the absolute value of the filter current value is larger than the maximum offset value corresponding to the integral value of the half cycle for the maximum rated current of each phase current. On the other hand, when the filter current value is corrected so that the absolute value of the filter current value is less than or equal to the maximum offset value, the filter current value is set to zero.

  In this way, when the control mode is switched before one electric cycle of the AC motor has elapsed, the filter current value (substantially equivalent to the current integral value) is obtained even if no open failure has occurred. In response to the occurrence of an offset without becoming zero, the offset value of the initial value of the current filter value can be corrected every time the control mode is switched. For this reason, even when the control mode is frequently switched within a short time, it is possible to prevent erroneous detection of an open failure due to a continuous increase in the filter current value. In particular, compared to the case where the filter current value is cleared to zero each time the control mode is switched, the possibility of missing an open failure is reduced.

  More preferably, the maximum offset value is variably set according to the rotational speed of the AC motor so that the maximum offset value becomes smaller as the rotational speed of the AC motor increases.

  If it does in this way, it will become possible to detect an open failure of a switching element appropriately corresponding to having calculated a filter current value by low pass filter processing.

  Further preferably, the current detection means includes a current sensor arranged in each phase except for a predetermined one phase among the plurality of phases, and a current calculation means for calculating a predetermined one-phase current from the output of the current sensor. . The filter processing means calculates the filter current value based on the value calculated by the current calculation means in a predetermined one phase, while the filter current value is calculated based on the detection value of the current sensor in each phase except the predetermined one phase. Is calculated. Further, the determination value for the predetermined one phase is set larger than the determination value for each phase except for the predetermined one phase.

  In this way, it is possible to accurately detect an open failure of the power switching element even in a configuration in which the arrangement of the current sensor is omitted for a predetermined phase without providing a current sensor for each phase.

  According to this invention, even when the control mode is frequently switched within a short time, an open failure of the power semiconductor switching element that constitutes the inverter that drives the AC motor controlled by switching the plurality of control modes. It can be detected accurately.

It is a block diagram which shows the structural example of the motor drive system with which the failure detection apparatus of the inverter according to this Embodiment is applied. It is a figure which illustrates schematically the control mode of the AC motor in the motor drive system shown in FIG. 3 is a flowchart illustrating a control mode selection method shown in FIG. 2. It is a wave form diagram which shows the behavior of the phase current and filter current at the time of normal. It is a wave form diagram which shows the behavior of the phase current and filter current at the time of open fault occurrence. It is a wave form diagram explaining the problem of the open circuit fault detection at the time of setting a filter electric current value (current integral value) for every control mode. It is a wave form diagram which shows the behavior of the phase current and filter current in the failure detection apparatus of the inverter by this Embodiment. It is a schematic block diagram which shows the control structure of the failure detection of the inverter by this Embodiment. It is a graph explaining the setting of the phase current and filter current for every control mode. It is a flowchart explaining a series of control processing in the failure detection of the inverter by this Embodiment. It is a flowchart explaining the detail of the offset correction process shown in FIG.

Embodiments of the present invention will be described below in detail with reference to the drawings. In addition, the same code | symbol is attached | subjected to the same or equivalent part in the following figures, and the description shall not be repeated in principle.
(General configuration of motor control)
FIG. 1 is a block diagram showing a configuration example of a motor drive system to which an inverter failure detection apparatus according to the present embodiment is applied.

FIG. 1 is an overall configuration diagram of a motor drive system according to an embodiment of the present invention.
Referring to FIG. 1, motor drive system 100 includes a DC voltage generation unit 10 #, a smoothing capacitor C0, an inverter 14, an AC motor M1, and a control device 30.

  For example, AC motor M1 generates torque for driving the driving wheels of an electric vehicle (referred to as a vehicle that generates vehicle driving force by electric energy such as a hybrid vehicle, an electric vehicle, and a fuel cell vehicle). This is an electric motor for driving. Alternatively, AC motor M1 may be configured to have a function of a generator driven by an engine, or may be configured to have both functions of an electric motor and a generator. Furthermore, AC motor M1 may operate as an electric motor for the engine, and may be incorporated in a hybrid vehicle so that the engine can be started, for example.

  DC voltage generation unit 10 # includes a DC power supply B, system relays SR1 and SR2, a smoothing capacitor C1, and a converter 12.

  The DC power supply B is typically constituted by a secondary battery such as nickel metal hydride or lithium ion, or a power storage device such as an electric double layer capacitor. The DC voltage Vb output from the DC power supply B and the input / output DC current Ib are detected by the voltage sensor 10 and the current sensor 11, respectively.

  System relay SR1 is connected between the positive terminal of DC power supply B and power line 6, and system relay SR2 is connected between the negative terminal of DC power supply B and ground line 5. System relays SR1 and SR2 are turned on / off by signal SE from control device 30.

  Converter 12 includes a reactor L1, power semiconductor switching elements Q1, Q2, and diodes D1, D2. Power semiconductor switching elements Q 1 and Q 2 are connected in series between power line 7 and ground line 5. On / off of power semiconductor switching elements Q 1 and Q 2 is controlled by switching control signals S 1 and S 2 from control device 30.

In the embodiment of the present invention, as a power semiconductor switching element (hereinafter, simply referred to as “switching element”), an IGBT (Insulated Gate Bipolar Transistor),
A power MOS (Metal Oxide Semiconductor) transistor, a power bipolar transistor, or the like can be used. Anti-parallel diodes D1, D2 are arranged for switching elements Q1, Q2. Reactor L1 is connected between a connection node of switching elements Q1 and Q2 and power line 6. Further, the smoothing capacitor C 0 is connected between the power line 7 and the ground line 5.

  Inverter 14 includes a U-phase upper and lower arm 15, a V-phase upper and lower arm 16, and a W-phase upper and lower arm 17 provided in parallel between power line 7 and ground line 5. Each phase upper and lower arm is constituted by a switching element connected in series between the power line 7 and the ground line 5. For example, the U-phase upper and lower arms 15 are composed of switching elements Q3 and Q4, the V-phase upper and lower arms 16 are composed of switching elements Q5 and Q6, and the W-phase upper and lower arms 17 are composed of switching elements Q7 and Q8. Further, antiparallel diodes D3 to D8 are connected to switching elements Q3 to Q8, respectively. Switching elements Q3 to Q8 are turned on / off by switching control signals S3 to S8 from control device 30.

  Typically, AC motor M1 is a three-phase permanent magnet type synchronous motor, and one end of three U, V, and W phase coils is commonly connected to a neutral point. Furthermore, the other end of each phase coil is connected to the midpoint of the switching elements of the upper and lower arms 15 to 17 of each phase.

  During the boosting operation, the converter 12 converts the DC voltage VH obtained by boosting the DC voltage Vb supplied from the DC power supply B (this DC voltage corresponding to the input voltage to the inverter 14 is hereinafter also referred to as “system voltage”) to the inverter 14. To supply. More specifically, in response to switching control signals S1 and S2 from controller 30, switching element Q1 is turned on and switching element Q2 is turned on (or both switching elements Q1 and Q2 are turned off). ) Are alternately provided, and the step-up ratio is in accordance with the ratio of these ON periods. Alternatively, if switching elements Q1 and Q2 are fixed to ON and OFF, respectively, VH = Vb (step-up ratio = 1.0) can be obtained.

  In the step-down operation, converter 12 steps down DC voltage VH (system voltage) supplied from inverter 14 through smoothing capacitor C0 and charges DC power supply B. More specifically, in response to switching control signals S1 and S2 from control device 30, only switching element Q1 is turned on and both switching elements Q1 and Q2 are turned off (or Q2 of the switching element). Of the ON period) are alternately provided, and the step-down ratio is in accordance with the duty ratio of the ON period.

  Smoothing capacitor C 0 smoothes the DC voltage from converter 12 and supplies the smoothed DC voltage to inverter 14. The voltage sensor 13 detects the voltage across the smoothing capacitor C 0, that is, the system voltage VH, and outputs the detected value to the control device 30.

  When the torque command value of AC motor M1 is positive (Trqcom> 0), inverter 14 is switched in response to switching control signals S3 to S8 from control device 30 when a DC voltage is supplied from smoothing capacitor C0. The AC motor M1 is driven so as to convert a DC voltage into an AC voltage and output a positive torque by the switching operation of the elements Q3 to Q8. Further, when the torque command value of AC motor M1 is 0 (Trqcom = 0), inverter 14 converts the DC voltage to the AC voltage by the switching operation in response to switching control signals S3 to S8, and the torque is 0. The AC motor M1 is driven so that Thereby, AC motor M1 is driven to generate 0 or positive torque designated by torque command value Trqcom.

  Further, during regenerative braking of an electric vehicle equipped with motor drive system 100, torque command value Trqcom of AC motor M1 is set to be negative (Trqcom <0). In this case, the inverter 14 converts the AC voltage generated by the AC motor M1 into a DC voltage by a switching operation in response to the switching control signals S3 to S8, and converts the converted DC voltage (system voltage) to the smoothing capacitor C0. To the converter 12 via The regenerative braking here refers to braking with regenerative power generation when the driver operating the electric vehicle performs a footbrake operation, or regenerative braking by turning off the accelerator pedal while driving, although the footbrake is not operated. This includes decelerating (or stopping acceleration) the vehicle while generating electricity.

  Current sensor 24 detects a motor current (phase current) flowing through AC motor M <b> 1 and outputs the detected value to control device 30. Since the sum of instantaneous values of the three-phase currents Iu, Iv, and Iw is 0, the current sensor 24 has two phases of motor current (for example, V-phase current Iv and W-phase current Iw) as shown in FIG. It is sufficient to arrange it so as to detect. Or it is also possible to arrange | position the current sensor 24 to each phase.

  The rotation angle sensor (resolver) 25 detects the rotor rotation angle θ of the AC motor M1, and sends the detected rotation angle θ to the control device 30. The control device 30 can calculate the rotational speed (rotational speed) Nmt and the angular speed ω (rad / s) of the AC motor M1 based on the rotational angle θ. Note that the rotation angle sensor 25 may be omitted by directly calculating the rotation angle θ from the motor voltage or current by the control device 30.

The control device 30 includes a CPU (Central Processing Unit) (not shown) and an electronic control unit having a built-in memory, and performs arithmetic processing using detection values from each sensor based on a map and a program stored in the memory. Configured as follows. Alternatively, at least a part of the ECU 80 may be configured to execute predetermined numerical / logical operation processing by hardware such as an electronic circuit.
(Description of control mode)
Control of AC motor M1 by control device 30 will be described in further detail.

  FIG. 2 is a diagram schematically illustrating a control mode of AC motor M1 in motor drive system 100 according to the embodiment of the present invention.

  As shown in FIG. 2, in motor drive system 100 according to the embodiment of the present invention, three control modes are switched and used for control of AC motor M <b> 1, that is, power conversion in inverter 14.

  The sine wave PWM control is used as a general PWM control, and controls on / off of each phase upper and lower arm elements according to a voltage comparison between a sine wave voltage command and a carrier wave (typically a triangular wave). . As a result, for a set of a high level period corresponding to the on period of the upper arm element and a low level period corresponding to the on period of the lower arm element, the duty is set so that the fundamental wave component becomes a sine wave within a certain period. Is controlled. As is well known, in the sine wave PWM control in which the amplitude of the sinusoidal voltage command is limited to a range below the carrier wave amplitude, the fundamental wave of the applied voltage to the AC motor M1 (hereinafter also simply referred to as “motor applied voltage”). The component can only be increased to about 0.61 times the DC link voltage of the inverter. Hereinafter, in this specification, the ratio of the fundamental component (effective value) of the motor applied voltage (line voltage) to the DC link voltage of the inverter 14 (that is, the system voltage VH) is also referred to as “modulation rate”.

  On the other hand, in the rectangular wave voltage control, one pulse of a rectangular wave having a ratio of 1: 1 between the high level period and the low level period is applied to the AC motor M1 within the predetermined period. As a result, the modulation rate is increased to 0.78.

  The overmodulation PWM control performs PWM control similar to the sine wave PWM control in a range where the amplitude of the voltage command (sine wave component) is larger than the carrier wave amplitude. In particular, the fundamental wave component can be increased by distorting the voltage command from the original sine wave waveform (amplitude correction), and the modulation rate is increased from the maximum modulation rate in the sine wave PWM control mode to a range of 0.78. Can do. In overmodulation PWM control, since the amplitude of the voltage command (sine wave component) is larger than the carrier wave amplitude, the line voltage applied to AC motor M1 is not a sine wave but a distorted voltage.

  In the AC motor M1, the induced voltage increases as the rotational speed and output torque increase, so that the required drive voltage (motor required voltage) increases. The boosted voltage by the converter 12, that is, the system voltage VH needs to be set higher than the required voltage of the motor. On the other hand, there is a limit value (VH maximum voltage) in the boosted voltage by converter 12, that is, system voltage VH.

  Therefore, a PWM control mode by sine wave PWM control or overmodulation PWM control that controls the amplitude and phase of the motor applied voltage (AC) by feedback of motor current according to the operating state of AC motor M1, and rectangular wave voltage One of the control modes is selectively applied. In the rectangular wave voltage control, since the amplitude of the motor applied voltage is fixed, the torque control is executed by the phase control of the rectangular wave voltage pulse based on the deviation between the actual torque value and the torque command value.

FIG. 3 is a flowchart illustrating a control mode selection method.
As shown in the flowchart of FIG. 3, upon receiving a torque command value Trqcom of AC motor M <b> 1 (step S <b> 100) calculated by a host ECU (not shown) based on a required vehicle output according to the accelerator opening, etc., control device 30. Calculates the required motor voltage (induced voltage) from the torque command value Trqcom and the rotational speed of AC motor M1 based on a preset map or the like (step S110), and further calculates the maximum required motor voltage and system voltage VH. In accordance with the relationship with the value (VH maximum value), it is determined whether to perform motor control by applying either the rectangular wave voltage control mode or the PWM control mode (step S120). Basically, the control mode is selected so that the modulation factor corresponding to the voltage command value can be realized. Even in the PWM control mode, one of sine wave PWM control and overmodulation PWM control is selected according to the modulation rate. According to the control flow, an appropriate control mode is applied from among the plurality of control modes shown in FIG. 2 according to the operating conditions of AC motor M1.

  Next, a method for detecting an open failure of switching elements Q3 to Q8 based on the motor current of each phase (hereinafter also simply referred to as phase current) supplied from inverter 14 to AC motor M1 will be described.

  Hereinafter, as an example, detection of an open failure of switching elements Q7 (upper arm) and Q8 (lower arm) in the W phase will be described.

FIG. 4 shows a waveform of a W-phase current (W-phase current) Iw in a normal state.
At normal time, the W-phase current Iw is a sinusoidal current having a cycle corresponding to the electrical cycle of AC motor M1. Therefore, the filter current value Iwf obtained by low-pass filtering the W-phase current Iw returns to 0 during one cycle of the motor current. As a result, the filter current value Iwf does not continuously increase, and | Iwf | <Ijd is maintained with respect to the determination value IJD for detecting an open failure.

  On the other hand, FIG. 5 shows a waveform when an open failure occurs in the switching element Q8 of the lower arm.

  Referring to FIG. 5, when an open failure occurs in the lower arm, only a positive current flows in W-phase current Iw, and originally Iw = 0 during a period in which a negative current flows.

  As a result, the filter current value Iwf subjected to the low-pass filter process gradually increases without returning to 0 even when one period of current elapses. As a result, when a plurality of cycles elapses, the filter current value Iwf reaches the determination value IJD, thereby detecting that an open failure has occurred in the W phase. Furthermore, since Iwf> 0, it can be specified that an open failure has occurred in the lower arm element.

  Although illustration is omitted, when an open failure occurs in the upper arm element, the polarity is opposite to that in FIG. 5, and the W-phase current Iw flows only in the negative direction. As a result, the absolute value of the filter current value Iwf increases in the negative direction. When | Iwf |> Ijd is satisfied, it can be detected that an open circuit failure has occurred in the W phase. Furthermore, since Iwf <0, it can be specified that an open failure has occurred in the upper arm element.

  Here, in the motor drive system shown in FIG. 1, a plurality of control modes are selectively applied as described with reference to FIGS. Since the current behavior, in particular, the superposition degree of the high frequency component to the phase current differs between the control modes, it is based on the filter value of the phase current corresponding to the integration process as described in FIGS. Open fault detection is also preferably performed separately for each control mode. In other words, the filter current value and the determination value can be individually detected for each control mode, so that the open failure of the switching element can be detected more accurately.

  In the present embodiment, the filter current value and the determination value are separately set for each of the sine wave PWM control time (hereinafter referred to as PWM mode) and the rectangular wave voltage control time (hereinafter referred to as rectangular wave mode). An open fault shall be detected. Note that overmodulation PWM control is basically selected at the time of transition to the control mode between sine wave PWM control and rectangular wave voltage control. Shall not.

  FIG. 6 shows a problem of open fault detection when a filter current value (current integrated value) is set for each control mode.

  In particular, FIG. 6 illustrates a case where the control mode is switched for each electrical half cycle of AC motor M1 as a case where the amount of offset remaining in the filter current value is maximized. This offset amount is generated by switching the control mode in the middle of one cycle even if no short-circuit failure has occurred, and causes an open-circuit failure erroneous detection as described below.

  In FIG. 6, it is understood that the W-phase current Iw has a normal waveform, and no open-circuit failure has occurred in the W-phase. For this reason, when the PWM mode is continued through one cycle of the phase current, the open circuit failure is not detected by the filter current value Iwf returning to 0.

  However, after the time t1, when the control mode is switched between the PWM mode and the rectangular wave every half cycle of the phase current, from the time t1 at which the control mode is switched to the rectangular wave mode to the time t2 at which the PWM mode is restored again. During this period, the filter current value Iwf is held at the value immediately before switching (the value at time t1). Then, the filter current value Iwf is updated again from time t2. In other words, this is equivalent to restarting the integration of the current value.

  As shown in FIG. 6, assuming the worst case for false detection, the control mode is the rectangular wave mode and the opposite polarity for a specific phase period of the phase current (period in which the phase current is negative in FIG. 6). In this period (in FIG. 6, the period in which the phase current is positive), the control mode is the PWM mode. In this case, the filter current value Iwf in the PWM mode is not updated in the negative direction, and thus continuously increases as time elapses. As a result, the open failure of the W phase (lower arm) is erroneously detected when | Iwf | reaches IJD even though no open failure actually occurs.

  As shown in FIG. 6, in the case where the control mode is switched every half cycle in synchronization with the polarity of the phase current, the offset left in the filter current value that should be 0 for the normal phase current is maximized. That is, the maximum value of the offset (hereinafter referred to as the maximum offset amount) corresponds to a filter current value (or a half-cycle current integrated value) at the time when the half cycle has elapsed when the phase current is the maximum rated current. It will be.

  In the inverter failure detection according to the present embodiment, the erroneous detection of the open failure can be prevented by correcting the filter current value within the range of the maximum offset amount every time the control mode is switched.

  Referring to FIG. 7, the PWM mode is selected until time t1, and during the period from time t1 to t2, a rectangular wave mode for a period corresponding to a half cycle of the phase current is selected as in the case of FIG. After time t2, the PWM control mode is selected again.

  Therefore, during the time t1 to t2, the filter current value Iwf is held at the value at the time t1 as in FIG. At time t2, when the update of the filter current value in the PWM mode is resumed, the filter current value Iwf is corrected within the range of the offset correction amount Icr determined corresponding to the maximum offset amount.

  As a result, at normal time when no short-circuit failure has occurred, even if an offset corresponding to a half cycle of the phase current occurs at time t1, the filter is corrected by correcting the offset when the PWM mode is restarted from time t2. The current value Iwf is returned again to the vicinity of 0. As a result, if the subsequent phase current is normal, the filter current value Iwf does not rise continuously and reach the determination value IJD. That is, erroneous detection can be prevented. As in FIG. 6, even if the rectangular wave mode is selected between times t3 and t4, the filter current value Iwf becomes 0 at time t4 when the PWM mode is resumed by offset correction similar to that at time t2. Since it is returned to the vicinity, it is understood that no false detection occurs.

  On the other hand, at the time of an abnormality in which an open failure has occurred, even if the offset is corrected at the time t2 as in the normal state, the filter current value Iwf continuously increases again, and eventually the open failure occurs. Can be detected.

  FIG. 8 is a schematic block diagram showing a control configuration of inverter failure detection according to the present embodiment. Each functional block shown in FIG. 8 may be configured by a circuit (hardware) having a function corresponding to the block, or the control device 30 executes software processing according to a preset program. May be realized. Further, FIG. 8 illustrates a configuration for detecting an open fault for one phase (W phase), but it is confirmed that a similar configuration is provided for each phase, that is, the U phase and the V phase. Describe.

  Referring to FIG. 8, inverter failure detection apparatus 101 according to the embodiment of the present invention includes a filter processing unit 110, an offset correction unit 120, a determination value setting unit 130, and a detection unit 140.

  The filter processing unit 110 filters the W-phase current Iw detected by the current sensor 24 according to the following equation (1). That is, the filter processing unit 110 calculates the filter current value Iwf by subjecting the current detection value Iw to low-pass filter processing.

Iwf = {Iw−Iwf (0)} · fa + Iwf (0) (1)
In the equation (1), Iwf (0) indicates the previous value of the filter current value Iwf. The smoothing coefficient fa is a value in the range of 0 to 1.0. The closer the fa is to 0, the larger the time constant of the filter, and the closer the fa is to 1.0, the smaller the time constant of the filter. That is, the smoothing coefficient fa is determined according to the time constant that the filter processing unit 110 should have. It is preferable that the time constant of the low-pass filter processing is basically set to be equivalent to that obtained by the filter processing unit 110 to obtain the current integral value of the W-phase current Iw.

  In addition, as shown in FIG. 1, the current sensor 24 is not necessarily provided in each phase. That is, the current sensor 24 is disposed only in each of the two phases excluding a predetermined one of the three phases, and the remaining one phase is obtained by calculation because the sum of instantaneous current values of the respective phases is 0. You can also For example, in the configuration of FIG. 1, the U-phase current Iu can also be obtained according to the following equation (2).

Iu = − (Iv + Iw) (2)
In the U phase, the filter processing unit 110 calculates a filter current value (Iuf) based on the phase current Iu calculated by the equation (2). As described above, the open fault detection shown in FIG. 8 can be commonly applied to both the phase in which the current sensor 24 is arranged and the non-arranged phase. However, if the phase current is obtained by calculation, there is a concern about erroneous detection due to the influence of errors. Therefore, for each control mode, it is preferable to increase the determination value in the non-arranged phase as compared with the determination value in the phase where the current sensor 24 is disposed.

  The filter processing unit 110 receives the control signal CMD from the control mode selection unit 35. The control mode selection unit 35 selects one of the plurality of control modes shown in FIG. 2 according to the operation state of the AC motor M1 in accordance with the control process shown in the flowchart of FIG. The control signal CMD indicates the control mode selected by the control mode selection unit 35.

  Determination value setting unit 130 sets a determination value corresponding to the selected control mode according to control signal CMD, and outputs the determination value to detection unit 140.

  Referring to FIG. 10, filter processing section 110 sets the filter current value for each phase for each control mode. For example, filter current values Iuf (1), Ivf (1), and Iws (1) are set for each of the U phase to the W phase in correspondence with the PWM mode. Corresponding to the rectangular wave mode, the filter current values Iuf (2), Ivf are separated from the filter current values Iuf (1), Ivf (1), Iws (1) for each of the U phase to the W phase. (2), Iws (2) is set.

  As described above, during the PWM mode selection, the filter processing unit 110 sequentially updates the filter current values Iuf (1), Ivf (1), Iwf (1) according to the equation (1), while the filter current value Iuf (2), Ivf (2), and Iwf (2) are retained. On the other hand, during the rectangular wave mode selection, the filter processing unit 110 sequentially updates the filter current values Iuf (2), Ivf (2), and Iwf (2) according to the equation (1), while the filter current value Iuf. (1), Ivf (1), Iwf (1) are retained.

  Further, the determination value IJD is preferably set for each control mode. For example, when the PWM mode is applied, the filter current values Iuf (1), Ivf (1), Iwf (1) are compared with the determination value IJD (1), while when the rectangular wave mode is selected, the filter current value Iuf (2). , Ivf (2), Iwf (2) are compared with the determination value IJD (2).

  Referring to FIG. 8 again, offset correcting unit 120 detects the switching of the control mode based on control signal CMD, and at the time of switching the control mode, the initial value of the filter current value corresponding to the control mode after the switching. The value is offset corrected as shown in FIG.

The offset correction amount Icr at this time is obtained according to the following equation (3).
Icr = Ifmax · Nn # / Nm (3)
In the equation (3), Ifmax corresponds to the maximum offset amount when the rotational speed of AC motor M1 is reference speed Nn #. This maximum offset amount corresponds to the filter current value Iwf when the half cycle has elapsed when the phase current is the maximum rated current.

  In view of the fact that the low-pass filter processing is performed by the filter processing unit 110, when the rotational speed of the AC motor M1 is high, the offset amount with respect to the phase current of the same amplitude is also small, so the offset correction amount Icr needs to be small. Therefore, as shown in the equation (3), the offset correction amount Icr is variably set according to the motor rotation speed so as to decrease as the motor rotation speed increases. That is, the offset correction amount Icr corresponds to a “maximum offset value” generated in the filter current value when the control mode is switched in the middle of one current cycle, which is set in consideration of the motor rotation speed.

  As described above, the offset correction unit 120 corrects the filter current value Iwf of the control mode to be resumed by the offset correction amount Icr when switching the control mode. The filter current value Iwf calculated by the filter processing unit 110 is output to the detection unit 140 as it is at other timings, that is, when the control mode is not switched.

  The detection unit 140 compares the filter current value Iwf thus determined with the determination value IJD set by the determination value setting unit 130, and opens when the absolute value of the filter current value Iwf becomes larger than the determination value IJD. A failure is detected and the detection flag FDG is turned on. When the detection flag FDG is turned on, an inverter protection process corresponding to an open failure is executed.

  FIG. 10 is a flowchart for explaining a series of control processes in the failure detection of the inverter according to the present embodiment. Each step of the flowchart shown below is basically realized by software processing by the control device 30, but may be realized by hardware processing.

  FIG. 10 shows a control process for detecting an open fault based on the calculation of the filter current value Iwf in the W-phase PWM mode. A similar control process corresponds to each phase current for each control mode. Is provided.

  Referring to FIG. 10, control device 30 acquires phase current Iw in step S <b> 100. As described above, the phase current Iw may be a detected value of the current sensor 24, or may be a calculated value obtained from a detected value of the current sensor 24 of another phase.

  Furthermore, in step S110, the control device 30 determines whether or not the current control mode is the target control mode. In the example of FIG. 10, the control device 30 determines whether or not the PWM mode is based on the control signal CMD (FIG. 9). Determined.

  When the current control mode is other than the PWM mode (when YES is determined in S110), control device 30 holds filter current value Iwf (1) at the current value in step S160.

  On the other hand, when the current control mode is the target control mode (when YES is determined in S110), the control device 30 determines whether or not it is the control mode switching time point, that is, the resumption timing of the control mode, in step S120. judge. When it is the control mode switching timing (when YES is determined in S120), control device 30 proceeds to step S140 to correct the offset of filter current value Iwf (1) held so far.

FIG. 11 shows details of the offset correction processing in step S140 of FIG.
Referring to FIG. 11, in step S141, control device 30 acquires current motor rotation speed Nm of AC motor M1. In step S142, control device 30 determines offset correction amount Icr according to the above-described equation (3) in accordance with the obtained motor rotation speed Nm.

  Further, in step S143, control device 30 determines whether or not the absolute value of filter current value Iwf (1) held until the control mode switching time is equal to or smaller than offset correction amount Icr set in step S142. . When | Iwf (1) | ≦ Icr (when YES is determined in S143), control device 30 proceeds to step S145 to set Iwf (1) = 0. As a result, a current offset smaller than the offset correction amount Icr obtained corresponding to the maximum offset amount is cleared when the target control mode is resumed.

  When | Iwf (1) |> Icr (NO determination in S143), control device 30 determines the polarity of retained filter current value Iwf (1) in step S144. When filter current value Iwf (1) is positive (when YES is determined in S144), control device 30 proceeds to step S147 and subtracts offset correction amount Icr from filter current value Iwf (1). By doing so, offset correction is executed. On the other hand, when filter current value Iwf (1) is negative (NO in S144), control device 30 adds offset correction amount Icr to filter current value Iwf (1) in step S146, Perform offset correction.

  In this way, the filter current value Iwf (1) held until the control mode switching is corrected within the range of the absolute value of the offset correction amount Icr without reversing the polarity of the filter current value Iwf (1). Will be. It should be noted that the failure in the case where the absolute value of the filter current value increases toward the determination value due to the occurrence of an open failure by correcting only the offset amount (Icr) derived from the control mode switching, not simple zero clear. It is possible to prevent detection omission.

  Referring to FIG. 10 again, control device 30 proceeds to step S130 at a time other than the control mode switching timing (when NO is determined in S120), and performs low-pass filter processing according to the above equation (1), The filter current value Iwf (1) is updated.

  As described above, when the filter current value Iwf (1) in the PWM mode is determined by the processing in step S130 or S140, the control device 30 determines the absolute value and the determination value of the filter current value Iwf (1) in step S150. Compare with IJD (1). Then, when | Iwf (1) |> IJD (1) (YES determination in S150), control device 30 detects an open failure in the phase (here, W phase) in step S200. On the other hand, when | Iwf (1) | ≦ IJD (1) (when NO is determined in S150), step S200 is skipped, so that an open failure is not detected.

  As described above, according to the inverter failure detection apparatus of the present embodiment, the control mode is continuously switched before one cycle of the phase current elapses in a normal state (when no open failure occurs). Even if it occurs, an open failure is not erroneously detected. In addition, since the possibility of missing an open failure is reduced as compared with a case where the filter current value (current integrated value) is simply cleared to zero each time the control mode is switched, detection accuracy can be improved.

  Therefore, it is possible to accurately detect an open failure of a power semiconductor switching element that constitutes an inverter that drives an AC motor controlled by switching between a plurality of control modes, even when the control mode is frequently switched within a short time. be able to.

  In the present embodiment, as a preferred configuration example, a configuration is shown in which DC voltage generation unit 10 # of the motor control system includes converter 12 so that the input voltage (system voltage VH) to inverter 14 can be variably controlled. However, as long as the input voltage to inverter 14 can be variably controlled, DC voltage generation unit 10 # is not limited to the configuration exemplified in the present embodiment. Further, it is not always indispensable that the inverter input voltage is variable, and the present invention is also applied to a configuration in which the output voltage of the DC power supply B is directly input to the inverter 14 (for example, a configuration in which the converter 12 is omitted). Applicable.

  Further, with regard to the AC motor serving as a load of the motor control system, in the present embodiment, a permanent magnet motor mounted for driving a vehicle in an electric vehicle (hybrid vehicle, electric vehicle, etc.) is assumed. The present invention can also be applied to a configuration in which an arbitrary AC motor used in the above is used as a load.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

  The present invention can be used for detecting an open failure of a power semiconductor switching element constituting an inverter.

  5 Ground wire, 6, 7 Power line, 10, 13 Voltage sensor, 10 # DC voltage generator, 11 Current sensor, 12 Converter, 14 Inverter, 15 U phase upper and lower arm, 16 V phase upper and lower arm, 17 W phase upper and lower arm, 24 current sensor, 25 rotation angle sensor, 30 control unit (ECU), 35 control mode selection unit, 100 motor drive system, 101 failure detection device, 110 filter processing unit, 120 offset correction unit, 130 judgment value setting unit, 140 detection Part, B DC power supply, C0, C1 smoothing capacitor, CMD control signal (control mode), D1 to D8 antiparallel diode, FDG detection flag (open failure), Ib DC current, Icr offset correction amount, IJD judgment value, Iu, Iv, Iw phase current, Iuf, Ivf, Iwf Filter current value, L Reactor, M1 AC motor, Nm motor rotation speed, the semiconductor switching element for Q1~Q8 power, S1 to S8 switching control signal, SR1, SR2 system relay, Trqcom torque command value, Vb, VH DC voltage, theta rotor rotation angle.

Claims (4)

A failure detection device for a multi-phase inverter for controlling an AC motor,
Current detection means for detecting the current of each phase of the inverter;
Mode selection means for selecting one of a plurality of control modes according to the operating state of the AC motor;
Filter processing means for calculating the filter current value of each phase separately for each control mode by low-pass filtering each phase current detected by the current detection means;
A failure detection means for detecting an open failure of a switching element of a corresponding phase of the inverter when the filter current value calculated by the filter processing means exceeds a predetermined determination value;
A correction means for correcting the filter current value of each phase corresponding to the control mode after switching so as to decrease the absolute value within a predetermined range when the control mode is switched. Fault detection device.   When the absolute value of the filter current value is larger than a maximum offset value corresponding to an integral value of a half cycle for the maximum rated current of each phase current, the correction means is configured such that the absolute value is only the maximum offset value. The inverter failure detection device according to claim 1, wherein the filter current value is corrected so as to decrease, and when the absolute value of the filter current value is equal to or less than the maximum offset value, the filter current value is set to zero. .   The inverter failure detection device according to claim 1, wherein the maximum offset value is variably set according to the rotational speed of the AC motor so that the maximum offset value becomes a small value as the rotational speed of the AC motor increases. . The current detection means includes
A current sensor disposed in each phase excluding a predetermined one of the plurality of phases;
Current calculating means for calculating the predetermined one-phase current from the output of the current sensor,
The filter processing means calculates the filter current value based on a calculated value by the current calculating means in the predetermined one phase, while based on a detected value by the current sensor in each phase except the predetermined one phase. To calculate the filter current value,
The inverter failure detection according to claim 1, wherein the determination value in the predetermined one phase is set to be larger than the determination value in each phase except the predetermined one phase. apparatus.

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