JP5245491B2 - Manufacturing method of component built-in wiring board, component built-in wiring board - Google Patents

Description

  The present invention relates to a method for manufacturing a component built-in wiring board having electric / electronic components embedded in an insulating plate and the component built-in wiring board, and more particularly, to a method for manufacturing a component built-in wiring board suitable for reducing the manufacturing burden and It relates to the component built-in wiring board.

  As a prior art of a component built-in wiring board, there is one disclosed in Patent Document 1 below. This component built-in wiring board has a structure in which an electronic component is surface-mounted on a pattern of an inner wiring layer in a multilayer wiring layer. Electronic parts are embedded in an insulating plate, and the insulating plate is obtained by molding an insulating resin or a mixture of this and a filler into a sheet shape by a doctor blade method or the like. In the laminating process, an insulating plate is used that does not have a relief portion such as a recess or an opening, or a recess smaller than the size occupied by the electronic component, at a corresponding position of the electronic component.

In the structure and the manufacturing method described above, it is difficult to use a so-called prepreg that uses a glass cloth or an aramid resin fiber as a reinforcing material for a printed wiring board as a material for the insulating resin. That is, it is necessary to prepare a special insulating material, which is disadvantageous in terms of availability and cost. Also, if the prepreg is forcibly used, a glass cloth or the like may collide with the built-in electronic component and stress may be generated, causing the electronic component to be damaged, or the connection reliability between the inner wiring pattern and the electronic component may be impaired. .
JP 2003-197849 A

  The present invention has been made in consideration of the above-described circumstances. In the method for manufacturing a wiring board with a built-in component having an electrical / electronic component embedded in an insulating plate and the wiring board with a built-in component, the manufacturing burden is reduced and the reliability is improved. It is an object of the present invention to provide a method of manufacturing a component built-in wiring board that also contributes to improvement in performance and the component built-in wiring board.

In order to solve the above-described problems, a method of manufacturing a component-embedded wiring board according to an aspect of the present invention is a method of electrically and mechanically placing an electrical / electronic component on the metal wiring pattern of the first insulating layer having a metal wiring pattern. a step of connecting, the first to be laminated on the insulating layer, a plurality lined formed by a circular arc at a position corresponding to the second of the electrical / electronic components of the insulating layer containing a reinforcing material, electrical / The step of forming an opening by an edge that does not restrain the electronic component, and the opening corresponding to the electric / electronic component is positioned on the side of the first insulating layer where the metal wiring pattern exists. A step of disposing the second insulating layer, disposing a third insulating layer on the second insulating layer, and laminating and integrating the third insulating layer.

That is, “ constraint the electric / electronic component formed by connecting a plurality of circular arcs at positions corresponding to the electric / electronic component of the second insulating layer containing the reinforcing material to be laminated on the first insulating layer. By forming the opening by the non- peripheral edge portion ”, the reinforcing material of the second insulating layer is prevented from colliding with the electric / electronic component to be incorporated at the time of stacking. This suppresses the generation of stress and improves reliability. In addition, since the opening is formed by an edge formed by overlapping a plurality of arcs, a drilling method similar to that for forming a through hole, for example, which does not require a special device to form the opening can be employed. Thereby, there is almost no increase in the burden at the time of manufacture. Of course, it is possible to use what hardened a general prepreg with a wiring board as a 2nd insulating layer, and it becomes a reduction of manufacturing burden.

  As a secondary matter, the opening by the edge formed by connecting a plurality of circular arcs should have the size of the opening along the size of the built-in electric / electronic component, compared to the case where the opening is a single round hole. Therefore, the resin filling property into the opening is good and the generation of voids can be prevented to improve the reliability. Another advantage of the wiring board is that a larger inner wiring formation region can be left.

The component built-in wiring board according to another aspect of the present invention includes a first insulating layer, a wiring pattern provided on the first insulating layer, and an electric / electronic component mounted on the wiring pattern. A second insulating layer comprising a plurality of circular arcs at positions corresponding to the electrical / electronic components, having openings by edges that do not restrain the electrical / electronic components , and containing a reinforcing material; A space between the surface of the first insulating layer on the wiring pattern side and the second insulating layer is filled, and a gap between the edge of the opening of the second insulating layer and the electric / electronic component is filled. And a third insulating layer that is buried and located.

That is, “a second insulating layer that includes a plurality of circular arcs at positions corresponding to the electrical / electronic components, has openings by edges that do not restrain the electrical / electronic components , and contains a reinforcing material”. By providing, the reinforcing material of the second insulating layer is prevented from colliding with the electric / electronic component to be built in at the time of lamination. This suppresses the generation of stress and improves reliability. In addition, since the opening is formed by an edge formed by overlapping a plurality of arcs, a drilling method similar to that for forming a through hole, for example, which does not require a special device to form the opening can be employed. Thereby, there is almost no increase in the burden at the time of manufacture. Of course, it is possible to use what hardened a general prepreg with a wiring board as a 2nd insulating layer, and it becomes a reduction of manufacturing burden.

  According to the present invention, there is provided a method for manufacturing a wiring board with a built-in component having electric / electronic components embedded in an insulating board, and a wiring board with a built-in component that contributes to reducing manufacturing burden and improving reliability. A manufacturing method and a component built-in wiring board can be provided.

  As an embodiment of the present invention, the opening may be formed using a drill. The construction method using a drill is a construction method used for drilling a general through-hole wiring board, and can be used for existing manufacturing equipment.

  Here, the formation of the opening by the drill may be performed by a drill having a single diameter. If the process uses a single-diameter drill, production efficiency is good.

  Here, the formation of the opening by the drill can be made by a drill having two or more diameters. If the process uses a drill with two or more diameters, although the production efficiency is somewhat inferior to that of a single-diameter drill, an opening closer to the size of the built-in electrical / electronic component can be formed, and resin filling into the opening It is possible to secure the characteristics and to leave a larger wiring formation region in the inner layer.

  Further, as an embodiment as a component built-in wiring board, the second wiring pattern provided on the surface of the second insulating layer facing the first insulating layer, and the third insulating layer are penetrated. And having an axis that is sandwiched between the surface of the wiring pattern and the surface of the second wiring pattern, is made of a conductive composition, and coincides with the stacking direction, and the diameter changes in the direction of the axis. It is further possible to further include an interlayer connection body having a shape. This interlayer connection body is an example of an interlayer connection body that passes through a third insulating layer interposed between the first insulating layer and the second insulating layer, and is formed by screen printing of a conductive composition, for example. It is an interlayer connection body derived from the conductive bump.

  As an embodiment, the edge of the opening of the second insulating layer may be an edge formed by connecting a plurality of arcs having the same radius of curvature. An edge formed by connecting a plurality of arcs having the same radius of curvature can be formed with a single-diameter drill, and the production efficiency is high.

  As an embodiment, the edge of the opening of the second insulating layer may be an edge formed by connecting a plurality of arcs having two or more curvature radii. An opening having an edge formed by connecting a plurality of arcs of two or more curvature radii is closer to the size of the built-in electric / electronic component, ensuring more resin filling into the opening, and forming an inner layer wiring The area can be left larger.

  As an embodiment, the second insulating layer is a laminate of at least two insulating layers, and further includes a third wiring pattern sandwiched between the at least two insulating layers. Can do. By making the second insulating layer multi-layered, a wiring board having a larger number of layers can be provided.

  Based on the above, embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a longitudinal sectional view (FIG. 1 (a)) and a transverse sectional view (FIG. 1 (b)) schematically showing a configuration of a component built-in wiring board according to an embodiment of the present invention. Here, the cross-section in the direction of the arrow at the position A-Aa in FIG. 1A corresponds to FIG.

  As shown in FIG. 1, this component built-in wiring board includes insulating layers 11, 12, 13, 14, 15, wiring layers (wiring patterns) 21, 22, 23, 24, 25, 26 (= 6 layers in total), interlayer connector 31, 32, 34, 35, through-hole conductor 33, semiconductor chip 41, conductive bump 42, underfill resin 51, solder resists 61, 62 . The insulating layers 11 to 15 are made of insulating resins 11a to 15a and reinforcing materials 11b to 15b (for example, glass cloth) that reinforce them.

  The semiconductor chip 41 as an electrical / electronic component is electrically and mechanically connected to the inner wiring layer 22 via conductive bumps 42 by flip connection. For this connection, conductive bumps 42 are formed in advance on terminal pads (not shown) of the semiconductor chip 41, and the built-in component mounting lands are patterned on the wiring layer 22 in alignment with the conductive bumps 42. Is formed. The conductive bump 42 is made of, for example, Au, and is previously formed in a stud shape on the terminal pad. An underfill resin 51 is filled between the semiconductor chip 41 and the wiring layer 22 and the insulating layer 11 for mechanical and chemical protection of the flip connection portion.

  The wiring layers 21 and 26 are wiring layers (outer layers) on the main surface as a wiring board, and the wiring layers 22, 23, 24, and 25 are inner wiring layers, respectively. In order, the insulating layer 11 is between the wiring layer 21 and the wiring layer 22, the insulating layer 12 is between the wiring layer 22 and the wiring layer 23, and the insulating layer 13 is between the wiring layer 23 and the wiring layer 24. The insulating layer 14 is located between the wiring layer 25 and the wiring layer 25, and the insulating layer 15 is located between the wiring layer 25 and the wiring layer 26, and the wiring layers 21 to 26 are separated from each other. Each of the wiring layers 21 to 26 is made of, for example, a metal (copper) foil having a thickness of 18 μm.

  Various components (not shown) can be mounted on the wiring layers 21 and 26. For such mounting, the wiring layers 21 and 26 include lands for component mounting. Solder resists 61 and 62 functioning as protective layers are formed on both main surfaces including the wiring layers 21 and 26 except for the land portions (thickness is about 20 μm, for example). An Ni / Au plating layer (not shown) with high corrosion resistance may be formed on the surface layer of the land portion.

The wiring layer 21 and the wiring layer 22 can be conducted by an interlayer connector 31 that is sandwiched between the surfaces of the patterns and penetrates the insulating layer 11. Similarly, the wiring layer 22 and the wiring layer 23 can be conducted by an interlayer connector 32 that is sandwiched between the surfaces of the patterns and penetrates the insulating layer 12. The wiring layer 23 and the wiring layer 24 can be conducted by a through-hole conductor 33 provided through the insulating layer 13. The wiring layer 24 and the wiring layer 25 can be conducted by an interlayer connector 34 that is sandwiched between the surfaces of these patterns and penetrates the insulating layer 14. The wiring layer 25 and the wiring layer 26 can be conducted by an interlayer connector 35 that is sandwiched between the surfaces of these patterns and penetrates the insulating layer 15.

  The interlayer connectors 31, 32, 34, and 35 are derived from conductive bumps formed by screen printing of a conductive composition, respectively, and depend on the manufacturing process in the axial direction (shown in FIG. 1). The diameter changes in the upper and lower stacking directions). The diameter is, for example, 200 μm on the thick side.

  Each insulating layer 11 to 15 is, for example, 100 μm thick except for the insulating layer 13, and only the insulating layer 13 has a thickness of 300 μm, for example, and the portions of the insulating resins 11 a to 15 a are rigid materials such as an epoxy resin, for example. It is. In particular, the insulating layer 13 has an opening at a position corresponding to the built-in semiconductor chip 41, and provides a space for housing the semiconductor chip 41. Of course, there is no reinforcement 13b in this opening. The insulating resins 12a and 14a of the insulating layers 12 and 14 are deformed so as to fill the opening of the insulating layer 13 for the built-in semiconductor chip 41 and the space inside the through-hole conductor 33 of the insulating layer 13. There is no space that becomes a void inside the cage.

  In addition to the insulating layer 13, the insulating layer 12 also has no reinforcing material 12 b at a position corresponding to the semiconductor chip 41. In this component built-in wiring board, the insulating layers 13 and 12 are configured such that the reinforcing members 13b and 12b do not exist in the portion corresponding to the position of the semiconductor chip 41, so that, for example, a glass epoxy prepreg can be easily formed as the insulating layers 13 and 12. Can be used. In other words, even when such a prepreg is used, a glass cloth does not collide with the built-in semiconductor chip 41 and it is not damaged, and connection reliability between the inner wiring layer 22 and the semiconductor chip 41 is not impaired. .

  As shown in FIG. 1B, the planar shape of the opening of the insulating layer 13 is an opening formed by an edge formed by connecting a plurality of arcs. This is an idea adopted in response to the fact that the semiconductor chip 41 often has a large area compared to a chip resistor or a chip capacitor which is a passive component. First, the opening by the edge part which connected the circular arc severally can be processed with a drill, and since the apparatus for manufacturing a general through-hole board | substrate can be utilized as it is, capital investment can be suppressed. In addition, drilling can be performed by stacking a plurality of plates that require processing, and productivity is good.

  A chip resistor or chip capacitor having a small area in plan can be adequately provided by forming one round hole by drilling to form an opening for this purpose, but this is also applied to a semiconductor chip 41 having a relatively large area. Then there is a problem. That is, the space between the edge of the round hole and the semiconductor chip 41 needs to be filled with the insulating resins 12a and 14a of the insulating layers 12 and 14, and the space becomes large. Defects such as occur. Therefore, as shown in FIG. 1 (b), if the opening is an opening formed by an edge formed by connecting a plurality of circular arcs, such a space can be made smaller and the defect rate can be remarkably improved.

  Furthermore, if such an opening is formed, the removal area of the insulating layer 13 becomes smaller, so that a wider area for forming the wiring layers 23 and 24 on both surfaces can be secured. Therefore, the degree of freedom in pattern design as a wiring board can be maintained high.

  In the above description, flip connection using Au stud-like conductive bumps 42 is used for connection of the semiconductor chip 41 to the wiring layer 22. For example, flip connection using solder bumps or conductive adhesive is used. Of course, it is possible. Instead of the semiconductor chip 41, a semiconductor component of a wafer level / chip scale package can be used. Moreover, as reinforcement material 11b-15b, it is good also as reinforcement materials, such as an aramid cloth, a glass nonwoven fabric, and an aramid nonwoven fabric besides glass cloth. As the insulating layers 11 to 15, for example, a CEM-3 material can be used in addition to the one corresponding to FR-4.

  Next, the manufacturing process of the component built-in wiring board shown in FIG. 1 will be described with reference to FIGS. 2, 3, and 5 are process diagrams schematically showing a part of the manufacturing process of the component built-in wiring board shown in FIG. FIG. 4A is a plan view showing the shape of the component opening 71 shown in FIG. 3E, and FIGS. 4B and 4C are modifications thereof. In these figures, the same or equivalent components as those shown in FIG.

  It demonstrates from FIG. FIG. 2 shows a manufacturing process of a portion centering on the insulating layer 11 in each configuration shown in FIG. First, as shown in FIG. 2 (a), a paste-like conductive composition to be an interlayer connection 31 is formed on a metal foil (electrolytic copper foil) 22A having a thickness of 18 μm, for example, by screen printing. It is formed in a bump shape (bottom diameter, eg, 200 μm, height, eg, 160 μm). This conductive composition is obtained by dispersing fine metal particles such as silver, gold and copper or fine carbon particles in a paste-like resin. For convenience of explanation, printing is performed on the lower surface of the metal foil 22A, but it may be printed on the upper surface (the following drawings are also the same). After the interlayer connector 31 is printed, it is dried and cured.

  Next, as shown in FIG. 2B, an FR-4 prepreg 11A having a thickness of, for example, 100 μm is laminated on the metal foil 22A to penetrate the interlayer connector 31, so that the head is exposed. To do. At the time of exposure or afterwards, the tip thereof may be crushed by plastic deformation (in any case, the shape of the interlayer connection body 31 is a shape having an axis coinciding with the stacking direction and the diameter changing in the axial direction). Subsequently, as shown in FIG. 2 (c), a metal foil (electrolytic copper foil) 21A is laminated on the prepreg 31A, and the whole is integrated by pressing and heating. At this time, the metal foil 21A is in electrical continuity with the interlayer connector 31, and the prepreg 11A is completely cured to become the insulating layer 11.

  Next, as shown in FIG. 2D, patterning by, for example, well-known photolithography is performed on the metal foil 22A on one side, and this is processed into a wiring layer 22 including mounting lands. Subsequently, as shown in FIG. 2E, an unfilled underfill resin 51A is applied onto the insulating layer 11 including the wiring layer 22 on which the semiconductor chip 41 is to be mounted using, for example, a dispenser.

  Next, as shown in FIG. 2F, the semiconductor chip 41 with the conductive bumps 42 is positioned and pressed against the mounting land of the wiring layer 22 by using, for example, a flip chip bonder. After the pressure welding, a heating step is performed to improve the connection strength and to cure the underfill resin 51A. As described above, the semiconductor chip 41 is connected to the mounting land of the wiring layer 22 via the conductive bump 42, and the underfill resin 51 is filled between the semiconductor chip 41 and the wiring layer 22 and the insulating layer 11. A wiring board material 1 in a state is obtained. The subsequent steps using this wiring board material 1 will be described later with reference to FIG.

  Next, a description will be given with reference to FIG. FIG. 3 shows a manufacturing process of a part centering on the insulating layer 13 and the same 12 in each configuration shown in FIG. First, as shown in FIG. 3A, for example, an FR-4 insulating layer 13 having a thickness of, for example, 300 μm in which metal foils (electrolytic copper foils) 23A and 24A having a thickness of 18 μm are laminated on both surfaces is prepared. A through hole 72 for forming a through hole conductor is formed at a predetermined position.

  Next, electroless plating and electrolytic plating are performed to form a through-hole conductor 33 on the inner wall of the through-hole 72 as shown in FIG. Subsequently, as shown in FIG. 3C, the metal foils 23 </ b> A and 24 </ b> A are patterned in a predetermined manner using well-known photolithography to form wiring layers 23 and 24.

  Next, as shown in FIG. 3D, conductive bumps (bottom diameter, for example, 200 μm, height, for example, 160 μm) to be the interlayer connector 32 are formed at predetermined positions on the wiring layer 23 with the paste-like conductive composition. It is formed by screen printing. Subsequently, as shown in FIG. 3E, an FR-4 prepreg 12A (nominal thickness, for example, 100 μm) to be the insulating layer 12 is laminated on the wiring layer 23 side using a press.

  In this lamination process, the head of the interlayer connector 32 is passed through the prepreg 12A. In addition, the broken line of the head part of the interlayer connection body 32 in FIG. 3 (e) indicates that there are both cases where the head part is plastically deformed and crushed at this stage and when it is not plastically deformed. By this step, the wiring layer 23 is located by sinking to the prepreg 12A side.

  After the prepreg 12A is laminated on the insulating layer 13, as shown in FIG. 3E, an opening 71 for component incorporation is formed by drilling at a predetermined position of the insulating layer 13 and the prepreg 12A. The wiring board material obtained as described above is referred to as a wiring board material 2.

  FIG. 4A shows a planar shape of the component opening 71 shown in FIG. The planar size of the semiconductor chip 41 is, for example, 3 mm × 3 mm here. Therefore, as shown in the figure, drilling at drilling positions 711 to 719 (9 locations in a 3 × 3 array overlapping each other) is used to form the opening 71 for accommodating the opening 71. Each diameter of the drilling is 1.6 mm, for example, and the drilling is performed in ascending order of reference numerals. The processing order here is the order of the four corner positions, the center, and the four side positions. According to the opening formation with such a single-diameter drill, it is not necessary to replace the drill blade and the production efficiency is increased.

  FIG. 4B shows a modification of the component opening shown in FIG. 4A. The planar size of the semiconductor chip 41A here is, for example, 1.56 mm × 1.56 mm. Drilling at drilling positions 71A1 to 71A5 is used to form the opening 71A for accommodating this. At the drilling positions 71A to 71A4, drilling with a diameter of, for example, 0.8 mm is performed, and at the drilling position 71A5, drilling with a diameter of, for example, 2 mm is performed. The processing order is the four corner positions and the center order (the order of the reference numerals of the drill processing positions).

  Opening with such two types of diameter drills requires measures such as exchanging drill blades and preparing a plurality of drill devices themselves, and the production burden is somewhat inferior to that of a single drill diameter. However, since an opening along the size of the built-in semiconductor chip 41A can be formed, it is preferable for ensuring a resin filling property into the opening and securing a larger wiring formation region in the inner layer. In addition, there is an effect of reducing the number of drilling operations. Similarly, the production burden and each of these advantages can be weighed and openings formed by three or more types of drills can be employed.

  FIG. 4C shows another modification of the component opening shown in FIG. 4A. The planar size of the semiconductor chip 41B here is, for example, 1.66 mm × 1.21 mm. Drilling at drilling positions 71B1 to 71B7 is used to form the opening 71B for accommodating this. At the drilling positions 71B1 to 71B4, drilling with a diameter of, for example, 0.8 mm is performed, and at the drilling positions 71B5 to 71B7, drilling with a diameter of, for example, 1.55 mm is performed. The machining order is the four corner positions, the center slightly right, the center, the center slightly left (in the order of the reference numerals of the drilling positions).

  In this case as well, as in the case shown in FIG. 4B, since the opening is formed by drills of two types of diameters, the production burden is somewhat inferior to that of a single drill diameter. However, an opening along the size of the built-in semiconductor chip 41B can be formed, which is preferable in securing a resin filling property in the opening and ensuring a larger inner wiring formation region.

  Next, a description will be given with reference to FIG. FIG. 5 is a diagram showing an arrangement relationship in which the wiring board materials 1 and 2 obtained as described above are stacked.

  In FIG. 5, the upper wiring board material 3 shown in FIG. 5 applies the same process as the lower wiring board material 1, and then the interlayer connector 34 and the prepreg 14 </ b> A are connected to the interlayer connector in the intermediate wiring board material 2 shown in FIG. 5. 32 and the prepreg 12A. However, there is no component (semiconductor chip 41) and no part (mounting land) for connecting it, and the prepreg 14A is not provided with an opening for the semiconductor chip 41. Other than that, the metal foil (electrolytic copper foil) 26A, the insulating layer 15, the interlayer connection body 35, the wiring layer 25, the prepreg 14A, and the interlayer connection body 34 are the metal foil 21A of the wiring board material 1, the insulating layer 11, and the interlayer connection, respectively. The same as the body 31, the wiring layer 22, the prepreg 12 </ b> A of the wiring board material 2, and the interlayer connection body 32.

  The respective wiring board materials 1, 2, and 3 are laminated and arranged in the arrangement as shown in FIG. Thereby, the prepregs 12A and 14A are completely cured, and the whole is laminated and integrated. At this time, due to the fluidity of the prepregs 12 </ b> A and 14 </ b> A obtained by heating, the prepregs 12 </ b> A and 14 </ b> A are deformed into the space around the semiconductor chip 41 and the space inside the through-hole conductor 33, and no gap is generated. The wiring layers 22 and 24 are electrically connected to the interlayer connectors 32 and 34, respectively.

  After the lamination step shown in FIG. 5, the upper and lower metal foils 26A and 21A are patterned in a predetermined manner using well-known photolithography, and further, layers of solder resists 61 and 62 are formed, as shown in FIG. Such a component built-in wiring board can be obtained.

  As a modification, the through-hole conductor 33 provided in the intermediate insulating layer 13 can be the same as the interlayer connector 31 or 32. Further, the outer wiring layers 21 and 26 are formed at the stage of each wiring board material 1 and 3 (for example, at the stage of FIG. 2D) other than patterning after the last lamination step. May be.

  Next, another embodiment of the present invention will be described with reference to FIG. FIG. 6 is a cross-sectional view schematically showing a configuration of a component built-in wiring board according to another embodiment of the present invention. In FIG. 6, the same or equivalent parts as those already described are denoted by the same reference numerals, and the description thereof is omitted.

  In the component built-in wiring board of this embodiment, the insulating layer 13 is a three-layer laminate of insulating layers 7, 6, 5 compared to that shown in FIG. A point that the wiring layers 9 and 8 are provided between adjacent insulating layers, an interlayer connector 331 that is interposed between the pattern surface of the wiring layer 23 and the pattern surface of the wiring layer 9 instead of the through-hole conductor 33, and a wiring layer An interlayer connector 333 sandwiched between the pattern surface 9 and the pattern surface of the wiring layer 8, and an interlayer connector 332 sandwiched between the pattern surface of the wiring layer 8 and the pattern surface of the wiring layer 24. The point to prepare is different.

  That is, by providing the interlayer connectors 331, 333, and 332 through the insulating layers 7, 6, and 5 so as to be sandwiched between the pattern surfaces of the wiring layer, there is no need for interlayer connection by the through-hole conductor 33. It is configured. The insulating layers 7, 6, and 5 are made of insulating resins 7a, 6a, and 5a and reinforcing members 7b, 6b, and 5b (for example, glass cloth) that reinforce the insulating resins 7a, 6a, and 5a, respectively.

  The insulating layers 7, 6, and 5 have openings at positions corresponding to the built-in semiconductor chip 41, and the reinforcing materials 7 b, 6 b, and 5 b naturally do not exist in the openings. Further, the insulating layer 12 does not have the reinforcing material 12b in the region where the semiconductor chip 41 is embedded, and has the reinforcing material 12b in the other region. Thereby, it is possible to improve the reliability by avoiding the collision between the semiconductor chip 41 and the reinforcing members 7b, 6b, 5b, and 12b.

  The planar shape of the opening of the insulating layers 7, 6, and 5 is an opening formed by an edge formed by connecting a plurality of arcs as in the embodiment shown in FIG. 1. Therefore, processing by a drill is possible, and equipment for manufacturing a general through-hole substrate can be used as it is, so that capital investment can be suppressed. Here, the drilling can be performed by stacking a plurality of plates that require processing, and the productivity is good. Furthermore, the space between the edge of the opening and the semiconductor chip 41 can be further reduced, and sufficient resin filling can be ensured to significantly improve the defect rate. In addition, a wider area for forming the wiring layers 23, 24, 9, and 8 can be secured, and the degree of freedom in pattern design as a wiring board can be maintained high.

  The manufacturing method of the component built-in wiring board shown in FIG. 6 is roughly described as follows. First, double-sided boards each having a wiring pattern and a metal foil on both sides and having an interlayer connection having a shape in which the diameter of the interlayer connection changes in the laminating direction are respectively formed on the insulating layers 11, 7, 5, 15. Correspondingly, 4 sheets are manufactured. The process is as shown in FIG. 2 (up to (d) of them).

  Next, on the wiring layer 8 corresponding to the insulating layer 5, conductive bumps to be the interlayer connector 333 are formed by printing, and a prepreg to be the insulating layer 6 is laminated on the surface. Then, the wiring layer 9 side of the double-sided substrate corresponding to the insulating layer 7 is opposed to the prepreg side to be the insulating layer 6 and laminated and integrated by pressing and heating. As a result, a substrate having four wiring layers (core substrate) can be formed. Subsequently, the wiring layers 23 and 24 are formed by patterning the outer metal foil.

  Next, on the formed wiring layer 23, conductive bumps to be the interlayer connector 32 are formed by printing, and a prepreg to be the insulating layer 12 is laminated on the surface. And the opening of the position corresponding to the semiconductor chip 41 incorporated in the laminated body obtained by this is formed by drilling.

  On the other hand, on the wiring layer 25 that corresponds to the insulating layer 15, conductive bumps to be the interlayer connection 34 are printed and formed, and a prepreg to be the insulating layer 14 is laminated on the surface. A semiconductor chip 41 is connected via a conductive bump 42 on a wiring layer 22 included in the insulating layer 11.

  The three members obtained as described above are arranged in the same manner as in the arrangement shown in FIG. 5 and are pressed in the laminating direction while heating. At this time, the portions of the prepreg to be the insulating layer 12 and the insulating resins 12a and 14a of the prepreg to be the insulating layer 14 fill the space around the semiconductor chip 41 and adhere to each other. In this state, both prepregs are completely cured and become insulating layers 12 and 14.

  Then, for example, by performing well-known photolithography patterning on the metal foils located on both sides, processing these into wiring layers 21 and 26, and further forming layers of solder resists 61 and 62, as shown in FIG. A component built-in wiring board having a simple structure can be obtained.

The longitudinal cross-sectional view and cross-sectional view which show typically the structure of the component built-in wiring board which concerns on one Embodiment of this invention. Process drawing which shows a part of manufacturing process of the component built-in wiring board shown in FIG. Process drawing which shows another part of manufacturing process of the component built-in wiring board shown in FIG. The top view which shows the shape of the opening part 71 for components shown in FIG.3 (e). The top view which shows the modification of the opening part for components shown to FIG. 4A. The top view which shows another modification of the opening part for components shown to FIG. 4A. FIG. 9 is a process diagram schematically showing still another part of the manufacturing process of the component built-in wiring board shown in FIG. 1. The longitudinal cross-sectional view which shows typically the structure of the component built-in wiring board which concerns on another embodiment of this invention.

Explanation of symbols

  1, 2, 3 ... wiring board material, 5, 6, 7 ... insulating layer, 5a, 6a, 7a ... insulating resin, 5b, 6b, 7b ... reinforcing material, 8, 9 ... wiring layer (wiring pattern), 11, 12, 13, 14, 15 ... insulating layer, 11a, 12a, 13a, 14a, 15a ... insulating resin, 11b, 12b, 13b, 14b, 15b ... reinforcing material, 11A, 12A, 14A ... prepreg, 21, 22, 23 , 24, 25, 26 ... wiring layer (wiring pattern), 21A, 22A, 23A, 24A, 26A ... metal foil (copper foil), 31, 32, 34, 35 ... interlayer connection (conducting by conductive composition printing) , 33... Through-hole conductor, 41, 41 A, 41 B... Semiconductor chip, 42... Conductive bump (Au stud bump), 51... Underfill resin, 51 A. 2 ... Solder resist, 71, 71A, 71B ... Opening for parts, 72 ... Through-hole, 331, 332, 333 ... Interlayer connector (conductive bump by conductive composition printing), 711, 712, 713, 714 715, 716, 717, 718, 719 ... drilling position, 71A1, 71A2, 71A3, 71A4, 71A5 ... drilling position, 71B1, 71B2, 71B3, 71B4, 71B5, 71B6, 71B7 ... drilling position.

Claims (9)

Electrically and mechanically connecting an electrical / electronic component on the metal wiring pattern of the first insulating layer having a metal wiring pattern;
An edge that does not restrain the electric / electronic component, and is formed by connecting a plurality of arcs at a position corresponding to the electric / electronic component of the second insulating layer containing a reinforcing material to be laminated on the first insulating layer. Forming an opening by a portion;
The second insulating layer is disposed on the side of the first insulating layer where the metal wiring pattern is present so that the opening is located corresponding to the electrical / electronic component, and the second insulating layer is further disposed. And a step of arranging, laminating and integrating a third insulating layer on the layer. A method for producing a component built-in wiring board.   2. The method of manufacturing a component built-in wiring board according to claim 1, wherein the opening is formed using a drill.   3. The method of manufacturing a component built-in wiring board according to claim 2, wherein the opening is formed by a drill having a single diameter.   3. The method of manufacturing a component built-in wiring board according to claim 2, wherein the opening is formed by a drill having two or more diameters. A first insulating layer;
A wiring pattern provided on the first insulating layer;
An electrical / electronic component mounted on the wiring pattern;
A second insulating layer comprising a plurality of circular arcs at a position corresponding to the electrical / electronic component, having an opening by an edge that does not restrain the electrical / electronic component , and containing a reinforcing material;
Between the surface of the first insulating layer on the wiring pattern side and the second insulating layer, and between the edge of the opening of the second insulating layer and the electric / electronic component And a third insulating layer located so as to be embedded in the wiring board. A second wiring pattern provided on a surface of the second insulating layer facing the first insulating layer;
An axis that penetrates the third insulating layer and is sandwiched between the surface of the wiring pattern and the surface of the second wiring pattern, is made of a conductive composition, and coincides with the stacking direction. The component built-in wiring board according to claim 5, further comprising an interlayer connector having a shape whose diameter changes in a direction of the axis.   7. The component built-in wiring board according to claim 5, wherein the edge of the opening of the second insulating layer is an edge formed by connecting a plurality of arcs having the same radius of curvature.   The component built-in wiring board according to claim 5 or 6, wherein the edge of the opening of the second insulating layer is an edge formed by connecting a plurality of arcs having two or more kinds of curvature radii. The second insulating layer is a stack of at least two insulating layers;
The component built-in wiring board according to claim 5, further comprising a third wiring pattern sandwiched between the at least two insulating layers.

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