JP5244621B2 - Game machine - Google Patents

Description

  The present invention relates to a gaming machine capable of performing a predetermined game such as a ball game machine or a slot machine.

  A gaming machine such as a ball ball game machine or a slot machine has a game control unit that controls the progress of the game and an effect control unit that controls the effect, and effects control according to the command transmitted from the game control unit In general, the part controls the production.

  Thus, in a gaming machine having a game control unit and an effect control unit, the control state of each of the game control unit and the effect control unit is backed up even when the power is cut off, and after the power is turned on, the game control unit is If it is impossible to return to the state, the control state of the game control unit is initialized, and an initialization command indicating that the control state of the game control unit is initialized is transmitted to the effect control unit On the other hand, if the production control unit does not receive an initialization command for a predetermined time after power-on, the production control unit has been proposed to automatically restore the control state of the production control unit to the state before power interruption (for example, Patent Document 1).

  In addition, when the game control unit has a storage unit capable of storing a plurality of commands, and the storage unit stores a plurality of commands, commands are sent to the effect control unit in the order in which these commands are generated. A gaming machine for transmission has been proposed (see, for example, Patent Document 2).

JP 2003-180965 A Patent Registration No. 3968354

  In the gaming machine described in Patent Document 1, when the effect control unit receives an initialization command within a predetermined time after power-on, the game control unit is disconnected by initializing the control state of the effect control unit. When it is not possible to return to the previous state, the control state of the effect control unit is initialized, and when the game control unit is initialized when the power is turned on, the state of the game control unit and the effect control unit can be matched. However, if the game control unit is out of order and cannot return to the control state before the power interruption, and the initialization command cannot be transmitted, only the effect control part returns to the control state before the power interruption. Can occur.

  As a method for solving such a problem, even when the game control unit returns normally, a return command indicating that is sent, and when the production control unit can return the control state to the state before the power interruption, Although it is conceivable to return to the state before the power interruption by receiving the return command, a plurality of commands can be stored as in the gaming machine described in Patent Document 2, and the plurality of commands are generated. When sending back to the effect control unit in order, and also backing up these unsent commands, in order to reflect the unsent commands in the state after return, before the unsent commands at the time of recovery In this case, even if the return command is sent only once after the power is turned on, the command transmission order is changed when the power is turned on. The command must be transmitted using different control than the other command, there is a problem that the transmission control of the normal command and release command can not be transmitted by the transmission control of the shared.

  The present invention has been made paying attention to such problems, and provides a gaming machine capable of matching the control states of the game control means and the effect control means without increasing the control load of the game control means. The purpose is to do.

In order to solve the above-described problem, a gaming machine according to claim 1 of the present invention provides:
A gaming machine (slot machine 1) capable of performing a predetermined game,
A game control means (main control unit 41) for controlling the progress of the game and transmitting control information (command) based on the progress control of the game;
An effect device (such as the liquid crystal display 51) that performs an effect;
Effect control means (sub control unit 91) for performing output control by the effect device (liquid crystal display 51 or the like) based on control information (command) received from the game control means (main control unit 41);
With
The game control means (main control unit 41)
Control information storage means (command transmission buffer) capable of storing a plurality of the control information (commands);
Control information generating means for generating control information (command) according to the progress control of the game, and storing it in the control information storage means (command transmission buffer);
Stopping power supply to the gaming machine, the power control state of the control information storing means and said game control means including a control information stored in the (command transmission buffer) (command) (main controller 41) Game backup data holding means for holding game backup data (stored data in the RAM 41c) for returning to the control state before the supply stop;
When power supply to the gaming machine is started, the control state of the game control means (main control unit 41) is returned to the control state before the power supply is stopped based on the game backup data (stored data in the RAM 41c). Game return determination means for determining whether or not,
When the game return determination means determines to return to the control state before the power supply stop, the control state of the game control means (main control unit 41) is based on the game backup data (stored data in the RAM 41c). Game return means for returning to the control state before the power supply stop;
When the game return determination means determines not to return to the control state before the power supply stop, non-return control information (setting change start command, error command indicating RAM abnormality) is generated, and the control information storage means ( Non-return-time control information generation means stored in the command transmission buffer),
Return-time control information generating means for generating return-time control information (return command) when the game return means returns to the control state before the power supply stop, and storing it in the control information storage means (command transmission buffer) When,
Control information transmission means for transmitting the control information (command) stored in the control information storage means (command transmission buffer) to the effect control means (sub-control unit 91) in the order of generation;
Including
The production control means (sub control unit 91)
Control state update means for updating the control state of the effect control means (sub control unit 91) based on reception of the control information (command);
Effect output control means for performing output control of the effect device (liquid crystal display 51 or the like) based on the control state of the effect control means (sub-control unit 91);
Even if the power supply to the gaming machine is stopped, the effect backup data (stored data in the RAM 91c) for returning the control state of the effect control means (sub control unit 91) to the control state before the power supply stop is retained. Production backup data holding means,
When the power supply to the gaming machine is started, the control state of the effect control means (sub control unit 91) can be restored to the control state before the power supply is stopped based on the effect backup data (stored data in the RAM 91c). Production return determination means for determining whether or not,
The non-return control information (setting change start command, error command indicating RAM abnormality) or the return control information when the effect return determination means determines that the control state before the power supply stop can be returned Regardless of whether or not (return command) is received, the control state of the effect control means (sub control unit 91) is returned to the control state before the stop of power supply based on the effect backup data (stored data in the RAM 91c). Production resumption means to
When the non-return control information (setting change start command, error command indicating RAM abnormality) is received, the control state of the effect control means (sub control unit 91) is changed to the control state (setting change notification) when the game is not returned. A non-returning-time control means, such as a control pattern of (2), a control pattern for informing a RAM abnormality error),
After power supply to the gaming machine is started, when either the non-return control information (setting change start command, error command indicating RAM abnormality) or the return control information (return command) is received, Effect output control starting means for starting output control of the effect device (liquid crystal display 51 or the like) based on the control state of the effect control means (sub control unit 91) by the effect output control means;
Including
After the power supply to the gaming machine is started, the control state update means is configured to either the non-return control information (setting change start command, error command indicating RAM abnormality) or the return control information (return command). Even when the control information (command) other than the non-return control information (setting change start command, error command indicating RAM abnormality) and the return control information (return command) is received before receiving The control state of the effect control means (sub control unit 91) is updated based on the received control information (command).
According to this feature, the output control of the effect device based on the control state of the effect control means does not start until the game control means receives the return control information transmitted when the game control means returns to the control state before stopping the power supply. Therefore, even in a situation where the game control means fails and the non-return-time control information cannot be transmitted, the output of the effect device does not return based on the control state before the power supply is stopped. Even so, the control state of the game control means and the output state of the effect device can be matched.
Further, after the power supply is started, the production control means is in a state before receiving the non-return control information or the return control information, and the output of the production device is restored based on the control state before the power supply is stopped. Even if there is no state, when other control information is received, the control state of the effect control means is updated based on the received control information, and after receiving the return time control information, based on the updated control state Since the output of the rendering device starts, even if the control information storage means returns with the untransmitted control information stored, the return control information is generated in the same manner as other control information, and the control information By storing the return time control information in the order generated by the same control as the other control information stored in the storage means, it is possible to reflect the untransmitted control information in the control state of the effect control means.
Whether or not the game return determination means returns the control state of the game control means to the control state before the power supply stop based on the game backup data when the power supply to the gaming machine is started. and determining, said not only from the gaming backup data that determines whether it is possible to return to the control state before the power outage and does not return to the control state before stopping intentionally powered by such initializing operation control It also includes those that determine whether or not to perform.
In addition, the effect control means is not limited to directly performing output control of the effect device, but, for example, a first effect control means that receives control information from a game control means and determines an output mode; and the effect device If the second production control means that directly controls the output control is separately provided, the production control means comprises both the first production control means and the second production control means. It is what is done.

A gaming machine according to means 1 of the present invention is the gaming machine according to claim 1,
The effect control means (sub-control unit 91) determines that the non-return control information (setting change start command, RAM abnormality) when the effect return determination means determines that it cannot return to the control state before stopping the power supply. Control state initialization means for initializing the control state of the effect control means (sub control unit 91) regardless of whether or not the return time control information (return command) is received. It is characterized by.
According to this feature, even when the control state of the effect control means cannot return to the control state before the power supply stop, when the return control information is received from the game control means, the output of the effect device stops. The output control of the rendering device can be started according to the initialized control state.

The gaming machine according to means 2 of the present invention is the gaming machine according to claim 1 or means 1 , wherein
After the power supply to the gaming machine is started, the effect output control means is configured to output either the non-return control information (setting change start command, error command indicating RAM abnormality) or the return control information (return command). In the period until the message is received, the effect device (the liquid crystal display 51 or the like) is controlled to a predetermined output state (output corresponding to the pattern being restored).
According to this feature, after the power supply is started, it is possible to determine in what state the effect control means is currently in the state before the output of the effect device starts based on the control state of the effect control means. Can be easily confirmed.

A gaming machine according to means 3 of the present invention is the gaming machine according to claim 1, means 1 or 2 ,
A game control board (game control board 40) on which the game control means (main control unit 41) is mounted;
An effect control board (effect control board 90) on which the effect control means (sub-control unit 91) is mounted;
With
The power of the effect control board (effect control board 90) is supplied via the game control board (game control board 40), and the control information (command) is sent to the effect control board (effect control board 90). A transmission signal line (command transmission line) and a power supply line ( power supply line) are connected to the effect control board (effect control board 90) through one connector.
According to this feature, unless the signal line for transmitting control information from the game control unit is connected to the effect control unit, power is not supplied to the effect control unit, and only the effect control unit operates. There is nothing.

The gaming machine according to means 4 of the present invention is the gaming machine according to any one of claims 1 to 1 , wherein
After the power supply to the gaming machine is started, the effect control means (sub control unit 91) is configured to perform the non-return control information (setting change start command, error command indicating RAM abnormality) or the return control information ( Inspection that controls to the inspection state (inspection mode) for inspecting the rendering device (liquid crystal display 51, etc.) when a predetermined time (inspection mode transition waiting time) has elapsed without receiving any of the return commands) It is characterized by including control means.
According to this feature, since it is possible to control the inspection control state only by starting without connecting to the game control means, it is possible to easily inspect the stage device at the development stage or manufacturing stage of the gaming machine. it can.

It is a front view of the slot machine of the Example to which this invention was applied. It is an internal structure figure of a slot machine. It is a figure which shows the symbol arrangement | sequence of a reel. It is a block diagram which shows the structure of a slot machine. It is a figure which shows the connection condition of the game control board 40 and the production | presentation control board 90. FIG. It is a figure which shows the object combination of the internal lottery classified according to the structure of the winning combination determined by winning and a gaming state. It is a timing chart which shows the control state of sub CPU91a. It is a timing chart which shows the control state at the time of starting of sub CPU91a. It is a timing chart which shows the control state at the time of starting of sub CPU91a. It is a timing chart which shows the control state at the time of starting of sub CPU91a. It is a timing chart which shows the control state at the time of starting of sub CPU91a. It is a timing chart which shows the control state at the time of starting of sub CPU91a. It is a timing chart which shows the control state at the time of starting of sub CPU91a. It is a flowchart which shows the control content of the starting process (main) which a main CPU performs at the time of starting. It is a flowchart which shows the control content of the error process which a main CPU performs at the time of error occurrence. It is a flowchart which shows the control content of the setting change process which main CPU performs. It is a flowchart which shows the control content of the game process which main CPU performs after a setting change process. It is a flowchart which shows the control content of the power interruption interrupt process (main) performed when main CPU receives the voltage drop signal from a power interruption detection circuit. It is a flowchart which shows the control content of the starting process (sub) which a sub CPU performs at the time of starting. It is a flowchart which shows the control content of the timer interruption process (sub) which a sub CPU performs regularly. It is a flowchart which shows the control content of the interruption interruption process (sub) performed when a sub CPU inputs a voltage drop signal from an interruption detection circuit.

  Examples of the present invention will be described below.

  An embodiment of a slot machine to which the present invention is applied will be described with reference to the drawings. A slot machine 1 according to the present embodiment includes a housing 1a having an open front surface, and a pivotable pivot at a side end of the housing 1a. The front door 1b is supported.

  Inside the casing 1a of the slot machine 1 of the present embodiment, as shown in FIG. 2, reels 2L, 2C and 2R (hereinafter referred to as a left reel, a middle reel and a right reel) in which a plurality of types of symbols are arranged on the outer periphery. ) Are juxtaposed in the horizontal direction, and as shown in FIG. 1, three consecutive symbols out of the symbols arranged on the reels 2L, 2C, 2R can be seen from the see-through window 3 provided on the front door 1b. Are arranged as follows.

  As shown in FIG. 3, on the outer periphery of the reels 2L, 2C, and 2R, “black 7”, “net 7 (shaded 7 in the figure)”, “white 7”, “BAR”, “replay”, A plurality of identifiable symbols such as “watermelon”, “black cherry”, “white cherry”, “bell”, and “orange” are drawn in a predetermined order, 21 pieces each. The symbols drawn on the outer peripheries of the reels 2L, 2C, and 2R are displayed in the upper, middle, and lower three stages in the see-through window 3, respectively.

  The reels 2L, 2C, and 2R are provided in correspondence with each other and rotated by reel motors 32L, 32C, and 32R (see FIG. 4), so that the symbols of the reels 2L, 2C, and 2R are continuously formed in the see-through window 3. In addition to being displayed while changing, by stopping the rotation of the reels 2L, 2C, and 2R, three consecutive symbols are derived and displayed on the fluoroscopic window 3 as display results.

  Inside the reels 2L, 2C, and 2R are reel sensors 33L, 33C, and 33R that detect a reference position for each of the reels 2L, 2C, and 2R, and a reel LED 55 that irradiates the reels 2L, 2C, and 2R from the back side. , Is provided. The reel LED 55 includes 12 LEDs corresponding to three consecutive symbols of the reels 2L, 2C, and 2R, and can irradiate each symbol independently.

  A display area 51a of a liquid crystal display 51 (see FIG. 1) is disposed at a position on the front side (player side) of each reel 2L, 2C, 2R of the front door 1b. The liquid crystal display 51 has a normally white liquid crystal panel having transparency in a state where no voltage is applied to the liquid crystal element, and a transmissive region 51b corresponding to the see-through window 3 of the display region 51a. The reels 2L, 2C, and 2R can be visually recognized from the player side through the see-through window 3. Further, a backlight (not shown) for irradiating the display area 51a from behind is provided on the back surface of the display area 51a excluding the transmissive area 51b, and the back surface further has a concealing member for concealing the inside. (Not shown) is provided.

  On the front side (front side in FIG. 1) of the liquid crystal display 51, an instruction (for example, touch operation) from the player to the display surface is detected, and the position (for example, the position where the touch operation is performed) is specified. Light-emitting devices 56a and 56b and light-receiving devices 57a and 57b that constitute a touch panel for the above-described purpose are installed. The light emitting devices 56a and 56b include a plurality of infrared light emitting elements (for example, LEDs). The light receiving devices 57a and 57b include a plurality of infrared light receiving elements (for example, phototransistors).

  The light emitting device 56a and the light receiving device 57a are installed in pairs in the horizontal direction across the display surface of the liquid crystal display 51. The light emitting device 56a and the light receiving device 57a are installed so that infrared rays radiated from the plurality of light emitting elements provided in the light emitting device 56a can be received by the plurality of light receiving elements provided in the light receiving device 57a. Similarly, the light emitting device 56b and the light receiving device 57b are installed in pairs in the vertical direction across the display area of the liquid crystal display 51. The light emitting device 56b and the light receiving device 57b are installed so that infrared rays emitted from the plurality of light emitting elements provided in the light emitting device 56b can be received by the plurality of light receiving elements provided in the light receiving device 57b.

  In the present embodiment, infrared grids are formed along the display surface of the liquid crystal display 51 by projecting infrared rays from the light emitting devices 56a and 56b. When a touch operation is performed on the display surface by the player, the light receiving devices 57a and 57b detect the shielding of infrared rays and output a signal for specifying the position where the detected light receiving element is arranged. To the touch panel controller 99 described later. The touch panel controller 99 can specify the position where the touch operation is performed on the display surface of the liquid crystal display 51 based on signals from the light receiving devices 57a and 57b, and the touch panel is formed by these. Yes.

  The light emitting devices 56 a and 56 b constituting the touch panel are installed on the left side and the lower side of the display surface of the liquid crystal display 51, and the light receiving devices 57 a and 57 b are installed on the right side and the upper side of the display surface of the liquid crystal display 51. The touch panel can detect a touch operation in an area surrounded by the light emitting devices 56a and 56b and the light receiving devices 57a and 57b, and can specify a position where the touch operation is performed.

  On the front door 1b, a medal insertion unit 4 into which medals can be inserted, a medal payout exit 9 from which medals are paid out, and credits (the number of medals stored as a game value owned by the player) are used for one medal. A single bet switch 5 that is operated when setting the bet number, and using a credit, the maximum bet number (a game in this embodiment) among a specified number of bets determined in accordance with the game state within the range. When the state is RB (BB), 2 in the normal gaming state, the MAXBET switch 6 that is operated when setting, the medal stored as credits and the medals used for setting the number of bets are settled ( A settlement switch 10 that is operated when the credits and the amount of medals used for setting the bet are returned), a start switch 7 that is operated when starting the game, reels 2L, 2C, 2 Stop switch 8L is operated to each stop of the rotation, 8C, 8R, but are provided operable by the player.

  The front door 1b also displays a credit indicator 11 that displays the number of medals stored as credits, the number of medals acquired in BB, which will be described later, and an error code that indicates the contents when an error occurs. An auxiliary indicator 12 and a payout indicator 13 for displaying the number of medals paid out due to the occurrence of a prize are provided.

  Further, on the front door 1b, 1BETLED 14 that notifies that the bet number is set to 1 by lighting, 2BETLED 15 that notifies that the bet number is set to 2, and 3 bets are set. 3BET LED 16 to notify when lit, insertion request LED 17 to notify that a medal can be inserted is lit, start valid LED 18 to notify that the game start operation by the operation of the start switch 7 is effective, wait (previous Waiting state LED 19 for informing that it is in the state of waiting for the start of reel rotation since a certain period of time has not elapsed since the start of the game, during replay informing that it is in the replay game described later An LED 20 is provided.

  Inside the MAXBET switch 6, there is provided a BET switch valid LED 21 (see FIG. 4) for notifying that the setting operation of the betting number by operating the one-sheet BET switch 5 and the MAXBET switch 6 is effective. Inside the stop switches 8L, 8C, and 8R, left, middle, and right stop effective LEDs 22L, 22C, and 22R for informing that the reel stop operation by the corresponding stop switches 8L, 8C, and 8R is effective by lighting (FIG. 4).

  Inside the front door 1b, there is a reset switch 23 for detecting a reset operation for releasing an error state described later and a stop state described later by a predetermined key operation, while changing a set value and confirming a set value described later. A set value display 24 for displaying the set value at that time, and a flow path of medals inserted from the medal insertion unit 4 on the side of a hopper tank 34a (see FIG. 2) described later provided in the housing 1a or A medal selector having a insertion medal sensor 31 for detecting a medal that is inserted from the flow path switching solenoid 30 and the medal insertion unit 4 and selectively flows to the hopper tank 34a side to selectively switch to one of the medal payout exits 9 side. The door opening detection switch 25 (refer FIG. 4) which detects the open state of the front door 1b is provided.

  As shown in FIG. 2, a reel sensor 33L that can detect the reel reference positions of the reels 2L, 2C, and 2R, the reel motors 32L, 32C, and 32R, and the reels 2L, 2C, and 2R, as shown in FIG. , 33C, 33R (see FIG. 4), an external output board 1000 for outputting an external output signal, a hopper tank 34a for storing medals inserted from the medal insertion section 4, and a hopper tank 34a. A hopper unit 34 including a hopper motor 34b for paying out medals from the medal payout opening 9, a payout sensor 34c for detecting medals paid out by driving the hopper motor 34b, and a power supply box 100 are provided.

  On the side of the hopper unit 34, an overflow tank 35 is provided for storing medals overflowing from the hopper tank 34a. Inside the overflow tank 35, a full sensor 35 a made up of a pair of electrically conductive members spaced apart from each other and provided at a height capable of detecting a predetermined amount of stored medals is provided. It is possible to detect that the medal storage amount stored in the inside when it is conductive by contacting through the medal stored in the inside exceeds a predetermined amount, that is, that the overflow tank is full. It has become.

  On the front surface of the power supply box 100 is a stop switch for selecting whether to enable / disable a stop function for controlling the stop state at the end of BB, which will be described later (a state in which the progress of the game is restricted until a reset operation is performed). 36a, automatic checkout for selecting whether the automatic checkout function is effective / invalid for controlling automatic checkout processing (processing for adjusting (returning) medals stored as credits regardless of the player's operation) at the end of BB described later The switch 36b functions as a setting key switch 37 for switching to the setting change mode at the time of startup, and as a reset switch for canceling the error state and the stop state in the normal state. In the setting change mode, the winning probability of the internal lottery described later Reset / setting switch 38 that functions as a setting switch for changing the setting value of (development rate) Power switch 39 is provided which is operated when that.

  When a game is played in the slot machine 1 of the present embodiment, first, medals are inserted from the medal insertion unit 4 or a bet number is set using credits. In order to use credits, the single BET switch 5 or the MAXBET switch 6 may be operated. When a predetermined number of bets determined according to the gaming state are set, the pay lines L1 to L5 (see FIG. 1) become effective, and the operation of the start switch 7 is effective, that is, the game can be started. It becomes a state. In the present embodiment, as the specified number of bets, two are determined in the gaming state RB (BB) and three in the normal gaming state. In addition, when a medal is inserted exceeding the maximum number out of the prescribed number corresponding to the gaming state, the amount is added to the credit.

  The winning line is a line that is set to determine whether a combination of symbols displayed on the perspective windows 3 of the reels 2L, 2C, and 2R is a winning symbol combination. In this embodiment, as shown in FIG. 1, the winning line L1 set across the symbols arranged in the middle of each reel 2L, 2C, 2R and the symbols arranged in the upper row of each reel 2L, 2C, 2R are straddled. The winning line L2, the winning line L3 set across the symbols arranged in the lower stage of each reel 2L, 2C, 2R, the upper stage of the reel 2L, the middle stage of the reel 2C, the lower stage of the reel 2R, that is, lower right There are five types of winning lines L4 set across the symbols arranged side by side, the winning line L4 set across the symbols, the lower row of the reel 2L, the middle row of the reel 2C, the upper row of the reel 2R, that is, the winning line L5 set across the symbols lined up to the right. It is defined as.

  When the start switch 7 is operated in a state where the game can be started, the reels 2L, 2C, and 2R rotate, and the symbols of the reels 2L, 2C, and 2R continuously vary. When any one of the stop switches 8L, 8C, 8R is operated in this state, the rotation of the corresponding reels 2L, 2C, 2R is stopped, and the display result is derived and displayed on the fluoroscopic window 3.

  When one of the reels 2L, 2C, 2R is stopped, one game is completed, and a predetermined symbol combination (hereinafter also referred to as a role) is set on any of the activated pay lines L1 to L5. When the reels 2L, 2C, and 2R are stopped as a display result, a winning occurs, and a predetermined number of medals are given to the player and added to the credit. Further, when the credit reaches the upper limit number (50 in this embodiment), medals are paid out directly from the medal payout opening 9 (see FIG. 1). If a combination of symbols with a medal payout is arranged on a plurality of activated pay lines, the total number of payouts determined for each of the symbol combinations arranged on the activated pay line is totaled. The total number of medals is awarded to the player. However, an upper limit (15 in this embodiment) is set for the number of medals to be awarded in one game, and when the total number of medals exceeds the upper limit, the upper limit number of medals is awarded. It will be. In addition, when a combination of symbols accompanying the transition of the gaming state is stopped as a display result of each reel 2L, 2C, 2R on any of the activated pay lines L1 to L5, a game corresponding to the combination of symbols Transition to the state.

  FIG. 4 is a block diagram showing a configuration of the slot machine 1. As shown in FIG. 4, the slot machine 1 is provided with a game control board 40, an effect control board 90, and a power supply board 101. The game state is controlled by the game control board 40, and the game state is controlled by the effect control board 90. The production according to the control is controlled, and the power supply board 101 generates the drive power for the electrical components constituting the slot machine 1 and supplies them to each part.

  The power supply board 101 is supplied with AC100V power from the outside, and from this AC100V power supply, a DC voltage necessary for driving electrical components constituting the slot machine 1 is generated, and the game control board 40 and the game control board 40 It is supplied to the production control board 90 connected through the.

  Further, the above-described hopper motor 34b, payout sensor 34c, full sensor 35a, stop switch 36a, automatic checkout switch 36b, setting key switch 37, reset / setting switch 38, and power switch 39 are connected to the power supply board 101. Yes.

  On the game control board 40, the one-sheet BET switch 5, the MAXBET switch 6, the start switch 7, the stop switches 8L, 8C, 8R, the settlement switch 10, the reset switch 23, the insertion medal sensor 31, the door opening detection switch 25, The reel sensors 33L, 33C, and 33R are connected, and the above-described payout sensor 34c, full sensor 35a, stop switch 36a, automatic settlement switch 36b, setting key switch 37, reset / setting switch 38 are connected via the power supply board 101. Are connected, and the detection signals of these connected switches are inputted.

  Further, the game control board 40 includes the credit display 11, the game auxiliary display 12, the payout display 13, 1 to 3 BET LEDs 14 to 16, the insertion request LED 17, the start valid LED 18, the waiting LED 19, the replaying LED 20, and the BET. The switch effective LED 21, left, middle, and right stop effective LEDs 22L, 22C, and 22R, the set value display 24, the flow path switching solenoid 30, and the reel motors 32L, 32C, and 32R are connected to each other, and are described above via the power supply board 101. The hopper motor 34b is connected, and these electric components are driven based on control of a main control unit 41 (described later) mounted on the game control board 40.

  The game control board 40 includes a microcomputer having a main CPU 41a, ROM 41b, RAM 41c, and I / O port 41d. The main control unit 41 controls the game, and random numbers in a predetermined range (0 to 65535 in this embodiment). A random number generation circuit 42 that generates a random number, a sampling circuit 43 that acquires a random number from the random number generation circuit, and a switch detection circuit that detects a detection signal input from switches connected to the game control board 40 directly or via the power supply board 101 44, a motor drive circuit 45 that controls the drive of the reel motors 32L, 32C, and 32R, a solenoid drive circuit 46 that controls the drive of the flow path switching solenoid 30, and a drive control of various displays and LEDs connected to the game control board 40 LED drive circuit 47 for performing power supply, monitoring the power supply voltage supplied to the slot machine 1 When detecting a voltage drop, the power interruption detection circuit 48 that outputs a voltage drop signal indicating that to the main control unit 41, the main CPU 41a when the power is turned on or when the initialization command from the main CPU 41a is not inputted A reset circuit 49 for supplying a reset signal to the device and other various devices and circuits are mounted.

  The main CPU 41a has an interrupt function (including an interrupt prohibition function) such as a timekeeping function and a timer interrupt, executes a program (described later) stored in the ROM 41b, and performs processing related to the progress of the game. Each part of the control circuit mounted on the game control board 40 is controlled directly or indirectly. The ROM 41b stores fixed data such as programs executed by the main CPU 41a and various tables. The RAM 41c is used as a work area when the main CPU 41a executes a program. The I / O port 41d inputs / outputs a control signal to / from each circuit connected via a signal input / output terminal included in the main control unit 41.

  The main control unit 41 includes a signal input terminal, and detection states of various switches connected to the game control board 40 are input to the input port via these signal input terminals. The input state of these signal input terminals is monitored by the main CPU 41a, and the main CPU 41a executes basic processing that shifts in stages according to the input state of the signal input terminals, that is, the detection states of various switches.

  Further, the main CPU 41a has an interrupt function as described above, and can execute an interrupt process by interrupting the basic process when an interrupt occurs. In this embodiment, four types of interrupts of interrupts 1 to 4 can be executed. For each interrupt, the counter mode (externally depending on the signal input from the trigger terminal provided separately from the signal input terminal) An interrupt mode for generating an interrupt) and a timer mode (an interrupt mode for generating an internal interrupt according to the number of clock inputs of the main CPU 41a) can be selected and set.

  In the present embodiment, among the interrupts 1 to 4, interrupt 2 is set to the counter mode, interrupt 3 is set to the timer mode, and interrupts 1 and 4 are unused. The trigger terminal is connected to the power interruption detection circuit 48 described above, and the main CPU 41a generates an interrupt 2 in response to the input of the voltage drop signal output from the power interruption detection circuit 48, and the power interruption interruption described later. Execute the process (main). Further, the main CPU 41a generates an interrupt 3 every time the number of clock inputs reaches a certain number, that is, every certain time interval (about 0.56 ms in this embodiment), and a timer interruption process (main) described later. Execute. Moreover, although the interrupts 1 and 4 are set to unused, the interrupts 1 and 4 may generate | occur | produce by noise etc. For this reason, when the interrupts 1 and 4 occur, the main CPU 41a executes an unused interrupt process that immediately returns to the original process.

  The main CPU 41a is set to prohibit other interrupts during execution of interrupt processing based on the occurrence of any one of interrupts 1 to 4, and a plurality of interrupts are generated simultaneously. In this case, interrupts that are executed with priority in the order of interrupts 2, 3, 1, 4 are set. In other words, when interrupt 2 and other interrupts occur simultaneously, interrupt 2 is prioritized and when interrupt 3 and interrupt 1 or 4 occur simultaneously, interrupt 3 is prioritized. To run.

  Further, the main CPU 41a temporarily stores the data in use stored in the register in a later-described stack area provided in the RAM 41c at the start of the interrupt process based on the occurrence of any of the interrupts 1 to 4. And the data saved in the stack area at the end of the interrupt process is returned to the register.

  Further, the main control unit 41 is supplied with backup power even during a power failure, and the data stored in the RAM 41c is held while the backup power is being supplied.

  The main CPU 41a repeatedly loops the process according to the control state until the detection state of the various switches connected to the game control board 40 is changed as a basic process, and step by step according to the change of the detection state of the various switches. Execute the process to move to. Further, the main CPU 41a has an interrupt function as described above, and can interrupt the basic process by the occurrence of the interrupt and execute the interrupt process. The voltage output from the power interruption detection circuit 48 The power interruption interrupt process (main) is executed in response to the input of the decrease signal, and the timer interrupt process (main) is executed at regular time intervals (about 0.56 ms in this embodiment). In addition, the execution interval of the timer interrupt process (main) is set to a time longer than the sum of the time required to complete the repeated process according to the control state in the basic process and the execution time of the timer interrupt process (main) Therefore, the process that is repeated according to the control state between the current and next timer interrupt processes (main) is completed at least once.

  The main CPU 41a transmits various commands to the effect control board 90 via the I / O port 41d. A command transmitted from the game control board 40 to the effect control board 90 is sent in only one direction, and no command is sent from the effect control board 90 to the game control board 40. The transmission line of the command transmitted from the game control board 40 to the effect control board 90 is composed of a strobe (INT) signal line, a data transmission line, and a ground line, and is connected via the effect relay board 80. The game control board 40 and the effect control board 90 are not directly connected.

  As shown in FIG. 5, the game control board 40 on which the main CPU 41 a is mounted and the effect control board 90 are connected via an effect relay board 80. The game control board 40 and the effect relay board 80 are connected via the gable C1, and the effect relay board 80 and the effect control board 90 are connected via the cable C2. The game control board 40 and the cable C1 are connected by connecting a connector 40a mounted on the game control board 40 and a connector C1a provided at one end of the cable C1. The cable C1 and the effect relay board 80 are connected by connecting a connector C1b provided at the other end of the cable C1 and a connector 80a mounted on the effect relay board 80. The effect relay board 80 and the cable C2 are connected by connecting a connector 80b mounted on the effect relay board 80 and a connector C2a provided at one end of the cable C1. The cable C2 and the effect control board 90 are connected by connecting a connector C2b provided at the other end of the cable C2 and a connector 90a mounted on the effect control board 90.

  Further, as shown in FIG. 5, a strobe signal line (INT), a data transmission line (D1 to D8), a ground line (GRD) constituting a command transmission line from the main CPU 41a, and a game control board 40 to an effect control board. The DC12V line that supplies power to 90 is connected via a single system of cables C1 and C2 and connectors, and the connectors that connect these cables and each board are all connected to each other to control the performance. Each part on the substrate 90 side is operable, and a command from the main CPU 41a can be received. Therefore, unless the command transmission line for transmitting a command from the main CPU 41a is connected to the effect control board 90, power is not supplied to the effect control board 90 side, and only the effect control board 90 side operates. There is no end.

  The effect control board 90 is connected to the light receiving devices 57a and 57b constituting the touch panel described above, and detection signals of the connected light receiving devices 57a and 57b are input to the touch panel controller 99.

  The effect control board 90 is connected to effect devices such as a liquid crystal display 51 (see FIG. 1), an effect LED 52, speakers 53 and 54, and the reel LED 55 described above, which are arranged on the front door 1b of the slot machine 1. These effect devices are driven based on control by a later-described sub-control unit 91 mounted on the effect control board 90. The effect control board 90 is connected to the light emitting devices 56a and 56b constituting the touch panel described above, and the light emitting devices 56a and 56b are based on control by a touch panel controller 99 described later mounted on the effect control board 90. To be driven.

  In this embodiment, the sub-control unit 91 mounted on the effect control board 90 controls the output of the effect devices such as the liquid crystal display 51, effect effect LED 52, speakers 53 and 54, and reel LED 55. However, in addition to the sub-control unit 91, an output control unit that directly controls the output of the effect device is mounted on the effect control board 90 or another board, and the sub-control unit 91 is based on a command from the main control unit 41. The output control unit may determine the output pattern of the effect device, and the output control unit may control the output of the effect device based on the output pattern determined by the sub control unit 91. In such a configuration, the sub control unit 91 and the output control may be performed. The output control of the rendering device is performed by both of the units.

  Further, in the present embodiment, the liquid crystal display 51, the effect effect LED 52, the speakers 53 and 54, and the reel LED 55 are exemplified as the effect device, but the effect device is not limited to these, for example, a mechanically driven display. A device or a mechanically driven item may be applied as the effect device.

  Similar to the main control unit 41, the effect control board 90 includes a sub CPU 91a, ROM 91b, RAM 91c, and a microcomputer provided with an I / O port 91d. The sub control unit 91 controls the effect, and the effect control board 90. A display control circuit 92 that performs display control of the liquid crystal display 51 connected to the LED, an LED driving circuit 93 that performs drive control of the effect LED 52 and the reel LED 55, an audio output circuit 94 that controls audio output from the speakers 53 and 54, Supplied to a reset circuit 95 that gives a reset signal to the sub CPU 91a when the power is turned on or when an initialization command from the sub CPU 91a is not inputted for a certain period of time, a clock device 97 that outputs time information including date information and time information, and a slot machine 1 The power supply voltage is monitored, and when a voltage drop is detected, this is indicated Based on the signal from the power interruption detection circuit 98 that outputs the pressure drop signal to the sub CPU 91a and the light receiving devices 57a and 57b, processing for specifying the position where the touch operation is performed on the display surface of the liquid crystal display 51 is performed. The touch panel controller 99 and other circuits are mounted, and the sub CPU 91a receives various commands transmitted from the game control board 40 and output information from the touch panel controller 99 to perform various controls. At the same time, each part of the control circuit mounted on the effect control board 90 is controlled directly or indirectly.

  Similar to the main CPU 41a, the sub CPU 91a has an interrupt function (including an interrupt prohibition function). One of the interrupt terminals of the sub control unit 91 is connected to a strobe (INT) signal line that is output when the main control unit 41 transmits a command, among the command transmission lines, and the sub CPU 91a receives the strobe signal. An interrupt is generated based on the input to acquire a command from the main control unit 41 and execute a command reception interrupt process to be stored in the buffer. Further, the sub CPU 91a executes an interrupt process (sub) to be described later by generating an interrupt every time the number of clock inputs reaches a certain number, that is, every certain interval. One of the interrupt terminals of the sub-control unit 91 is connected to the power interruption detection circuit 98, and the sub CPU 91a responds to the input of the voltage drop signal output from the power interruption detection circuit 98. Execute processing (sub). Further, when an unused interrupt occurs in the sub CPU 91a, an unused interrupt process for immediately returning to the original process is executed.

  Also, unlike the main CPU 41a, the sub CPU 91a interrupts the process even when the timer interrupt process (sub) is being executed when an interrupt is generated based on the input of the strobe signal (INT). The command reception interrupt process is executed at the same time, and the command reception interrupt process is executed with the highest priority even if interrupts that trigger the timer interrupt process (sub) occur at the same time. Note that command reception interrupt processing is also prohibited during the execution of power interruption interrupt processing (sub), but if an interrupt that triggers power interruption interrupt processing (sub) occurs at the same time, command reception Prioritize interrupt processing

  The sub-control unit 91 is also supplied with backup power at the time of a power failure, and the data stored in the RAM 91c is held while the backup power is supplied.

  In the slot machine 1 of the present embodiment, the medal payout rate changes according to the set value. Specifically, the medal payout rate is changed by using a winning probability corresponding to a set value in an internal lottery described later. The set value is composed of 6 levels of 1 to 6, with 6 being the highest payout rate, and the payout rate being lower in the order of 5, 4, 3, 2, 1. In other words, when 6 is set as the set value, the player has the highest advantage, and the advantages decrease stepwise in the order of 5, 4, 3, 2, 1.

  In order to change the setting value, it is necessary to turn on the power of the slot machine 1 after the setting key switch 37 is turned on. When the setting key switch 37 is turned on and the power is turned on, the setting value read from the RAM 41c is displayed on the setting value display 24 as a display value, and the setting value can be changed by operating the reset / setting switch 38. Switch to setting change mode. When the reset / setting switch 38 is operated in the setting change mode, the display value displayed on the setting value display 24 is updated one by one (when further operation is performed from the setting 6, the display returns to the setting 1). . When the start switch 7 is operated, the display value is fixed. When the setting key switch 37 is turned off, the determined display value is stored as a setting value in the RAM 41c of the main control unit 41, and the state shifts to a state in which the game can proceed.

  In the slot machine 1 of the present embodiment, when the main CPU 41a detects a voltage drop signal from the power interruption detection circuit 48, a power interruption interrupt process (main) is executed. In the power interruption interrupt processing (main), the register is saved in a stack of a RAM 41c, which will be described later, and data for destructive diagnosis (in this embodiment, 5AH) in which any bit is 1 in the RAM 41c, that is, a specific value other than 0 In addition to storing data, the RAM parity adjustment data is calculated so that the RAM parity based on the data stored in all areas of the RAM 41c is 0, and the RAM 41c is stored. The RAM parity is a value calculated as an exclusive OR of values stored in each bit of the corresponding area (all areas in this embodiment) of the RAM 41c. Therefore, if the RAM parity based on the data stored in all areas of the RAM 41c is 0, the RAM parity adjustment data is 0, and the RAM parity based on the data stored in all areas of the RAM 41c is 1. In this case, the RAM parity adjustment data is 1.

  The main CPU 41a calculates the RAM parity based on the data stored in all areas of the RAM 41c at the time of activation, confirms the value of the destructive diagnosis data, the RAM parity is 0, and the destructive diagnosis The processing state of the main CPU 41a is restored to the state before the power interruption based on the data stored in the RAM 41c on the condition that the value of the data for use is correct, but the RAM parity is not 0 (in the case of 1) or is destroyed. If the value of the diagnostic data is not correct, it is determined that the RAM is abnormal, and the RAM abnormal error code is set in the register to control the RAM abnormal error state so that the progress of the game is disabled. Unlike the other error states, the RAM abnormal error state is not canceled even if the reset switch 23 or the reset / setting switch 38 is operated, and a new set value is set in the setting change mode described above. It will not be released until

  In addition, when the sub CPU 91a detects the voltage drop signal from the power interruption detection circuit 98, the sub CPU 91a also executes a power interruption interrupt process (sub). In the power interruption interrupt processing (sub), the register is saved in a stack of a RAM 91c described later, and destructive diagnosis data in which any bit is 1 is stored in the RAM 91c, and data stored in all areas of the RAM 91c. The RAM parity adjustment data is calculated so that the RAM parity based on 0 becomes 0 and stored in the RAM 91c.

  Then, the sub CPU 91a calculates the RAM parity based on the data stored in all areas of the RAM 91c at the time of activation, and based on the data stored in the RAM 91c on the condition that the RAM parity is 0. The processing state of the sub CPU 91a is restored to the state before the power interruption. If the RAM parity is not 0 (1), it is determined that the RAM is abnormal and the RAM 91c is initialized. In this case, unlike the main sub CPU 91a, the execution of the performance is not disabled only by initializing the RAM 91c.

  Next, initialization of the RAM 41c of the main control unit 41 will be described. The storage area of the RAM 41c of the main control unit 41 is divided into an important work, a general work, a special work, a set value work, a non-saved work, an unused area, and a stack area.

  The important work is a work in which data that is inconvenient to be initialized at the end of the BB, such as various display devices and LED display data, input / output data of the I / O port 41d, and a game time clock counter, is stored. The general work is a work that stores data that can be initialized at the end of the BB, such as a stop control table, a stop symbol, the number of medals paid out, and the total number of medals paid out in the BB. The special work is a work that stores data to be initialized only before the start of setting, such as data for transmitting a command to the effect control board 90 and various software random numbers. The set value work is a work that stores a set value used when a lottery is performed in the internal lottery process. The unsaved work is a work that holds the state of various switches, and a value is always set regardless of whether or not the data in the RAM 41c is destroyed at the time of activation. The unused area is an unused area in the storage area of the RAM 41c, and is initialized if any one of a plurality of initialization conditions described later is satisfied. The stack area is an area in which data saved from the register of the main CPU 41a is stored, and the unused stack area is established by any one of a plurality of initialization conditions to be described later, like the unused area. In this case, the used stack area is not initialized because the program continues.

  In this embodiment, the main CPU 41a destroys the data in the RAM 41c at the time of start-up when the setting key switch 37 is ON, when a RAM error occurs, at the end of BB, or at the time of start-up when the setting key switch 37 is OFF. Otherwise, when the five initialization conditions at the end of one game are satisfied, four types of initializations with different areas initialized according to each initialization condition are performed.

  Initialization 1 is an initialization performed before the setting key switch 37 is turned on at the time of startup and transitions to the setting change mode, or initialization performed when a RAM abnormality error occurs. In the storage area of the RAM 41c, all areas (including the unused area and the unused stack area) other than the used stack area are initialized. Initialization 2 is initialization performed at the end of the BB. In initialization 2, the general work, the unused area, and the unused stack area are initialized in the storage area of the RAM 41c. Initialization 3 is initialization that is performed when the setting key switch 37 is in an OFF state at the time of startup and the data in the RAM 41c is not destroyed. The used stack area is initialized. Initialization 4 is initialization performed at the end of one game. In initialization 4, an unused area and an unused stack area in the storage area of the RAM 41c are initialized.

  In this embodiment, the initialization 1 is performed before the transition to the setting change mode. However, the initialization 1 is performed at the end of the setting change mode, or both before the transition to the setting change mode and at the end of the setting change mode. Also good. In this case, if the set value work is initialized, the determined set value is lost. Therefore, the initialization of the set value work is not performed in the initialization at the end of the setting change mode.

  In the slot machine 1 according to the present embodiment, the prescribed number of bets that can be set according to the gaming state is determined as described above, and the prescribed number of bets that are determined according to the gaming state is set. It becomes possible to start the game on the condition. In this embodiment, as will be described later, there are a regular bonus (hereinafter referred to as RB) (big bonus (hereinafter referred to as BB)) and a normal gaming state as a gaming state, of which RB (BB) is the number of bets. 2 is defined as the prescribed number of 3 and 3 is defined as the prescribed number of bets in the normal gaming state. For this reason, if the gaming state is RB (BB), the game can be started when the bet number is set to 2, and if the bet number is set to 3 in the normal gaming state, the game is started. It is possible to start. In the present embodiment, all the pay lines L1 to L5 are activated when a specified number of bets corresponding to the gaming state are set, and as RB (BB) All winning lines L1 to L5 are activated when 2 is determined, and all winning lines L1 to L5 are activated when 3 is set as the number of bets in the normal gaming state. Become.

  In the slot machine 1 of this embodiment, when all the reels 2L, 2C, 2R are stopped, the activated pay line (in the present embodiment, all the pay lines are always enabled. The activated winning line is simply referred to as a winning line). When a combination of symbols called a combination is arranged on the winning line, a winning is achieved. The combination may be a combination of the same symbols or a combination including different symbols. The type of winning combination is determined according to the game state, but it can be roughly divided into a small role with payout of medals and a replay that can start the next game without the need to set the number of bets. There are a game combination and a special combination with a transition of the game state. Below, a small role and a re-playing role are collectively called a general role. In order for winning of each combination determined according to the gaming state to occur, it is necessary to win an internal lottery to be described later and set a winning flag of the combination in the RAM 41c.

  Of the winning flags for each of these combinations, the winning flag for the small role and the re-playing role is valid only in the game in which the flag is set, and is invalid in the next game. It is valid until a combination of combinations permitted by the flag is completed, and is invalid in a game having a combination of combinations permitted. In other words, once the special combination winning flag is won, even if the combination of the combinations permitted by the flag cannot be made, the winning flag is not invalidated and is carried over to the next game. It becomes.

  As shown in FIG. 6, the slot machine 1 has a big bonus (hereinafter referred to as a big bonus BB) and a regular bonus (hereinafter referred to as a regular bonus RB) as a special bonus. Sheets, watermelons, cherries, and bells are defined as replays (1) to (3).

  Cherry is awarded when the symbol “white cherry” is derived on any of the winning lines for the right reel in any gaming state, and one medal is paid out in any gaming state. In addition, when the symbol of “white cherry” stops at the upper or lower stage of the right reel, the combination of cherries is aligned on the two winning lines of the winning lines L2, L5 or the winning lines L3, L4. Since winning a cherry on the winning line, two medals will be paid out.

  A watermelon is awarded when a combination of “watermelon-watermelon-watermelon” or “watermelon-watermelon-BAR” is available on any of the winning lines in any gaming state, and 15 RBs (BB). Medals are paid out, and in the normal gaming state, 12 medals are paid out. Bell is awarded when the combination of “Bell-Bell-Bell” is aligned on any of the winning lines in any gaming state, and 15 medals are paid out in RB (BB). Ten medals are paid out.

  Replay (1) is a combination of “Replay-Replay-Replay”, “BAR-Replay-Replay”, or “Black 7-Replay-Replay” in any of the winning lines in the normal gaming state. A winning combination will be awarded when these combinations are available. Replay (2) is awarded when a combination of “watermelon-replay-replay” is arranged on any of the winning lines in the normal gaming state. Replay (3) is awarded when a combination of “black cherry-replay-replay” is arranged on any of the winning lines in the normal gaming state. When replays (1) to (3) win, there is no payout of medals, but the next game can be started again without setting the number of bets, so 3 corresponding to the number of bets that need not be set in the next game. This is essentially the same as a medal being paid out.

  RB is won when the combination of “net 7-net 7-black 7” is aligned on any of the winning lines in the normal gaming state, and the gaming state shifts to RB. The RB is a gaming state that is advantageous to the player over other gaming states by increasing the winning probability of the small role, particularly the bell, and when the 12 games are digested after the RB starts, or when an 8-game winning ( When the type of a combination is allowed), it ends either whichever comes first.

  BB is a combination of “black 7-black 7-black 7”, “net 7-net 7-net 7” or “white 7-white 7-white 7” in any of the winning lines in the normal gaming state. When the combination is complete, a prize is awarded.

  When BB wins, the gaming state shifts to BB and shifts to RB at the same time. When RB ends, if BB has not ended, it shifts to RB again and is controlled repeatedly until BB ends. The That is, during BB, it is always controlled to RB. The BB ends when the total number of medals paid out to the player in the BB exceeds 465. At the end of the BB, the RB is also ended regardless of whether the RB end condition is satisfied.

  Hereinafter, the internal lottery of the present embodiment will be described. In the internal lottery, it is determined whether or not the above winning combination is permitted before the display results of all the reels 2L, 2C, and 2R are derived and displayed (actually, when the start switch 7 is detected). To do. In the internal lottery, first, a random number for internal lottery (an integer from 0 to 65535) is acquired. Then, for each combination determined according to the gaming state and whether or not the special combination is carried over, the acquired random number for internal lottery and the number of judgment values for each combination determined according to the gaming state, the number of bets and the set value Is done according to.

  In the present embodiment, as shown in FIG. 6, the role that is the subject of the internal lottery differs depending on whether the gaming state is the normal gaming state or RB (BB). Further, when the gaming state is the normal gaming state, the role to be subject to the internal lottery varies depending on whether or not the special role is being carried over.

  When the gaming state is the normal gaming state and any special combination is not carried over, BB, RB, replay, watermelon, cherry, and bell are sequentially read out as the target combination of the internal lottery.

  When the gaming state is the normal gaming state and any special combination is carried over, replay, watermelon, cherry, and bell are sequentially read out as the target combinations for the internal lottery.

  When the gaming state is RB, watermelon, cherry, and bell are sequentially read out as the subject combination of the internal lottery.

  In the internal lottery, the number of determination values determined corresponding to the role to be subject to the internal lottery, the current gaming state and the set value are sequentially added to the random number for the internal lottery, and when the result of addition overflows, It is determined that the winning combination has been won. For this reason, a winning combination will be won with a probability (number of determination values / 65536) according to the number of determination values.

  If a winning combination of any combination is determined, a winning flag corresponding to the combination determined to be winning is set in the internal winning flag storing work assigned to the RAM 41c. The internal winning flag storage work consists of a 2-byte storage area, of which the upper byte is assigned as the special role storing work in which the winning flag for the special role is set, and the lower byte is the winning of the general role It is assigned as a general role storage work for which a flag is set. Specifically, when a special combination is won, a special combination winning flag indicating that the special combination is won is set in the special combination storing work, and the winning flag set in the general combination storing work is cleared. When a general combination is won, a winning flag for the general combination indicating that the general combination is won is set in the general combination storing work. If no winning combination is selected, only the general winning combination work is cleared.

  Next, stop control of the reels 2L, 2C, 2R will be described.

  The main CPU 41a refers to the table index and the table creation data stored in the ROM 41b when the rotation of the reel starts and when the reel stops and the reel that is still rotating still remains. Create a stop control table for each reel. When any of the stop switches 8L, 8C, and 8R corresponding to the rotating reel is effectively detected, the stop control table of the corresponding reel is referred to and the slip of the referred stop control table is referred to. Based on the number of frames, control is performed to stop the rotation of the reels 2L, 2C, 2R corresponding to the operated stop switches 8L, 8C, 8R.

  In the table index, an index that indicates the start address of the area in which the data for table creation is stored, from the reference address when referring to the table index, according to the setting state of the winning flag by internal lottery (hereinafter referred to as the internal winning state) Differences up to the address where the data is stored are registered. As a result, a difference corresponding to the internal winning state is acquired, and the corresponding index data can be acquired by adding the difference to the reference address. Even when the winning combinations are different, when the same control is applied, the same address is stored as the index data. In such a case, the same table creation data is referred to. Thus, a stop control table is created.

  The table creation data includes a stop control table indicating the number of sliding frames according to the stop operation position, and an address of the stop control table to be referred to according to the reel stop status.

  The stop control table referred to according to the reel stop status is whether all reels are rotating, only the left reel is stopped, only the middle reel is stopped, only the right reel is stopped, It may vary depending on whether the middle reel is stopped, the left and right reels are stopped, the middle and right reels are stopped, and if any reel is stopped, stop Since there may be differences depending on the stop position of the reels already completed, the address of the stop control table to be referenced for each situation is registered for each rotating reel, and based on the top address of the table creation data, It is possible to specify the address of the stop control table that should be referred to according to the status of each, and it is necessary according to each status from this specified address. And to be able to identify the stop control table. Even when the reel stop status and the stopped position of the stopped reel are different, when the same stop control table is applied, the same address may be registered as the address of the stop control table. In such a case, the same stop control table is referred to.

  The stop control table is data that can specify the number of sliding frames for each timing when the stop operation is performed. In this embodiment, stepping motors that make one turn at a cycle of 168 steps (0 to 167) are used for the reel motors 32L, 32C, and 32R. That is, when the reel motors 32L, 32C, and 32R are driven for 168 steps, the reels 2L, 2C, and 2R make one round. Then, 21 areas (frames) divided every 16 steps (the number of steps that one symbol moves) are defined for one reel, and these areas are areas 0 to 20 from the reel reference position. A number is assigned. On the other hand, the number of symbols arranged on one reel is 21, and symbol numbers 0 to 20 from the reel reference position are assigned to symbols on each reel, so symbols 0 to 20 are assigned to each reel. , Area numbers 0 to 20 are assigned in order. In the stop control table, the number of sliding symbols for each area number is compressed and stored according to a predetermined rule, and the number of sliding symbols for each area number can be acquired by expanding the stop control table. Yes.

  As described above, the stop control table created by referring to the table index and the table creation data corresponds to the area number, and the area corresponding to each area number is the stop reference position (in this embodiment, the perspective window 3). Sliding frame when an operation of the stop switches 8L, 8C, 8R is detected at a timing (a timing in which the number of steps from the reel reference position is included in the range of the number of steps of each region number). It is a table with each number set.

  Next, the procedure for creating the stop control table will be described. First, at the start of reel rotation, the top address of the table creation data corresponding to the internal winning state of the game is acquired. Specifically, the table index is first referred to, index data corresponding to the internal winning state is obtained, table creation data is identified based on the obtained index data, and all reels are identified from the identified table creation data. The address of the stop control table for each reel corresponding to the state of rotation is acquired, and the stop control table for each reel stored at the acquired address is expanded to generate a stop control table for all reels.

  Further, when any one reel stops or any two reels stop, the index data acquired at the start of reel rotation, that is, the top address of the table creation data corresponding to the internal winning state of the game The table creation data is identified based on the table creation data, and the stop control table address of the unreacted reel corresponding to the stopped reel and the area number of the stop position of the reel is obtained from the identified table creation data. The stop control table for each stored reel is expanded to create a stop control table for the unstopped reels.

  Next, when the main CPU 41a effectively detects any one of the stop switches 8L, 8C, and 8R corresponding to the rotating reel, the control when the display result is derived to the corresponding reel will be described. When one of the stop switches 8L, 8C, and 8R corresponding to the rotating reel is effectively detected, the stop operation position area is determined based on the number of steps from the reel reference position when the stop operation is detected. The number is specified, the stop control table of the reel where the stop operation is detected is referred, and the number of sliding symbols corresponding to the area number of the specified stop operation position is acquired. Then, control is performed to rotate and stop the reel by the number of acquired sliding frames. Specifically, from the number of steps from the reel reference position at the time when the stop operation is detected, the number of steps from the acquired number of sliding frames to the stop is calculated, and the reel is rotated and stopped by the calculated number of steps. Take control. As a result, the area corresponding to the area number that is the stop position ahead of the number of sliding frames from the area corresponding to the area number of the stop operation position where the stop operation is detected is the stop reference position (in this embodiment, the perspective window 3 It will stop in the lower symbol area).

  In the table index of this embodiment, only one address is stored as index data corresponding to one internal winning state in one gaming state, and further, one table creation data includes one reel. Only one address is stored as the address of the storage area of the stop control table corresponding to the stop status (and the stop position of the stopped reel). In other words, table creation data corresponding to one internal winning state in one gaming state and stop control tables corresponding to reel stop states (and stopped positions of stopped reels) are uniquely determined. The stop control table created with reference to is unique for one internal winning state in one gaming state and the reel stop status (and the stop position of the stopped reel). Therefore, when all of the gaming state, the internal winning state, and the reel stop status (and the stop position of the stopped reel) are the same, the reel is based on the same stop control table, that is, the same control pattern. The stop control is performed.

  Further, in this embodiment, a value of 0 to 4 is determined as the number of sliding frames, and it is possible to stop the reel by drawing a maximum of 4 symbols after detecting a stop operation. That is, the symbol stop position can be designated from a range of up to five frames including the stop operation position at which the stop operation is detected. In addition, since it is necessary to move one frame to move the reel for one symbol, it is possible to stop the reel by pulling in a maximum of four symbols after detecting the stop operation. The symbol stop position can be designated from a range of up to five symbols including the operation position.

  In this embodiment, when any of the winning combinations is won, the winning combination is drawn to the maximum in the range of 4 frames on the winning line, and the non-winning winning combination is drawn so that it is not aligned on the winning line. A stop control table with a defined number of frames is created and reel stop control is performed. If no winning combination is selected, a stop control table with a determined number of sliding symbols that do not have any combination And stop control of the reel. As a result, when a stop operation is performed, if the winning combination can be stopped on the winning line in the drawing range of up to 4 frames, the control is performed so that the winning combination is stopped. The combination that has not been performed will be controlled to be stopped in a drawing range of a maximum of 4 frames.

  When a special role and a small role are elected at the same time, such as when a special role is elected while the special role has been carried over from before the previous game, the winning small role is the maximum in the range of 4 frames on the winning line. The number of sliding frames is fixed so that it can be drawn to the limit, and for the stop operation position where the selected small role cannot be drawn in the range of up to 4 frames in the winning line, the winning special role is in the range of 4 frames in the winning line Then, a stop control table in which the number of sliding frames is determined so as to be pulled in as much as possible is created, and reel stop control is performed. As a result, when a stop operation is performed, if it is possible to stop all the small roles that have been selected in the drawing range of up to 4 frames on the winning line and stop them, control is performed so that the winning combination is stopped. If you can't draw a small role that has been won in the drawing range of up to 4 frames on the line, if you can stop with a special role that has been won in the drawing range of up to 4 frames on the winning line, A control is performed to stop them in a uniform manner, and a winning combination that has not been won will be controlled to be stopped within a 4-frame pull-in range. That is, in such a case, priority is given to the control for aligning the small combination on the winning line over the special combination, and the special combination can be won only when the small combination cannot be drawn. When a special combination and a small combination can be drawn at the same time, only the small combination is drawn and the small combination is not arranged on the winning line at the same time as the special combination.

  In this example, when a special role is elected while the special role has been carried over from before the previous game, or when a special role and a small role are simultaneously elected, the special role and the small role are won simultaneously. If the selected special role is given priority over the selected special role, the special role is controlled on the winning line only when the small role cannot be withdrawn. When winning simultaneously, priority is given to the control for aligning the special role on the winning line over the small role, and the control for aligning the small role on the winning line may be performed only when the special role cannot be drawn.

  If a special player and a replaying player are elected at the same time, such as when a replaying player is elected while the special role has been carried over from before the previous game, when the stop operation is performed, In addition, a control is performed in which the symbols of the re-gamer are aligned and stopped within a drawing range of up to 4 frames. In this case, the symbols constituting the re-gamer or the symbols constituting the re-gamer to be simultaneously elected are arranged at intervals of 5 symbols or less, that is, within 4 frames, for any of the reels 2L, 2C, and 2R. Since it can always be stopped at any position within the 4-frame pull-in range, if the special combination and the re-playing combination are elected at the same time, the timing of the operation of the stop switches 8L, 8C, 8R by the player Without fail, the re-playing role will always be won. That is, in such a case, the control for aligning the re-games on the winning line has priority over the special game, and the re-games will always win. In the case where the special combination and the re-playing combination can be withdrawn at the same time, only the re-playing combination is drawn in, and the special combination is not arranged on the winning line at the same time as the re-playing combination.

  In this embodiment, after the rotation of the reels 2L, 2C, and 2R is started, the main CPU 41a continues to rotate the reels for which the stop operation has not been detected until the operation of the stop switches 8L, 8C, and 8R is detected. On the condition that the operation of the stop switches 8L, 8C, 8R is detected, control is performed to stop the display result on the corresponding reel. Even if the reel rotation temporarily stops due to the occurrence of a reel rotation error, the stop operation is still detected until the operation of the stop switches 8L, 8C, and 8R is detected after the reel rotation is restarted. Control is performed to stop the display result of the corresponding reels on the condition that the rotation of the reels that have not been continued is continued and the operation of the stop switches 8L, 8C, and 8R is detected.

  In this embodiment, control is performed to stop the display result on the corresponding reel on condition that the operation of the stop switches 8L, 8C, and 8R is detected. However, the rotation of the reel is started. When a predetermined automatic stop time has elapsed, even if the reel stop operation is not performed, it is assumed that the stop operation has been performed, and automatic stop control is performed to automatically stop each reel. May be. In this case, since the reels are stopped without the player's operation, it is preferable to derive a display result that does not constitute any combination even if any combination is won.

  Next, commands that the main CPU 41a transmits to the effect control board 90 will be described.

  In the present embodiment, the main CPU 41a sends a BET command, a credit command, an internal winning command, a reel rotation start command, a reel stop command, a winning determination command, a payout start command, a payout end command, a game state command to the effect control board 90. A plurality of types of commands including a standby command, a stop command, an error command, a return command, and a setting change start command are transmitted.

  These commands are composed of 1-byte type data indicating the type of command and 1-byte extension data indicating the content of the command, and the sub CPU 91a can determine the type of command from the type data.

  The BET command is a command that can specify the number of inserted medals, that is, the number of medals used to set the bet number, and is a state from the end of the game (after setting change) to the start of the game. Sent when a medal is inserted or the bet number is set by operating the single BET switch 5 or the MAXBET switch 6 in a state where is not set.

  The credit command is a command that can specify the number of medals stored as credits, and is a state from the end of the game (after setting change) to the start of the game, and in a state where a predetermined number of bets is set, Sent when a medal is inserted and credits are added.

  The internal winning command is a command that can specify the winning status of the internal winning flag and the type of the internal winning flag that has been established, and is transmitted when the start switch 7 is operated to start the game.

  The reel rotation start command is a command for notifying the start of reel rotation, and is transmitted when rotation of the reels 2L, 2C, and 2R is started.

  The reel stop command is a command that can specify whether the reel to be stopped is the left reel, the middle reel, or the right reel, the area number of the corresponding reel stop operation position, and the area number of the corresponding reel stop position. And is transmitted each time stop control is performed in accordance with the stop operation of each reel.

  The winning determination command is a command that can specify the presence / absence of winning, the type of winning, and the number of medals to be paid out at the time of winning, and is transmitted after all the reels are stopped and the winning determination is performed.

  The payout start command is a command for notifying the start of payout of medals, and is transmitted when the payout of medals is started by paying out a prize or credit (including medals used for setting the number of bets). The payout end command is a command for notifying the end of payout of medals, and is transmitted when the payout of medals by winning and winning a credit is completed.

  The game state command is a command that can specify the game state of the next game, and is transmitted at the end of the setting change mode and at the end of the game.

  The standby command is a command indicating a transition to the standby state, and after one game is over, a credit (which was used for setting the bet number) is set when the transition to the standby state is made after a predetermined time without setting the bet number. (Including medals) is sent out after the medal payout is completed and the payout end command is sent.

  The stop command is a command indicating the occurrence or release of the stop state, and after the end of the BB, the stop command indicating the occurrence of the stop state is transmitted when the ending effect waiting time has elapsed, and the reset operation is performed. When the stop state is released, a stop command indicating the release of the stop state is transmitted.

  An error command is a command that indicates the occurrence or cancellation of an error condition and the type of error condition. When an error is determined and controlled to an error condition, an error command indicating the occurrence and type of the error condition is sent and reset. When the error state is canceled after the operation is performed, an error command indicating the cancellation of the error state is transmitted.

  The return command is a command indicating that the control state before power interruption has been restored, and is transmitted when the main CPU 41a is restored to the control state before power interruption.

  The setting change start command is a command indicating the start of the setting change mode, and is transmitted when shifting to the setting change mode.

  These commands are generated in the basic process, temporarily stored in a command transmission buffer provided in a special work in the RAM 41c, and transmitted in the timer interrupt process (main).

  The command transmission buffer is provided with an area capable of storing a maximum of 16 commands so that a plurality of commands can be accumulated. In addition, addresses (0 to 15) are assigned to the storage areas for the respective commands. Further, in the command transmission buffer, a transmission pointer indicating an address of an area in which a command to be transmitted next is stored and a storage pointer indicating an address of an area in which the command is to be stored next are set. The transmission pointer is incremented by 1 each time an unsent command stored in the command transmission buffer is transmitted (cleared to 0 when overflowed), and the storage pointer is incremented by 1 when storing the command. (If it overflows, it is cleared and set to 0.) When all unsent commands are sent, and all areas of the command transmission buffer are filled with unsent commands. Sometimes the address indicated by the transmission pointer and the address of the storage pointer are the same number. If an unsent command is stored, the unsent flag is set. Therefore, if the address indicated by the send pointer and the address of the stored pointer are the same number, the unsent flag is set. If the untransmitted flag is not set, it is indicated that the normal command transmission buffer is full of untransmitted commands, and that the untransmitted command is empty.

  The main CPU 41a generates an interrupt 3 at intervals of 0.56 ms, and executes a timer interrupt process (main) when the interrupt 3 occurs, so the timer interrupt process (main) is executed every 0.56 ms. Will be. In the timer interrupt process (main), timer interrupts 1 to 4 are repeatedly performed, and processes unique to these timer interrupts 1 to 4 are performed at intervals of 2.24 ms. . Since the command transmission process for transmitting the command stored in the command transmission buffer is executed by the timer interrupt 2, the command transmission process is also executed at intervals of 2.24 ms.

  On the other hand, the sub CPU 91a of the sub control unit 91 acquires a command buffered in a reception buffer, which will be described later, in a timer interrupt process (sub) in which the command is executed at intervals of 1.12 ms. Therefore, every time the main CPU 41a executes the timer interrupt process (main), that is, when a command transmission process is performed at an interval of 0.56 ms, there is a possibility that the sub control unit 91 cannot receive the command normally. There is.

  However, in the present embodiment, as described above, the main CPU 41a executes the command transmission process at a rate of once every four timer interrupt processes (main), that is, at an interval of 2.24 ms. By transmitting only one of the commands stored in the command transmission buffer, even when a plurality of commands are transmitted continuously, they are transmitted with a minimum interval of 2.24 ms. It is possible to reliably acquire these continuously transmitted commands on the control unit 91 side.

  In this embodiment, a command is generated in the basic process and stored in the command transmission buffer. When an unsent command stored in the command transmission buffer is detected in the command transmission process in the timer interrupt 2, a delay time is set, and when the set delay time elapses, the command transmission buffer stores the command. The transmitted unsent command is transmitted.

  Specifically, when an untransmitted command is detected, a delay random value set in a range of 0 to 17 is acquired and set in a delay counter provided in a special work in the RAM 41c. At this time, in the command transmission process in which the delay counter value is set and the command transmission process executed in the timer interrupt 2 thereafter, the delay counter value is decremented by 1 and when the delay counter value becomes 0, Send unsent commands.

  That is, the command detected in the command transmission process is a time corresponding to a multiple of the command transmission process execution interval (2.24 ms). Specifically, the command transmission process is performed by subtracting 1 from the delay counter value acquired at that time. Is transmitted after the elapse of time (2.24 ms) {0 to 35.84 ms because the delay counter value is 0 to 17}.

  In the present embodiment, an area capable of storing a plurality of commands is provided in the command transmission buffer, and a newly generated command is stored without waiting for transmission of an untransmitted command stored in the command transmission buffer. Can be stored in an empty area of the command transmission buffer. That is, a plurality of commands can be stored in the command transmission buffer. For this reason, it can be avoided that the progress of the game is stopped due to the delay of the command transmission. Note that this is not the case when the command transmission buffer is full of untransmitted commands.

  In addition, when commands are stored in the command transmission buffer in the basic processing, these commands are stored in the order of generation, and in the command transmission processing, commands are transmitted in the order generated and stored in the command transmission buffer. ing. That is, the commands stored in the command transmission buffer are transmitted in the order in which they are generated and stored.

  Next, the control of the effect performed by the sub control unit 91 based on a command transmitted from the main CPU 41a to the effect control board 90 will be described.

  The sub CPU 91a executes a command reception interrupt process when a strobe signal indicating the transmission of a command from the main CPU 41a is input. In the command reception interrupt process, the command acquired from the command transmission line is stored in the reception buffer provided in the RAM 91c.

  The receiving buffer is provided with an area capable of storing a maximum of 128 commands so that a plurality of commands can be accumulated.

  In the timer interrupt process (sub), the sub CPU 91a determines whether or not an unprocessed command is stored in the reception buffer. If an unprocessed command is stored, the sub CPU 91a is the earliest stage. Based on the received command, the control pattern table stored in the ROM 91b is referred to. Based on the control contents registered in the control pattern table, various effects such as the liquid crystal display 51, the effect LED 52, the speakers 53 and 54, the reel LED 55, etc. Control the output of the device.

  In this embodiment, the time interval (1.12 ms) at which the sub CPU 91a performs the timer interrupt process (sub) is shorter than the time interval (2.24 ms) at which the main CPU 41a transmits a command. If an operation associated with a normal game is performed, an unprocessed command stored in the reception buffer is not received until the next command is received even when commands are continuously transmitted from the main CPU 41a. It is read by the timer interrupt process (sub), and a plurality of unprocessed commands are not accumulated in the reception buffer. When a command transmitted from the main CPU 41a is received, the timer interrupt process performed first after that The command received by (sub) is read and processing corresponding to the command is performed.

  In the control pattern table, the display pattern of the liquid crystal display 51 corresponding to the type of command, the lighting mode of the lighting effect LED 52, the output mode of the speakers 53 and 54, the lighting mode of the reel LED, etc. The control patterns of these effect devices are registered, and when the sub CPU 91a receives the command, the sub CPU 91a, among the control patterns registered corresponding to the effect patterns set in the RAM 91c in the game of the control pattern table, With reference to the control pattern corresponding to the type of command received, output control of the rendering device is performed based on the control pattern. Thereby, the production according to the production pattern and the progress of the game is executed.

  If the sub CPU 91a receives a new command during execution of an effect triggered by the reception of a certain command, the sub CPU 91a stops the effect based on the control pattern being executed, and responds to the newly received command. An effect based on the control pattern is executed. In other words, even if the production is not finished to the end, when a new command is received, the production that was being executed is canceled and a new command is received unless the received new command is not a command that triggers a new production. An effect based on the command is executed.

  In particular, in this embodiment, when an operation for setting the number of bets is performed during execution of an effect, that is, when the sub CPU 91a receives a BET command indicating that the number of bets has been set, the effect being executed is canceled. It is supposed to be. For this reason, if the player wants to proceed to the next game rather than seeing the production to the end, the production is canceled and the next game can be started. There is no. Further, when a credit or bet amount adjustment operation is performed during the performance, that is, after the sub CPU 91a receives a game state command indicating the end of the game, and before receiving an internal winning command indicating the start of the game. When the payout start command is received, the performance being executed is stopped. Credits and bets are settled when the game is terminated. In such a case, by terminating the performance that is being executed, there is an intention to end the game, but the performance continues unnecessarily. It is designed not to be overwhelmed.

  When the internal winning command is received, the effect pattern is selected at a selection rate corresponding to the result of the internal lottery indicated by the internal winning command, and is set in the RAM 91c. The selection rate of the effect pattern is registered in the effect table stored in the ROM 91b. When the sub CPU 91a receives the internal winning command, it is registered in the effect table according to the result of the internal lottery indicated by the internal winning command. Is selected from a plurality of types of effect patterns according to the selection rate, and the selected effect pattern is set in the RAM 91c as the effect pattern of the game, Even if the same command is received, a different control pattern is selected depending on the effect pattern selected when the internal winning command is received. As a result, different effects may be performed depending on the effect pattern.

  In this embodiment, the power is supplied to the RAM 41c even after the power interruption, and the control state of the main CPU 41a at the time of the power interruption can be maintained. When the main CPU 41a is activated, the data in the RAM 41c is normal, If the setting key switch 37 is OFF, the control state of the main CPU 41a is returned to the control state before the power interruption, and the main CPU 41a returns to the control state before the power interruption after the activation. Then, a return command indicating that the control state before power interruption is returned is generated, set in the command transmission buffer, and transmitted to the sub-control unit 91 in the timer interrupt process (main) after canceling the prohibition of interrupt. .

  Further, when the main CPU 41a is activated, if the data in the RAM 41c is not normal and the setting key switch 37 is OFF, the RAM 41c is initialized and controlled to a RAM abnormal error state, and the main CPU 41a is controlled. After the start-up, when controlling to the RAM abnormal error state without returning to the control state before the power interruption, an error command indicating the occurrence of the RAM abnormal error state is generated and set in the command transmission buffer. After canceling the prohibition of transmission, it is transmitted to the sub-control unit 91 in the timer interrupt process (main).

  Further, when the main CPU 41a is activated, if the setting key switch 37 is ON regardless of whether the data in the RAM 41c is normal or not, the RAM 41c is initialized and controlled to the setting change mode. The main CPU 41a generates a setting change start command indicating the transition to the setting change mode and stores it in the command transmission buffer when controlling to the setting change mode without returning to the control state before the power interruption after the activation. After setting and canceling the prohibition of interrupt, it is transmitted to the sub-control unit 91 in the timer interrupt process (main).

  As described above, when the main CPU 41a is activated, the main CPU 41a starts a return command when returning to the control state before power interruption, and starts an error command or setting change indicating a RAM abnormality when not returning to the control state before power interruption. Any one of the commands is always transmitted to the sub-control unit 91. If none of these commands is transmitted after the main CPU 41a is started, some command cannot be transmitted to the main CPU 41a. It is possible to identify that a problem has occurred.

  When the main CPU 41a returns to the control state before power interruption, the command transmission buffer is also restored as it is, so that an untransmitted command is stored in the command transmission buffer before power interruption. In this case, the return command is generated and stored after the untransmitted command. In this case, the return command is generated later and stored in the command transmission buffer. It is transmitted after all the transmission commands are transmitted.

  A control pattern storage area in which a control pattern is set is assigned to the RAM 91c of the sub control unit 91, and when the sub CPU 91a receives a command from the main control unit 41, the sub CPU 91a controls the control pattern according to the command. While setting in the pattern storage area, the output state of the rendering device is controlled with reference to the control pattern set in the control pattern storage area.

  For example, as shown in FIG. 7A, when the sub CPU 91a receives the command a, the pattern a corresponding to the command a is set in the control pattern storage area, and the rendering device is set in the output state based on the pattern a almost simultaneously with this. To control. As a result, an image based on the pattern a is displayed on the liquid crystal display 51, sound effects based on the pattern a are output from the speakers 53 and 54, and the effect effect LED 52 and the reel LED 55 are turned on based on the pattern a. After that, when the command b is received, the control pattern in the control pattern storage area is updated to the pattern b corresponding to the command b, and when the control pattern in the control pattern storage area is changed, the effect device is changed almost at the same time. The output state based on the pattern b is controlled. As a result, the image based on the pattern a displayed on the liquid crystal display 51 is updated to the image based on the pattern b, sound effects based on the pattern b are output from the speakers 53 and 54, and the effect effect LED 52 and the reel LED 55 are displayed on the pattern b. It becomes a lighting mode based on. Also, as shown in FIG. 7B, when the corresponding control pattern receives the same command c as the command a, the control pattern in the control pattern storage area is updated to the pattern a corresponding to the command c. The control pattern of the area itself does not change. In this case, the state is maintained without switching the output state of the effect device.

  Further, the sub CPU 91a is activated before the main CPU 41a when the power is turned on, and if the data in the RAM 91c is normal at the time of activation, the sub CPU 91a is always returned when the main CPU 41a is activated, and an error indicating a RAM abnormality. Without receiving any command or setting change start command, the control state of the sub CPU 91a is returned to the control state before the power interruption, but any one of the return command, the error command indicating the RAM abnormality, or the setting change start command is issued. Until it is received, output control according to the control pattern set in the control pattern storage area is not performed, and output control according to the recovery pattern A for notifying that recovery processing is in progress is performed. As a result, a restoring image indicating that the restoration process is in progress is displayed on the liquid crystal display 51, and the effect effect LED 52 is turned off. Note that there is no output of sound effects from the speakers 53 and 54, and the reel LED 55 is also turned off. After that, when a return command is received, output control is performed according to the control pattern set in the control pattern storage area, and the output state of the rendering device is set from the recovering pattern A to the control pattern storage area at this time. The output state is switched according to the control pattern being set. As a result, the restoring image displayed on the liquid crystal display 51 is updated to an image based on the control pattern set in the control pattern storage area, and the control pattern set in the control pattern storage area is changed from the speakers 53 and 54. Based on the sound effect, the effect LED 52 and the reel LED 55 are turned on based on the control pattern set in the control pattern storage area.

  Further, as described above, when the main CPU 41a returns to the control state before the power interruption, if a command that has not been transmitted is stored in the command transmission buffer before the power interruption, the main CPU 41a indicates that the return command is not transmitted. The sub CPU 91a returns the control state to the control state before the power interruption at the time of activation, and then returns the command, the error command indicating the RAM abnormality, or the setting change. When other commands are received when none of the start commands are received, the control pattern before power interruption set in the control pattern storage area is updated to the control pattern corresponding to the command. It has become. At this time, the output state of the rendering device is maintained in the recovery pattern A, and does not switch to the output state according to the new control pattern, but when the return command is received, the output state according to the new control pattern Become.

  For example, as shown in FIG. 8, after the sub CPU 91a returns the control state to the control state before power interruption at the time of activation, the sub CPU 91a receives both a return command, an error command indicating a RAM abnormality, or a setting change start command. When the command b is received before, the control pattern in the control pattern storage area is updated from the control pattern a before power interruption to the pattern b corresponding to the command b, but the output state of the effect device is not changed, and the pattern being restored A is maintained, and when the return command is received, the output state is controlled based on the pattern b set in the control pattern storage area. In other words, before receiving the return command, when the command is received, the control pattern set before power interruption is updated to the control pattern corresponding to the received command, and when the return command is received, the command received before that The output control is performed with a control pattern reflecting the above.

  If the data in the RAM 91c is not normal at the time of activation, the sub CPU 91a receives a return command, an error command indicating a RAM abnormality, or a setting change start command that is always transmitted when the main CPU 41a is activated, as shown in FIG. Even if any of them is not received, the RAM 91c is initialized, and the corresponding pattern 0 (normal screen display, etc.) is set in the control pattern storage area after initialization, but a return command, an error command indicating a RAM error, or a setting change start Until one of the commands is received, the output control according to the pattern 0 set in the control pattern storage area is not performed, and the output control according to the recovery pattern B for notifying that the recovery process is being performed is performed. . As a result, the restoration-in-progress image same as the restoration-in-progress pattern A is displayed on the liquid crystal display 51, but the effect LED 52 is in a blinking state unlike the restoration-in pattern A. Note that, as in the recovery pattern A, no sound effect is output from the speakers 53 and 54, and the reel LED 55 is also turned off. After that, when a return command is received, output control is performed according to the pattern 0 set in the control pattern storage area, and at this time, the output state of the rendering device is set from the recovering pattern B to the control pattern storage area The output state is switched according to the pattern 0. As a result, the restoring image displayed on the liquid crystal display 51 is updated to the normal screen based on the control pattern 0, no sound effect is output from the speakers 53 and 54, and the effect effect LED 52 and the reel LED 55 are turned off. Become.

  If the data in the RAM 91c is not normal, the recovery state A when the data in the RAM 91c is normal is used as an output state until receiving either a return command, an error command indicating a RAM abnormality, or a setting change start command. Is configured to perform output control in accordance with the recovery pattern B having a different output mode. In the present embodiment, a restoration-in-progress image is displayed on the liquid crystal display 51 for both the restoration patterns A and B, no sound effect is output from the speakers 53 and 54, and the reel LED 55 is turned off. In the pattern A, the effect effect LED is turned off, whereas in the recovery pattern B, the effect effect LED is in a blinking state.

  In addition, the sub CPU 91a does not receive any of a return command, an error command indicating a RAM abnormality, or a setting change start command after initialization of the RAM 91c after the RAM 91c is initialized. When the command is received, the pattern 0 set in the control pattern storage area is updated to the control pattern corresponding to the command. At this time, the output state of the rendering device is maintained as the in-recovery pattern B, and does not switch to the output state according to the new control pattern, but when the return command is received, the output state according to the new control pattern Become.

  For example, as shown in FIG. 10, when the sub CPU 91a receives the command b after initializing the RAM 91c at the time of startup and before receiving any of the return command, the error command indicating the RAM abnormality, or the setting change start command. The control pattern in the control pattern storage area is updated from pattern 0 to pattern b corresponding to command b, but the output state of the rendering device is not changed and is maintained as recovery pattern B, and then a return command is received. At the time, the output state based on the pattern b set in the control pattern storage area is controlled. That is, before receiving the return command, when the command is received, the pattern 0 set when the RAM 91c is initialized is updated to the control pattern corresponding to the received command, and when the return command is received, it is received before that. The output control is performed with the control pattern reflecting the command.

  Further, when the sub CPU 91a receives the setting change start command after the activation, the data in the RAM 91c is normal and the control state is returned to the control state before the power interruption, as shown in FIG. The control pattern before power interruption set in the control pattern storage area is updated to the setting changing pattern informing that the setting is being changed, and the control pattern before power interruption in the control pattern storage area is the pattern being changed. Is changed to the output state corresponding to the setting changing pattern almost simultaneously with this, and the output state of the rendering device is switched from the restoring pattern A to the output state based on the setting changing pattern. As a result, the restoring image displayed on the liquid crystal display 51 is updated to a setting changing image indicating that the setting is being changed, a warning sound is output from the speakers 53 and 54, and the effect effect LED 52 and the reel LED 55 are blinked. .

  Also, if the RAM 91c data is not normal and the RAM 91c is initialized and a setting change start command is received, the setting change for notifying that the pattern 0 set in the control pattern storage area is being changed. When the pattern 0 is updated to the middle pattern and the pattern 0 in the control pattern storage area is changed to the setting changing pattern, the production device is controlled to the output state corresponding to the setting changing pattern almost simultaneously with this, and the output state of the production device is changed. Switching from the restoring pattern B to the output state based on the setting changing pattern.

  Further, when the sub CPU 91a receives the error command indicating the RAM abnormality after the activation, the data in the RAM 91c is normal and the control state is returned to the control state before the power interruption, as shown in FIG. As described above, the control pattern before power interruption set in the control pattern storage area is updated to a RAM abnormality error pattern for notifying a RAM abnormality error, and the control pattern before power interruption in the control pattern storage area is changed to a RAM abnormality error pattern. When changed, the rendering device is controlled to an output state corresponding to the RAM abnormal error pattern almost simultaneously with this, and the output state of the rendering device is switched from the restoring pattern A to the output state based on the RAM abnormal error pattern. As a result, the restoration-in-progress image displayed on the liquid crystal display 51 is updated to an error notification image indicating a RAM abnormality, a warning sound is output from the speakers 53 and 54, and the effect effect LED 52 and the reel LED 55 are in a blinking state.

  If the RAM 91c data is not normal but the RAM 91c is initialized and an error command indicating a RAM abnormality is received, the pattern 0 set in the control pattern storage area is notified of the RAM abnormality error. When the pattern is updated and pattern 0 in the control pattern storage area is changed to the RAM abnormal error pattern, the rendering device is controlled to the output state corresponding to the RAM abnormal error pattern almost simultaneously with this, and the output state of the rendering device is restored. The medium pattern B is switched to the output state based on the RAM abnormality error pattern.

  Further, when the sub CPU 91a starts up, after the data in the RAM 91c is normal and the control state is returned to the control state before the power interruption, both the return command, the error command indicating the RAM abnormality, or the setting change start command If the inspection mode transition waiting time has passed without receiving, the control pattern before power interruption set in the control pattern storage area is saved as shown in FIG. When the inspection mode pattern for the inspection mode for verification is updated and the control pattern before power interruption in the control pattern storage area is changed to the inspection mode pattern, the rendering device is set to the output state for the inspection mode almost simultaneously with this. And the output state of the rendering device is switched from the recovering pattern A to the output state for the inspection mode. As a result, the restoration-in-progress image displayed on the liquid crystal display 51 is updated to the initial screen in the inspection mode, no sound effect is output from the speakers 53 and 54, and the effect effect LED 52 and the reel LED 55 are also turned off.

  In this embodiment, the RAM 91c is not cleared even when the inspection mode is entered, and the control pattern before power interruption set in the control pattern storage area is also saved, and the inspection mode is entered. After that, if the data in the RAM 91c is normal when the power is once turned off and then restarted, and the sub CPU 91a is restarted, when the return command is received from the main CPU 41a thereafter, it is based on the data held in the RAM 91c. Thus, the control state of the sub CPU 91a and the output state of the effect device are restored.

  In addition, when the data in the RAM 91c is not normal and the RAM 91c is initialized, the return command, the error command indicating the RAM abnormality, or the setting change start command is not received and the inspection mode transition waiting time has elapsed. When the pattern 0 set in the control pattern storage area is updated to the inspection mode pattern for the inspection mode, and the pattern 0 in the control pattern storage area is changed to the inspection mode pattern, the rendering device is used for the inspection mode almost simultaneously with this. The output state of the rendering device is switched from the recovering pattern B to the output state for the inspection mode.

  Conventionally, in a gaming machine having a game control means for controlling a game and an effect control means for controlling an effect, the control state of each of the game control means and the effect control means is backed up even when the power is cut off, and after the power is turned on , It is determined whether or not the game control means can be restored to the state before the power interruption, and if the game control means cannot be restored, the control state of the game control means is initialized to indicate that the game control means control state has been initialized. While the initialization command is transmitted to the effect control means, the effect control means automatically restores the control state of the effect control means to the state before the power interruption if the initialization command is not received for a predetermined time after the power is turned on. Something has been proposed.

  In such a gaming machine, when the effect control means receives an initialization command within a predetermined time after turning on the power, the control state of the effect control means is also initialized so that the game control means is in a state before power interruption. If the game control means is initialized when the power is turned on, the state of the game control means and that of the effect control means can be matched. If the control means is out of order and cannot return to the control state before the power interruption, and the initialization command cannot be transmitted, only the effect control means may return to the control state before the power interruption. .

  As a method for solving such a problem, even when the game control means returns normally, a return command indicating that is sent, and when the effect control means can return the control state to the state before the power interruption, It is conceivable to return to the state before the power interruption by receiving the return command. However, as in this embodiment, a plurality of commands can be stored, and the plurality of commands are generated in the order in which they are generated. When sending back these unsent commands, the unsent commands will be reflected in the post-recovery status, so that the unsent commands will be restored before recovery from a power outage. It is necessary to send a command. In this case, even if the return command is sent only once after the power is turned on, the command transmission order is changed when the power is turned on. Must be transmitted using different control than the other command, a problem that the transmission control of the normal command and release command can not be transmitted by the transmission control of the shared results.

  On the other hand, in the slot machine of this embodiment, when the main CPU 41a is started up, the return command is returned to the control state before the power interruption, and the RAM is returned to the control state before the power interruption. Either an error command indicating an error or a setting change start command is always transmitted to the sub-control unit 91, and the sub CPU 91a receives a return command, an error command indicating a RAM error, or a setting change start command. Even if the main CPU 41a cannot send a command even if the game control board 40 fails and the main CPU 41a is unable to control the output of the effect device according to the control pattern set in the control pattern storage area. Such a situation where the output state of the staging device does not return according to the control pattern before the disconnection Even it is possible to align the output state by the effect device and the control state of the main CPU 41a.

  In addition, after the activation, the sub CPU 91a is in a state before receiving a return command, an error command indicating RAM abnormality, or a setting change start command, and the output of the effect device according to the control pattern set in the control pattern storage area Even when control is not started, receiving another command updates the control pattern set in the control pattern storage area to the control pattern corresponding to the received command, and then returns the return command. When receiving, since the output control of the rendering device is performed according to the updated control pattern, even when the main CPU 41a returns with the untransmitted command stored in the command transmission buffer, it is the same as other commands A return command is generated, stored in the command transmission buffer, and sent in the same way as other commands. By sending the return command after sending the unsent command in the order stored in the buffer, the command that has not been sent before power interruption can be reflected in the control pattern stored in the control pattern storage area. Then, by receiving the return command, the output control of the rendering device can be started in a state reflecting the command that has not been transmitted before the power interruption.

  In addition, the sub CPU 91a determines whether or not the data in the RAM 91c is normal at the time of activation. If the data is not normal, the sub CPU 91a initializes the RAM 91c without waiting for reception of a return command, an error command indicating a RAM abnormality, or a setting change start command. When the pattern 0 is set in the control pattern storage area and a return command is received after that, the output control of the effect device is performed in the output state corresponding to the pattern 0, and the sub CPU 91a controls the RAM 91c. Even if it is not possible to return to the control state before the power interruption based on the data, when the return command is received from the main CPU 41a, the output of the effect device does not stop and the effect is produced according to the initialized control pattern. The output control of the device can be started.

  Further, the sub CPU 91a outputs the output of the rendering device in accordance with the recovery process pattern indicating that the recovery process is in progress until it receives any of the return command, the error command indicating the RAM abnormality, or the setting change start command after the activation. Even if the sub CPU 91a is in the state before the output of the rendering device corresponding to the control pattern set in the control pattern storage area is started after the power is turned on. , Can be easily confirmed from the outside.

  In particular, in this embodiment, when the sub CPU 91a returns to the control state before the power interruption and is waiting to receive any of a return command, an error command indicating a RAM abnormality, or a setting change start command, While the output control of the rendering device is performed according to the pattern A being restored, the sub CPU 91a receives any of a return command, an error command indicating a RAM abnormality, or a setting change start command with the RAM 91c initialized. Is being output, the output control of the effect device is performed in accordance with the recovering pattern B having a different output mode from the recovering pattern A, and the effect device in the output state of the recovering pattern From the output mode, it is confirmed from the outside whether the sub CPU 91a has returned to the control state before the power interruption or the RAM 91c has been initialized. Door can be.

  In addition, after the activation, the sub CPU 91a does not receive any of the return command, the error command indicating the RAM abnormality, or the setting change start command. The game mode automatically shifts to the inspection mode for verifying the game, and it is possible to control the inspection mode only by starting the sub CPU 91a without connecting the game control board 40 and the effect control board 90. Therefore, the stage device can be easily inspected in the development stage and manufacturing stage of the slot machine.

  The effect control board 90 of the present embodiment is connected to a command simulator (test game control board) before shipment, and the sub CPU 91a is shifted to the above-described inspection mode, whereby each part mounted on the effect control board 90 is An operation test can be performed.

  In the operation test, an inspection command specifying a component to be operated by the command simulator and its operation mode is transmitted.

  The slot machine 1 of this embodiment is equipped with LED, lamp, cold-cathode tube and other electrical components, a speaker, a liquid crystal display 51, and a touch panel controlled by the sub-control unit 91. An output port and its output port It is possible to inspect the operation of the designated part by designating the part corresponding to 1 and its operation mode by the inspection command. The inspection command is composed of 2 bytes. The output port is designated by the first byte, and the component to be operated and the operation mode are designated by the second byte.

  In the inspection command that inspects the operation of the lighting component, you can specify lighting and extinguishing as the operation mode, and if the lighting component can turn on multiple colors, you can also specify the lighting color It is.

  In the inspection command to inspect the operation of the speaker, as the operation mode, the output from both left and right only, the type of sound to be output, and the ROM check of the sound ROM (ROM that stores sound data output from the speaker) Can be specified.

  In the inspection command for inspecting the operation of the liquid crystal display 51, the operation mode includes color bar display, red display, green display, blue display, white display, black display, electrostatic test screen display, CGROM (liquid crystal display 51 ROM check of image data (CG data to be displayed on CG), display area check of liquid crystal display 51, display of image data A to D stored in CGROM, and check of VRAM. Is possible.

  In the inspection command for inspecting the operation of the touch panel, it is possible to specify a defective beam check of the touch panel and an operation check of the touch panel as operation modes. When a touch panel defect check is designated, the voice ROM and CGROM ROM checks are also designated at the same time.

  As another inspection command, there is an inspection command for confirming the backup of the bonus medium effect. In this inspection command, the display of the bonus medium screen, the operation of the electrical components in the bonus, and the BGM output in the bonus are designated.

  In one inspection command, it is possible to specify only one output port, components corresponding to the output port, and operation modes, and when different components of the output port are operated simultaneously and inspected, Send inspection commands with specified ports continuously. For this reason, it is necessary to transmit 40 inspection commands continuously even if only the test for operating all the electrical parts is performed, and the operation of parts other than the electrical parts is also tested at the same time. In some cases, it is necessary to continuously transmit a maximum of 128 inspection commands according to the combination.

  In the command simulator, an inspection command for designating the operation of a plurality of electrical components, an inspection command for designating the operation of electrical components, an inspection command for designating the operation of the speaker, and an inspection command for designating the operation of the liquid crystal display 51 The inspection command for designating the operation of the speaker and the inspection command for designating the operation of the liquid crystal display 51 can be transmitted simultaneously, but the liquid crystal display 51 different from the inspection command for designating the operation of the liquid crystal display 51 can be transmitted. It is not possible to simultaneously transmit operation commands that specify operations that cannot be performed simultaneously, such as inspection commands that specify the operation of the liquid crystal display 51 and inspection commands that specify the operation of the touch panel. It has become.

  As described above, if an operation associated with a normal game is being performed, an unprocessed command stored in the reception buffer is the next command even when commands are continuously transmitted from the main CPU 41a. Since it is read out by the timer interrupt process (sub) before reception, a plurality of unprocessed commands are not stored in the reception buffer. However, in the operation test by the command simulator, a maximum of 128 inspection commands are continuously recorded. Since there is a possibility of transmission, an area capable of storing 128 commands is provided in the reception buffer of the RAM 91c.

  In the timer interrupt process (sub), the sub CPU 91a determines whether or not an unprocessed command is stored in the reception buffer. If an unprocessed command is stored, the sub CPU 91a receives it from the reception buffer at the earliest stage. The read command is read out, and it is determined whether or not the read command is an inspection command. As a result, when the read command is an inspection command, the component specified by the inspection command and its operation mode are specified, and the specified component is operated in the specified operation mode. As a result, the operation status based on the inspection command transmitted from the command simulator can be confirmed from the outside.

  In general, the effect control means has the same number of reception buffers as the transmission buffers of the game control means, and the number of transmission buffers and the number of reception buffers are such that there is no overflow in the case of a normal game. Therefore, as long as the game is played normally, more commands than the reception buffer are not transmitted continuously, and the command transmitted from the game control means overflows. There is no. However, in the operation test for inspecting whether or not the production control means operates normally during development or before shipment as described above, a large number of commands are connected by connecting the test game control means to the production control means. It is possible to increase the efficiency of the operation test by continuously transmitting the message, but if the number of reception buffers is the same as the number of transmission buffers as described above, a large number of commands are transmitted during the operation test. There is a risk that the reception buffer overflows and the operation test cannot be performed accurately. For this reason, it is necessary to increase the number of commands or transmission intervals that are continuously transmitted during the operation test, and as a result, there arises a problem that the efficiency of the operation test cannot be sufficiently increased.

  On the other hand, in this embodiment, the command that the main control unit 41 transmits to the sub control unit 91 is stored in the reception buffer that stores the command received by the sub control unit 91 from the main control unit 41. A storage area capable of storing a larger number of commands than the command storage area of the command transmission buffer is provided. Accordingly, when an operation test board such as a command simulator is connected to the effect control board 90 and an operation test is performed, the number of inspection commands that can be transmitted at one time and the transmission interval can be transmitted even when the inspection commands are continuously transmitted. However, the number of storage areas of the normal command transmission buffer provided in the main control unit 41, that is, the number of storage areas allocated as many as possible so as not to overflow assuming a normal game (16 commands in this embodiment) The number of test commands can be continuously transmitted up to the limit of the receiving buffer storage area (128 commands in this embodiment) without being limited according to the efficiency of the operation test. Can be effectively increased.

  Further, in this embodiment, for each inspection command, a plurality of lighting parts, liquid crystal display 51, touch panel and other effect parts can be individually designated and an operation test can be performed. By transmitting an inspection command for designating each production component such as a certain electrical decoration component, liquid crystal display 51, and touch panel, it is possible to accurately inspect whether or not each production component operates normally.

  In the present embodiment, when an operation test is performed in the slot machine 1, it is possible to specify only one output port, a production component corresponding to the output port, and an operation mode thereof with one inspection command. Therefore, a storage area that can store a larger number of commands based on the number of output ports is provided in the storage area of the reception buffer, and operation tests of all the production parts are performed collectively. In this case, even when the inspection commands corresponding to the respective output ports are continuously transmitted, the reception buffer does not overflow, so that the operation test can be performed more efficiently.

  In this embodiment, it is possible to specify only one output port, a production component corresponding to the output port and its operation mode with one inspection command, but with one inspection command, It may be possible to specify only one performance component and its operation correspondence. In this case, by providing a storage area in the reception buffer that can store more commands than the number of performance components, When performing production component operation tests in a batch, even if inspection commands corresponding to each production component are sent continuously, the reception buffer does not overflow, so the operation test is more efficient. It can be performed.

  In the gaming machine in which the production control means controls the production according to the operation of the production operation means such as a touch panel as in the present embodiment, it is necessary to inspect the detection status of the operation of the production operation means. If the next inspection command is mistakenly transmitted before the operation is detected, the next inspection command is received without waiting for the detection of the operation of the operation means for production, and the next operation test is performed. There is a problem that the detection of the operation detection status of the operation means for production cannot be normally performed.

  On the other hand, when the sub CPU 91a according to the present embodiment receives the inspection command designating the touch panel operation check and performs the touch panel operation check, the sub CPU 91a performs the command reception interrupt process until the touch operation is detected. During this period, new commands are not received, and even if a new command is transmitted during this period, the new command is not detected until the touch operation is detected and the operation check is completed. It is not received and processing based on the command is not performed. For this reason, even when the inspection command is erroneously transmitted without waiting for the completion of the operation check of the touch panel, the operation check inspection of the touch panel can be normally performed.

  The sub CPU 91a not only prohibits command reception interrupt processing but also stores it in the reception buffer until a touch operation is detected after receiving an inspection command designating an operation check of the touch panel. Even if the command is already received and the received command is stored in the reception buffer, the touch operation is detected and the operation check is completed. The processing based on the command stored in the reception buffer is not performed. For this reason, even when another inspection command is transmitted in succession to the inspection command designating the touch panel operation check, the touch panel operation check inspection can be performed normally.

  In this embodiment, the touch panel is applied as the production operation means. However, production operation means other than the touch panel, such as buttons and dials, may be applied, and operation checks other than the production operation means other than the touch panel may be performed. Even in the case of performing the operation check, even if the inspection command is erroneously transmitted without waiting for the completion of the operation check by prohibiting the reception of the command until the operation of the production operation means is detected in the same manner as described above. The inspection can be performed normally, and the command stored in the reception buffer is not read out until the operation of the production operation means is detected, so that another inspection command specifying the operation check is continuously performed. Even when the inspection command is transmitted, the operation check can be normally performed.

  Next, various control contents executed by the main CPU 41a of the main control unit 41 in the present embodiment will be described based on the flowcharts shown in FIGS.

  When the reset signal is input from the reset circuit 49, the main CPU 41a performs a startup process (main) shown in the flowchart of FIG. Since the reset signal is a signal that is output when the power is turned on and when the operation of the main control unit 41 is stagnant, the activation process (main) is performed when the main CPU 41a is activated when the power is turned on and when the main CPU 41a malfunctions. This process is performed when restarting.

  In the startup process (main), first, the built-in device, peripheral IC, interrupt mode, stack pointer, etc. are initialized (Sa1), then the voltage drop signal detection data is acquired from the input port, and the voltage drop signal is input. Whether or not the voltage is stable (Sa2), and if the voltage drop signal is input, any of the other than the determination of whether or not the voltage drop signal is input The process proceeds to a loop process that does not perform any process.

  If it is determined in step Sa2 that the voltage drop signal is not input, the values of the I register and IY register are initialized (Sa3). By the initialization of the I register and the IY register, the address of the interrupt table to be referred to when an interrupt occurs is set in the I register, and the reference address for referring to the storage area of the RAM 41c is set in the IY register. . These values are fixed values and are always initialized at startup.

  Next, access to the RAM 41c is permitted (Sa4), the RAM parity of all storage areas (including the unused area and the unused stack area) of the RAM 41c is calculated (Sa5), the abort switch 36, the automatic settlement switch 29 And the valid / invalid of the stop function and the automatic settlement function are set in a specific register of the main CPU 41a (Sa6).

  Next, it is determined whether or not the RAM parity calculated in step Sa5 is 0 (Sa7). If the power interruption interrupt processing (main) is normally performed, the RAM parity should be 0. If the RAM parity is not 0 in the step of Sa7, the data stored in the RAM 41c is not normal. In this case, after executing the initialization 1 for initializing all the storage areas except the used stack area among the storage areas of the RAM 41c (Sa17), whether or not the setting key switch 37 is ON, that is, the RAM 41c. Is determined (Sa18), and if the setting key switch 37 is ON, interrupt is permitted (Sa16), and the setting change process, ie, the setting change mode is entered.

  If the setting key switch 37 is OFF in step Sa18, an error code indicating a RAM abnormality is set in the register (Sa19), interrupt is permitted (Sa20), and the process proceeds to error processing, that is, a RAM abnormality error state. .

  If the RAM parity is 0 in step Sa7, it is further determined whether or not the destructive diagnosis data is normal (Sa8). If power interruption interrupt processing (main) is performed normally, the data for destruction diagnosis should be set. If the data for destruction diagnosis is not normal in step Sa8 (data for destruction diagnosis is power interruption) Since the data in the RAM 41c is not normal also in cases other than 5A (H) stored at the time, the process proceeds to step Sa18 to execute initialization 1, and then the setting key switch 37 is turned on in step Sa19. If so, the interrupt is permitted (Sa16), and the process proceeds to the setting change process. If the setting key switch 37 is OFF, an error code indicating a RAM abnormality is set in the register (Sa19), and the interrupt is permitted. (Sa20) and the process proceeds to error processing.

  If it is determined in step Sa8 that the destructive diagnosis data is normal, the data in the RAM 41c is normal, and therefore the destructive diagnosis data is cleared (Sa9). After performing initialization 3 to initialize the used stack area (Sa10), it is determined whether the setting key switch 37 is ON (Sa11). If the setting key switch 37 is ON, the process proceeds to step Sa15. Initialization 1 is executed, and then, if the setting key switch 37 is ON in step Sa19, interrupt is permitted (Sa16), and the process proceeds to setting change processing.

  If the setting key switch 37 is OFF in step Sa11, a return command is generated and set in the command transmission buffer (Sa12), and each register is returned to the state before power interruption, that is, the state saved in the stack. (Sa13), the interruption is permitted (Sa14), and the process returns to the last execution before the power interruption. When the interrupt is permitted in the step Sa14, the timer interrupt process (main) is periodically executed, and the return command set in the step Sa12 is transmitted to the sub CPU 91a. .

  FIG. 15 is a flowchart showing the control contents of error processing executed by the main CPU 41a.

  In the error processing, first, the current display state of the game auxiliary display 12 is saved in the stack (Sb1), the error code stored in the register is displayed on the game auxiliary display 12 (Sb2), and an error state is generated. Then, an error command indicating the type is set in the command transmission buffer (Sb3). The error command set in step Sb3 is transmitted to the sub CPU 91a in the subsequent timer interrupt process (main).

  Next, the error code stored in the register is checked to determine whether or not the error code is an error code indicating a RAM abnormal error or an abnormal winning error (Sb4), and a RAM abnormal error or an abnormal winning error is indicated. If it is an error code, the process proceeds to a loop process in which no process is performed.

  If it is determined in step Sb4 that the error code does not indicate a RAM error or an abnormal winning error, it is determined whether an operation of the reset / setting switch 38 is detected (Sb5). If the operation of the setting switch 38 is not detected, it is further determined whether or not the operation of the reset switch 23 is detected (Sb6). If the operation of the reset switch 23 is not detected, the process returns to the step Sb5. . That is, the game waits in a state where the progress of the game is impossible until the operation of the reset / setting switch 38 or the reset switch 23 is detected.

  When the operation of the reset / setting switch 38 is detected in the step Sb5 or when the operation of the reset switch 23 is detected in the step Sb6, the error code stored in the register is cleared (Sb7 ), The display state of the game auxiliary display 12 is returned to the display state saved in the stack in the step Sb1 (Sb8), and an error command indicating that the error state is released is set in the command transmission buffer (Sb9). ) And return to the original process. The error command set in Sb9 is transmitted to the sub CPU 91a in the subsequent timer interrupt process (main).

  As described above, in the error processing, if the error processing is other than the RAM abnormal error and the abnormal winning error, the reset / setting switch 38 or the reset switch 23 is operated, so that the error processing is canceled. However, in the case of error processing due to a RAM error or an abnormal winning error, even if the reset / setting switch 38 or the reset switch 23 is operated, the error state is canceled and the original state is not restored.

  FIG. 16 is a flowchart showing the control content of the setting change process executed by the main CPU 41a.

  In the setting change process, first, a setting change start command is generated and set in the command transmission buffer (Sc1). The setting change start command set in the step of Sc1 is transmitted to the sub CPU 91a in the subsequent timer interrupt process (main).

  Next, the set value stored in the set value work of the RAM 41c is read out, and the read value is set as the display value (Sc2), and it is determined whether or not the display value is outside the settable range (1-6) (Sc3). If the display value is within the settable range, the process proceeds to step Sc5. If the display value is outside the settable range, the display value is corrected to 1 (Sc4), and the process proceeds to step Sc5.

  In the step of Sc5, after the display value is displayed on the setting value display 24, the operation waits for detection of the operation of the reset / setting switch 38 and the start switch 7 (Sc6, Sc7). In the step of Sc6, the reset / setting switch When 38 operations are detected, 1 is added to the display value (Sc8), and the process returns to the step Sc3.

  When the operation of the start switch 7 is detected in the step of Sc7, the value displayed on the set value display 24 is updated to 0 (Sc9), and the process waits until the setting key switch 37 is turned off. (Sc10).

  When it is determined in step Sc10 that the setting key switch 37 is OFF, the display value is stored in the set value work, and after the set value is confirmed (Sc11), a game state command is generated and set in the command transmission buffer. (Sc12), and the process proceeds to game processing. The gaming state command set in the step of Sc12 is transmitted to the sub CPU 91a in the subsequent timer interruption process (main).

  FIG. 17 is a flowchart showing the control contents of the game process executed by the main CPU 41a.

  In the game process, a BET process (Sd1), an internal lottery process (Sd2), a reel rotation process (Sd3), a winning determination process (Sd4), a payout process (Sd5), and a game end process (Sd6) are sequentially executed. When the end-time process ends, the process returns to the BET process again.

  In the BET process in the step of Sd1, the player stands by in a state where the number of bets can be set, a predetermined number of bets corresponding to the gaming state is set, and when the start switch 7 is operated, the bet number is confirmed and the game is played. Execute the process to be started.

  In the internal lottery process in step Sd2, a random number for internal lottery is extracted simultaneously with the start of the game by the detection of the start switch 7 in step Sd1, and the winning of each above-described combination is permitted based on the extracted random number value. Process to determine whether or not. In this internal lottery process, a winning flag is set in the RAM 41c based on the respective lottery results.

  In the reel rotation process in the step of Sd3, the process of rotating each reel 2L, 2C, 2R and the operation of the corresponding reel 2L, 2C, 2R in response to the operation of the stop switch 8L, 8C, 8R detected by the player are detected. A process for stopping the rotation is executed.

  In the winning determination process in the step Sd4, when it is determined in the step Sd3 that the rotation of all the reels 2L, 2C, and 2R is stopped, the winning is determined according to the display result derived for each reel 2L, 2C, and 2R. A process of determining whether or not it has occurred is executed.

  In the payout process in step Sd5, when it is determined that a prize is generated in step Sd4, processing such as addition of credits and payout of medals is performed based on the number of payouts according to the win.

  In the game end process in the step of Sd6, a process of setting a gaming state in preparation for the next game is executed.

  In the game process, a command is generated according to the progress of the game and set in the command transmission buffer, so that the set command is transmitted to the sub CPU 91a in the subsequent timer interrupt process (main). It is like that.

  FIG. 18 shows a power interruption interrupt process (main main CPU 41a that interrupts and executes a startup process or a game process when a voltage drop signal is input from the power interruption detection circuit 48 in response to the occurrence of interrupt 2. It is a flowchart which shows the control content of ().

  In the power interruption interruption process (main), first, interruption is prohibited (Sk1). That is, other interrupt processing is prohibited from being executed at the start of the power interruption interrupt processing (main). Next, all registers that may be in use are saved in the stack area (Sk2). Note that the values of the I register and IY register described above are used, but are not saved here because the same fixed value is always set with the initialization at the time of startup.

  Next, the detection data of the voltage drop signal is acquired from the input port, and it is determined whether or not the voltage drop signal is input (Sk3). At this time, if the voltage drop signal is not input, the register saved in the stack area in Sk2 is restored (Sk4), the interrupt prohibited in the Sk1 step is permitted (Sk5), and the process before the interrupt is performed. Return.

  If a voltage drop signal is input in step Sk3, the destruction diagnosis data (5A (H) in this embodiment) is set (Sk6), and all output ports are initialized (Sk7). . Next, the RAM parity adjustment data is calculated and set so that the exclusive OR of all the storage areas (including the unused area and the unused stack area) of the RAM 41c becomes 0 (Sk8), and access to the RAM 41c is performed. It is prohibited (Sk9).

  Then, except for the determination as to whether or not the voltage drop signal is input (Sk10, where Sk10 is the same process as Sk3), the process enters a loop process in which no process is performed. That is, when the voltage decreases as it is, the operation is stopped internally. Therefore, the operation of the main CPU 41a is surely stopped when power is interrupted. Further, in this loop process, when the voltage recovers and the voltage drop signal is not input, the above-described startup process (main) is executed, if the RAM parity is 0 and the destructive diagnosis data is normal, It will return to the original process.

  In this embodiment, after prohibiting access to the RAM 41c, the output state of the voltage drop signal is monitored, and when the voltage drop signal is not input, it is determined that the voltage is restored, and the start process (main) is performed. However, no processing is performed in the loop processing, and the voltage is recovered while the loop processing is being performed, and the activation is performed based on the input of the reset signal from the reset circuit 49. You may make it transfer to a process (main).

  Next, various control contents executed by the sub CPU 91a of the sub control unit 91 will be described below based on the flowcharts of FIGS.

  When the reset signal is input from the reset circuit 95 to the sub control unit 91, the sub CPU 91a performs the startup process (sub) shown in FIG.

  In the startup process (sub), the built-in device, peripheral IC, interrupt mode, stack pointer, etc. are initialized (Sr1), and then access to the RAM 91c is permitted (Sr2). Then, the RAM parity of all the storage areas of the RAM 91c is calculated (Sr3), and it is determined whether or not the RAM parity is 0 (Sr4).

  If the data in the RAM 91c is normal, the RAM parity should be 0. If the RAM parity is 0 in the step Sr4, the data stored in the RAM 91c is normal, and the process proceeds to the step Sr5. Restore the control state before power interruption. In step Sr5, output control of the effect device is performed according to the restoring pattern A, not the control pattern set in the control pattern storage area, and then the process proceeds to step Sr9.

  If the RAM parity is not 0 in the step of Sr4, the data stored in the RAM 91c is not normal. Therefore, after initialization of the RAM 91c (Sr6), the pattern 0 is set in the control pattern storage area (Sr7), and the control is performed. After performing the output control of the effect device according to the pattern B being restored, not the pattern 0 set in the pattern storage area, the process proceeds to step Sr9.

  In step Sr9, a recovery waiting flag indicating waiting for reception of either a return command, an error command indicating a RAM abnormality, or a setting change start command is set in the RAM 91c, and interrupts are permitted (Sr10).

  After that, in the timer interrupt process (sub), it is determined whether a return command, an error command indicating a RAM error, or a setting change start command is received, the recovery waiting flag is cleared, or an error command or setting indicating a RAM error Wait until the inspection mode transition wait time elapses without receiving any change start command (Sr11, Sr12), and when it is determined that the recovery waiting flag is not set in the step of Sr11, that is, the return command, RAM If either an error command indicating an abnormality or a setting change start command is received, the process proceeds to loop processing.

  If it is determined in step Sr12 that neither the error command indicating the RAM abnormality nor the setting change start command has been received and the waiting time for the inspection mode transition has elapsed, the processing shifts to the inspection processing, that is, the inspection mode.

  Next, a timer interrupt process (sub) that is periodically executed by the sub CPU 91a at intervals of 1.12 ms will be described based on the flowchart of FIG.

  As shown in FIG. 20, in the timer interrupt process (sub), first, a power interruption interrupt is prohibited (Ss1), and whether or not a command is stored in the reception buffer, that is, a command is received from the main CPU 41a. It is determined whether or not (Ss2). If the command is not stored in the reception buffer, the process proceeds to step Ss19. If the command is stored in the reception buffer, the command is acquired from the reception buffer (Ss3), and the process proceeds to step Ss4.

  In step Ss4, it is determined whether the acquired command is a return command. If it is not a return command, the process proceeds to step Ss6. If it is a return command, the recovery waiting flag is cleared (Ss5), and the process proceeds to step Ss16. move on.

  In step Ss6, it is determined whether or not the acquired command is a setting change start command. If it is not a setting change start command, the process proceeds to step Ss10. If it is a setting change start command, the recovery waiting flag is cleared (Ss7). ), The RAM 91c is initialized (Ss8), a setting changing pattern is set in the control pattern storage area (Ss9), and the process proceeds to step Ss16.

  In step Ss10, it is determined whether or not the acquired command is an error command indicating a RAM abnormality error. If the command is not an error command indicating a RAM abnormality error, the process proceeds to step Ss14, and if it is an error command indicating a RAM abnormality error, The recovery waiting flag is cleared (Ss11), the RAM 91c is initialized (Ss12), a RAM abnormality error notification pattern is set (Ss13), and the process proceeds to step Ss16.

  In the step of Ss14, when the acquired command is an internal winning command, the effect table stored in the ROM 91b is referred to, and an effect pattern is selected at a selection rate according to the result of the internal lottery indicated by the internal winning command, An effect pattern selection process for setting the selected effect pattern in the RAM 91c as the effect pattern of the game is executed, and the process proceeds to step Ss15.

  In step Ss15, the control pattern table stored in the ROM 91b is referred to, the effect pattern set in the RAM 91c and the control pattern registered corresponding to the acquired command are read out, and the control pattern in the control pattern storage area is read out. Is executed, and the process proceeds to step Ss16.

  In step Ss16, it is determined whether or not a recovery waiting flag is set. If the recovery waiting flag is set, the process proceeds to step Ss19, and if the recovery waiting flag is not set, It is determined whether or not the control pattern set in the control pattern storage area matches the output state of the rendering device (Ss17). The control pattern set in the control pattern storage region matches the output state of the rendering device. In this case, the process proceeds to step Ss19. If they do not match, output control of the effect device is performed according to the control pattern set in the control pattern storage area (Ss18), and the process proceeds to step Ss19.

  In step Ss19, after performing touch panel processing for analyzing the detection status of the touch panel based on the data acquired from the touch panel controller 99, the process proceeds to step Ss20, in which processing for updating various counter values is performed, and then in step Ss1. The interruption interruption prohibited in the step is permitted (Ss21), and the timer interruption process (sub) is ended.

  FIG. 21 is a flowchart showing the control contents of the power interruption interrupt process (sub) executed when the sub CPU 91a receives a voltage drop signal from the power interruption detection circuit 98.

  In the power interruption interruption process (sub), first, interruption is prohibited (St1). That is, other interrupt processes are prohibited from being executed at the start of the power interruption interrupt process (sub). Next, all registers that may be in use are saved in the stack area (St2).

  Next, the detection data of the voltage drop signal is acquired from the input port, and it is determined whether or not the voltage drop signal is input (St3). At this time, if the voltage drop signal is not input, the register saved in the stack area at St2 is restored (St4), the interrupt prohibited in the step of St1 is permitted (St5), and the process before the interrupt is performed. Return.

  If a voltage drop signal is input in step St3, all output ports are initialized (St6). Next, the RAM parity adjustment data is calculated and set so that the exclusive OR of all the storage areas of the RAM 91c becomes 0 (St7), and access to the RAM 91c is prohibited (St8).

  Then, except for the determination of whether or not the voltage drop signal is input (St9, where St9 is the same process as St3), the process enters a loop process in which no process is performed. That is, when the voltage decreases as it is, the operation is stopped internally. Therefore, the sub CPU 91a reliably stops operation when power is interrupted. Further, in this loop processing, when the voltage recovers and the voltage drop signal is not input, the above-described activation processing (sub) is executed, and when the RAM parity becomes 0, the original processing is restored. .

  In this embodiment, after the access to the RAM 41c is prohibited, the output state of the voltage drop signal is monitored, and when the voltage drop signal is not input, it is determined whether the voltage has been restored, and the process proceeds to the startup process (sub). However, no processing is performed in the loop processing, and the voltage is recovered while the loop processing is being performed, and the activation is performed based on the input of the reset signal from the reset circuit 95. You may make it transfer to a process (sub).

  Although the embodiments of the present invention have been described with reference to the drawings, the present invention is not limited to these embodiments, and modifications and additions within the scope of the present invention are included in the present invention. Needless to say.

  For example, in the above embodiment, a slot machine is used as a gaming machine, but the present invention is not limited to this, a game control means for controlling a game, an effect control means for effect control, The present invention can be applied to any game machine equipped with a game ball, and may be applied to a ball game machine that uses a game ball to play a game.

  In the embodiment, the RAM 41c of the main control unit 41 is initialized when it is confirmed that the setting key switch 37 is turned on when the power is turned on, that is, when an operation for shifting to the setting change mode is performed. However, it is also possible to have a configuration in which the RAM initialization operation switch is individually provided and the RAM 41c is initialized by operating the RAM initialization operation switch when the power is turned on.

1 Slot machine 2L, 2C, 2R Reel 6 MAXBET switch 7 Start switch 8L, 8C, 8R Stop switch 41 Main controller 41a Main CPU
41b ROM
41c RAM
91 Sub controller 91a Sub CPU
91b ROM
91c RAM

Claims (1)

A gaming machine capable of performing a predetermined game,
Game control means for performing progress control of the game and transmitting control information based on the progress control of the game;
A directing device for directing;
Effect control means for performing output control by the effect device based on control information received from the game control means;
With
The game control means includes
Control information storage means capable of storing a plurality of the control information;
Control information generating means for generating control information according to the progress control of the game and storing the control information in the control information storage means;
Even if power supply to the gaming machine is stopped, game backup data for returning the control state of the game control means including the control information stored in the control information storage means to the control state before the power supply stop is provided. Game backup data holding means for holding;
A game return determination means for determining whether or not to return the control state of the game control means to the control state before the power supply stop based on the game backup data when power supply to the gaming machine is started;
When the game return determination means determines to return the control state before stopping the power supply, the game returns to restore the control state before the power outage based on the control state of the game control unit to the game backup data Means,
Non-return control information generation means for generating non-return control information when the game return determination means determines not to return to the control state before the power supply stop, and storing in the control information storage means;
Return-time control information generating means for generating return-time control information when the game return means returns to the control state before the power supply stop, and storing in the control information storage means;
Control information transmitting means for transmitting the control information stored in the control information storage means to the effect control means in the order of generation;
Including
The production control means includes
Control state updating means for updating the control state of the effect control means based on reception of the control information;
Effect output control means for performing output control of the effect device based on the control state of the effect control means;
Effect backup data holding means for holding effect backup data for returning the control state of the effect control means to the control state before the power supply stop even if power supply to the gaming machine is stopped,
When the power supply to the gaming machine is started, an effect return determination means for determining whether or not the control state of the effect control means can be returned to the control state before the power supply stop based on the effect backup data;
Regardless of whether the non-return-time control information or the return-time control information is received when the effect return determination means determines that the control state before the power supply stop can be returned, the effect control Effect returning means for returning the control state of the means to the control state before the power supply stop based on the effect backup data;
When the non-return control information is received, the game non-return control means that sets the control state of the effect control means to the control state when the game is non-return,
The effect based on the control state of the effect control means by the effect output control means when receiving either the non-return control information or the return control information after power supply to the gaming machine is started Production output control start means for starting output control of the device,
Including
The control state update means, after the power supply to the gaming machine is started, before receiving either the non-return control information or the return control information, the non-return control information and the return control Even if the control information other than information is received, the control state of the effect control means is updated based on the received control information.

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