JP5239767B2 - System stabilization device - Google Patents

Description

  The present invention relates to a system stabilization device, and even if a power distribution system includes a plurality of system stabilization devices having different charge / discharge characteristics (variation compensation characteristics), stable system stabilization is achieved by preventing interference between the system stabilization devices. In addition to being able to control, it is devised so that optimum system stabilization control can be performed even if the system stabilization device is operated alone.

<Description of micro grid>
In recent years, power generation using natural energy such as sunlight and wind power has been used.
FIG. 3 shows an example in which an existing power system (system higher than the power distribution system) 1 and a power distribution system (microgrid) 10 are connected via a line impedance Ls and a circuit breaker 2.

  A distributed power supply 11 and a load 12 are connected to a power distribution system 10 that is a microgrid. Although the distributed power source 11 is illustrated as one generator in FIG. 3, in reality, it is driven by a natural energy type power generation facility (such as solar power generation or wind power generation) using natural energy and an internal combustion engine. It is composed of a plurality of dispersed power generation facilities including an internal combustion engine type power generation facility (diesel generator or the like). Also, the load 12 is actually a plurality of distributed loads.

Since the microgrid 10 as shown in FIG. 3 has a natural energy type power generation facility, the power generation amount varies greatly depending on the weather, wind speed, and the like.
Therefore, a system stabilizing device is used for the purpose of absorbing the fluctuation of the power generation amount.

  Further, in the internal combustion engine type power generation equipment, the output power is adjusted by the governor control. However, since the response of the governor control is slow, when the power consumed by the load 12 fluctuates suddenly, An internal combustion engine type power generation facility cannot follow sudden fluctuations (rapid excess or deficiency). The system stabilizing device is also used for the purpose of assisting the internal combustion engine type power generation equipment by following such sudden fluctuations in electric power with good responsiveness and balancing the demand and supply of electric power.

  The system stabilization device is a power conversion device having a power storage function, and is a device that is installed in a distribution system and performs the above-described power compensation.

<Description of Microgrid with One System Stabilizer>
FIG. 4 is an example in which one system stabilizing device 20 is provided in the power distribution system (microgrid) 10 shown in FIG. The system stabilizing device 20 is connected to the distributed power supply 11 and the load 12 in parallel.

The system stabilizing device 20 includes a control unit 21, a power converter 22 that can perform a reverse conversion operation and a forward conversion operation, and a DC charging unit 23 such as an electric double layer capacitor or a lead storage battery.
The power converter 22 operates according to the gate signal g sent from the control unit 21. When performing the forward conversion operation, the power converter 22 converts the AC power obtained from the power distribution system 10 into DC power and converts the DC power to DC. When charging the charging unit 23 and performing a reverse conversion operation, the DC power charged in the DC charging unit 23 is converted into AC power, and the AC power is sent to the distribution system 10.

  In the system stabilization device 20, the system current Is flowing into the distribution system 10 from the power system 1 is detected by the current detector 24, and the system voltage Vs that is the voltage of the distribution system 10 is detected by the voltage detector 25. The converter current Iinv input / output to / from the power converter 22 is detected by the current detector 26.

  In this system stabilizing device 20, when the power system 1 is in a normal state where no failure or the like has occurred, the circuit breaker 2 is in a connected state, and operation is performed with the power distribution system 10 connected to the power system 1. System operation "is performed. During this grid interconnection operation, power is supplied to the load 12 by the power system 1, the distributed power supply 11, and the system stabilization device 20.

  On the other hand, when an abnormality occurs in the power system 1, a “self-sustaining operation” is performed in which the circuit breaker 2 is disconnected and the power distribution system 10 is disconnected from the power system 1. During this self-sustained operation, power is supplied to the load 12 by the distributed power supply 11 and the system stabilizing device 20.

The grid stabilization device 20 operates as follows during grid-connected operation and autonomous operation.
(1) At the time of grid connection operation, the grid stabilization device 20 detects the grid current Is flowing into the distribution system 10, obtains grid power from the grid current Is, and suppresses fluctuations in the grid power. Operate.
(2) During the independent operation, the system stabilizing device 20 detects the system voltage Vs in the distribution system 10 and performs a compensation operation so that the voltage amplitude and frequency of the system voltage Vs are stabilized.

<Description of control unit of system stabilizing device>
Here, the detail of the control part 21 of the system | strain stabilization apparatus 20 is demonstrated with reference to FIG.
The phase synchronization circuit (PLL) 101 outputs a reference phase signal θ indicating the phase of the system voltage Vs from the system voltage Vs. The sine wave generator 102 outputs a reference sine wave signal K having a rated voltage synchronized with the reference phase signal θ.

  As shown by the solid line in the figure, the change-over switch 103 has the movable contacts 103a and 103b on the A side as shown by the solid line in the figure. To the side.

  Next, description will be given of each functional block that operates during grid connection and control operations during grid connection.

  The dq conversion unit 104 dq-converts the system current Is into a rotating coordinate system that rotates at the phase indicated by the reference phase signal θ, and outputs an effective part Isd of the system current and an ineffective part Isq of the system current.

The first variation detection block 105 detects the variation of the effective amount Isd of the system current on the dq axis and outputs this as the effective current command Irefd, and the second variation detection block 106 is on the dq axis. The fluctuation amount of the ineffective portion Isq of the system current is detected, and this is output as the ineffective portion current command Irefq.
The fluctuation detection blocks 105 and 106 are band-pass filters having a differentiation function and a filter function, and details of the structure will be described later.

  The dq converter 107 dq-converts the converter current Iinv into a rotating coordinate system that rotates at the phase indicated by the reference phase signal θ, and outputs an effective component Iinvd of the converter current and an ineffective component Iinvq of the converter current.

  The subtracting unit 108 subtracts the effective amount Iinvd of the converter current from the effective current command Irefd and outputs the effective current deviation Δd. The subtractor 109 subtracts the ineffective portion Iinvq of the converter current from the ineffective current command Irefq and outputs the ineffective current deviation Δq.

  The current control unit 110 performs proportional integral (PI) control on the current deviation Δd for the effective amount, and outputs the voltage command Vd for the effective amount. The current control unit 111 performs proportional integral (PI) control on the current deviation Δq corresponding to the ineffective part and outputs a voltage command Vq corresponding to the ineffective part.

The dq reverse conversion unit 112 performs dq reverse conversion on the effective voltage command Vd and the invalid voltage command Vq, and outputs a voltage command Vo in a fixed coordinate system. The adding unit 113 adds the reference sine wave signal K to the fixed coordinate system voltage command Vo output from the dq inverse conversion unit 112, and outputs a fixed coordinate system voltage command V ^* .

A PWM (Pulse Width Modulation) modulator 114 PWM modulates the voltage command V ^* and outputs a gate signal g.
Operation control of the power converter 22 is performed by the gate signal g, and power is output from the power converter 22 in order to suppress fluctuations in the grid current Is during grid interconnection operation.

  Next, the description of each functional block that operates during the self-sustaining operation and the control operation during the self-sustaining operation will be described together.

  The frequency detector 121 detects the frequency of the system voltage Vs and outputs a frequency signal F. The frequency of the system voltage Vs corresponds to the active power. When the active power in the microgrid is insufficient, the frequency of the system voltage Vs is reduced. When the active power in the microgrid is excessive, the frequency of the system voltage Vs is increased. The relationship is increasing.

  The amplitude detector 122 detects the amplitude of the system voltage Vs and outputs an amplitude signal L. The amplitude of the system voltage Vs corresponds to the reactive power. When the reactive power in the microgrid is insufficient, the amplitude of the system voltage Vs is reduced. When the reactive power in the microgrid is excessive, the amplitude of the system voltage Vs is increased. The relationship is increasing.

The third variation detection block 123 detects the variation of the frequency signal F and outputs this as an effective current command Irefd, and the fourth variation detection block 124 detects the variation of the amplitude signal L. This is output as an invalid current command Irefq.
The fluctuation detection blocks 123 and 124 are band-pass filters having a differentiation function and a filter function, and details of the structure will be described later.

  The subtracting unit 108 subtracts the effective amount Iinvd of the converter current from the effective current command Irefd and outputs the effective current deviation Δd. The subtractor 109 subtracts the ineffective portion Iinvq of the converter current from the ineffective current command Irefq and outputs the ineffective current deviation Δq.

  The current control unit 110 performs proportional integral (PI) control on the current deviation Δd for the effective amount, and outputs the voltage command Vd for the effective amount. The current control unit 111 performs proportional integral (PI) control on the current deviation Δq corresponding to the ineffective part and outputs a voltage command Vq corresponding to the ineffective part.

The dq reverse conversion unit 112 performs dq reverse conversion on the effective voltage command Vd and the invalid voltage command Vq, and outputs a voltage command Vo in a fixed coordinate system. The adding unit 113 adds the reference sine wave signal K to the fixed coordinate system voltage command Vo output from the dq inverse conversion unit 112, and outputs a fixed coordinate system voltage command V ^* .

A PWM (Pulse Width Modulation) modulator 114 PWM modulates the voltage command V ^* and outputs a gate signal g.
Operation control of the power converter 22 is performed by the gate signal g, and power is output from the power converter 22 in order to suppress fluctuations in the voltage amplitude and frequency of the system voltage Vs during the independent operation.

<Description of the fluctuation detection block incorporated in the control unit of the system stabilization device>
As described above, the fluctuation detection blocks 105, 106, 123, and 124 are configured by bandpass filters.
Here, a configuration of a conventional bandpass filter 50 that can be used as the fluctuation detection blocks 105, 106, 123, and 124 will be described with reference to FIG. In FIG. 6, s is a Laplace operator indicating a differentiation function.

As shown in FIG. 6, the band pass filter 50 includes a low pass filter 51, a low pass filter 52, and a subtractor 53.
Note that the passband frequency of the bandpass filter 50 is determined in accordance with the filtering characteristics required for each fluctuation detection block 105, 106, 123, 124. Further, the high-frequency cutoff frequency of the determined passband frequency is f1, the low-frequency cutoff frequency is f2, the cutoff frequency is f1, the time constant of the noise removing low-pass filter is T1, and the cutoff frequency is f2. The time constant of the low-pass filter for setting the fluctuation detection time is T2.

The low-pass filter 51 is a filter having a first-order lag characteristic whose time constant is a time constant T1 determined for the purpose of noise removal.
The low-pass filter 52 is a filter having a first-order lag characteristic in which the time constant is the time constant T2 determined for the purpose of setting the time for detecting fluctuations.
When the input signal is input, both filters 51 and 52 filter the input signal using the respective filter characteristics. Note that the input signal is the effective portion Isd of the system current in the case of the fluctuation detection block 105, the ineffective portion Isq of the system current in the case of the fluctuation detection block 106, and the frequency signal F in the case of the fluctuation detection block 123. In the case of the fluctuation detection block 124, the amplitude signal L.

The subtractor 53 outputs a signal obtained by subtracting the output signal of the low-pass filter 52 from the output signal of the low-pass filter 51. The signal output from the subtracter 53 is a fluctuation signal.
In the fluctuation detection block 105, the fluctuation signal is an effective current command Irefd that is a fluctuation of the system current effective quantity Isd. In the fluctuation detection block 106, the fluctuation signal is a fluctuation of the invalid current Isq. The current command Irefq for a certain invalid part, the current command Irefd for the valid part corresponding to the fluctuation of the frequency signal F in the case of the fluctuation detection block 123, and the invalid part corresponding to the fluctuation of the amplitude signal L in the fluctuation detection block 124. Minute current command Irefq.

<Description of microgrid with two system stabilization devices>
FIG. 7 shows an example in which the power distribution system (microgrid) 10 shown in FIG. 3 includes two system stabilizing devices 20-1 and 20-2. The system stabilizing devices 20-1 and 20-2 are connected in parallel to the distributed power supply 11 and the load 12.

  The system stabilizing devices 20-1 and 20-2 have the same configuration as the system stabilizing device 20 shown in FIG. The DC charging unit 23-1 provided in the system stabilizing device 20-1 is an electric double layer capacitor, and the DC charging unit 23-2 provided in the system stabilizing device 20-2 is a lead storage battery.

The control unit 21-1 of the system stabilizing device 20-1 has the same configuration as the control unit 21 shown in FIG. 5, and the system current Is detected by the current detector 24 and the voltage detector 25-1. The detected system voltage Vs1 and the converter current Iinv1 detected by the current detector 26-1 are taken in and the gate signal g1 is output. When the power converter 22-1 performs forward conversion operation according to the gate signal g1, the AC power obtained from the distribution system 10 is converted into DC power, and this DC power is converted into a DC charging unit (electric double layer capacitor). When charging to 23-1 and performing an inverse conversion operation, the DC power charged in the DC charging unit (electric double layer capacitor) 23-1 is converted into AC power and this AC power is sent to the distribution system 10.
Note that the control unit 21-1 includes fluctuation detection blocks 105, 106, 123, and 124, similarly to the control unit 21 illustrated in FIG. 5.

  The direct current charging unit 23-1 of the system stabilizing device 20-1 is an electric double layer capacitor having a small storage capacity, although it does not affect the life even when high-speed charging / discharging is performed. For this reason, the system stabilizing device 20-1 using an electric double layer capacitor as the DC charging unit 23-1 performs power charge compensation in a short time and compensates for power fluctuations.

The control unit 21-2 of the system stabilizing device 20-2 has the same configuration as the control unit 21 shown in FIG. 5, and the system current Is detected by the current detector 24 and the voltage detector 25-2. The detected system voltage Vs2 and the converter current Iinv2 detected by the current detector 26-2 are taken in and a gate signal g2 is output. When the power converter 22-2 performs a forward conversion operation according to the gate signal g2, the AC power obtained from the power distribution system 10 is converted into DC power, and this DC power is converted into a DC charging unit (lead storage battery) 23-. When charging 2 and performing a reverse conversion operation, the DC power charged in the DC charging unit (lead storage battery) 23-2 is converted into AC power, and this AC power is sent to the distribution system 10.
Note that the control unit 21-2 includes fluctuation detection blocks 105, 106, 123, and 124, similarly to the control unit 21 shown in FIG.

  The direct current charging unit 23-2 of the system stabilizing device 20-2 is a lead storage battery that can be charged and discharged for a long time, but deteriorates its life when deep charging and discharging are performed in a short time. For this reason, the system stabilizing device 20-2 using a lead storage battery as the DC charging unit 23-2 does not perform charging / discharging at high speed in a short time, and starts charging / discharging over time. Charge and discharge.

<Problem with two system stabilization devices>
By the way, as shown in FIG. 7, when two system stabilizing devices 20-1 and 20-2 are arranged in one power distribution system 10, the system stabilizing device 20-is required unless both are operated in a coordinated manner. The output power of 1 and the output power of the grid stabilization device 20-2 interfere with each other, and there is a problem that fluctuations in grid current cannot be compensated.

  In order to perform system stabilization control without interference between the two system stabilization apparatuses 20-1 and 20-2, the outputs of the system stabilization apparatus 20-1, the system stabilization apparatus 20-2, and the distributed power supply 11 are output. The power and output current are monitored, the system stabilizing device 20-1, the system stabilizing device 20-2, and the distributed power supply 11 are commanded to output power and output current, respectively. It is necessary to control the operation of the generator 20-1, the system stabilizer 20-2, and the distributed power supply 11.

  For example, Patent Literature 1 (Japanese Patent Application Laid-Open No. 2006-333563) discloses a technology for cooperatively operating a plurality of types of distributed power supplies. By using the technology shown in Patent Literature 1, two system stabilization devices 20 are disclosed. -1, 20-2 and the distributed power supply 11 can be cooperatively operated.

  However, the monitoring means for monitoring the output power and output current of the system stabilizing device 20-1, the system stabilizing device 20-2, and the distributed power source 11, and each system stabilizing device and the distributed power source according to the monitoring result. There is a problem that a control means for controlling the operation is further required.

<Description of fluctuation detection block incorporated in control unit of system stabilizing device for preventing mutual interference>
Accordingly, the inventor of the present application has developed a system stabilization device that performs system stabilization control while preventing interference between the system stabilization apparatuses without monitoring the output current of each system stabilization apparatus.
That is, the fluctuation detection block 200a shown in FIG. 8 is adopted as the first to fourth fluctuation detection blocks 105, 106, 123, and 124 provided in the control unit 21-1 of the system stabilizing device 20-1 shown in FIG. A system that employs the fluctuation detection block 200b shown in FIG. 9 as the first to fourth fluctuation detection blocks 105, 106, 123, and 124 included in the control unit 21-2 of the system stabilization device 20-2 shown in FIG. A stabilization device was developed.

The fluctuation detection block 200a shown in FIG. 8 and the fluctuation detection block 200b shown in FIG. 9 have the same element configuration.
(1) In the fluctuation detection block 200a shown in FIG. 8 (the fluctuation detection block on the system stabilizing device 20-1 side using an electric double layer capacitor as a DC charging unit), the output switch 205, which is the last stage element, is And
(2) In the fluctuation detection block 200b (fluctuation detection block on the side of the system stabilization device 20-2 using a lead storage battery as a DC charging unit) shown in FIG. 9, the output switch 205 as the last stage element is input to the β side. Has been.

Since both of the fluctuation detection blocks 200a and 200b have the same element configuration, their configuration and operation will be described together.
In the following description of the operation, as shown in FIG. 10A, the effective amount ILd of the load current is 1p. u. A description will be given of the state when the number increases. In this case, “pu” is a unit symbol and 1p. u. Indicates the rated value.
Further, in the following description, an example in which the fluctuation detection blocks 200a and 200b are applied as the first fluctuation detection block 105 will be described. Of course, it can also be applied as 124.

The fluctuation detection blocks 200a and 200b include a low-pass filter 201, a subtracter 202, an amplifier 203, a subtracter 204, an output switch 205, a cushion circuit 210, and a cushion circuit 220.
The cushion circuit 210 includes a limiter 211, a delay circuit 212, a subtracter 213, and an adder 214.
The cushion circuit 220 includes a limiter 221, a delay circuit 222, a subtracter 223, and an adder 224.

The low-pass filter 201 is a filter having a first-order lag characteristic whose time constant is T1. The time constant T1 is a time constant determined for the purpose of noise removal.
When the input signal (effective amount Isd of system current) is input, the low-pass filter 201 uses the filter characteristics to filter the effective amount Isd of system current that is the input signal.
When the effective amount ILd of the load current changes stepwise (see FIG. 10A), the system stabilization control (variation compensation) operation by the system stabilization devices 20-1 and 20-2 is performed. As shown in FIG. 10 (b), the effective amount Is of the system current rises instantaneously and then increases to 1p. u. It increases linearly (gradual increase).

The limiter 211 of the cushion circuit 210 has a limit characteristic of ± (X · Ts / T3).
T3 is a cushion time set to an arbitrary time, Ts is one sample period, and X is a limit value.
In addition, the charge / discharge time (variation compensation time) of the system stabilization apparatus 20-2 provided with the DC charging unit 23-2 using a lead storage battery is set by the cushion time T3.

  This limiter 211 limits the amount of change per sample period Ts. When the signal value of the signal input to the limiter 211 is a value between + X (upper limit value) and -X (lower limit value), the limiter 211 holds the signal value of the input signal as it is. When the signal value of the signal output and input to the limiter 211 is greater than or equal to + X (upper limit value), the value increases with a constant slope for a predetermined time, and then the value is limited to + X. When the signal value of the signal input to the limiter 211 is equal to or less than −X (lower limit value), the value decreases with a constant slope for a predetermined time, and thereafter the value is limited to −X. .

The delay circuit 212 has a characteristic of delaying the input signal by one sample period Ts and outputting it. The delay circuit 212 can be configured by, for example, a Z conversion circuit having a characteristic of Z ⁻¹ .

The subtractor 213 subtracts the output signal of the delay circuit 212 from the output signal of the low pass filter 201 and sends the subtracted signal to the limiter 211.
That is, the output signal of the delay circuit 212 is negatively fed back before the limiter 211.

The adder 214 adds the signal output from the limiter 211 and the signal output from the delay circuit 212 and outputs the result.
That is, the output signal of the delay circuit 212 is positively fed back at the subsequent stage of the limiter 211.

  The delay circuit 212 delays the output signal of the adder 214 by one sample period Ts and outputs it.

  Thus, since the signal output from the delay circuit 212 is negatively fed back at the front stage of the limiter 211 and positively fed back at the rear stage of the limiter 211, the signal state is as follows.

The output of the subtracter 213 becomes “current sample value−1 value after limiter processing before the sample period”.
Therefore, when the signal value input from the low-pass filter 201 to the subtractor 213 is + X or less and −X or more, the signal value output from the limiter 211 is zero.
On the other hand, when the signal value input from the low-pass filter 201 to the subtracter 213 is greater than or equal to + X or less than or equal to −X, the signal value output from the limiter 211 has an upper limit value / lower limit value that is a limit value (+ X , -X).

The output of the adder 214 is “the output of the limiter + 1 the value after the limiter process before one sample period”.
Therefore, when the signal value input from the low-pass filter 201 to the subtracter 213 is + X or more or −X or less, the signal value output from the adder 214 increases linearly. That is, the signal value output from the adder 214 changes (increases or decreases) step by step by the limit value (+ X or −X) every sample period Ts.

Eventually, when the value of the input signal (system current effective portion Isd) changes, the cushion circuit 210 moderates the signal change value per unit time and outputs the cushion signal a.
Therefore, as shown in FIG. 10C, the cushion signal a is 1p. u. The signal increases linearly.

  The subtractor 202 subtracts the cushion signal a which is the output of the adder 214 (cushion circuit 210) from the output signal of the low-pass filter 201 having the first-order lag characteristic (the effective component Isd of the filtered system current), and the variation signal Is output. This variation signal is a current command Irefd0 shown in FIG.

  The amplifier 203 amplifies the current command Irefd0 and outputs a current command Irefd00 shown in FIG. By amplifying in this way, a total current command Irefd00 for two of the system stabilizing devices 20-1 and 20-2 is obtained.

  The cushion circuit 220 includes a limiter 221, a delay circuit 222, a subtracter 223, and an adder 224.

The limiter 221 of the cushion circuit 220 has a limit characteristic of ± (X · Ts / T4).
T4 is a cushion time set to an arbitrary time shorter than time T3, Ts is one sample period, and X is a limit value.
In addition, the charge / discharge time (variation compensation time) of the system stabilization apparatus 20-1 provided with the DC charging unit 23-1 by the electric double layer capacitor is set by the cushion time T4.

  The operation of the cushion circuit 220 is basically the same as that of the cushion circuit 210, although the cushion time is different. That is, when a change occurs in the value of the input signal, the signal change value per unit time is made larger than the signal change value of the cushion circuit 210 and a cushion signal is output.

  Therefore, when the current command Irefd00 is input to the cushion circuit 220, the cushion signal b (see FIG. 10F) in which the signal change of the current command Irefd00 is relaxed is output.

In this example, the cushion signal b that is the output of the cushion circuit 220 is the current command Irefd2 (see FIG. 10H).
This current command Irefd2 has a signal width (length of the time axis) as long as T3, increases linearly so as to be equal to the current command Irefd00 over time T4, and thereafter has the same slope as the current command Irefd00. It decreases linearly to zero over T3-T4).
Since the current command Irefd2 has such characteristics, the current command Irefd2 is used as a current command for the system stabilizing device 20-2 that starts charging / discharging over time and performs long-time charging / discharging.

  For this reason, in the fluctuation | variation detection block 200b (refer FIG. 9) used as the 1st-4th fluctuation | variation detection block 105,106,123,124 with which the control part 21-2 of the system stabilization apparatus 20-2 shown in FIG. 7 is equipped. The output switch 205 is turned on to the β side to output the current command Irefd2.

The subtractor 204 subtracts the cushion signal b (= current command Irefd2) from the current command Irefd00 and outputs a current command Irefd1.
This current command Irefd1 has a signal width (length of the time axis) as short as T4 as shown in FIG. u. And then falls to zero over time T4.
Since the current command Irefd1 has such characteristics, the current command Irefd1 is used as a current command for the system stabilizing device 20-1 that performs charging and discharging at high speed in a short time.

  For this reason, in the fluctuation | variation detection block 200a (refer FIG. 8) used as the 1st-4th fluctuation | variation detection block 105,106,123,124 with which the control part 21-1 of the system stabilization apparatus 20-1 shown in FIG. 7 is equipped. The output switch 205 is turned on to the α side to output the current command Irefd1.

  When the variation detection blocks 200a and 200b shown in FIGS. 8 and 9 are employed, the same calculation is performed based on the same system current ISd, so that the total current command Irefd00 of the two system stabilization devices is obtained. Since the current command Irefd00 is divided and divided into a current command Irefd1 for the system stabilization device 20-1 and a current command Irefd2 for the system stabilization device 20-2, The interference between the digitizing devices 20-1 and 20-2 can be completely prevented.

JP 2006-333563 A

<Problem when one of the two system stabilizers is operated independently>
However, when the system stabilizing device 20-2 using the lead storage battery as the DC charging unit is stopped and the system stabilizing device 20-1 using the electric double layer capacitor as the DC charging unit is operated alone, details will be described later. There is a problem that the fluctuation compensation time in the system stabilizing device 20-1 is greatly increased. Such a problem occurs because the methods shown in FIGS. 8 and 9 are based on the premise that cooperative operation is performed by two system stabilizing devices.
For this reason, when the system stabilizing device 20-1 is operated alone, the remaining capacity of the electric double layer capacitor 23-1 that is an electricity storage device is insufficient immediately, and continuous interlocking compensation cannot be performed. Occurs.

  Here, with reference to FIG. 11, a state when the system stabilizing device 20-1 having the electric double layer capacitor as a DC charging unit is operated alone will be described.

  When the effective amount ILd of the load current changes stepwise as shown in FIG. 11A, the system stabilization control (variation compensation) operation by the system stabilization apparatus 20-1 is performed, but the system stabilization apparatus Since the system stabilization control (variation compensation) by 20-2 is not performed, the effective amount Isd of the system current increases rapidly in a straight line after instantaneously rising, as shown in FIG. In a time shorter than the time T3 (eg, time of G × T4), the value is 1p. u. become.

  Therefore, the current command Irerr0 obtained by subtracting the cushion signal a (see FIG. 11C) obtained by cushioning the effective amount Isd from the effective amount Isd of the system current varies as shown in FIG. 11D. The waveform gradually increases until the time G × T4 elapses from the detection time point, and then gradually decreases, that is, a waveform having a large fluctuation.

The current command Irefd00 obtained by amplifying the current command Irefd0 having such a large fluctuation by the amplifier 203 has a very large value as shown in FIG.
Since the current command Irefd00 is a very large value, the cushion signal b obtained by cushioning the current command Irefd00 is also a very large value as shown in FIG.

  Therefore, the current command Irefd1 obtained by subtracting the cushion signal b from the current command Irefd00 takes time from instantly rising to zero as shown in FIG. 11 (g). For example, it takes G × T4 time from instantly rising to zero.

  As described above, when the system stabilizing device 20-1 having the electric double layer capacitor as the DC charging unit is operated independently by the current command Irefd1 having a long fluctuation compensation time, the electricity that is the power storage device of the system stabilizing device 20-1 is obtained. The remaining capacity of the double layer capacitor 23-1 is insufficient immediately, and there is a problem that continuous interlock compensation cannot be performed.

  In view of the above-described prior art, the present invention eliminates the need to monitor the output current or output voltage of each system stabilizing device, and furthermore, the system current in which the fluctuation compensation time is substantially equal even when other system stabilizing devices are in operation or stopped. It is an object of the present invention to provide a system stabilizing device capable of compensating for fluctuations in the system.

The configuration of the present invention for solving the above problems is as follows.
When the power system is normal, the system is connected to the power system. When an abnormality occurs in the power system, the system is disconnected from the power system, and a plurality of system stabilization devices are connected to the power distribution system to which the distributed power source and the load are connected. In a system system in which the charge / discharge time of one system stabilization device is shorter than the charge / discharge time of another system stabilization device,
The system stabilizing device includes a control unit and a power converter that performs a forward conversion operation and an inverse conversion operation according to a gate signal transmitted from the control unit,
The controller is
When the power system is normal, an effective part of the system current and an ineffective part of the system current are obtained from the system current flowing into the distribution system from the power system, and the effective part of the system current is obtained by the first fluctuation detection block. The variation included is determined as an effective current command, and the variation included in the invalid portion of the grid current is determined by the second variation detection block, and the variation is defined as an invalid current command. Further, an effective part of the converter current and an ineffective part of the converter current are obtained from the converter current input and output by the power converter, and an effective value which is a deviation between the effective current command and the effective part of the converter current is obtained. Output a gate signal with zero current deviation of zero and zero current deviation of the invalid part, which is a deviation between the current command of the invalid part and the invalid part of the converter current,
When an abnormality occurs in the power system, a frequency signal indicating the frequency of the system voltage and an amplitude signal indicating the amplitude of the system voltage are obtained from the system voltage of the distribution system, and are included in the frequency signal by a third fluctuation detection block A variation is obtained, and the variation is used as an effective current command. A variation included in the amplitude signal is obtained by a fourth variation detection block, and the variation is used as an invalid current command. Further, the power conversion The effective part of the converter current and the invalid part of the converter current are obtained from the converter current input and output by the converter, and the current deviation of the effective part which is the deviation between the current command of the effective part and the effective part of the converter current A gate signal is set to zero, and the current deviation of the reactive part, which is a deviation between the current command of the reactive part and the invalid part of the converter current, is set to zero,
In addition, the first to fourth fluctuation detection blocks of the one system stabilizing device are:
A low-pass filter (201) with a time constant determined for the purpose of noise removal;
When the output signal of the low-pass filter (201) is input and the first cushion time is set, and the value of the input signal changes, the signal change value per unit time is set to the length of the first cushion time. A first cushion circuit (210) that outputs a signal gently according to the length;
A subtractor (202) for subtracting the output signal of the cushion circuit (210) from the output signal of the low-pass filter (201) and outputting a current command (Irefd0);
An amplifier (203) for amplifying the current command (Irefd0) output from the subtractor (202) and outputting the amplified current command (Irefd00);
When the output signal of the amplifier (203) is input, a second cushion time that is longer than the first cushion time and variable in setting time is set, and when a change occurs in the value of the input signal, per unit time A second cushion circuit (220) for gradually outputting a signal change value according to the length of the second cushion time and outputting a signal;
A subtractor (204) for subtracting the output signal of the cushion circuit (220) from the current command (Irefd00) and outputting a first current command (Irefd1);
Either the first current command (Irefd1) output from the subtracter (204) or the second current command (Irefd2) which is the output signal of the second cushion circuit (220) is selected and output. Output switch (205),
An independent operation determination unit that determines whether one system stabilization device is operating independently based on the slope and magnitude of the first current command (Irefd1);
When the single operation determination unit determines that one system stabilization device is operating independently, the second cushion time is set to a predetermined short time, and the single operation determination unit sets one system stabilization. A cushion time changing unit that sets the second cushion time to a predetermined long time when it is determined that the control device is not operating alone;
It is characterized by having.

Moreover, the configuration of the present invention is the system stabilizing device,
The islanding determination unit
When the first current command (Irefd1) exceeds a predetermined positive value and the slope of the first current command (Irefd1) is less than zero and exceeds a predetermined negative value, a determination signal is output. A first isolated operation determination circuit for outputting;
Determination signal when the first current command (Irefd1) is less than a predetermined negative value and the slope of the first current command (Irefd1) is greater than zero and less than a predetermined positive value A second islanding operation determination circuit that outputs
An absolute value determination circuit that outputs a determination signal when the first current command (Irefd1) is less than a predetermined positive value;
When a determination signal is once output from at least one of the first isolated operation determination circuit and the second isolated operation determination circuit, it is determined that the operation is independent until the determination signal is output from the absolute value determination circuit,
When a determination signal is output from the absolute value determination circuit, it is determined that the operation is not an independent operation.

According to the present invention, in a system system including one distribution stabilization device with a short charge / discharge time and another distribution stabilization device with a long charge / discharge time in a distribution system, a plurality of system stabilization devices are operated. Can also suppress the mutual interference operation.
In addition, when one system stabilization device is operated independently, the cushion control circuit set in the fluctuation detection block can be shortened to prevent the current control command from becoming unnecessarily long. The stabilization device can perform quick fluctuation compensation in a short time, and can prevent overdischarge of the DC charging unit.

  The best mode for carrying out the present invention will be described below in detail based on examples.

FIG. 1 shows a fluctuation detection block 200c according to the first embodiment of the present invention. The fluctuation detection block 200c includes first to fourth fluctuation detection blocks 105, which are incorporated in the control unit 21-1 (see FIG. 7) of the system stabilization device 20-1 using an electric double layer capacitor as a DC charging unit. 106, 123, and 124 (see FIG. 5).
In addition, the 1st-4th fluctuation | variation detection block 105,106,123,124 (FIG. 7) incorporated in the control part 21-2 (refer FIG. 7) of the system stabilization apparatus 20-2 which uses a lead acid battery as a direct current charging part. 5), the fluctuation detection block 200b shown in FIG. 9 is used as it is.

  In the present embodiment, as shown in FIG. 7, in order to use the electric double layer capacitor as the DC charging unit, the system stabilizing device 20-1 with a short charge / discharge time (variation compensation time) and the lead storage battery as the DC charging unit are used. This is based on the premise that system stabilization control of the microgrid is performed using the system stabilization device 20-2 having a long charge / discharge time (variation compensation time).

<Overall Description of Variation Detection Block of Embodiment 1>
The fluctuation detection block 200c according to the first embodiment adds a stand-alone operation determination unit 300 and a cushion time change unit 400 to the fluctuation detection block 200a illustrated in FIG. 8 and also sets a cushion time T4 ^* set in the limiter 221 of the cushion circuit 220 ^. Can be changed by the cushion time changing unit 400.
Therefore, in the following description, the same reference numerals are given to the portions having the same functions as those of the fluctuation detection block 200a shown in FIG.

Based on the current command Irefd1 output from the output switch 205, the isolated operation determination unit 300 determines whether or not the system stabilization device 20-1 using the electric double layer capacitor as the DC charging unit is operating independently.
Although the detailed configuration and operation of the isolated operation determination unit 300 will be described later, the isolated operation determination unit 300 determines whether the isolated operation or the cooperative operation is performed as follows.

(1) When the current command Irefd1 is a positive value, the slope ΔIrefd1 of the current command Irefd1 is
0>ΔIrefd1> −1 / 2T4
And
Irefd1> 0.1 p. u.
When it becomes, it determines with the system stabilization apparatus 20-1 operating independently.
T4 is the time set as the charge / discharge time (variation compensation time) by the system stabilizing device 20-1 using the electric double layer capacitor as the DC charging unit.

(2) When the current command Irefd1 is a negative value, the slope ΔIrefd1 of the current command Irefd1 is
0 <ΔIrefd1 <1 / 2T4
And
Irefd1 <-0.1 p. u.
When it becomes, it determines with the system stabilization apparatus 20-1 operating independently.

(3) The absolute value of the current command Irefd1 is 0.1 p. u. If it becomes less than, it will be judged that the independent operation | movement of the system stabilization apparatus 20-1 is not performed, but the cooperative operation by the system stabilization apparatus 20-1 and the system stabilization apparatus 20-2 is performed.

The cushion time changing unit 400 determines that the cushion time T4 ^* set in the limiter 221 of the cushion circuit 220 is T4 / G when the single operation determining unit 300 determines that the system stabilizing device 20-1 is operating alone. To do.
G is a gain set in the amplifier 203, and G> 1.
Also, the cushion time changing unit 400 sets the cushion time T4 to be set in the limiter 221 of the cushion circuit 220 when the islanding operation determining unit 300 determines that the system stabilizing devices 20-1 and 20-2 are operating cooperatively. ^* Is T4.

As described above, when it is determined that the vehicle is operating independently, the cushion time changing unit 400 sets the cushion time T4 ^* set in the limiter 221 of the cushion circuit 220 to T4 / G, thereby reducing the system stabilizing device 20. Even when -1 is operating alone, optimal system stabilization control (variation compensation operation) can be performed without increasing the variation compensation time.

More specifically, when the value of Irefd1 is a positive value, the optimum inclination of the current command Irefd1 is −1 / T4 as shown in FIG. When the value is a negative value, the slope ΔIrefd1 is 1 / T4.
Assuming that the cushion time T4 ^* remains T4 as in the prior art during the independent operation, when the value of Irefd1 is a positive value, the slope ΔIrefd1 is as shown in FIG. 11 (g). When −I / (G × T4) and the value of Irefd1 is a negative value, the slope ΔIrefd1 is 1 / (G × T4), which is 1 / G times the appropriate value.

In the first embodiment, during the single operation, the slope ΔIrefd1 of the current command Irefd1 is set to be positive by reducing the cushion time T4 ^* set in the limiter 221 of the cushion circuit 220 to T4 / G. The value can be set to -1 / T4 which is an optimum value, and can be set to 1 / T4 which is an optimum value when the value of Irefd1 is a negative value.

For this reason, even if the single operation is performed, the inclination ΔIrefd1 of the current command Irefd1 is set to the optimum value −1 / T4 or 1 / T4, and the time during which the current command Irefd1 is output is shortened to T4. The variation compensation time by the system stabilizing device 20-1 can be set to T4.
Thus, since the fluctuation compensation time by the system stabilizing device 20-1 can be set to T4, the phenomenon that the fluctuation compensation time is extended can be avoided, and overdischarge of the electric double layer capacitor 23-1 can be prevented. However, an optimal system stabilization control (variation compensation) operation can be performed by the system stabilization device 20-1.

On the other hand, when the independent operation determination unit 300 determines that the system stabilization device 20-1 and the system stabilization device 20-2 are operating cooperatively, the cushion time changing unit 400 sets the limiter 221 of the cushion circuit 220. The cushion time T4 ^* to be set is T4.

As described above, when it is determined that the cooperative operation is performed, the cushion time T4 ^* set in the limiter 221 of the cushion circuit 220 by the cushion time changing unit 400 is set to T4 as in the conventional case shown in FIG. 8 and FIG. 9, without any information exchange between the two system stabilizing devices 20-1 and 20-2 during the cooperative operation, and each system stabilizing device 20-1, Performing optimal system stabilization control (variation compensation operation) while completely preventing interference between the system stabilization device 20-1 and the system stabilization device 20-2 without monitoring the output current of 20-2 Can do.

<Detailed description of isolated operation determination unit>
Here, details of the isolated operation determination unit 300 will be described.
The isolated operation determination unit 300 includes a first isolated operation determination circuit 310, a second isolated operation determination circuit 320, an absolute value determination circuit 330, an OR circuit 331, and a flip-flop circuit 332.

The first isolated operation determination circuit 310 includes a differentiation circuit 311, an inclination range determination circuit 312, a value determination circuit 313, and an AND circuit 314.
The first isolated operation determination circuit 310 determines whether or not the system stabilizing device 20-1 is operated independently when the current command Irefd1 is a positive value.

That is, the differentiating circuit 311 differentiates the current command Irefd1 and obtains its slope ΔIrefd1.
The inclination range determination circuit 312 determines whether or not a relationship of 0>ΔIrefd1> −1 / 2T4 is satisfied, and outputs a high level signal H when this relationship is satisfied.
The value determination circuit 313 has Irefd1> 0.1p. u. Whether or not the relationship is established, and when this relationship is established, the high level signal H is output.
The AND circuit 314 outputs the high level signal H when the high level signal H is output from both the inclination range determination circuit 312 and the value determination circuit 313.

When the high level signal H is output from the AND circuit 314, that is, the relationship of 0>ΔIrefd1> −1 / 2T4 and Irefd1> 0.1p. u. When the relationship is established, when the current command Irefd1 is a positive value, it is determined that the system stabilizing device 20-1 is operating independently.
As described above, the reason why it can be determined that the single operation is performed when both the relations are established will be described later.

  The second isolated operation determination circuit 320 includes a differentiation circuit 321, an inclination range determination circuit 322, a value determination circuit 323, and an AND circuit 324.

  The second isolated operation determination circuit 320 determines whether or not the system stabilizing device 20-1 is operated independently when the current command Irefd1 has a negative value.

That is, the differentiating circuit 321 differentiates the current command Irefd1 and obtains its slope ΔIrefd1.
The inclination range determination circuit 322 determines whether or not the relationship of 0 <ΔIrefd1 <1 / 2T4 is satisfied, and outputs the high level signal H when the relationship is satisfied.
The value determination circuit 323 is configured such that Irefd1 <−0.1 p. u. Whether or not the relationship is established, and when this relationship is established, the high level signal H is output.
The AND circuit 324 outputs the high level signal H when the high level signal H is output from both the inclination range determination circuit 322 and the value determination circuit 323.

When the high level signal H is output from the AND circuit 324, that is, the relationship of 0 <ΔIrefd1 <1 / 2T4 and Irefd <−0.1 p. u. When the relationship is established, when the current command Irefd1 is a negative value, it is determined that the system stabilizing device 20-1 is operating independently.
As described above, the reason why it can be determined that the single operation is performed when both the relations are established will be described later.

  The OR circuit 331 is configured such that when at least one of the single operation determination circuit 310 and the single operation determination circuit 320 outputs a high level signal H, that is, at least one of the single operation determination circuit 310 and the single operation determination circuit 320 causes a system stabilization device. When it is determined that 20-1 is operating independently, a high level signal H is output.

When the high level signal H is input from the OR circuit 331 to the input terminal S, the flip-flop circuit 332 continuously outputs the single operation determination signal X that is the high level signal H from the output terminal Q.
Note that once the high level signal H is input to the input terminal S, the flip-flop circuit 332 continues the isolated operation determination signal X even if the high level signal H is not input to the input terminal S thereafter. Output.
Then, when the high level signal H is input to the reset terminal R, the flip-flop circuit 332 enters a reset state and stops outputting the independent operation determination signal X.

  The absolute value determination circuit 330 has an absolute value of the grid current Irefd1 of 0.1 p. u. When it is less than this, a high level signal H is output. When the high level signal H is output from the absolute value determination circuit 330, the flip-flop circuit 332 is reset and the output of the isolated operation determination signal X is stopped.

When the single operation determination signal X is output from the flip-flop circuit 332 of the single operation determination unit 300, the cushion time change unit 400 sets the cushion time T4 ^* set in the limiter 221 of the cushion circuit 220 to T4 / G, and performs the single operation. When the independent operation determination signal X is no longer output from the flip-flop circuit 332 of the determination unit 300, the cushion time T4 ^* set in the limiter 221 of the cushion circuit 220 is returned to T4.

<Explanation of judgment conditions>
Next, in the first isolated operation determination circuit 310,
The inclination range determination circuit 312 determines that a relationship (first relationship) of 0>ΔIrefd1> −1 / 2T4 is established, and
By the value determination circuit 313, Irefd1> 0.1p. u. When it is determined that the relationship (second relationship) is established,
The reason why it can be determined that the system stabilizing device 20-1 is operating independently will be described.

Irefd1> 0.1 p. u. When the relationship (second relationship) is established, it is determined that the current command Irefd1 has a positive value.

As shown in FIG. 10G, −1 / T4 is an appropriate value for the slope ΔIrefd1 when the current command Irefd1 is a positive value and the value approaches zero. However, conventionally, when the single operation is performed, the value of the inclination is −1 / GT4 as shown in FIG.
Therefore, in the first relationship, one threshold value of the slope ΔIrefd1 is set to −1 / 2T4. Further, when the slope ΔIrefd1 is +, it is considered that the load is still fluctuating, and the other threshold value of the slope ΔIrefd1 is set to 0 in order to exclude it from the determination condition of the isolated operation.

The reason why “the other threshold value of the inclination ΔIrefd1 is 0” in the first relationship will be further described.
In the description of FIG. 10 and FIG. 11, a case where a load is applied and the load current increases stepwise is shown. However, in practice, the load current may increase slowly over a certain period of time. When the increase time of the load current is shorter than the fluctuation compensation time of the system stabilization device 20-1, the system stabilization device 20-1 increases its output current following the increase in the load current, and the load current is increased. When the increase in power stops, it must operate to reduce its own output current. This operation is the same in both independent operation and cooperative operation.

  In order to realize this operation, a function of “excluding from the judgment condition of isolated operation considering that the load is still fluctuating when the slope is +”, that is, “0> ΔIrefd1” as the judgment condition Incorporated. While the load current is increasing, the current command Irefd1 is also increased and the slope becomes +, and at this time, it is determined that the operation is not an independent operation.

If the determination condition is only “ΔIrefd1> −1 / 2T4”, the isolated operation determination unit 300 operates due to the occurrence of load fluctuation that takes some time (shorter than the fluctuation compensation time T4). For this reason, even during coordinated operation with the system stabilizing device 20-2, a change in load that takes some time (shorter than the variation compensation time T4) is generated and erroneously detected as an isolated operation, resulting in a coordinated operation. Will be crazy.
Therefore, in the first relationship, the determination condition is “0>ΔIrefd1> −1 / 2T4”.

Next, in the second isolated operation determination circuit 320, the above-described first relationship and the same determination condition as the above-described second relationship can be applied to the determination condition when the current command Irefd1 is negative. for,
The inclination range determination circuit 322 determines that the relationship of 0 <ΔIrefd1 <1 / 2T4 (third relationship) is established, and
The value determination circuit 323 is configured such that Irefd1 <−0.1 p. u. When it is determined that the relationship (fourth relationship) is established,
It is determined that the system stabilizing device 20-1 is operating independently.

When the absolute value of the system current Irefd1 becomes less than 0.1 by the absolute value determination circuit 330, the high level signal H is output, the flip-flop circuit 332 is reset, the output of the single operation determination signal X is stopped, and the cushion The reason why the cushion time T4 ^* is returned from T4 / G to T4 by the time changing unit 400 will be described.

This operation is a reset condition, and it is determined that the compensation for fluctuation has ended because the value of the current command Irefd1 approaches zero, and the cushion time T4 ^* is returned to T4. The determination is made in consideration of the fact that the current command Irefd1 does not become zero completely, such as when small load fluctuations occur continuously.
In this method, the isolated operation is detected every time a load change occurs. However, by detecting each time a change is detected, even when the system stabilization device 20-2 is restored, it is not necessary to stop the system stabilization device 20-1 and manually reset it. There is an advantage that it can be done.

  Next, the flip-flop circuit 332 will be described. This flip-flop circuit 332 is an SR type flip-flop circuit. When S = 0 and R = 0, Q = 0. When S = 1 is input, Q = 1 is obtained. However, even if S = 0 is restored, Q = 1 is maintained. If R = 1 is input, it is reset and Q = 0 is restored.

In this embodiment, considering that the slope of the current command Irefd1 when the load increases is an appropriate value of −1 / T4 and about −1 / GT4 when an abnormal value is obtained due to independent operation, this abnormal slope is considered. Is detected and the cushion time T4 ^* is corrected to T4 / G.
However, when the cushion time T4 ^* is corrected to T4 / G, the slope of the current command Irefd1 returns to an appropriate value -1 / T4, so the cushion time T4 ^* is returned to the original value T4 ^. . Then, the cushion time T4 ^* starts to vibrate. In order to prevent this, a flip-flop circuit 332 is added to fix the cushion time T4 ^* to T4 / G.

FIG. 2 shows a fluctuation detection block 200d according to the second embodiment of the present invention. The fluctuation detection block 200d is an improvement of the fluctuation detection block 200c of the first embodiment.
For this reason, hereinafter, the same reference numerals are given to the portions having the same functions as those in the first embodiment, and the redundant description will be omitted, and the second embodiment will be described focusing on the unique portions.

The fluctuation detection block 200d of the second embodiment is an improvement of the first embodiment in order to prevent malfunction due to noise.
In the second embodiment, the current command Irefd1 is taken into the isolated operation determination unit 300a via the low-pass filter 401 and the sampling circuit 402 that performs signal sampling at 50 Hz.
The isolated operation determination unit 300a performs an isolated operation determination process at a frequency of 50 Hz. Since the determination processing frequency can be set to a low frequency in this way, the calculation burden can be reduced.
The power supply frequency is 50 Hz in this example.

In the single operation determination circuit 310a of the single operation determination unit 300a, the delay calculation function is realized by the delay circuit 315 and the subtractor 316. That is, the slope ΔIrefd1 of the current command Irefd1 is calculated by subtracting the previous sampling signal from the current sampling signal.
Similarly, in the isolated operation determination circuit 310b of the isolated operation determination unit 300a, the delay circuit 325 and the subtracter 326 realize an inclination calculation function. That is, the slope ΔIrefd1 of the current command Irefd1 is calculated by subtracting the previous sampling signal from the current sampling signal.

Further, the isolated operation determination unit 300 a sends the signal of the OR circuit 331 to the input terminal S of the flip-flop circuit 332 via the timer circuit 333.
The timer circuit 333 is configured to send the high level signal H to the flip-flop circuit 332 when the high level signal H output from the OR circuit 331 continues for a preset time.

  The configuration of the other parts is the same as that of the first embodiment shown in FIG.

Since the differential operation is used for the determination of the isolated operation in the first embodiment, it is necessary to perform the isolated operation determination operation in the same cycle (about 20 μs to 100 μs) as the current command calculation. In addition, there is a problem that application of differential operation is likely to be affected by noise.
As a countermeasure, a method is considered in which an average value is obtained by integrating the differential result (slope) in a certain cycle, and the independent operation is determined using the average value of the slope. Here, a certain period is set to 50 Hz which is the same as the power supply period.

Here, assuming that the average is equivalent to integration over a limited period, finding the average value of the slope means integrating the differentiated one. It can be simplified. Therefore, in the second embodiment, the current command Irefd1 is acquired by the sampling circuit 402, and the slope of the current command Irefd1 is obtained using the delay circuits 315, 325 and the subtractors 316, 326.
However, since it is conceivable that noise is mixed at the same timing as sampling, the low-pass filter 401 is added in the second embodiment.

  Compared with the first embodiment, the second embodiment can reduce the influence of noise by adding a low-pass filter 401 without using a differentiating circuit. Furthermore, it is sufficient to determine the single operation at a cycle of 50 Hz, and the calculation load is increased. Can be reduced.

In the second embodiment, a timer circuit 333 is added. The timer circuit 333 performs an operation of “outputting the high level signal H only when the high level signal H is input beyond the preset set time”.
Although the low-pass filter 401 is added in the second embodiment, there is a possibility that a malfunction may occur when a large amount of noise that cannot be removed even by the low-pass filter 401 is input.
Therefore, the timer circuit 333 is added to solve this problem. Since the timer circuit 333 is provided, even if noise is mixed once or twice within the set time, it is not erroneously determined that the single operation is being performed.

1 is a circuit diagram showing a fluctuation detection block according to Embodiment 1 of the present invention. The circuit diagram which shows the fluctuation | variation detection block which concerns on Example 2 of this invention. The circuit block diagram which shows a microgrid. The circuit block diagram which shows the microgrid provided with one system stabilization apparatus. The circuit diagram which shows the control part of a system | strain stabilization apparatus. The circuit diagram which shows the conventional fluctuation | variation detection block. The circuit block diagram which shows the microgrid provided with two system stabilization apparatuses. The circuit diagram which shows the other example of the conventional fluctuation | variation detection block. The circuit diagram which shows the other example of the conventional fluctuation | variation detection block. The wave form diagram which shows the signal waveform at the time of cooperative operation. The wave form diagram which shows the signal waveform at the time of an independent operation.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Power system 2 Circuit breaker 10 Distribution system 11 Distributed power supply 12 Load 20,20-1,20-2 System stabilization device 21,21-1,21-2 Control part 22,22-1,2-22-2 Power converter 23, 23-1, 23-2 DC charging unit 24, 26, 26-1, 26-2 Current detector 25, 25-1, 25-2 Voltage detector 105, 106, 123, 124, 200a to 200d Variation Detection block 201 Low pass filter 202 Subtractor 203 Amplifier 204 Subtractor 205 Output switch 210, 220 Cushion circuit 211, 221 Limiter 212, 222 Delay circuit 213, 223 Subtractor 214, 224 Adder 300 Independent operation determination unit 310, 320 Independent operation Determination circuit 311, 321 Differentiation circuit 312, 322 Inclination range determination circuit 313, 323 Judgment circuit 314, 324 the AND circuit 315, 325 delay circuits 316 and 326 subtracter 330 absolute value determining circuit 331 OR circuit 332 flip-flop circuit 333 timer circuit 400 cushioning time changing unit 401 lowpass filter 402 sampling circuit

Claims (2)

When the power system is normal, the system is connected to the power system. When an abnormality occurs in the power system, the system is disconnected from the power system, and a plurality of system stabilization devices are connected to the power distribution system to which the distributed power source and the load are connected. In a system system in which the charge / discharge time of one system stabilization device is shorter than the charge / discharge time of another system stabilization device,
The system stabilizing device includes a control unit and a power converter that performs a forward conversion operation and an inverse conversion operation according to a gate signal transmitted from the control unit,
The controller is
When the power system is normal, an effective part of the system current and an ineffective part of the system current are obtained from the system current flowing into the distribution system from the power system, and the effective part of the system current is obtained by the first fluctuation detection block. The variation included is determined as an effective current command, and the variation included in the invalid portion of the grid current is determined by the second variation detection block, and the variation is defined as an invalid current command. Further, an effective part of the converter current and an ineffective part of the converter current are obtained from the converter current input and output by the power converter, and an effective value which is a deviation between the effective current command and the effective part of the converter current is obtained. Output a gate signal with zero current deviation of zero and zero current deviation of the invalid part, which is a deviation between the current command of the invalid part and the invalid part of the converter current,
When an abnormality occurs in the power system, a frequency signal indicating the frequency of the system voltage and an amplitude signal indicating the amplitude of the system voltage are obtained from the system voltage of the distribution system, and are included in the frequency signal by a third fluctuation detection block A variation is obtained, and the variation is used as an effective current command. A variation included in the amplitude signal is obtained by a fourth variation detection block, and the variation is used as an invalid current command. Further, the power conversion The effective part of the converter current and the invalid part of the converter current are obtained from the converter current input and output by the converter, and the current deviation of the effective part which is the deviation between the current command of the effective part and the effective part of the converter current is obtained. A gate signal is set to zero, and the current deviation of the reactive part, which is a deviation between the current command of the reactive part and the invalid part of the converter current, is set to zero,
In addition, the first to fourth fluctuation detection blocks of the one system stabilizing device are:
A low-pass filter (201) with a time constant determined for the purpose of noise removal;
When the output signal of the low-pass filter (201) is input and the first cushion time is set, and the value of the input signal changes, the signal change value per unit time is set to the length of the first cushion time. A first cushion circuit (210) that outputs a signal gently according to the length;
A subtractor (202) for subtracting the output signal of the cushion circuit (210) from the output signal of the low-pass filter (201) and outputting a current command (Irefd0);
An amplifier (203) for amplifying the current command (Irefd0) output from the subtractor (202) and outputting the amplified current command (Irefd00);
When the output signal of the amplifier (203) is input, a second cushion time that is longer than the first cushion time and variable in setting time is set, and when a change occurs in the value of the input signal, per unit time A second cushion circuit (220) for gradually outputting a signal change value according to the length of the second cushion time and outputting a signal;
A subtractor (204) for subtracting the output signal of the cushion circuit (220) from the current command (Irefd00) and outputting a first current command (Irefd1);
Either the first current command (Irefd1) output from the subtracter (204) or the second current command (Irefd2) which is the output signal of the second cushion circuit (220) is selected and output. Output switch (205),
An independent operation determination unit that determines whether one system stabilization device is operating independently based on the slope and magnitude of the first current command (Irefd1);
When the single operation determination unit determines that one system stabilization device is operating independently, the second cushion time is set to a predetermined short time, and the single operation determination unit sets one system stabilization. A cushion time changing unit that sets the second cushion time to a predetermined long time when it is determined that the control device is not operating alone;
A system stabilizing device characterized by comprising: In the system stabilization device according to claim 1,
The islanding determination unit
When the first current command (Irefd1) exceeds a predetermined positive value and the slope of the first current command (Irefd1) is less than zero and exceeds a predetermined negative value, a determination signal is output. A first isolated operation determination circuit for outputting;
Determination signal when the first current command (Irefd1) is less than a predetermined negative value and the slope of the first current command (Irefd1) is greater than zero and less than a predetermined positive value A second islanding operation determination circuit that outputs
An absolute value determination circuit that outputs a determination signal when the first current command (Irefd1) is less than a predetermined positive value;
When a determination signal is once output from at least one of the first isolated operation determination circuit and the second isolated operation determination circuit, it is determined that the operation is independent until the determination signal is output from the absolute value determination circuit,
A system stabilization apparatus, wherein when a determination signal is output from the absolute value determination circuit, it is determined that it is not an independent operation.

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