JP5237780B2 - Manufacturing method of semiconductor light emitting device - Google Patents

Description

  The present invention relates to a method for manufacturing a semiconductor light emitting device.

  A semiconductor light emitting device such as a light emitting diode is manufactured by forming a semiconductor film composed of an n layer, an active layer, a p layer, etc. on a growth substrate such as a sapphire substrate, and forming electrodes on the growth substrate and the semiconductor surface. Is done. When the growth substrate is an insulator, a part of the semiconductor layer is etched using a technique such as reactive ion etching to expose the n layer, and an electrode is formed on each of the n layer and the p layer. To do.

  Semiconductor light emitting devices have been improved in efficiency and output due to recent technological advances. However, as the output increases, the amount of heat generated from the semiconductor light emitting element also increases, and this causes problems such as a decrease in reliability such as a decrease in efficiency of the semiconductor light emitting element and a deterioration of the semiconductor film. In order to solve this problem, the growth substrate having a relatively low thermal conductivity is removed, and instead, the semiconductor film is supported by a metal having a relatively high thermal conductivity. By adopting such a structure, the heat dissipation of the semiconductor light emitting device can be improved, and the light emission efficiency, particularly the light extraction efficiency can be improved by removing the growth substrate. That is, it is possible to reduce the light component that is totally reflected at the interface due to light absorption that occurs when light passes through the growth substrate and the difference in refractive index between the semiconductor film and the growth substrate. Generally, the growth substrate is peeled off by using a laser lift-off (LLO) method.

Patent Literature 1 and Patent Literature 2 describe a method of peeling a growth substrate without using a laser lift-off method. The manufacturing method of the semiconductor element described in Patent Document 1 is as follows. First, a mask made of SiO ₂ arranged in a stripe shape is formed on a growth substrate. Next, a GaN film is selectively grown in the opening of the mask. Next, before the GaN films adjacent to each other across the mask are completely fused, the wafer is taken out of the HVPE apparatus, and the mask is removed by etching to form a cavity inside the GaN film. Next, the wafer is set in the HVPE apparatus again, and a GaN film is further grown while maintaining the gap. Thereafter, the sapphire substrate is peeled from the GaN film using the difference in thermal expansion coefficient between the GaN film and the sapphire substrate when the ambient temperature is lowered.

On the other hand, the manufacturing method of the semiconductor element described in Patent Document 2 is as follows. A separation layer in which aluminum nitride or the like is dispersed and arranged in an island shape is formed between the sapphire substrate and the semiconductor crystal layer. Thereafter, the sapphire substrate is peeled off by flowing an etchant into the cavity formed in the separation layer and etching the separation layer.
JP 2006-315895 A JP 2001-36139 A

When the growth substrate is peeled off using the LLO method, the nitride semiconductor that has absorbed the laser light is decomposed to generate N ₂ gas, and this gas pressure causes cracks in the semiconductor film or is caused by absorption of the laser light. The heat generated may cause deterioration of the crystal quality of the semiconductor film. In addition, in order to carry out the LLO method, it is necessary to introduce an expensive dedicated device, resulting in an increase in cost. Further, in the LLO method, it is difficult to process a large number of wafers at once, and a process in which laser light is scanned over the entire surface of the wafer requires a relatively long processing time. As the wafer diameter increases, the processing time becomes longer. Therefore, if the growth substrate can be easily removed using wet etching, it is often advantageous from the viewpoint of quality, cost, processing time, and the like.

  According to the manufacturing methods described in Patent Documents 1 and 2, the growth substrate can be peeled off without using the LLO method. However, in the manufacturing method described in Patent Document 1, in order to form a cavity inside the GaN film, the wafer is once taken out from the HVPE apparatus, the mask is etched, and then set in the HVPE apparatus again to grow the GaN film. Since it becomes a process, a process becomes complicated and a great deal of processing time is required. In the manufacturing method described in Patent Document 2, since the semiconductor crystal layer is grown from the separation layer, depending on the material of the separation layer and the film formation conditions, a GaN-based material may be formed on the separation layer via the buffer layer. It is not easy to epitaxially grow the semiconductor crystal layer.

  This invention is made | formed in view of this point, and it aims at providing the manufacturing method of the semiconductor light-emitting device which can perform peeling of the growth board | substrate easily by a wet etching process.

  The method for manufacturing a semiconductor light emitting device of the present invention includes a mask forming step of forming a selective growth mask partially covering the growth substrate on the growth substrate, and removing the constituent material of the mask. A reattachment forming step for forming a reattachment on the non-mask portion that is not covered with the mask on the growth substrate; and a semiconductor film is epitaxially grown from the nonmask portion of the growth substrate. A semiconductor layer forming step of forming a semiconductor layer covering the mask; a support substrate bonding step of bonding a support substrate on the semiconductor layer; and the growth substrate by removing the mask and the reattachment by wet etching. And a growth substrate removing step of removing the substrate from the semiconductor layer and the supporting substrate.

  The semiconductor layer forming step includes a step of forming a cavity-containing layer including a cavity provided on the mask, and a step of forming a semiconductor epitaxial layer including a light emitting layer on the cavity-containing layer. The redeposition material is wet etched by the etchant that has flowed into the cavity in the growth substrate removing step.

  The reattachment forming step includes a heat treatment under a hydrogen reduction atmosphere, and the reattachment is configured so that the constituent material of the mask is dispersed in an island shape on the growth substrate.

  The mask has a stripe pattern in which a mask portion and a non-mask portion are alternately arranged, an interval between the mask portions adjacent to each other is 5 μm or less, and the mask portion has a width of the mask portion. It is preferable that it is wider than the width of the non-mask portion.

  The step of forming the void-containing layer includes a step of alternately performing the first step and the second step of growing the group III nitride at a plurality of different growth rates. In the first step where the growth rate is relatively low, vertical growth is promoted, and in the second step where the growth rate is relatively high, lateral growth is promoted.

  The method for manufacturing a substrate with a semiconductor epitaxial layer according to the present invention is a method for manufacturing a substrate with a semiconductor epitaxial layer, which includes a growth substrate and a semiconductor epitaxial layer laminated on the growth substrate, Forming a mask for selective growth partially covering the substrate on the growth substrate; and removing a constituent material of the mask to form a non-mask portion not covered with the mask on the growth substrate A step of forming a reattached reattachment, and a step of epitaxially growing a semiconductor film from the non-mask portion of the growth substrate to form the semiconductor layer covering the mask. .

  The substrate with a semiconductor epitaxial layer of the present invention is a substrate with a semiconductor epitaxial layer including a growth substrate and a semiconductor epitaxial layer laminated on the growth substrate, and partially covers the growth substrate. A reattachment in which a mask for selective growth is formed on the growth substrate, the constituent materials of the mask are removed, and this is reattached to a non-mask portion on the growth substrate that is not covered with the mask. It is characterized in that it is obtained by forming a kimono and epitaxially growing a semiconductor film from the non-mask portion of the growth substrate to form the semiconductor layer covering the mask.

BEST MODE FOR CARRYING OUT THE INVENTION

  Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a manufacturing process flow diagram of a semiconductor light-emitting device according to an embodiment of the present invention. 2-4 is sectional drawing for every manufacturing process of the semiconductor light-emitting device which is an Example of this invention.

(Selective Growth Mask Formation Step Step S1)
First, a growth substrate is prepared. In this example, a C-plane sapphire substrate 10 capable of forming a GaN-based semiconductor epitaxial layer by MOCVD (metal organic vapor phase epitaxy) was used as a growth substrate.

Next, a mask layer for selectively growing a GaN film is formed on the sapphire substrate 10. The mask layer is composed of SiO ₂ masks 20 arranged in a stripe pattern on the sapphire substrate 10. The procedure for forming the mask layer is as follows. First, a SiO ₂ film having a thickness of about 150 nm is deposited on the sapphire substrate 10 by an EB (electron beam) method or the like. Then, this was formed a resist mask SiO ₂ film is subjected to striped patterning by selectively removing the SiO ₂ film by dry etching using, for example, CHF _3. In this embodiment, the SiO ₂ film is removed by 1μm wide, to form a stripe pattern in which the mask portion 21 and the non-masked portions 22 are alternately arranged by leaving a SiO ₂ of 4μm wide. That is, 4 μm wide SiO ₂ masks are formed on the sapphire substrate 10 at a pitch of 5 μm. Each of the SiO ₂ masks 20 arranged in a stripe shape is formed so as to extend from one end on the sapphire substrate 10 to the other end facing the sapphire substrate 10 (FIG. 2A).

In this embodiment, the mask layer is formed of SiO _2. However, any material that can selectively grow a GaN film and can be wet-etched may be used. For example, Si, Ti oxide, SiN TiN can also be used. Although the film thickness of the SiO ₂ film can be formed, for example, in the range of 100 to 500 nm, it is preferably 100~200nm considering the growing ease of film formation time and subsequent GaN film.

Further, the SiO ₂ film forming method is not limited to the EB method, and for example, a sputtering method, a plasma CVD method, or a thermal CVD method may be used. Etching of the SiO ₂ film is not limited to dry etching using CHF _{3 but} may be dry etching using CF ₄ and C ₂ F ₈ or the like, and HF, BHF, NH ₄ F + HF, KOH, NaOH (oxidation) Material), hot phosphoric acid, and wet etching using phosphoric acid + sulfuric acid (nitride).

Further, the SiO ₂ mask is only required to be discretely formed on the sapphire substrate 10 with an appropriate interval, and is not limited to a stripe shape, and is equivalent to an axis parallel to the crystal orientation <10-10> of the GaN crystal. It may be a polygon having sides parallel to a simple axis, or a pattern in which such polygons are arranged in a grid. As will be described later, a cavity into which an etchant for wet etching flows is formed above the mask. For this reason, it is preferable that the mask pattern is a continuous pattern from one end of the sapphire substrate 10 to the other end facing the sapphire substrate 10 and does not have an isolated region on the wafer. As a result, the etchant introduced from the wafer end surface can penetrate to the center of the wafer, and the growth substrate can be quickly removed.

Alternatively, the SiO ₂ mask may be formed by first forming a pattern with a photoresist on the sapphire substrate 10, then depositing a SiO ₂ film, and lifting off unnecessary portions deposited on the resist mask.

  Further, the growth substrate is not limited to the sapphire substrate, and may be any substrate suitable for the growth of a semiconductor layer such as a Si or SiC substrate.

(Reattachment layer forming step Step S2)
Next, the sapphire substrate 10 on which the SiO ₂ mask 20 is formed is set in an MOCVD apparatus controlled at 1000 ° C., and treated for 7 minutes in a reducing atmosphere (hydrogen flow rate 12 LM, nitrogen flow rate 6 LM). SiO ₂ constituting the SiO ₂ mask 20 is decomposed and eliminated from the mask unit 21 by exposure to a high temperature reducing atmosphere of. The desorbed SiO ₂ scatters in the reducing atmosphere, and a part thereof is reattached on the sapphire substrate 10 which is the non-mask portion 22. By performing the heat treatment appropriate time, on the unmasked portion 22, redeposition layer reattachment 23 having a thickness of several Å approximately SiO ₂ was deposited so as to be distributed in an island shape is formed (FIG. 2 (b)).

The redeposits 23 and the SiO ₂ mask 20 function as a sacrificial film that is etched away in the subsequent growth substrate removing step (step S7). The SiO ₂ redeposits 23 which are interposed between the sapphire substrate 10 and the GaN film are etched later and disappear, thereby facilitating peeling of the sapphire substrate 10.

In order for the reattachment 23 to function as a sacrificial film and to peel the sapphire substrate 10 satisfactorily, it is important to uniformly distribute SiO ₂ desorbed from the mask portion 21 on the non-mask portion 22. This is because if the area where SiO ₂ re-adhesion does not occur on the non-mask portion 22 becomes large, the area of the junction between the sapphire substrate and the GaN film increases, and the sapphire substrate 10 may not be peeled off. is there. The "a uniform distribution of SiO _2" includes a state in which the islands of SiO ₂ of reattachment 23 are dispersed evenly on the unmasked portion 22, necessarily SiO ₂ thin film on the unmasked portion 22 Does not need to form.

In order to uniformly distribute the SiO ₂ redeposition material 23 on the non-mask portion 22, it is important to appropriately set the pattern configuration of the SiO ₂ mask 20, that is, the width dimension of the mask portion 21 and the non-mask portion 22. It becomes. That is, since the scattering distance of the detached SiO ₂ is limited, when the separation distance of the mask portion 21, that is, the width of the non-mask portion 22 is 5 μm or more, the central portion in the width direction of the non-mask portion 22 is the mask portion. Since the distance from 21 becomes longer, the reattachment 23 of SiO ₂ becomes difficult to deposit. Therefore, the width of the non-mask portion 22 is set to 5 μm or less, more preferably 1 μm or less. On the other hand, the width of the mask portion 21 is preferably set to 1 to 5 μm in consideration of processing accuracy and formation of the cavity 41 on the mask portion 21 in a later process. The width of the mask portion 21 is preferably wider than the width of the non-mask portion 22, and the ratio is preferably 3: 1 to 4: 1.

Further, the heat treatment in this step is preferably performed under conditions that promote the decomposition and desorption of SiO ₂ and is preferably performed in a hydrogen-rich reducing atmosphere at 1000 ° C. or higher. In addition, since the GaN film is selectively grown on the sapphire substrate 10 exposed in the non-mask portion 22 in a later step, if the film thickness of the reattachment 23 becomes too thick, the crystallinity of the upper semiconductor epitaxial layer 50 is adversely affected. Will be affected. Therefore, the film thickness of the SiO ₂ reattachment 23 deposited on the non-mask portion 22 is preferably 1 nm or less so as not to impair the crystallinity of the upper GaN film. Therefore, the processing time may be appropriately set within a range of 1 to 20 minutes so that the film thickness of the redeposition layer 30 is appropriate according to the atmospheric temperature, the pattern of the SiO ₂ mask 20, and the like.

In this embodiment, the wafer is exposed to a high-temperature hydrogen reduction atmosphere to promote the decomposition and desorption of SiO ₂ and reattach it onto the non-mask portion 22. This can also be done by treatment in a plasma atmosphere or electron irradiation in the presence of hydrogen.

(Low-temperature buffer layer forming step Step S3)
Next, a low-temperature buffer layer 30 made of GaN is formed on the sapphire substrate 10 on which the SiO ₂ mask 20 and the redeposition layer are formed. The temperature in the MOCVD apparatus is lowered to 525 ° C., and trimethylgallium (TMG) (flow rate 10 μmol / min) and ammonia (NH ₃ ) (flow rate of 10 μmol / min) in a mixed atmosphere of nitrogen (flow rate 13.5 LM) and hydrogen (flow rate 4.5 LM) ( (The flow rate is 3.3 LM) (in this case, the V / III ratio is about 14000) to form the low-temperature buffer layer 30 with a thickness of about 150 nm.

When a GaN film is grown on the sapphire substrate 10 on which the SiO ₂ mask 20 is formed under such conditions, a polycrystal grows on the mask portion 21 without growing a GaN single crystal film. GaN nuclei grow only on the exposed sapphire substrate 10. Note that the SiO ₂ reattachment 23 is deposited on the non-mask portion 22 of the sapphire substrate 10, but this reattachment 23 is distributed in an island shape on the sapphire substrate 10 or an extremely thin thin film state. Therefore, it is possible to grow a GaN film on this portion.

In addition, in this process, atmospheric temperature can be set to the range of 425-625 degreeC. The TMG flow rate can be set in the range of 9 to 45 μmol / min, but is set in the range of 10 to 23 μmol in order to improve the film formation uniformity of the buffer layer 30 and the crystallinity of the upper semiconductor epitaxial layer 70. Is preferred. The V / III ratio can be set in the range of 3000 to 25000, but is preferably set in the range of 6000 to 14000 in order to increase the crystallinity of the semiconductor epitaxial layer 30. In the range of the V / III ratio, the NH ₃ flow rate can be set in the range of 3.3 to 5.5 LM. The film thickness of the buffer layer 30 can be set in the range of 30 to 400 nm.

(Cavity-containing layer forming step Step S4)
A process for growing GaN on the buffer layer 30 formed in the previous step under conditions that promote vertical growth (referred to as a first step) and a process for growing a GaN film under conditions that promote lateral growth (see FIG. Step 2) is alternately repeated a plurality of times, thereby forming a cavity-containing layer 40 having a thickness of about 400 nm on the mask portion 21 of the SiO ₂ mask 20 on the sapphire substrate 10.

Specifically, the temperature inside the MOCVD apparatus is controlled to 800 ° C., and TMG is supplied at a flow rate of 23 μmol / min in an atmosphere of a nitrogen flow rate of 6 LM and a hydrogen flow rate of 7.5 LM. ₃ is supplied at a flow rate of 2.2 LM, and a GaN film having a thickness of about 20 nm is formed on the low-temperature buffer layer 30. In this first step, vertical growth of the GaN film mainly occurs in the portion where the low temperature buffer layer 30 is grown.

On the other hand, in the second step, TMG is supplied at a flow rate of 45 μmol / min and NH ₃ is supplied at a flow rate of 4.4 LM to form a GaN film 20 having a thickness of about 80 nm. In this second step, the lateral growth of the GaN film occurs mainly starting from the top of the GaN film grown in the vertical direction through the first step (FIG. 2D).

Since the flow rates of TMG and NH ₃ are different between the first step and the second step, the growth rate of the GaN film is different, and the balance between adsorption and decomposition / desorption of Ga atoms and N atoms constituting the GaN film is different from each other. Therefore, it is thought that a difference occurs in the growth direction. The growth rate of the GaN film in the first step is 23 nm / min, and the growth rate of the GaN film in the second step is 45 nm / min.

By repeating the first step and the second step four sets alternately, adjacent GaN films are fused with the mask portion 21 of the SiO ₂ mask 20 interposed therebetween, and a cavity having a cavity 41 above each of the mask portions 21 The containing layer 40 is formed (FIG. 2E).
Each of the cavities 41 is formed along the SiO ₂ mask 20 arranged in a stripe shape. That is, each of the cavities 41 has an opening provided along the outer edge of the sapphire substrate 10 and is formed so as to communicate from one end of the wafer side surface to the other opposite end. Each of the cavities 41 functions as an etchant introduction path for introducing an etchant into the cavity-containing layer 40 when the sapphire substrate 10 is peeled off by wet etching in the subsequent growth substrate removing step (step S7). Further, in this step, the lateral growth is performed a plurality of times, so that crystal defects generated at the interface between the sapphire substrate 10 and the GaN film are bent and do not propagate to the upper layer portion. Defect density is reduced.

In this manner, a substrate with a semiconductor epitaxial layer in which the cavity-containing layer 40 is laminated on the growth substrate 10 via the redeposition layer of the SiO ₂ film is formed. Such a laminated structure can be used as a growth substrate with a peeling function to which a peeling function capable of performing the peeling of the growth substrate 10 by wet etching is added.

In this step, the ambient temperature can be set in the range of 700 to 900 ° C. In the first step, the TMG flow rate can be set to a range of 10 to ₃₀ μmol / min, and the NH ₃ flow rate can be set to a range of 1 to ₃ LM. In the second step, the TMG flow rate can be set to a range of ₃₀ to 70 μmol / min, and the NH ₃ flow rate can be set to a range of ₃ to 7 LM. Further, the film thickness of the GaN film formed in the first step can be changed in the range of 10 to 60 nm and the film thickness of the GaN film formed in the second step can be changed in the range of 30 to 140 nm according to the size and shape of the cavity 41. The overall film thickness of the cavity-containing layer 40 can be 200 nm to 1000 nm. The cavity-containing layer 40 may be doped with Si at a maximum of 5 × 10 ¹⁷ atoms / cm ³ .

  The cross-sectional shape of the cavity 41 can be controlled by the thickness of the buffer layer 30 and the growth conditions of the cavity-containing layer 40. Specifically, when the thickness of the buffer layer 30 is 100 nm or less, the cross-sectional shape of the cavity 41 becomes a substantially triangular shape, and when the thickness of the buffer layer 30 is 100 nm or more, the cross-sectional shape of the cavity 41 is a substantially rectangular shape. It becomes a shape. Further, in the void-containing layer forming step, the cavity 41 is set by setting the processing time of the first step that promotes the vertical growth of the GaN film to be longer than the treatment time of the second step that promotes the lateral growth. The cross-sectional shape of the cavity 41 becomes a substantially triangular shape, and the cross-sectional shape of the cavity 41 becomes a substantially rectangular shape by setting the processing time of the second step to be longer than the processing time of the first step.

(Semiconductor epitaxial layer formation process step S5)
Next, a semiconductor epitaxial layer 50 including an n layer 51, a light emitting layer 52, and a p layer 53 made of a GaN-based semiconductor is formed on the cavity-containing layer 40 by MOCVD (FIG. 3F).

Specifically, the ambient temperature is set to 1000 ° C., TMG (flow rate 45 μmol / min), NH ₃ (flow rate 4.4 LM), and SiH ₄ as a dopant gas are supplied, and Si is doped at 5 × 10 ¹⁸ atoms / cm ^3. An n layer 51 having a thickness of about 1 to 10 μm is formed. The flow rate of TMG can be changed in the range of 10 to 70 μmol / min. NH ₃ can be changed within a range of 3.3 to 5.5LM. The V / III ratio can be set in the range of 2000 to 22500, more preferably 3000 to 8000.

Next, the ambient temperature is set to 760 ° C., TMG (flow rate 3.6 μmol / min), trimethylindium (TMI) (flow rate 3.6 μmol / min) and NH ₃ (flow rate 4.4 LM) are supplied, and GaN / In _y A strain relaxation layer (not shown) is formed by forming 30 pairs of Ga _1-y N (2 nm each). The flow rates of TMG and TMI can be changed in the range of 1 to 10 μmol / min. In this case, it is necessary to simultaneously change the TMI and the TMG flow rate so that the In composition is about y = 0.2. The flow rate of NH ₃ can be changed in the range of 3.3 to 5.5LM. In _x Ga _1-x N may be formed instead of GaN. In this case, it is necessary to adjust the flow rate so as to satisfy x <y. Moreover, the film thickness of the strain relaxation layer can be changed in the range of 50 to 300 nm by changing the film thickness and the number of pairs of each layer of GaN / In _y Ga _1-y N. Further, the strain relaxation layer may be doped with Si at a maximum of 5 × 10 ¹⁷ atoms / cm ³ .

Next, the ambient temperature is set to 730 ° C., TMG (flow rate 3.6 μmol / min), TMI (flow rate 10 μmol / min) and NH ₃ (flow rate 4.4 LM) are supplied, and a GaN barrier layer / In _y GaN well layer ( By forming five pairs each of 14 nm / 2 nm), the light emitting layer 52 having a multiple quantum well structure is formed. The flow rates of TMG and TMI can be changed in the range of 1 to 10 μmol / min. In this case, it is necessary to simultaneously change the TMI and TMG flow rates so that the y value indicating the In composition ratio is about 0.35. The flow rate of NH ₃ can be changed in the range of 3.3 to 5.5LM. The light emitting layer 52 may be doped with Si at a maximum of 5 × 10 ¹⁷ atoms / cm ³ .

Next, the ambient temperature was set to 870 ° C., TMG (flow rate 8.1 μmol / min), trimethylaluminum (TMA) (flow rate 7.6 μmol / min), NH ₃ (flow rate 4.4 LM), and CP2Mg (bis- By supplying cyclopentadienyl Mg), a pAl _z Ga _1-z N layer (not shown) having a thickness of about 40 nm doped with 1 × 10 ²⁰ atoms / cm ³ of Mg is formed. The TMG flow rate can be changed in the range of 4 to 20 μmol / min. In this case, it is necessary to simultaneously change the flow rates of TMG and TMA so that the composition of Al is about z = 0.2. The flow rate of NH ₃ can be changed in the range of 3.3 to 5.5LM. The film thickness of the pAl _z GaN _1-z layer can be changed in the range of 20 to 60 nm.

Next, the ambient temperature is set to 870 ° C., and TMG (flow rate: 18 μmol / min), NH ₃ (flow rate: 4.4 LM), and CP2Mg (bis-cyclopentadienyl Mg) as a dopant gas are supplied, whereby Mg becomes 1 × 10 ²⁰ atoms / A p 3 layer 73 having a thickness of about 200 nm doped with cm ³ is formed. The TMG flow rate can be changed in the range of 8 to 36 μmol / min. The flow rate of NH ₃ can be changed in the range of 3.3 to 5.5LM. Further, the thickness of the p layer 33 can be changed within a range of 100 to 300 nm. Subsequently, the p layer 53 is activated by performing heat treatment for about 1 minute in a nitrogen atmosphere at about 900 ° C.

(Support Substrate Bonding Step Step S6)
Next, Pt (10 Å) and Ag (3000 Å) are deposited in this order on the p layer 53 by the EB method or the like to form the electrode layer 61. The Pt layer ensures ohmic contact with the p layer 53, and the Ag layer ensures high reflectivity. Subsequently, Ti (1000 Å), Pt (2000 Å) and Au (2000 Å) are deposited in this order to form the adhesive layer 62. The adhesive layer 62 constitutes an adhesive portion with the support substrate 90 described later (FIG. 3G).

Next, a support substrate 70 for supporting the semiconductor epitaxial layer 50 is prepared instead of the sapphire substrate 10. As the support substrate 70, for example, a Si single crystal substrate or a metal substrate such as copper can be used. On the support substrate 70, an adhesive layer 71 in which Pt, Ti, Ni, Au, and AuSn are laminated in this order is formed by an EB method or the like. Subsequently, the adhesive layer 71 and the adhesive layer 62 formed on the semiconductor epitaxial layer 50 are brought into close contact with each other and thermocompression-bonded in a vacuum or an N ₂ atmosphere, so that the support substrate 70 is placed on the p layer 53 side of the semiconductor epitaxial layer 50. Is pasted (FIG. 3H). The support substrate 70 may be formed by plating and growing a metal film such as Cu on the adhesive layer 62.

(Growth Substrate Removal Step Step S7)
Next, the wafer having undergone the above steps is immersed in a hydrofluoric acid (HF) aqueous solution, and the SiO ₂ reattachment 23 deposited on the SiO ₂ mask 20 and the non-mask portion 22 is etched to peel off the sapphire substrate 10. In this wet etching process, an etchant flows into the cavity 41 formed in the cavity-containing layer 40. In the wet etching process using HF, SiO ₂ is selectively etched and the GaN film remains as it is. When the SiO ₂ mask 20 and the SiO ₂ reattachment 23 interposed between the sapphire substrate 10 and the GaN film are selectively etched and disappear by this wet etching process, the sapphire substrate 10 is peeled off. Even if peeling does not occur at this stage, the sapphire substrate 10 can be easily peeled by applying an external force such as mechanical shock, thermal shock, or ultrasonic wave (FIG. 4 (i)).

The etchant used in this wet etching process may be any one that dissolves SiO _2. For example, BHF, a mixed solution of NH ₄ F and HF, hot phosphoric acid, KOH, NaOH, or the like can be used.

  In addition, after this step, the surface of the GaN film exposed by peeling off the sapphire substrate 10 is etched using KOH or the like, and hexagonal pyramidal projections (so-called microscopic) derived from the crystal structure of GaN are formed on this peeling surface. Surface treatment for forming a large number of cones may be performed. The light extraction efficiency can be improved by forming a large number of irregularities on the light extraction surface. Such surface treatment may be performed by dry etching using Ar plasma or chlorine plasma.

(Electrode formation process step S8)
Next, Ti and Al are sequentially deposited on the surface of the GaN film exposed by peeling the sapphire substrate 10 by the EB method or the like, and further Ti / Au is deposited on the outermost surface to improve the bondability. The electrode 80 is formed (FIG. 4 (j)). In addition to Ti / Al, Al / Rh, Al / Ir, Al / Pt, Al / Pd, or the like may be used as the electrode material.

(Chip Separation Process Step S9)
Next, the semiconductor epitaxial layer 50 with the support substrate on which the n-electrode 80 is formed is separated into individual chips. In this step, first, a pattern in which grooves are provided between the chips on the surface of the semiconductor epitaxial layer 50 is patterned with a resist. Next, a groove is formed from the surface of the semiconductor epitaxial layer 50 to a depth reaching the electrode layer 61 by using reactive ion etching (Reactive Ion Etching). Thereafter, the support substrate 70 and the like are scribed and separated into chips. Further, a technique such as laser dicing may be used. The semiconductor light emitting device is completed through the above steps.

  As described above, according to the method for manufacturing a semiconductor light emitting device of the present invention, it is possible to peel off the sapphire substrate only by wet etching without using the LLO method. Problems such as cracks in the semiconductor film caused by peeling of the growth substrate used can be avoided. Further, batch processing of a plurality of wafers is facilitated in the growth substrate removing step, and productivity can be improved.

In addition, according to the method for manufacturing a semiconductor light emitting device of the present invention, the SiO ₂ mask functioning as a sacrificial film and the SiO ₂ reattachment layer are formed by causing the cavity formed in the cavity-containing layer to function as an etchant introduction path. Etching can be performed in a short time, and the processing time can be shortened. Moreover, since the cavity functioning as the introduction path for the etchant is formed during the growth process of the GaN film, the processing is not complicated and an increase in the processing time can be avoided. Further, since the sapphire substrate can be peeled by removing SiO ₂ , HF or the like can be used as an etchant, and the sapphire substrate can be peeled without etching the GaN film. Therefore, it is not necessary to increase the thickness of the GaN film in anticipation of etching of the GaN film, and the processing time is not increased.

In addition, according to the method of the present invention in which the sapphire substrate is peeled off by dispersing SiO ₂ redeposits on the sapphire substrate and functioning as a sacrificial film, the GaN film is grown from the sapphire substrate. Therefore, it is possible to apply the existing growth conditions as they are, and it is easy to form a GaN film having high crystallinity as compared with the case where the growth is performed from the separation layer as described in Patent Document 2. It is.

  Further, in the cavity-containing layer forming step, by alternately repeating the vertical growth and the lateral growth, the cavity-containing layer can be flattened at an early stage of the growth process while including the cavity, and the cavity-containing layer is formed thin. I can. In addition, since the lateral growth is performed multiple times in this process, crystal defects generated at the interface between the sapphire substrate and the GaN film are bent and do not propagate to the upper layer, thereby reducing the defect density of the semiconductor epitaxial layer. Is done.

  In the above-described embodiment, the cavity formed in the cavity-containing layer is used as the etchant introduction path. However, the etchant can be introduced from the outer peripheral portion of the wafer. The GaN film formed on the sapphire substrate may generate internal stress due to the difference in crystallinity between the lower layer portion and the upper layer portion, and the wafer outer peripheral portion may warp upward. On the other hand, since the sapphire substrate is flat, natural peeling occurs at the interface between the sapphire substrate and the GaN film on the outer periphery of the wafer. In the case where the GaN film is thick or in the structure in which the support substrate is pasted on the GaN film as in this embodiment, the internal stress is further increased, so that the natural peeling of the outer periphery of the wafer becomes remarkable, and this natural It is possible to peel the sapphire substrate by flowing an etchant from the outer peripheral portion of the wafer where peeling has occurred. Therefore, in such a case, a cavity for introducing an etchant is not always necessary.

It is a manufacturing process flowchart of the semiconductor light-emitting device which is an Example of this invention. 2A to 2E are cross-sectional views for each manufacturing process of the semiconductor light-emitting element according to the embodiment of the present invention. 3 (f) to 3 (h) are cross-sectional views for each manufacturing process of the semiconductor light emitting device according to the embodiment of the present invention. 4 (i) to 4 (j) are cross-sectional views for each manufacturing process of the semiconductor light-emitting element according to the embodiment of the present invention.

Explanation of symbols

10 sapphire substrate 20 SiO ₂ mask 21 mask portion 22 unmasked portion 23 reattachment 30 low-temperature buffer layer 40 the void-containing layer 41 cavity 50 semiconductor epitaxial layer 70 the support substrate

Claims (18)

A method for manufacturing a semiconductor light emitting device, comprising:
Forming a mask for selective growth partially covering the growth substrate on the growth substrate; and
A reattachment forming step of forming a reattachment by desorbing the constituent material of the mask and reattaching it to a non-mask portion not covered with the mask on the growth substrate;
A semiconductor layer forming step of forming a semiconductor layer covering the mask by epitaxially growing a semiconductor film from the non-mask portion of the growth substrate;
A support substrate bonding step of bonding a support substrate on the semiconductor layer;
And a growth substrate removal step of removing the growth substrate from the semiconductor layer by removing the mask and the reattachment by wet etching. The semiconductor layer forming step includes a step of forming a cavity-containing layer including a cavity provided on the mask, and a step of forming a semiconductor epitaxial layer including a light emitting layer on the cavity-containing layer. 2. The method of manufacturing a semiconductor light emitting device according to claim 1, wherein the reattachment is wet-etched by an etchant that has flowed into the cavity in the growth substrate removing step.   The method of manufacturing a semiconductor light emitting device according to claim 1, wherein the wet etching is performed using an etchant that selectively etches the mask and the reattachment.   4. The method of manufacturing a semiconductor light emitting element according to claim 1, wherein the reattachment forming step includes a heat treatment under a hydrogen reducing atmosphere. 5. The semiconductor film is a film formed of a gallium nitride compound semiconductor,
5. The mask according to claim 1, wherein the mask has a polygonal shape having an axis parallel to <10-10> of the crystal orientation of the semiconductor film and a side parallel to an equivalent axis. The manufacturing method of the semiconductor light-emitting device of description.   6. The method of manufacturing a semiconductor light emitting element according to claim 5, wherein the selective growth mask has a continuous pattern from one end to the other end of the growth substrate.   The method for manufacturing a semiconductor light emitting element according to claim 1, wherein an interval between the masks adjacent to each other is 5 μm or less.   8. The method of manufacturing a semiconductor light emitting element according to claim 1, wherein the mask has a stripe pattern in which mask portions and non-mask portions are alternately arranged.   9. The method of manufacturing a semiconductor light emitting element according to claim 8, wherein the mask portion has a width of the mask portion wider than that of the non-mask portion.   3. The step of forming the cavity-containing layer includes a step of alternately performing a first step and a second step of growing the group III nitride at a growth rate different from each other a plurality of times. The manufacturing method of the semiconductor light-emitting device of description.   The method of manufacturing a semiconductor light emitting device according to claim 10, wherein the step of forming the cavity-containing layer includes a step of laterally growing the group III nitride.   12. The semiconductor light emitting element according to claim 1, wherein in the reattachment forming step, the constituent material of the mask is reattached so as to be dispersed in an island shape on the growth substrate. Production method.   The method of manufacturing a semiconductor light emitting element according to claim 12, wherein the reattachment has a thickness of 1 nm or less. A method for producing a substrate with a semiconductor epitaxial layer, comprising a growth substrate and a semiconductor epitaxial layer laminated on the growth substrate,
Forming a selective growth mask partially covering the growth substrate on the growth substrate;
Removing the constituent material of the mask to form a reattachment that is reattached to a non-mask portion not covered with the mask on the growth substrate;
And a step of epitaxially growing a semiconductor film from the non-mask portion of the growth substrate to form the semiconductor layer covering the mask.   15. The method for manufacturing a substrate with a semiconductor epitaxial layer according to claim 14, wherein the step of forming the semiconductor layer includes a step of forming a cavity-containing layer including a cavity provided on the mask.   16. The step of forming the cavity-containing layer includes a step of alternately performing a first step and a second step of growing the semiconductor layer at different growth rates a plurality of times. A method for manufacturing a substrate with a semiconductor epitaxial layer. A substrate with a semiconductor epitaxial layer comprising a growth substrate and a semiconductor epitaxial layer laminated on the growth substrate,
Forming a selective growth mask partially covering the growth substrate on the growth substrate;
Forming a reattachment by desorbing the constituent material of the mask and reattaching it to a non-mask part not covered with the mask on the growth substrate,
A substrate with a semiconductor epitaxial layer obtained by epitaxially growing a semiconductor film from the non-mask portion of the growth substrate to form the semiconductor layer covering the mask.   The substrate with a semiconductor epitaxial layer according to claim 17, wherein the semiconductor layer includes a cavity-containing layer having a cavity provided on the mask.

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